diff --git a/ChangeLog b/ChangeLog index fd43d788b0..1ae328a6e0 100755 --- a/ChangeLog +++ b/ChangeLog @@ -4526,7 +4526,7 @@ * arch/arm/src/Makefile: The variable NUTTX already includes the extension $(EXEEXT). So remove the second extension $(NUTTX)$(EXEEXT) in two places (2013-4-7). - * arch/arm/src/lpc17xx/lpc17_gpioint.c: Disable interrrupts in + * arch/arm/src/lpc17xx/lpc17_gpioint.c: Disable interrupts in lpc17_setintedge(). This logic must be atomic because it can be re-entered before it completes enabled interrupts, sometimes leaving the interrupts in a strange state (2013-4-7). diff --git a/ReleaseNotes b/ReleaseNotes index 5c64785448..535e416762 100644 --- a/ReleaseNotes +++ b/ReleaseNotes @@ -2950,7 +2950,7 @@ Bugfixes (see the change log for details) : * General: sleep() and usleep() return values, sig_timedwait() errno setting on timeout. * Drivers: STMPE811 touchscreen driver, USB PLC2303, USB CDC/ACM - * STM32: Several USB device controller driver fixes, F4 interrrupt priorities + * STM32: Several USB device controller driver fixes, F4 interrupt priorities (contributed by Mike Smith). * Graphics: Keyboard input, fill trapezoid bug diff --git a/arch/arm/include/lpc17xx/lpc176x_irq.h b/arch/arm/include/lpc17xx/lpc176x_irq.h index 4352de62d3..96b7d141a5 100644 --- a/arch/arm/include/lpc17xx/lpc176x_irq.h +++ b/arch/arm/include/lpc17xx/lpc176x_irq.h @@ -148,7 +148,7 @@ */ #ifdef CONFIG_GPIO_IRQ -# define LPC17_VALID_GPIOINT0 (0x7fff8ffful) /* GPIO port 0 interrrupt set */ +# define LPC17_VALID_GPIOINT0 (0x7fff8ffful) /* GPIO port 0 interrupt set */ # define LPC17_VALID_GPIOINT2 (0x00003ffful) /* GPIO port 2 interrupt set */ /* Set 1: 12 interrupts p0.0-p0.11 */ diff --git a/arch/arm/include/lpc17xx/lpc178x_irq.h b/arch/arm/include/lpc17xx/lpc178x_irq.h index 64498e1475..d8f0459ca9 100644 --- a/arch/arm/include/lpc17xx/lpc178x_irq.h +++ b/arch/arm/include/lpc17xx/lpc178x_irq.h @@ -167,7 +167,7 @@ */ #ifdef CONFIG_GPIO_IRQ -# define LPC17_VALID_GPIOINT0 (0xfffffffful) /* GPIO port 0 interrrupt set */ +# define LPC17_VALID_GPIOINT0 (0xfffffffful) /* GPIO port 0 interrupt set */ # define LPC17_VALID_GPIOINT2 (0xfffffffful) /* GPIO port 2 interrupt set */ /* Set 1: 16 interrupts p0.0-p0.15 */ diff --git a/arch/arm/src/a1x/chip/a10_piocfg.h b/arch/arm/src/a1x/chip/a10_piocfg.h index c54ea45558..3ed6a652db 100644 --- a/arch/arm/src/a1x/chip/a10_piocfg.h +++ b/arch/arm/src/a1x/chip/a10_piocfg.h @@ -191,7 +191,7 @@ #define PIO_ETXEN (PIO_PERIPH2 | PIO_PORT_PIOA | PIO_PIN13) #define PIO_ETXERR (PIO_PERIPH2 | PIO_PORT_PIOA | PIO_PIN16) -/* External PIO interrrupts */ +/* External PIO interrupts */ #define PIO_EINT0 (PIO_EINT | PIO_PORT_PIOH | PIO_PIN0) #define PIO_EINT1 (PIO_EINT | PIO_PORT_PIOH | PIO_PIN1) diff --git a/arch/arm/src/dm320/dm320_irq.c b/arch/arm/src/dm320/dm320_irq.c index 7d00d18c5d..2c92a697ea 100644 --- a/arch/arm/src/dm320/dm320_irq.c +++ b/arch/arm/src/dm320/dm320_irq.c @@ -204,7 +204,7 @@ void up_enable_irq(int irq) * Name: up_ack_irq * * Description: - * Acknowledge the interupt + * Acknowledge the interrupt * ************************************************************************/ diff --git a/arch/arm/src/efm32/efm32_usbdev.c b/arch/arm/src/efm32/efm32_usbdev.c index ec848e29f4..6816d50b70 100644 --- a/arch/arm/src/efm32/efm32_usbdev.c +++ b/arch/arm/src/efm32/efm32_usbdev.c @@ -2672,7 +2672,7 @@ static inline void efm32_epout_interrupt(FAR struct efm32_usbdev_s *priv) efm32_epout(priv, epno); } - /* Endpoint disabled interrupt (ignored because this interrrupt is + /* Endpoint disabled interrupt (ignored because this interrupt is * used in polled mode by the endpoint disable logic). */ #if 1 diff --git a/arch/arm/src/efm32/efm32_usbhost.c b/arch/arm/src/efm32/efm32_usbhost.c index bcb8557921..decd4ed9cb 100644 --- a/arch/arm/src/efm32/efm32_usbhost.c +++ b/arch/arm/src/efm32/efm32_usbhost.c @@ -857,7 +857,7 @@ static void efm32_chan_halt(FAR struct efm32_usbhost_s *priv, int chidx, uint32_t eptype; unsigned int avail; - /* Save the reason for the halt. We need this in the channel halt interrrupt + /* Save the reason for the halt. We need this in the channel halt interrupt * handling logic to know what to do next. */ @@ -1806,7 +1806,7 @@ static inline void efm32_gint_hcinisr(FAR struct efm32_usbhost_s *priv, if ((pending & USB_HC_INT_FRMOVRUN) != 0) { - /* Halt the channel -- the CHH interrrupt is expected next */ + /* Halt the channel -- the CHH interrupt is expected next */ efm32_chan_halt(priv, chidx, CHREASON_FRMOR); @@ -1827,7 +1827,7 @@ static inline void efm32_gint_hcinisr(FAR struct efm32_usbhost_s *priv, if (chan->eptype == EFM32_USB_EPTYPE_CTRL || chan->eptype == EFM32_USB_EPTYPE_BULK) { - /* Halt the channel -- the CHH interrrupt is expected next */ + /* Halt the channel -- the CHH interrupt is expected next */ efm32_chan_halt(priv, chidx, CHREASON_XFRC); @@ -2050,7 +2050,7 @@ static inline void efm32_gint_hcoutisr(FAR struct efm32_usbhost_s *priv, priv->chan[chidx].buflen -= priv->chan[chidx].inflight; priv->chan[chidx].inflight = 0; - /* Halt the channel -- the CHH interrrupt is expected next */ + /* Halt the channel -- the CHH interrupt is expected next */ efm32_chan_halt(priv, chidx, CHREASON_XFRC); @@ -2078,7 +2078,7 @@ static inline void efm32_gint_hcoutisr(FAR struct efm32_usbhost_s *priv, else if ((pending & USB_HC_INT_NAK) != 0) { - /* Halt the channel -- the CHH interrrupt is expected next */ + /* Halt the channel -- the CHH interrupt is expected next */ efm32_chan_halt(priv, chidx, CHREASON_NAK); diff --git a/arch/arm/src/kinetis/kinetis_sdhc.c b/arch/arm/src/kinetis/kinetis_sdhc.c index 9e92d130e9..bbc2e1edf6 100644 --- a/arch/arm/src/kinetis/kinetis_sdhc.c +++ b/arch/arm/src/kinetis/kinetis_sdhc.c @@ -1952,7 +1952,7 @@ static int kinetis_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buff kinetis_dataconfig(priv, true, nbytes, 1, SDHC_DVS_DATATIMEOUT); - /* Enable TX interrrupts */ + /* Enable TX interrupts */ kinetis_configxfrints(priv, SDHC_SNDDONE_INTS); kinetis_sample(priv, SAMPLENDX_AFTER_SETUP); @@ -2662,7 +2662,7 @@ static int kinetis_dmasendsetup(FAR struct sdio_dev_s *dev, kinetis_sample(priv, SAMPLENDX_AFTER_SETUP); - /* Enable TX interrrupts */ + /* Enable TX interrupts */ kinetis_configxfrints(priv, SDHC_DMADONE_INTS); return OK; diff --git a/arch/arm/src/lpc17xx/Kconfig b/arch/arm/src/lpc17xx/Kconfig index d874546b45..14e76ff1f1 100644 --- a/arch/arm/src/lpc17xx/Kconfig +++ b/arch/arm/src/lpc17xx/Kconfig @@ -967,7 +967,7 @@ config USBHOST_BULK_DISABLE Disable support for bulk endpoints. config USBHOST_INT_DISABLE - bool "Disable interupt EPs" + bool "Disable interrupt EPs" default n ---help--- Disable support for interrupt endpoints. diff --git a/arch/arm/src/lpc17xx/chip/lpc17_pwm.h b/arch/arm/src/lpc17xx/chip/lpc17_pwm.h index 49440a6829..610215bc02 100644 --- a/arch/arm/src/lpc17xx/chip/lpc17_pwm.h +++ b/arch/arm/src/lpc17xx/chip/lpc17_pwm.h @@ -118,16 +118,16 @@ /* Interrupt Register */ -#define PWM_IR_MR0 (1 << 0) /* Bit 0: PWM match channel 0 interrrupt */ -#define PWM_IR_MR1 (1 << 1) /* Bit 1: PWM match channel 1 interrrupt */ -#define PWM_IR_MR2 (1 << 2) /* Bit 2: PWM match channel 2 interrrupt */ -#define PWM_IR_MR3 (1 << 3) /* Bit 3: PWM match channel 3 interrrupt */ -#define PWM_IR_CAP0 (1 << 4) /* Bit 4: Capture input 0 interrrupt */ -#define PWM_IR_CAP1 (1 << 5) /* Bit 5: Capture input 1 interrrupt */ +#define PWM_IR_MR0 (1 << 0) /* Bit 0: PWM match channel 0 interrupt */ +#define PWM_IR_MR1 (1 << 1) /* Bit 1: PWM match channel 1 interrupt */ +#define PWM_IR_MR2 (1 << 2) /* Bit 2: PWM match channel 2 interrupt */ +#define PWM_IR_MR3 (1 << 3) /* Bit 3: PWM match channel 3 interrupt */ +#define PWM_IR_CAP0 (1 << 4) /* Bit 4: Capture input 0 interrupt */ +#define PWM_IR_CAP1 (1 << 5) /* Bit 5: Capture input 1 interrupt */ /* Bits 6-7: Reserved */ -#define PWM_IR_MR4 (1 << 8) /* Bit 8: PWM match channel 4 interrrupt */ -#define PWM_IR_MR5 (1 << 9) /* Bit 9: PWM match channel 5 interrrupt */ -#define PWM_IR_MR6 (1 << 10) /* Bit 10: PWM match channel 6 interrrupt */ +#define PWM_IR_MR4 (1 << 8) /* Bit 8: PWM match channel 4 interrupt */ +#define PWM_IR_MR5 (1 << 9) /* Bit 9: PWM match channel 5 interrupt */ +#define PWM_IR_MR6 (1 << 10) /* Bit 10: PWM match channel 6 interrupt */ /* Bits 11-31: Reserved */ /* Timer Control Register */ diff --git a/arch/arm/src/lpc17xx/lpc17_sdcard.c b/arch/arm/src/lpc17xx/lpc17_sdcard.c index 9ba3249fa6..74208f7c7d 100644 --- a/arch/arm/src/lpc17xx/lpc17_sdcard.c +++ b/arch/arm/src/lpc17xx/lpc17_sdcard.c @@ -1804,7 +1804,7 @@ static int lpc17_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer dblocksize = lpc17_log2(nbytes) << SDCARD_DCTRL_DBLOCKSIZE_SHIFT; lpc17_dataconfig(SDCARD_DTIMER_DATATIMEOUT, nbytes, dblocksize); - /* Enable TX interrrupts */ + /* Enable TX interrupts */ lpc17_configxfrints(priv, SDCARD_SEND_MASK); lpc17_sample(priv, SAMPLENDX_AFTER_SETUP); @@ -2558,7 +2558,7 @@ static int lpc17_dmasendsetup(FAR struct sdio_dev_s *dev, lpc17_dmastart(priv->dma, lpc17_dmacallback, priv); lpc17_sample(priv, SAMPLENDX_AFTER_SETUP); - /* Enable TX interrrupts */ + /* Enable TX interrupts */ lpc17_configxfrints(priv, SDCARD_DMASEND_MASK); } diff --git a/arch/arm/src/lpc214x/lpc214x_i2c.h b/arch/arm/src/lpc214x/lpc214x_i2c.h index 74319c17ef..35fcc00f7e 100644 --- a/arch/arm/src/lpc214x/lpc214x_i2c.h +++ b/arch/arm/src/lpc214x/lpc214x_i2c.h @@ -73,7 +73,7 @@ /* Control Set Register (CONSET) */ #define I2C_CONSET_AA (1 << 2) /* Bit 2: Assert acknowledge flag */ -#define I2C_CONSET_SI (1 << 3) /* Bit 3: I2C interrrupt flag */ +#define I2C_CONSET_SI (1 << 3) /* Bit 3: I2C interrupt flag */ #define I2C_CONSET_STO (1 << 4) /* Bit 4: STOP flag */ #define I2C_CONSET_STA (1 << 5) /* Bit 5: START flag */ #define I2C_CONSET_I2EN (1 << 6) /* Bit 6: I2C interface enable */ diff --git a/arch/arm/src/lpc214x/lpc214x_serial.c b/arch/arm/src/lpc214x/lpc214x_serial.c index 8a912a345b..a911a2c1a3 100644 --- a/arch/arm/src/lpc214x/lpc214x_serial.c +++ b/arch/arm/src/lpc214x/lpc214x_serial.c @@ -362,7 +362,7 @@ static int up_setup(struct uart_dev_s *dev) (LPC214X_FCR_FIFO_TRIG8|LPC214X_FCR_TX_FIFO_RESET|\ LPC214X_FCR_RX_FIFO_RESET|LPC214X_FCR_FIFO_ENABLE)); - /* The NuttX serial driver waits for the first THRE interrrupt before + /* The NuttX serial driver waits for the first THRE interrupt before * sending serial data... However, it appears that the lpc214x hardware * does not generate that interrupt until a transition from not-empty * to empty. So, the current kludge here is to send one NULL at diff --git a/arch/arm/src/lpc2378/lpc23xx_serial.c b/arch/arm/src/lpc2378/lpc23xx_serial.c index 3581dbac9d..49230ef855 100644 --- a/arch/arm/src/lpc2378/lpc23xx_serial.c +++ b/arch/arm/src/lpc2378/lpc23xx_serial.c @@ -483,7 +483,7 @@ static int up_setup(struct uart_dev_s *dev) (FCR_FIFO_TRIG8 | FCR_TX_FIFO_RESET | FCR_RX_FIFO_RESET | FCR_FIFO_ENABLE)); - /* The NuttX serial driver waits for the first THRE interrrupt before sending + /* The NuttX serial driver waits for the first THRE interrupt before sending * serial data... However, it appears that the LPC2378 hardware too does not * generate that interrupt until a transition from not-empty to empty. So, * the current kludge here is to send one NULL at startup to kick things off. diff --git a/arch/arm/src/lpc31xx/lpc31_lowputc.c b/arch/arm/src/lpc31xx/lpc31_lowputc.c index e50dccf36c..d5a33c307e 100644 --- a/arch/arm/src/lpc31xx/lpc31_lowputc.c +++ b/arch/arm/src/lpc31xx/lpc31_lowputc.c @@ -328,7 +328,7 @@ void lpc31_lowsetup(void) UART_FCR_RXFIFORST|UART_FCR_FIFOENABLE), LPC31_UART_FCR); - /* The NuttX serial driver waits for the first THRE interrrupt before + /* The NuttX serial driver waits for the first THRE interrupt before * sending serial data... However, it appears that the lpc313x hardware * does not generate that interrupt until a transition from not-empty * to empty. So, the current kludge here is to send one NULL at diff --git a/arch/arm/src/lpc31xx/lpc31_serial.c b/arch/arm/src/lpc31xx/lpc31_serial.c index b1f2395cd2..21c69bca63 100644 --- a/arch/arm/src/lpc31xx/lpc31_serial.c +++ b/arch/arm/src/lpc31xx/lpc31_serial.c @@ -396,7 +396,7 @@ static int up_setup(struct uart_dev_s *dev) UART_FCR_RXFIFORST|UART_FCR_FIFOENABLE), LPC31_UART_FCR); - /* The NuttX serial driver waits for the first THRE interrrupt before + /* The NuttX serial driver waits for the first THRE interrupt before * sending serial data... However, it appears that the lpc313x hardware * does not generate that interrupt until a transition from not-empty * to empty. So, the current kludge here is to send one NULL at diff --git a/arch/arm/src/lpc31xx/lpc31_spi.h b/arch/arm/src/lpc31xx/lpc31_spi.h index a83734b3f2..e1cd2eae85 100644 --- a/arch/arm/src/lpc31xx/lpc31_spi.h +++ b/arch/arm/src/lpc31xx/lpc31_spi.h @@ -235,7 +235,7 @@ #define SPI_INT_TX (1 << 3) /* Bit 3: Transmit threshold level interrupt bit */ #define SPI_INT_RX (1 << 2) /* Bit 3: Receive threshold level interrupt bit */ #define SPI_INT_TO (1 << 1) /* Bit 1: Receive timeout interrupt bit */ -#define SPI_INT_OV (1 << 0) /* Bit 0: Receive overrtun interrrupt bit */ +#define SPI_INT_OV (1 << 0) /* Bit 0: Receive overrtun interrupt bit */ /************************************************************************************************ * Public Types diff --git a/arch/arm/src/lpc43xx/lpc43_rgu.c b/arch/arm/src/lpc43xx/lpc43_rgu.c index 2c2656eba1..fd9bc0d37d 100644 --- a/arch/arm/src/lpc43xx/lpc43_rgu.c +++ b/arch/arm/src/lpc43xx/lpc43_rgu.c @@ -117,7 +117,7 @@ void lpc43_softreset(void) up_mdelay(20); - /* Clear all pending interupts */ + /* Clear all pending interrupts */ putreg32(0xffffffff, NVIC_IRQ0_31_CLRPEND); putreg32(0xffffffff, NVIC_IRQ32_63_CLRPEND); diff --git a/arch/arm/src/nuc1xx/chip/nuc_clk.h b/arch/arm/src/nuc1xx/chip/nuc_clk.h index 426efd782b..69c54b9ce0 100644 --- a/arch/arm/src/nuc1xx/chip/nuc_clk.h +++ b/arch/arm/src/nuc1xx/chip/nuc_clk.h @@ -88,7 +88,7 @@ #define CLK_PWRCON_OSC10K_EN (1 << 3) /* Bit 3: Internal 10KHz low speed oscillator enable */ #define CLK_PWRCON_PD_WU_DLY (1 << 4) /* Bit 4: Enable the wake-up delay counter */ #define CLK_PWRCON_PD_WU_INT_EN (1 << 5) /* Bit 5: Power down mode wake-up interrupt status */ -#define CLK_PWRCON_PD_WU_STS (1 << 6) /* Bit 6: Power down mode wake-up interupt status */ +#define CLK_PWRCON_PD_WU_STS (1 << 6) /* Bit 6: Power down mode wake-up interrupt status */ #define CLK_PWRCON_PWR_DOWN_EN (1 << 7) /* Bit 7: System power down enable bit */ #define CLK_PWRCON_PD_WAIT_CPU (1 << 8) /* Bit 8: Power down entry condition */ diff --git a/arch/arm/src/sam34/sam4l_gpio.c b/arch/arm/src/sam34/sam4l_gpio.c index 35d2c94350..d94870a647 100644 --- a/arch/arm/src/sam34/sam4l_gpio.c +++ b/arch/arm/src/sam34/sam4l_gpio.c @@ -416,7 +416,7 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin, if ((cfgset & GPIO_PERIPH_EVENTS) != 0) { - /* Rising only.. disable interrrupts on the falling edge */ + /* Rising only.. disable interrupts on the falling edge */ putreg32(pin, base + SAM_GPIO_EVERS_OFFSET); } diff --git a/arch/arm/src/sama5/sam_ssc.c b/arch/arm/src/sama5/sam_ssc.c index ba565d1700..a1681e54c8 100644 --- a/arch/arm/src/sama5/sam_ssc.c +++ b/arch/arm/src/sama5/sam_ssc.c @@ -1478,7 +1478,7 @@ static void ssc_rx_worker(void *arg) while (sq_peek(&priv->rx.done) != NULL) { /* Remove the buffer container from the rx.done queue. NOTE that - * interupts must be enabled to do this because the rx.done queue is + * interrupts must be enabled to do this because the rx.done queue is * also modified from the interrupt level. */ @@ -1890,7 +1890,7 @@ static void ssc_tx_worker(void *arg) while (sq_peek(&priv->tx.done) != NULL) { /* Remove the buffer container from the tx.done queue. NOTE that - * interupts must be enabled to do this because the tx.done queue is + * interrupts must be enabled to do this because the tx.done queue is * also modified from the interrupt level. */ diff --git a/arch/arm/src/samv7/sam_ssc.c b/arch/arm/src/samv7/sam_ssc.c index 1764484461..17f42e578f 100644 --- a/arch/arm/src/samv7/sam_ssc.c +++ b/arch/arm/src/samv7/sam_ssc.c @@ -1452,7 +1452,7 @@ static void ssc_rx_worker(void *arg) while (sq_peek(&priv->rx.done) != NULL) { /* Remove the buffer container from the rx.done queue. NOTE that - * interupts must be enabled to do this because the rx.done queue is + * interrupts must be enabled to do this because the rx.done queue is * also modified from the interrupt level. */ @@ -1868,7 +1868,7 @@ static void ssc_tx_worker(void *arg) while (sq_peek(&priv->tx.done) != NULL) { /* Remove the buffer container from the tx.done queue. NOTE that - * interupts must be enabled to do this because the tx.done queue is + * interrupts must be enabled to do this because the tx.done queue is * also modified from the interrupt level. */ diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig index 030c805827..9cfb2ab0ac 100644 --- a/arch/arm/src/stm32/Kconfig +++ b/arch/arm/src/stm32/Kconfig @@ -3772,7 +3772,7 @@ config STM32_USB_ITRMP ---help--- The legacy USB in the F1 series shared interrupt lines with USB device and CAN1. In the F3 series, a hardware options was added to - either retain the legacy F1 behavior or to map the USB interupts to + either retain the legacy F1 behavior or to map the USB interrupts to there own dedicated vectors. The option is available only for the F3 family and selects the use of the dedicated USB interrupts. diff --git a/arch/arm/src/stm32/stm32_otgfsdev.c b/arch/arm/src/stm32/stm32_otgfsdev.c index 872cb46402..35c8ab821c 100644 --- a/arch/arm/src/stm32/stm32_otgfsdev.c +++ b/arch/arm/src/stm32/stm32_otgfsdev.c @@ -2668,7 +2668,7 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) stm32_epout(priv, epno); } - /* Endpoint disabled interrupt (ignored because this interrrupt is + /* Endpoint disabled interrupt (ignored because this interrupt is * used in polled mode by the endpoint disable logic). */ #if 1 diff --git a/arch/arm/src/stm32/stm32_otgfshost.c b/arch/arm/src/stm32/stm32_otgfshost.c index 9cc4c5e35d..e8b7523954 100644 --- a/arch/arm/src/stm32/stm32_otgfshost.c +++ b/arch/arm/src/stm32/stm32_otgfshost.c @@ -862,7 +862,7 @@ static void stm32_chan_halt(FAR struct stm32_usbhost_s *priv, int chidx, uint32_t eptype; unsigned int avail; - /* Save the reason for the halt. We need this in the channel halt interrrupt + /* Save the reason for the halt. We need this in the channel halt interrupt * handling logic to know what to do next. */ @@ -1811,7 +1811,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, if ((pending & OTGFS_HCINT_FRMOR) != 0) { - /* Halt the channel -- the CHH interrrupt is expected next */ + /* Halt the channel -- the CHH interrupt is expected next */ stm32_chan_halt(priv, chidx, CHREASON_FRMOR); @@ -1832,7 +1832,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, if (chan->eptype == OTGFS_EPTYPE_CTRL || chan->eptype == OTGFS_EPTYPE_BULK) { - /* Halt the channel -- the CHH interrrupt is expected next */ + /* Halt the channel -- the CHH interrupt is expected next */ stm32_chan_halt(priv, chidx, CHREASON_XFRC); @@ -2055,7 +2055,7 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, priv->chan[chidx].buflen -= priv->chan[chidx].inflight; priv->chan[chidx].inflight = 0; - /* Halt the channel -- the CHH interrrupt is expected next */ + /* Halt the channel -- the CHH interrupt is expected next */ stm32_chan_halt(priv, chidx, CHREASON_XFRC); @@ -2083,7 +2083,7 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, else if ((pending & OTGFS_HCINT_NAK) != 0) { - /* Halt the channel -- the CHH interrrupt is expected next */ + /* Halt the channel -- the CHH interrupt is expected next */ stm32_chan_halt(priv, chidx, CHREASON_NAK); diff --git a/arch/arm/src/stm32/stm32_otghsdev.c b/arch/arm/src/stm32/stm32_otghsdev.c index c8c5612185..ecf304bdaf 100644 --- a/arch/arm/src/stm32/stm32_otghsdev.c +++ b/arch/arm/src/stm32/stm32_otghsdev.c @@ -2668,7 +2668,7 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) stm32_epout(priv, epno); } - /* Endpoint disabled interrupt (ignored because this interrrupt is + /* Endpoint disabled interrupt (ignored because this interrupt is * used in polled mode by the endpoint disable logic). */ #if 1 diff --git a/arch/arm/src/stm32/stm32_otghshost.c b/arch/arm/src/stm32/stm32_otghshost.c index a50fa164fa..8410308dbb 100644 --- a/arch/arm/src/stm32/stm32_otghshost.c +++ b/arch/arm/src/stm32/stm32_otghshost.c @@ -862,7 +862,7 @@ static void stm32_chan_halt(FAR struct stm32_usbhost_s *priv, int chidx, uint32_t eptype; unsigned int avail; - /* Save the reason for the halt. We need this in the channel halt interrrupt + /* Save the reason for the halt. We need this in the channel halt interrupt * handling logic to know what to do next. */ @@ -1811,7 +1811,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, if ((pending & OTGHS_HCINT_FRMOR) != 0) { - /* Halt the channel -- the CHH interrrupt is expected next */ + /* Halt the channel -- the CHH interrupt is expected next */ stm32_chan_halt(priv, chidx, CHREASON_FRMOR); @@ -1832,7 +1832,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, if (chan->eptype == OTGHS_EPTYPE_CTRL || chan->eptype == OTGHS_EPTYPE_BULK) { - /* Halt the channel -- the CHH interrrupt is expected next */ + /* Halt the channel -- the CHH interrupt is expected next */ stm32_chan_halt(priv, chidx, CHREASON_XFRC); @@ -2055,7 +2055,7 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, priv->chan[chidx].buflen -= priv->chan[chidx].inflight; priv->chan[chidx].inflight = 0; - /* Halt the channel -- the CHH interrrupt is expected next */ + /* Halt the channel -- the CHH interrupt is expected next */ stm32_chan_halt(priv, chidx, CHREASON_XFRC); @@ -2083,7 +2083,7 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, else if ((pending & OTGHS_HCINT_NAK) != 0) { - /* Halt the channel -- the CHH interrrupt is expected next */ + /* Halt the channel -- the CHH interrupt is expected next */ stm32_chan_halt(priv, chidx, CHREASON_NAK); diff --git a/arch/arm/src/stm32/stm32_sdio.c b/arch/arm/src/stm32/stm32_sdio.c index 3dfa633564..599df077ae 100644 --- a/arch/arm/src/stm32/stm32_sdio.c +++ b/arch/arm/src/stm32/stm32_sdio.c @@ -1906,7 +1906,7 @@ static int stm32_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer dblocksize = stm32_log2(nbytes) << SDIO_DCTRL_DBLOCKSIZE_SHIFT; stm32_dataconfig(SDIO_DTIMER_DATATIMEOUT, nbytes, dblocksize); - /* Enable TX interrrupts */ + /* Enable TX interrupts */ stm32_configxfrints(priv, SDIO_SEND_MASK); stm32_sample(priv, SAMPLENDX_AFTER_SETUP); @@ -2711,7 +2711,7 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev, stm32_dmastart(priv->dma, stm32_dmacallback, priv, false); stm32_sample(priv, SAMPLENDX_AFTER_SETUP); - /* Enable TX interrrupts */ + /* Enable TX interrupts */ stm32_configxfrints(priv, SDIO_DMASEND_MASK); diff --git a/arch/arm/src/stm32/stm32_tim.h b/arch/arm/src/stm32/stm32_tim.h index 7650a8a343..b9b1b128d0 100644 --- a/arch/arm/src/stm32/stm32_tim.h +++ b/arch/arm/src/stm32/stm32_tim.h @@ -164,7 +164,7 @@ struct stm32_tim_ops_s int (*setcompare)(FAR struct stm32_tim_dev_s *dev, uint8_t channel, uint32_t compare); int (*getcapture)(FAR struct stm32_tim_dev_s *dev, uint8_t channel); - /* Timer interupts */ + /* Timer interrupts */ int (*setisr)(FAR struct stm32_tim_dev_s *dev, int (*handler)(int irq, void *context), int source); void (*enableint)(FAR struct stm32_tim_dev_s *dev, int source); diff --git a/arch/arm/src/stm32/stm32f30xxx_i2c.c b/arch/arm/src/stm32/stm32f30xxx_i2c.c index d9c29c7226..1acc78d16c 100644 --- a/arch/arm/src/stm32/stm32f30xxx_i2c.c +++ b/arch/arm/src/stm32/stm32f30xxx_i2c.c @@ -108,7 +108,7 @@ * Pre-processor Definitions ************************************************************************************/ /* Configuration ********************************************************************/ -/* CONFIG_I2C_POLLED may be set so that I2C interrrupts will not be used. Instead, +/* CONFIG_I2C_POLLED may be set so that I2C interrupts will not be used. Instead, * CPU-intensive polling will be used. */ diff --git a/arch/arm/src/str71x/str71x_eic.h b/arch/arm/src/str71x/str71x_eic.h index 743f4929df..8e4f1cd0b8 100644 --- a/arch/arm/src/str71x/str71x_eic.h +++ b/arch/arm/src/str71x/str71x_eic.h @@ -156,7 +156,7 @@ #define STR71X_EICFIR_FIE (0x00000001) /* Bit 0: FIQ channel 1/0 enable */ #define STR71X_EICFIR_FIP (0x00000002) /* Bit 1: channel 1/0 FIQ pending */ -/* Source interrrupt register definitions */ +/* Source interrupt register definitions */ #define STR71X_EICSIR_SIPLMASK (0x0000000f) /* Bits 0-3: Source interrupt priority level */ #define STR71X_EICSIR_SIVMASK (0xffff0000) /* Bits 16-31: Source interrupt vector */ diff --git a/arch/arm/src/str71x/str71x_irq.c b/arch/arm/src/str71x/str71x_irq.c index f36e6391bb..4bbf63d8c5 100644 --- a/arch/arm/src/str71x/str71x_irq.c +++ b/arch/arm/src/str71x/str71x_irq.c @@ -198,7 +198,7 @@ void up_ack_irq(int irq) * * Description: * Set interrupt priority. Note, there is no way to prioritize - * individual XTI interrrupts. + * individual XTI interrupts. * ****************************************************************************/ diff --git a/arch/avr/src/avr32/up_exceptions.S b/arch/avr/src/avr32/up_exceptions.S index b4d399cdbd..de485c7424 100755 --- a/arch/avr/src/avr32/up_exceptions.S +++ b/arch/avr/src/avr32/up_exceptions.S @@ -296,7 +296,7 @@ avr32_common: mov r11, sp - /* Switch to the interrrupt stack if so configured. Move the current */ + /* Switch to the interrupt stack if so configured. Move the current */ /* stack pointer into a preserved register (r7) and set the interrupt */ /* stack pointer. */ diff --git a/arch/mips/src/pic32mx/pic32mx-head.S b/arch/mips/src/pic32mx/pic32mx-head.S index 5bf73b6a58..085edb42b3 100644 --- a/arch/mips/src/pic32mx/pic32mx-head.S +++ b/arch/mips/src/pic32mx/pic32mx-head.S @@ -84,10 +84,10 @@ * 6) Optional interrupt stack * Start: _ebss+CONFIG_IDLETHREAD_STACKSIZE * End(+1): _ebss+CONFIG_IDLETHREAD_STACKSIZE+(CONFIG_ARCH_INTERRUPTSTACK & ~3) - * 6a) Heap (without interupt stack) + * 6a) Heap (without interrupt stack) * Start: _ebss+CONFIG_IDLETHREAD_STACKSIZE * End(+1): to the end of memory - * 6b) Heap (with interupt stack) + * 6b) Heap (with interrupt stack) * Start: _ebss+CONFIG_IDLETHREAD_STACKSIZE+(CONFIG_ARCH_INTERRUPTSTACK & ~3) * End(+1): to the end of memory */ diff --git a/arch/mips/src/pic32mx/pic32mx-internal.h b/arch/mips/src/pic32mx/pic32mx-internal.h index d3cb65aa5b..72ebf3eea6 100644 --- a/arch/mips/src/pic32mx/pic32mx-internal.h +++ b/arch/mips/src/pic32mx/pic32mx-internal.h @@ -244,7 +244,7 @@ void pic32mx_boardinitialize(void); * Name: pic32mx_decodeirq * * Description: - * Called from assembly language logic when an interrrupt exception occurs. This + * Called from assembly language logic when an interrupt exception occurs. This * function decodes and dispatches the interrupt. * ************************************************************************************/ diff --git a/arch/mips/src/pic32mx/pic32mx-serial.c b/arch/mips/src/pic32mx/pic32mx-serial.c index 69b97424f6..4565c7622e 100644 --- a/arch/mips/src/pic32mx/pic32mx-serial.c +++ b/arch/mips/src/pic32mx/pic32mx-serial.c @@ -500,7 +500,7 @@ static int up_interrupt(int irq, void *context) /* Clear the pending error interrupt */ up_clrpend_irq(priv->irqe); - lldbg("ERROR: interrrupt STA: %08x\n", + lldbg("ERROR: interrupt STA: %08x\n", up_serialin(priv, PIC32MX_UART_STA_OFFSET)); handled = true; } diff --git a/arch/mips/src/pic32mz/pic32mz-head.S b/arch/mips/src/pic32mz/pic32mz-head.S index c5674c44b0..091f1a8bc2 100644 --- a/arch/mips/src/pic32mz/pic32mz-head.S +++ b/arch/mips/src/pic32mz/pic32mz-head.S @@ -84,10 +84,10 @@ * 6) Optional interrupt stack * Start: _ebss+CONFIG_IDLETHREAD_STACKSIZE * End(+1): _ebss+CONFIG_IDLETHREAD_STACKSIZE+(CONFIG_ARCH_INTERRUPTSTACK & ~3) - * 6a) Heap (without interupt stack) + * 6a) Heap (without interrupt stack) * Start: _ebss+CONFIG_IDLETHREAD_STACKSIZE * End(+1): to the end of memory - * 6b) Heap (with interupt stack) + * 6b) Heap (with interrupt stack) * Start: _ebss+CONFIG_IDLETHREAD_STACKSIZE+(CONFIG_ARCH_INTERRUPTSTACK & ~3) * End(+1): to the end of memory */ diff --git a/arch/mips/src/pic32mz/pic32mz-serial.c b/arch/mips/src/pic32mz/pic32mz-serial.c index 83fdfaf742..4377fdc376 100644 --- a/arch/mips/src/pic32mz/pic32mz-serial.c +++ b/arch/mips/src/pic32mz/pic32mz-serial.c @@ -758,7 +758,7 @@ static int up_interrupt(struct uart_dev_s *dev) /* Clear the pending error interrupt */ up_clrpend_irq(priv->irqe); - lldbg("ERROR: interrrupt STA: %08x\n", + lldbg("ERROR: interrupt STA: %08x\n", up_serialin(priv, PIC32MZ_UART_STA_OFFSET)); handled = true; } diff --git a/arch/z80/src/ez80/ez80_emac.c b/arch/z80/src/ez80/ez80_emac.c index 3deca45716..138906f8d5 100644 --- a/arch/z80/src/ez80/ez80_emac.c +++ b/arch/z80/src/ez80/ez80_emac.c @@ -2077,7 +2077,7 @@ static int ez80_emacinitialize(void) /* Software reset */ - outp(EZ80_EMAC_ISTAT, 0xff); /* Clear any pending interupts */ + outp(EZ80_EMAC_ISTAT, 0xff); /* Clear any pending interrupts */ regval = inp(EZ80_EMAC_RST); regval |= EMAC_RST_SRST; outp(EZ80_EMAC_RST, regval); diff --git a/arch/z80/src/ez80/ez80_serial.c b/arch/z80/src/ez80/ez80_serial.c index 7436906ae7..fa64679356 100644 --- a/arch/z80/src/ez80/ez80_serial.c +++ b/arch/z80/src/ez80/ez80_serial.c @@ -85,7 +85,7 @@ static int ez80_setup(struct uart_dev_s *dev); static void ez80_shutdown(struct uart_dev_s *dev); static int ez80_attach(struct uart_dev_s *dev); static void ez80_detach(struct uart_dev_s *dev); -static int ez80_interrrupt(int irq, void *context); +static int ez80_interrupt(int irq, void *context); static int ez80_ioctl(struct file *filep, int cmd, unsigned long arg); static int ez80_receive(struct uart_dev_s *dev, unsigned int *status); static void ez80_rxint(struct uart_dev_s *dev, bool enable); @@ -438,7 +438,7 @@ static int ez80_attach(struct uart_dev_s *dev) /* Attach the IRQ */ - return irq_attach(priv->irq, ez80_interrrupt); + return irq_attach(priv->irq, ez80_interrupt); } /**************************************************************************** @@ -459,7 +459,7 @@ static void ez80_detach(struct uart_dev_s *dev) } /**************************************************************************** - * Name: ez80_interrrupt + * Name: ez80_interrupt * * Description: * This is the UART interrupt handler. It will be invoked @@ -471,7 +471,7 @@ static void ez80_detach(struct uart_dev_s *dev) * ****************************************************************************/ -static int ez80_interrrupt(int irq, void *context) +static int ez80_interrupt(int irq, void *context) { struct uart_dev_s *dev = NULL; struct ez80_dev_s *priv; diff --git a/arch/z80/src/z180/switch.h b/arch/z80/src/z180/switch.h index 5405ac8a29..d04a41b1b6 100644 --- a/arch/z80/src/z180/switch.h +++ b/arch/z80/src/z180/switch.h @@ -192,7 +192,7 @@ extern volatile chipreg_t *current_regs; /* This holds the value of the MMU's CBR register. This value is set to the * interrupted tasks's CBR on interrupt entry, changed to the new task's CBR if - * an interrrupt level context switch occurs, and restored on interrupt exit. In + * an interrupt level context switch occurs, and restored on interrupt exit. In * this way, the CBR is always correct on interrupt exit. */ diff --git a/arch/z80/src/z180/z180_irq.c b/arch/z80/src/z180/z180_irq.c index 9896cae5d3..258be89528 100644 --- a/arch/z80/src/z180/z180_irq.c +++ b/arch/z80/src/z180/z180_irq.c @@ -66,7 +66,7 @@ volatile chipreg_t *current_regs; /* This holds the value of the MMU's CBR register. This value is set to the * interrupted tasks's CBR on interrupt entry, changed to the new task's CBR if - * an interrrupt level context switch occurs, and restored on interrupt exit. In + * an interrupt level context switch occurs, and restored on interrupt exit. In * this way, the CBR is always correct on interrupt exit. */ diff --git a/arch/z80/src/z180/z180_scc.c b/arch/z80/src/z180/z180_scc.c index 8a84a12825..c07dd67fb8 100644 --- a/arch/z80/src/z180/z180_scc.c +++ b/arch/z80/src/z180/z180_scc.c @@ -89,7 +89,7 @@ static int z180_setup(struct uart_dev_s *dev); static void z180_shutdown(struct uart_dev_s *dev); static int z180_attach(struct uart_dev_s *dev); static void z180_detach(struct uart_dev_s *dev); -static int z180_interrrupt(int irq, void *context); +static int z180_interrupt(int irq, void *context); static int z180_ioctl(struct file *filep, int cmd, unsigned long arg); static int z180_receive(struct uart_dev_s *dev, unsigned int *status); static void z180_rxint(struct uart_dev_s *dev, bool enable); @@ -438,7 +438,7 @@ static void z180_detach(struct uart_dev_s *dev) } /**************************************************************************** - * Name: z180_interrrupt + * Name: z180_interrupt * * Description: * This is the UART interrupt handler. It will be invoked @@ -450,7 +450,7 @@ static void z180_detach(struct uart_dev_s *dev) * ****************************************************************************/ -static int z180_interrrupt(int irq, void *context) +static int z180_interrupt(int irq, void *context) { #warning "Missing logic" } diff --git a/configs/arduino-due/include/board.h b/configs/arduino-due/include/board.h index e144a11e24..462dd5904f 100644 --- a/configs/arduino-due/include/board.h +++ b/configs/arduino-due/include/board.h @@ -191,7 +191,7 @@ /* Thus if LED L is statically on, NuttX has successfully booted and is, * apparently, running normmally. If LED RX is glowing, then NuttX is - * handling interupts (and also signals and assertions). If TX is flashing + * handling interrupts (and also signals and assertions). If TX is flashing * at approximately 2Hz, then a fatal error has been detected and the system */ diff --git a/configs/arduino-due/src/arduino-due.h b/configs/arduino-due/src/arduino-due.h index b8217ea08a..b63585c3e2 100644 --- a/configs/arduino-due/src/arduino-due.h +++ b/configs/arduino-due/src/arduino-due.h @@ -86,7 +86,7 @@ * * Thus if LED L is statically on, NuttX has successfully booted and is, * apparently, running normmally. If LED RX is glowing, then NuttX is - * handling interupts (and also signals and assertions). If TX is flashing + * handling interrupts (and also signals and assertions). If TX is flashing * at approximately 2Hz, then a fatal error has been detected and the system */ diff --git a/configs/arduino-due/src/sam_autoleds.c b/configs/arduino-due/src/sam_autoleds.c index 6e7e675fec..ad8e0e3d2e 100644 --- a/configs/arduino-due/src/sam_autoleds.c +++ b/configs/arduino-due/src/sam_autoleds.c @@ -88,7 +88,7 @@ * * Thus if LED L is statically on, NuttX has successfully booted and is, * apparently, running normmally. If LED RX is glowing, then NuttX is - * handling interupts (and also signals and assertions). If TX is flashing + * handling interrupts (and also signals and assertions). If TX is flashing * at approximately 2Hz, then a fatal error has been detected and the system */ diff --git a/configs/cloudctrl/README.txt b/configs/cloudctrl/README.txt index 0d12fdd77e..d03ef58cfe 100644 --- a/configs/cloudctrl/README.txt +++ b/configs/cloudctrl/README.txt @@ -441,7 +441,7 @@ events as follows: * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot and these LEDs will give you some indication of where the failure was ** The normal state is LED1 ON and LED1 faintly glowing. This faint glow - is because of timer interupts that result in the LED being illuminated + is because of timer interrupts that result in the LED being illuminated on a small proportion of the time. *** LED2 may also flicker normally if signals are processed. **** LED4 may not be available if RS-485 is also used. For RS-485, it will diff --git a/configs/hymini-stm32v/README.txt b/configs/hymini-stm32v/README.txt index b98d261b38..7b93dc280e 100644 --- a/configs/hymini-stm32v/README.txt +++ b/configs/hymini-stm32v/README.txt @@ -262,7 +262,7 @@ They are encoded as follows: LED_IDLE STM32 is is sleep mode (Optional, not used) * If Nuttx starts correctly, normal state is to have LED1 on and LED2 off. - ** LED1 is turned off during interrrupt. + ** LED1 is turned off during interrupt. *** LED2 is turned on during signal handler. RTC diff --git a/configs/lincoln60/src/lpc17_buttons.c b/configs/lincoln60/src/lpc17_buttons.c index 38a2326a52..a0d0b42b6e 100644 --- a/configs/lincoln60/src/lpc17_buttons.c +++ b/configs/lincoln60/src/lpc17_buttons.c @@ -69,7 +69,7 @@ static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] = LINCOLN60_BUT1 }; -/* This array defines all of the interupt handlers current attached to +/* This array defines all of the interrupt handlers current attached to * button events. */ diff --git a/configs/olimex-lpc1766stk/src/lpc17_buttons.c b/configs/olimex-lpc1766stk/src/lpc17_buttons.c index 653e221eff..426d4fc474 100644 --- a/configs/olimex-lpc1766stk/src/lpc17_buttons.c +++ b/configs/olimex-lpc1766stk/src/lpc17_buttons.c @@ -70,7 +70,7 @@ static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] = LPC1766STK_UP, LPC1766STK_DOWN, LPC1766STK_LEFT, LPC1766STK_RIGHT }; -/* This array defines all of the interupt handlers current attached to +/* This array defines all of the interrupt handlers current attached to * button events. */ diff --git a/configs/open1788/README.txt b/configs/open1788/README.txt index a97e497144..1ad7fc5e2c 100644 --- a/configs/open1788/README.txt +++ b/configs/open1788/README.txt @@ -36,7 +36,7 @@ LEDs LED_HEAPALLOCATE ON OFF OFF OFF LED_IRQSENABLED OFF ON OFF OFF LED_STACKCREATED ON ON OFF OFF - LED_INIRQ LED3 glows, on while in interupt + LED_INIRQ LED3 glows, on while in interrupt LED_SIGNAL LED3 glows, on while in signal handler LED_ASSERTION LED3 glows, on while in assertion LED_PANIC LED3 Flashes at 2Hz diff --git a/configs/open1788/include/board.h b/configs/open1788/include/board.h index 49db136bae..b9eb04eaa1 100644 --- a/configs/open1788/include/board.h +++ b/configs/open1788/include/board.h @@ -250,7 +250,7 @@ #define LED_HEAPALLOCATE 1 /* ON OFF OFF OFF */ #define LED_IRQSENABLED 2 /* OFF ON OFF OFF */ #define LED_STACKCREATED 3 /* ON ON OFF OFF */ -#define LED_INIRQ 4 /* LED3 glows, on while in interupt */ +#define LED_INIRQ 4 /* LED3 glows, on while in interrupt */ #define LED_SIGNAL 4 /* LED3 glows, on while in signal handler */ #define LED_ASSERTION 4 /* LED3 glows, on while in assertion */ #define LED_PANIC 4 /* LED3 Flashes at 2Hz */ diff --git a/configs/open1788/src/lpc17_autoleds.c b/configs/open1788/src/lpc17_autoleds.c index 74afc78e7b..d2e213b560 100644 --- a/configs/open1788/src/lpc17_autoleds.c +++ b/configs/open1788/src/lpc17_autoleds.c @@ -75,7 +75,7 @@ * LED_HEAPALLOCATE 1 ON OFF OFF OFF * LED_IRQSENABLED 2 OFF ON OFF OFF * LED_STACKCREATED 3 ON ON OFF OFF - * LED_INIRQ 4 LED3 glows, on while in interupt + * LED_INIRQ 4 LED3 glows, on while in interrupt * LED_SIGNAL 4 LED3 glows, on while in signal handler * LED_ASSERTION 4 LED3 glows, on while in assertion * LED_PANIC 4 LED3 Flashes at 2Hz diff --git a/configs/open1788/src/lpc17_buttons.c b/configs/open1788/src/lpc17_buttons.c index de2eff484c..7481334d8c 100644 --- a/configs/open1788/src/lpc17_buttons.c +++ b/configs/open1788/src/lpc17_buttons.c @@ -89,7 +89,7 @@ static const lpc17_pinset_t g_buttoncfg[BOARD_NUM_BUTTONS] = GPIO_JOY_B, GPIO_JOY_C, GPIO_JOY_D, GPIO_JOY_CTR }; -/* This array defines all of the interupt handlers current attached to +/* This array defines all of the interrupt handlers current attached to * button events. */ diff --git a/configs/open1788/src/open1788.h b/configs/open1788/src/open1788.h index 42fffe41c8..39fd247229 100644 --- a/configs/open1788/src/open1788.h +++ b/configs/open1788/src/open1788.h @@ -103,7 +103,7 @@ #define GPIO_JOY_D (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN19) #define GPIO_JOY_CTR (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN14) -/* IRQ numbers for the buttons that do support interrrupts */ +/* IRQ numbers for the buttons that do support interrupts */ #define GPIO_USER2_IRQ LPC17_IRQ_P2p22 #define GPIO_USER3_IRQ LPC17_IRQ_P0p10 diff --git a/configs/pic32mx7mmb/src/pic32_touchscreen.c b/configs/pic32mx7mmb/src/pic32_touchscreen.c index 33434bd8e8..ea307cb531 100644 --- a/configs/pic32mx7mmb/src/pic32_touchscreen.c +++ b/configs/pic32mx7mmb/src/pic32_touchscreen.c @@ -312,7 +312,7 @@ static void tc_adc_sample(int pin) putreg32(ADC_CON3_ADCS(6) | ADC_CON3_SAMC(0), PIC32MX_ADC_CON3); - /* No interrrupts, no scan, internal voltage reference */ + /* No interrupts, no scan, internal voltage reference */ putreg32(ADC_CON2_VCFG_AVDDAVSS, PIC32MX_ADC_CON2); diff --git a/configs/sam3u-ek/README.txt b/configs/sam3u-ek/README.txt index e839ee663b..16908e8501 100644 --- a/configs/sam3u-ek/README.txt +++ b/configs/sam3u-ek/README.txt @@ -262,7 +262,7 @@ LEDs * If LED1 and LED2 are statically on, then NuttX probably failed to boot and these LEDs will give you some indication of where the failure was ** The normal state is LED0=OFF, LED2=ON and LED1 faintly glowing. This faint - glow is because of timer interupts that result in the LED being illuminated + glow is because of timer interrupts that result in the LED being illuminated on a small proportion of the time. *** LED2 may also flicker normally if signals are processed. diff --git a/configs/shenzhou/README.txt b/configs/shenzhou/README.txt index e057e84220..b27eaaa77e 100644 --- a/configs/shenzhou/README.txt +++ b/configs/shenzhou/README.txt @@ -458,7 +458,7 @@ events as follows: * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot and these LEDs will give you some indication of where the failure was ** The normal state is LED1 ON and LED1 faintly glowing. This faint glow - is because of timer interupts that result in the LED being illuminated + is because of timer interrupts that result in the LED being illuminated on a small proportion of the time. *** LED2 may also flicker normally if signals are processed. **** LED4 may not be available if RS-485 is also used. For RS-485, it will diff --git a/configs/spark/README.txt b/configs/spark/README.txt index 67f2472836..0692d9b1b3 100644 --- a/configs/spark/README.txt +++ b/configs/spark/README.txt @@ -499,7 +499,7 @@ Buttons and LEDs * If LED2, LED3, LED4 are statically on, then NuttX probably failed to boot and these LEDs will give you some indication of where the failure was ** The normal state is LED4 ON and LED2 faintly glowing. This faint glow - is because of timer interupts that result in the LED being illuminated + is because of timer interrupts that result in the LED being illuminated on a small proportion of the time. *** LED3 may also flicker normally if signals are processed. diff --git a/configs/stm3210e-eval/README.txt b/configs/stm3210e-eval/README.txt index d3c27916b7..e8de91eac6 100644 --- a/configs/stm3210e-eval/README.txt +++ b/configs/stm3210e-eval/README.txt @@ -340,7 +340,7 @@ events as follows: * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot and these LEDs will give you some indication of where the failure was ** The normal state is LED3 ON and LED1 faintly glowing. This faint glow - is because of timer interupts that result in the LED being illuminated + is because of timer interrupts that result in the LED being illuminated on a small proportion of the time. *** LED2 may also flicker normally if signals are processed. @@ -1048,7 +1048,7 @@ Where is one of the following: CONFIG_PM_BUTTONS=y CONFIG_PM_BUTTONS enables button support for PM testing. Buttons can - drive EXTI interrupts and EXTI interrrupts can be used to wakeup for + drive EXTI interrupts and EXTI interrupts can be used to wakeup for certain reduced power modes (STOP mode). The use of the buttons here is for PM testing purposes only; buttons would normally be part the application code and CONFIG_PM_BUTTONS would not be defined. diff --git a/configs/stm3220g-eval/README.txt b/configs/stm3220g-eval/README.txt index a645363941..110adf13e9 100644 --- a/configs/stm3220g-eval/README.txt +++ b/configs/stm3220g-eval/README.txt @@ -323,7 +323,7 @@ events as follows: * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot and these LEDs will give you some indication of where the failure was ** The normal state is LED3 ON and LED1 faintly glowing. This faint glow - is because of timer interupts that result in the LED being illuminated + is because of timer interrupts that result in the LED being illuminated on a small proportion of the time. *** LED2 may also flicker normally if signals are processed. diff --git a/configs/twr-k60n512/README.txt b/configs/twr-k60n512/README.txt index 159b09ec02..734240cce7 100644 --- a/configs/twr-k60n512/README.txt +++ b/configs/twr-k60n512/README.txt @@ -281,7 +281,7 @@ as follows: * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot and these LEDs will give you some indication of where the failure was ** The normal state is LED3 ON and LED1 faintly glowing. This faint glow - is because of timer interupts that result in the LED being illuminated + is because of timer interrupts that result in the LED being illuminated on a small proportion of the time. *** LED2 may also flicker normally if signals are processed. diff --git a/configs/twr-k60n512/src/k60_buttons.c b/configs/twr-k60n512/src/k60_buttons.c index 37c0837df3..32d2872253 100644 --- a/configs/twr-k60n512/src/k60_buttons.c +++ b/configs/twr-k60n512/src/k60_buttons.c @@ -162,7 +162,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler) oldhandler = knetis_pinirqattach(pinset, irqhandler); - /* Then make sure that interupts are enabled on the pin */ + /* Then make sure that interrupts are enabled on the pin */ kinetis_pindmaenable(pinset); return oldhandler; diff --git a/include/nuttx/usb/usbdev.h b/include/nuttx/usb/usbdev.h index ef60944da9..1e36963f75 100644 --- a/include/nuttx/usb/usbdev.h +++ b/include/nuttx/usb/usbdev.h @@ -152,7 +152,7 @@ #define DEV_DISCONNECT(dev) (dev)->ops->pullup ? (dev)->ops->pullup(dev,false) : -EOPNOTSUPP /* USB Class Driver Helpers *********************************************************/ -/* All may be called from interupt handling logic except bind() and unbind() */ +/* All may be called from interrupt handling logic except bind() and unbind() */ /* Invoked when the driver is bound to a USB device driver. */