forked from nuttx/nuttx-update
arch/xtensa: only cmp fpu coprocessor for fpu test
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
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parent
3d47505ec7
commit
077c16fc71
1 changed files with 15 additions and 4 deletions
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@ -38,6 +38,7 @@
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* Private Data
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****************************************************************************/
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#ifdef XCHAL_CP_ID_FPU
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static uint32_t g_coproc_sa_offsets[] =
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{
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XTENSA_CP0_SA, XTENSA_CP1_SA, XTENSA_CP2_SA, XTENSA_CP3_SA,
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@ -49,6 +50,7 @@ static uint32_t g_coproc_sa_sizes[] =
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XCHAL_CP0_SA_SIZE, XCHAL_CP1_SA_SIZE, XCHAL_CP2_SA_SIZE, XCHAL_CP3_SA_SIZE,
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XCHAL_CP4_SA_SIZE, XCHAL_CP5_SA_SIZE, XCHAL_CP6_SA_SIZE, XCHAL_CP7_SA_SIZE
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};
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#endif
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/****************************************************************************
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* Public Functions
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@ -72,6 +74,7 @@ static uint32_t g_coproc_sa_sizes[] =
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bool up_fpucmp(const void *saveregs1, const void *saveregs2)
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{
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#ifdef XCHAL_CP_ID_FPU
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const uint32_t *regs1 = saveregs1;
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const uint32_t *regs2 = saveregs2;
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uint32_t cpenable = xtensa_get_cpenable();
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@ -84,13 +87,21 @@ bool up_fpucmp(const void *saveregs1, const void *saveregs2)
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uint32_t reg_offset;
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ndx += i;
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reg_offset = g_coproc_sa_offsets[ndx - 1] / 4;
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ret = memcmp(®s1[COMMON_CTX_REGS + reg_offset],
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®s2[COMMON_CTX_REGS + reg_offset],
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g_coproc_sa_sizes[ndx - 1]) == 0;
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if ((ndx - 1) == XCHAL_CP_ID_FPU)
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{
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reg_offset = g_coproc_sa_offsets[ndx - 1] / 4;
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ret = memcmp(®s1[COMMON_CTX_REGS + reg_offset],
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®s2[COMMON_CTX_REGS + reg_offset],
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g_coproc_sa_sizes[ndx - 1]) == 0;
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break;
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}
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cpenable >>= i;
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}
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return ret;
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#else
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return true;
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#endif
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}
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#endif /* CONFIG_ARCH_FPU */
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