forked from nuttx/nuttx-update
boards/stm32wl5jc: add support for board ipcc
Allows to easily enable and configure ipcc for board. Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
This commit is contained in:
Michał Łyszczek
Xiang Xiao
parent
dcc2499926
commit
3e43128f07
5 changed files with 327 additions and 1 deletions
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@ -24,6 +24,127 @@ config ARCH_BOARD_ENABLE_CPU2
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When enabled, CPU2 (cortex-m0) will be started up. CPU2
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will be booted after all initialization on CPU1 is done.
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menuconfig ARCH_BOARD_IPCC
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bool "Enabled IPCC"
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select IPCC
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select STM32WL5_IPCC
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default n
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---help---
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Enables IPCC (inter processor communication controller)
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to exchange data between CPU1 and CPU2. Channels are
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indexed from 0. IPCC will be accessible as character
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device under "/dev/ipccN" path, where N is an ipcc channel.
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if ARCH_BOARD_IPCC
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comment "IPCC buffering is off, enable IPCC_BUFFERED to configure buffers"
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depends on !IPCC_BUFFERED
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comment "IPCC channel 1 enabled by default"
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config ARCH_BOARD_IPCC_CHAN1_RXBUF
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int "Channel 1 RX buffer size"
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default 256
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depends on IPCC_BUFFERED
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config ARCH_BOARD_IPCC_CHAN1_TXBUF
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int "Channel 1 TX buffer size"
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default 256
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depends on IPCC_BUFFERED
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config ARCH_BOARD_IPCC_CHAN2
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bool "Enable channel 2"
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default n
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select STM32WL5_IPCC_CHAN2
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if ARCH_BOARD_IPCC_CHAN2
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config ARCH_BOARD_IPCC_CHAN2_RXBUF
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int "Channel 2 RX buffer size"
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default 256
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depends on IPCC_BUFFERED
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config ARCH_BOARD_IPCC_CHAN2_TXBUF
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int "Channel 2 TX buffer size"
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default 256
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depends on IPCC_BUFFERED
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config ARCH_BOARD_IPCC_CHAN3
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bool "Enable channel 3"
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default n
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select STM32WL5_IPCC_CHAN3
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if ARCH_BOARD_IPCC_CHAN3
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config ARCH_BOARD_IPCC_CHAN3_RXBUF
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int "Channel 3 RX buffer size"
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default 256
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depends on IPCC_BUFFERED
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config ARCH_BOARD_IPCC_CHAN3_TXBUF
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int "Channel 3 TX buffer size"
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default 256
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depends on IPCC_BUFFERED
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config ARCH_BOARD_IPCC_CHAN4
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bool "Enable channel 4"
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default n
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select STM32WL5_IPCC_CHAN4
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if ARCH_BOARD_IPCC_CHAN4
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config ARCH_BOARD_IPCC_CHAN4_RXBUF
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int "Channel 4 RX buffer size"
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default 256
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depends on IPCC_BUFFERED
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config ARCH_BOARD_IPCC_CHAN4_TXBUF
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int "Channel 4 TX buffer size"
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default 256
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depends on IPCC_BUFFERED
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config ARCH_BOARD_IPCC_CHAN5
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bool "Enable channel 5"
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default n
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select STM32WL5_IPCC_CHAN5
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if ARCH_BOARD_IPCC_CHAN5
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config ARCH_BOARD_IPCC_CHAN5_RXBUF
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int "Channel 5 RX buffer size"
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default 256
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depends on IPCC_BUFFERED
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config ARCH_BOARD_IPCC_CHAN5_TXBUF
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int "Channel 5 TX buffer size"
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default 256
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depends on IPCC_BUFFERED
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config ARCH_BOARD_IPCC_CHAN6
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bool "Enable channel 6"
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default n
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select STM32WL5_IPCC_CHAN6
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if ARCH_BOARD_IPCC_CHAN6
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config ARCH_BOARD_IPCC_CHAN2_RXBUF
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int "Channel 6 RX buffer size"
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default 256
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depends on IPCC_BUFFERED
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config ARCH_BOARD_IPCC_CHAN6_TXBUF
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int "Channel 6 TX buffer size"
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default 256
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depends on IPCC_BUFFERED
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endif # ARCH_BOARD_IPCC_CHAN6
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endif # ARCH_BOARD_IPCC_CHAN5
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endif # ARCH_BOARD_IPCC_CHAN4
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endif # ARCH_BOARD_IPCC_CHAN3
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endif # ARCH_BOARD_IPCC_CHAN2
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endif # ARCH_BOARD_IPCC
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menuconfig ARCH_BOARD_FLASH_MOUNT
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bool "Enable FLASH partitioning and mounting"
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depends on !DISABLE_MOUNTPOINT
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@ -38,10 +38,14 @@ ifeq ($(CONFIG_SPI_DRIVER),y)
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CSRCS += stm32_spi.c
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endif
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CSRCS-$(CONFIG_ARCH_BOARD_IPCC) = stm32_ipcc.c
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ifeq ($(CONFIG_VIDEO_FB),y)
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ifeq ($(CONFIG_LCD_SSD1680),y)
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CSRCS += stm32_ssd1680.c
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endif
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endif
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CSRCS += $(CSRCS-y)
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include $(TOPDIR)/boards/Board.mk
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@ -155,7 +155,8 @@ void board_leds_initialize(void);
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int stm32wl5_flash_init(void);
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/* Name: stm32wl5_spidev_initialize
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/****************************************************************************
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* Name: stm32wl5_spidev_initialize
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*
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* Description:
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* Initialize SPIs
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@ -164,4 +165,14 @@ int stm32wl5_flash_init(void);
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void stm32wl5_spidev_initialize(void);
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/****************************************************************************
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* Name: ipcc_init
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*
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* Description:
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* Initializes configured IPCC channels.
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*
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****************************************************************************/
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int ipcc_init(void);
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#endif /* __BOARDS_ARM_STM32WL5_NUCLEO_WL55JC_SRC_NUCLEO_WL55JC_H */
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@ -133,6 +133,16 @@ int board_app_initialize(uintptr_t arg)
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}
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#endif
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#if defined(CONFIG_ARCH_BOARD_IPCC)
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/* Register IPCC driver */
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ret = ipcc_init();
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if (ret < 0)
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{
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syslog(LOG_ERR, "ERROR: ipcc_init() failed\n");
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}
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#endif
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#if defined(CONFIG_ARCH_BOARD_ENABLE_CPU2)
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/* Start second CPU */
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180
boards/arm/stm32wl5/nucleo-wl55jc/src/stm32_ipcc.c
Normal file
180
boards/arm/stm32wl5/nucleo-wl55jc/src/stm32_ipcc.c
Normal file
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@ -0,0 +1,180 @@
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/****************************************************************************
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* boards/arm/stm32wl5/nucleo-wl55jc/src/stm32_ipcc.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/ipcc.h>
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#include <debug.h>
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#include <stm32wl5_ipcc.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Define default values for macros if they are not define in config */
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#ifndef CONFIG_ARCH_BOARD_IPCC_CHAN1_RXBUF
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# define CONFIG_ARCH_BOARD_IPCC_CHAN1_RXBUF 0
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#endif
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#ifndef CONFIG_ARCH_BOARD_IPCC_CHAN1_TXBUF
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# define CONFIG_ARCH_BOARD_IPCC_CHAN1_TXBUF 0
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#endif
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#ifndef CONFIG_ARCH_BOARD_IPCC_CHAN2_RXBUF
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# define CONFIG_ARCH_BOARD_IPCC_CHAN2_RXBUF 0
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#endif
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#ifndef CONFIG_ARCH_BOARD_IPCC_CHAN2_TXBUF
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# define CONFIG_ARCH_BOARD_IPCC_CHAN2_TXBUF 0
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#endif
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#ifndef CONFIG_ARCH_BOARD_IPCC_CHAN3_RXBUF
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# define CONFIG_ARCH_BOARD_IPCC_CHAN3_RXBUF 0
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#endif
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#ifndef CONFIG_ARCH_BOARD_IPCC_CHAN3_TXBUF
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# define CONFIG_ARCH_BOARD_IPCC_CHAN3_TXBUF 0
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#endif
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#ifndef CONFIG_ARCH_BOARD_IPCC_CHAN4_RXBUF
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# define CONFIG_ARCH_BOARD_IPCC_CHAN4_RXBUF 0
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#endif
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#ifndef CONFIG_ARCH_BOARD_IPCC_CHAN4_TXBUF
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# define CONFIG_ARCH_BOARD_IPCC_CHAN4_TXBUF 0
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#endif
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#ifndef CONFIG_ARCH_BOARD_IPCC_CHAN5_RXBUF
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# define CONFIG_ARCH_BOARD_IPCC_CHAN5_RXBUF 0
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#endif
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#ifndef CONFIG_ARCH_BOARD_IPCC_CHAN5_TXBUF
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# define CONFIG_ARCH_BOARD_IPCC_CHAN5_TXBUF 0
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#endif
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#ifndef CONFIG_ARCH_BOARD_IPCC_CHAN6_RXBUF
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# define CONFIG_ARCH_BOARD_IPCC_CHAN6_RXBUF 0
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#endif
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#ifndef CONFIG_ARCH_BOARD_IPCC_CHAN6_TXBUF
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# define CONFIG_ARCH_BOARD_IPCC_CHAN6_TXBUF 0
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#endif
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static int init_ipcc(int chan, size_t rxbuflen, size_t txbuflen);
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: init_ipcc
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*
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* Description:
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* Initializes IPCC channel with tx and rx buffer sizes. If ipcc is
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* unbuffered, rxbuflen and txbuflen are ignored.
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*
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* Input Parameters:
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* chan - channel number, indexed from 0
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* rxbuflen - size of rxbuffer for buffered transactions
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* txbuflen - size of txbuffer for buffered transactions
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*
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* Returned Value:
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* 0 on success or -1 on errors.
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*
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****************************************************************************/
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static int init_ipcc(int chan, size_t rxbuflen, size_t txbuflen)
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{
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struct ipcc_lower_s *ipcc;
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int ret;
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if ((ipcc = stm32wl5_ipcc_init(chan)) == NULL)
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{
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syslog(LOG_ERR, "ERROR: stm32wl5_ipcc_init(%d) failed\n", chan);
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return -1;
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}
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#ifdef CONFIG_IPCC_BUFFERED
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ret = ipcc_register(ipcc, rxbuflen, txbuflen);
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#else
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UNUSED(rxbuflen);
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UNUSED(txbuflen);
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ret = ipcc_register(ipcc);
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#endif
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if (ret < 0)
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{
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syslog(LOG_ERR, "ERROR: ipcc_register() failed: %d, channel: %d\n",
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ret, chan);
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return -1;
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}
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return 0;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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int ipcc_init(void)
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{
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int ret = 0;
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/* First channel is always enabled in IPCC is enabled */
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ret |= init_ipcc(0, CONFIG_ARCH_BOARD_IPCC_CHAN1_RXBUF,
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CONFIG_ARCH_BOARD_IPCC_CHAN1_TXBUF);
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#ifdef CONFIG_ARCH_BOARD_IPCC_CHAN2
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ret |= init_ipcc(1, CONFIG_ARCH_BOARD_IPCC_CHAN2_RXBUF,
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CONFIG_ARCH_BOARD_IPCC_CHAN2_TXBUF);
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#endif
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#ifdef CONFIG_ARCH_BOARD_IPCC_CHAN3
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ret |= init_ipcc(2, CONFIG_ARCH_BOARD_IPCC_CHAN3_RXBUF,
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CONFIG_ARCH_BOARD_IPCC_CHAN3_TXBUF);
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#endif
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#ifdef CONFIG_ARCH_BOARD_IPCC_CHAN4
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ret |= init_ipcc(3, CONFIG_ARCH_BOARD_IPCC_CHAN4_RXBUF,
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CONFIG_ARCH_BOARD_IPCC_CHAN4_TXBUF);
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#endif
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#ifdef CONFIG_ARCH_BOARD_IPCC_CHAN5
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ret |= init_ipcc(4, CONFIG_ARCH_BOARD_IPCC_CHAN5_RXBUF,
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CONFIG_ARCH_BOARD_IPCC_CHAN5_TXBUF);
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#endif
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#ifdef CONFIG_ARCH_BOARD_IPCC_CHAN6
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ret |= init_ipcc(5, CONFIG_ARCH_BOARD_IPCC_CHAN6_RXBUF,
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CONFIG_ARCH_BOARD_IPCC_CHAN6_TXBUF);
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#endif
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return ret;
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}
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