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Replace non critical PANIC with DEBUGPANIC to save the code space

This commit is contained in:
Xiang Xiao 2018-08-24 06:21:15 -06:00 committed by Gregory Nutt
parent e90f0403a6
commit 467d2a58ea
51 changed files with 64 additions and 64 deletions

View file

@ -88,7 +88,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -87,7 +87,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -88,7 +88,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -87,7 +87,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -88,7 +88,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -303,7 +303,7 @@ static void efm32_setwaitstates(uint32_t hfcoreclk)
#ifdef MSC_READCTRL_MODE_WS2
if (hfcoreclk > CMU_MAX_FREQ_2WS)
{
PANIC();
DEBUGPANIC();
}
else
#endif
@ -319,7 +319,7 @@ static void efm32_setwaitstates(uint32_t hfcoreclk)
#else
/* No.. this MCU does not support 2 wait states */
PANIC();
DEBUGPANIC();
#endif
}
@ -452,7 +452,7 @@ static inline uint32_t efm32_hfclk_config(uint32_t hfclksel, uint32_t hfclkdiv)
#ifdef CONFIG_DEBUG_FEATURES
default:
PANIC();
DEBUGPANIC();
#endif
}

View file

@ -194,7 +194,7 @@ static int lc823450_wdt_interrupt(int irq, FAR void *context, FAR void *arg)
if (!(getreg32(WDT_PT0STS) & (1 << WDT_PT0STS_CSTS)))
{
PANIC();
DEBUGPANIC();
}
/* Is there a registered handler? */

View file

@ -3197,7 +3197,7 @@ static inline void lpc31_portsc_bottomhalf(void)
static inline void lpc31_syserr_bottomhalf(void)
{
usbhost_trace1(EHCI_TRACE1_SYSERR_INTR, 0);
PANIC();
DEBUGPANIC();
}
/****************************************************************************

View file

@ -3034,7 +3034,7 @@ static inline void lpc43_portsc_bottomhalf(void)
static inline void lpc43_syserr_bottomhalf(void)
{
usbhost_trace1(EHCI_TRACE1_SYSERR_INTR, 0);
PANIC();
DEBUGPANIC();
}
/****************************************************************************

View file

@ -245,7 +245,7 @@ void arm_timer_initialize(void)
if (ret < 0)
{
tmrerr("ERROR: sam_oneshot_initialize failed\n");
PANIC();
DEBUGPANIC();
}
DEBUGASSERT(ONESHOT_INITIALIZED(&g_tickless.oneshot));
@ -257,7 +257,7 @@ void arm_timer_initialize(void)
if (ret < 0)
{
tmrerr("ERROR: sam_oneshot_max_delay failed\n");
PANIC();
DEBUGPANIC();
}
/* Convert this to configured clock ticks for use by the OS timer logic */
@ -281,7 +281,7 @@ void arm_timer_initialize(void)
if (ret < 0)
{
tmrerr("ERROR: sam_freerun_initialize failed\n");
PANIC();
DEBUGPANIC();
}
DEBUGASSERT(FREERUN_INITIALIZED(&g_tickless.freerun));

View file

@ -3007,7 +3007,7 @@ static inline void sam_portsc_bottomhalf(void)
static inline void sam_syserr_bottomhalf(void)
{
usbhost_trace1(EHCI_TRACE1_SYSERR_INTR, 0);
PANIC();
DEBUGPANIC();
}
/****************************************************************************

View file

@ -257,7 +257,7 @@ void arm_timer_initialize(void)
if (ret < 0)
{
tmrerr("ERROR: sam_oneshot_initialize failed\n");
PANIC();
DEBUGPANIC();
}
DEBUGASSERT(ONESHOT_INITIALIZED(&g_tickless.oneshot));
@ -269,7 +269,7 @@ void arm_timer_initialize(void)
if (ret < 0)
{
tmrerr("ERROR: sam_oneshot_max_delay failed\n");
PANIC();
DEBUGPANIC();
}
/* Convert this to configured clock ticks for use by the OS timer logic */
@ -293,7 +293,7 @@ void arm_timer_initialize(void)
if (ret < 0)
{
tmrerr("ERROR: sam_freerun_initialize failed\n");
PANIC();
DEBUGPANIC();
}
DEBUGASSERT(FREERUN_INITIALIZED(&g_tickless.freerun));

View file

@ -266,7 +266,7 @@ void arm_timer_initialize(void)
if (ret < 0)
{
tmrerr("ERROR: sam_oneshot_initialize failed\n");
PANIC();
DEBUGPANIC();
}
DEBUGASSERT(ONESHOT_INITIALIZED(&g_tickless.oneshot));
@ -279,7 +279,7 @@ void arm_timer_initialize(void)
if (ret < 0)
{
tmrerr("ERROR: sam_freerun_initialize failed\n");
PANIC();
DEBUGPANIC();
}
DEBUGASSERT(FREERUN_INITIALIZED(&g_tickless.freerun));

View file

@ -307,7 +307,7 @@ static int stm32_dmainterrupt(int irq, void *context, FAR void *arg)
else
#endif
{
PANIC();
DEBUGPANIC();
}
dmach = &g_dma[chndx];

View file

@ -410,7 +410,7 @@ static int stm32_dmainterrupt(int irq, void *context, FAR void *arg)
else
#endif
{
PANIC();
DEBUGPANIC();
}
/* Get the stream structure from the stream and controller numbers */

View file

@ -255,7 +255,7 @@ static int stm32_dmainterrupt(int irq, void *context, FAR void *arg)
}
else
{
PANIC();
DEBUGPANIC();
}
dmach = &g_dma[chndx];

View file

@ -409,7 +409,7 @@ static int stm32_dmainterrupt(int irq, void *context, void *arg)
else
#endif
{
PANIC();
DEBUGPANIC();
}
/* Get the stream structure from the stream and controller numbers */

View file

@ -411,7 +411,7 @@ static int stm32_dmainterrupt(int irq, void *context, FAR void *arg)
else
#endif
{
PANIC();
DEBUGPANIC();
}
/* Get the stream structure from the stream and controller numbers */

View file

@ -1495,7 +1495,7 @@ static void stm32l4_i2c_setclock(FAR struct stm32l4_i2c_priv_s *priv,
#endif
else
{
PANIC();
DEBUGPANIC();
}
uint32_t timingr =

View file

@ -202,7 +202,7 @@ void arm_timer_initialize(void)
if (ret < 0)
{
tmrerr("ERROR: stm32l4_oneshot_initialize failed\n");
PANIC();
DEBUGPANIC();
}
#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
@ -212,7 +212,7 @@ void arm_timer_initialize(void)
if (ret < 0)
{
tmrerr("ERROR: stm32l4_oneshot_max_delay failed\n");
PANIC();
DEBUGPANIC();
}
/* Convert this to configured clock ticks for use by the OS timer logic */
@ -236,7 +236,7 @@ void arm_timer_initialize(void)
if (ret < 0)
{
tmrerr("ERROR: stm32l4_freerun_initialize failed\n");
PANIC();
DEBUGPANIC();
}
}

View file

@ -305,7 +305,7 @@ static int stm32l4_dmainterrupt(int irq, void *context, FAR void *arg)
#endif
else
{
PANIC();
DEBUGPANIC();
}
dmach = &g_dma[chndx];

View file

@ -135,7 +135,7 @@ void up_decodeirq(uint32_t *regs)
#ifdef CONFIG_DEBUG_FEATURES
else
{
PANIC(); /* Normally never happens */
DEBUGPANIC(); /* Normally never happens */
}
#endif
board_autoled_off(LED_INIRQ);

View file

@ -685,7 +685,7 @@ static void tiva_adc_read(void *arg)
*/
aerr("ERROR: Invalid ADC device number given %d\n", sse->adc);
PANIC();
DEBUGPANIC();
return;
}

View file

@ -499,7 +499,7 @@ static int tms570_interrupt(int irq, void *context, FAR void *arg)
case SCI_INTVECT_TIMEOUT: /* Timeout interrupt */
default:
PANIC();
DEBUGPANIC();
}
}

View file

@ -87,7 +87,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -88,7 +88,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -88,7 +88,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -189,6 +189,6 @@ void _exit(int status)
* interrupts are disabled.
*/
PANIC();
DEBUGPANIC();
}

View file

@ -90,7 +90,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -147,7 +147,7 @@ void up_sigdeliver(void)
* interrupts are disabled.
*/
PANIC();
DEBUGPANIC();
}
#endif /* !CONFIG_DISABLE_SIGNALS */

View file

@ -90,7 +90,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -134,7 +134,7 @@ void lm32_sigdeliver(void)
* interrupts are disabled.
*/
PANIC();
DEBUGPANIC();
}
#endif /* !CONFIG_DISABLE_SIGNALS */

View file

@ -88,7 +88,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -88,7 +88,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -189,6 +189,6 @@ void _exit(int status)
* interrupts are disabled.
*/
PANIC();
DEBUGPANIC();
}

View file

@ -90,7 +90,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -140,7 +140,7 @@ void up_sigdeliver(void)
* interrupts are disabled.
*/
PANIC();
DEBUGPANIC();
}
#endif /* !CONFIG_DISABLE_SIGNALS */

View file

@ -88,7 +88,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -79,7 +79,7 @@ void sim_smp_hook(void)
/* That function should not return. */
PANIC();
DEBUGPANIC();
}
#endif /* CONFIG_SMP */

View file

@ -88,7 +88,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -202,5 +202,5 @@ void _exit(int status)
* interrupts are disabled.
*/
PANIC();
DEBUGPANIC();
}

View file

@ -90,7 +90,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -89,7 +89,7 @@ void up_reprioritize_rtr(FAR struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -91,7 +91,7 @@ void up_reprioritize_rtr(FAR struct tcb_s *tcb, uint8_t priority)
#endif
)
{
PANIC();
DEBUGPANIC();
}
else
{

View file

@ -945,7 +945,7 @@ struct bcmf_sdio_frame *bcmf_sdio_allocate_frame(FAR struct bcmf_dev_s *priv,
{
if (nxsem_wait(&sbus->queue_mutex) < 0)
{
PANIC();
DEBUGPANIC();
}
#if 0
@ -995,7 +995,7 @@ void bcmf_sdio_free_frame(FAR struct bcmf_dev_s *priv,
if (nxsem_wait(&sbus->queue_mutex) < 0)
{
PANIC();
DEBUGPANIC();
}
bcmf_dqueue_push(&sbus->free_queue, &sframe->list_entry);

View file

@ -258,7 +258,7 @@ int bcmf_sdpcm_readframe(FAR struct bcmf_dev_s *priv)
if (nxsem_wait(&sbus->queue_mutex) < 0)
{
PANIC();
DEBUGPANIC();
}
bcmf_dqueue_push(&sbus->rx_queue, &sframe->list_entry);
@ -313,7 +313,7 @@ int bcmf_sdpcm_sendframe(FAR struct bcmf_dev_s *priv)
if (nxsem_wait(&sbus->queue_mutex) < 0)
{
PANIC();
DEBUGPANIC();
}
entry = sbus->tx_queue.tail;
@ -397,7 +397,7 @@ int bcmf_sdpcm_queue_frame(FAR struct bcmf_dev_s *priv,
if (nxsem_wait(&sbus->queue_mutex) < 0)
{
PANIC();
DEBUGPANIC();
}
bcmf_dqueue_push(&sbus->tx_queue, &sframe->list_entry);
@ -459,7 +459,7 @@ struct bcmf_frame_s *bcmf_sdpcm_get_rx_frame(FAR struct bcmf_dev_s *priv)
if (nxsem_wait(&sbus->queue_mutex) < 0)
{
PANIC();
DEBUGPANIC();
}
entry = bcmf_dqueue_pop_tail(&sbus->rx_queue);

View file

@ -234,7 +234,7 @@ int setvbuf(FAR FILE *stream, FAR char *buffer, int mode, size_t size)
break;
default:
PANIC();
DEBUGPANIC();
}
/* Do not release the previous buffer if it was allocated by the user

View file

@ -500,7 +500,7 @@ static inline void nxf_fillglyph(FAR struct nxfonts_fcache_s *priv,
else
#endif
{
PANIC();
DEBUGPANIC();
}
}

View file

@ -63,7 +63,7 @@ extern "C"
{
void __cxa_pure_virtual(void)
{
PANIC();
DEBUGPANIC();
}
}

View file

@ -111,7 +111,7 @@ void os_idle_trampoline(void)
/* The IDLE task should never return */
PANIC();
DEBUGPANIC();
}
/****************************************************************************

View file

@ -112,6 +112,6 @@ void nxmq_free_msg(FAR struct mqueue_msg_s *mqmsg)
}
else
{
PANIC();
DEBUGPANIC();
}
}