forked from nuttx/nuttx-update
xtensa: remove up_set_current_regs/up_current_regs
reason: up_set_current_regs initially had two functions: 1: To mark the entry into an interrupt state. 2: To record the context before an interrupt/exception. If we switch to a new task, we need to store the upcoming context regs by calling up_set_current_regs(regs). Currently, we record the context in other ways, so the second function is obsolete. Therefore, we need to rename up_set_current_regs to better reflect its actual meaning, which is solely to mark an interrupt. Signed-off-by: hujun5 <hujun5@xiaomi.com>
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parent
137ca05249
commit
635da96bae
6 changed files with 36 additions and 60 deletions
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@ -360,17 +360,9 @@ extern "C"
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* g_current_regs[] holds a references to the current interrupt level
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* register storage structure. If is non-NULL only during interrupt
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* processing. Access to g_current_regs[] must be through the
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* [get/set]_current_regs for portability.
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*/
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/* g_interrupt_context store irq status */
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/* For the case of architectures with multiple CPUs, then there must be one
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* such value for each processor that can receive an interrupt.
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*/
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EXTERN volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS];
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extern volatile bool g_interrupt_context[CONFIG_SMP_NCPUS];
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#endif
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/****************************************************************************
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@ -413,22 +405,21 @@ irqstate_t xtensa_disable_interrupts(irqstate_t mask);
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int up_cpu_index(void) noinstrument_function;
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#endif /* CONFIG_ARCH_HAVE_MULTICPU */
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noinstrument_function static inline_function uint32_t *up_current_regs(void)
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{
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#ifdef CONFIG_SMP
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return (uint32_t *)g_current_regs[up_cpu_index()];
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#else
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return (uint32_t *)g_current_regs[0];
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#endif
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}
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/****************************************************************************
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* Name: up_set_interrupt_context
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*
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* Description:
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* Set the interrupt handler context.
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*
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****************************************************************************/
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noinstrument_function
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static inline_function void up_set_current_regs(uint32_t *regs)
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static inline_function void up_set_interrupt_context(bool flag)
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{
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#ifdef CONFIG_SMP
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g_current_regs[up_cpu_index()] = regs;
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g_interrupt_context[up_cpu_index()] = flag;
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#else
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g_current_regs[0] = regs;
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g_interrupt_context[0] = flag;
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#endif
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}
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@ -446,15 +437,12 @@ noinstrument_function static inline_function bool up_interrupt_context(void)
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{
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#ifdef CONFIG_SMP
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irqstate_t flags = up_irq_save();
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#endif
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bool ret = up_current_regs() != NULL;
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#ifdef CONFIG_SMP
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bool ret = g_interrupt_context[up_cpu_index()];
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up_irq_restore(flags);
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#endif
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return ret;
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#else
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return g_interrupt_context[0];
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#endif
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}
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#endif
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@ -463,7 +451,7 @@ noinstrument_function static inline_function bool up_interrupt_context(void)
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****************************************************************************/
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#define up_getusrpc(regs) \
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(((uint32_t *)((regs) ? (regs) : up_current_regs()))[REG_PC])
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(((uint32_t *)((regs) ? (regs) : running_regs()))[REG_PC])
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#undef EXTERN
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#ifdef __cplusplus
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@ -65,14 +65,7 @@
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void xtensa_panic(int xptcode, uint32_t *regs)
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{
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struct tcb_s **running_task = &g_running_tasks[this_cpu()];
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if (*running_task != NULL)
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{
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(*running_task)->xcp.regs = regs;
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}
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up_set_current_regs(regs);
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up_set_interrupt_context(true);
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/* We get here when a un-dispatch-able, irrecoverable exception occurs */
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@ -171,7 +164,14 @@ void xtensa_panic(int xptcode, uint32_t *regs)
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void xtensa_user_panic(int exccause, uint32_t *regs)
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{
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up_set_current_regs(regs);
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struct tcb_s **running_task = &g_running_tasks[this_cpu()];
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if (*running_task != NULL)
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{
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(*running_task)->xcp.regs = regs;
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}
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up_set_interrupt_context(true);
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/* We get here when a un-dispatch-able, irrecoverable exception occurs */
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@ -277,8 +277,8 @@ int up_backtrace(struct tcb_s *tcb, void **buffer, int size, int skip)
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#endif
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ret += backtrace_stack(rtcb->stack_base_ptr,
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rtcb->stack_base_ptr + rtcb->adj_stack_size,
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(void *)up_current_regs()[REG_A1],
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(void *)up_current_regs()[REG_A0],
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running_regs()[REG_A1],
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running_regs()[REG_A0],
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&buffer[ret], size - ret, &skip);
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}
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else
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@ -32,17 +32,9 @@
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* Public Data
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****************************************************************************/
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/* g_current_regs[] holds a reference to the current interrupt level
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* register storage structure. It is non-NULL only during interrupt
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* processing. Access to g_current_regs[] must be through the
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* [get/set]_current_regs for portability.
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*/
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/* g_interrupt_context store irq status */
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/* For the case of architectures with multiple CPUs, then there must be one
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* such value for each processor that can receive an interrupt.
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*/
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volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS];
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volatile bool g_interrupt_context[CONFIG_SMP_NCPUS];
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/****************************************************************************
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* Private Functions
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@ -57,13 +57,11 @@ uint32_t *xtensa_irq_dispatch(int irq, uint32_t *regs)
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/* Nested interrupts are not supported */
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DEBUGASSERT(up_current_regs() == NULL);
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DEBUGASSERT(!up_interrupt_context());
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/* Current regs non-zero indicates that we are processing an interrupt;
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* current_regs is also used to manage interrupt level context switches.
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*/
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/* Set irq flag */
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up_set_current_regs(regs);
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up_set_interrupt_context(true);
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if (*running_task != NULL)
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{
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@ -104,11 +102,9 @@ uint32_t *xtensa_irq_dispatch(int irq, uint32_t *regs)
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*running_task = tcb;
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}
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/* Set current_regs to NULL to indicate that we are no longer in an
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* interrupt handler.
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*/
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/* Set irq flag */
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up_set_current_regs(NULL);
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up_set_interrupt_context(false);
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#endif
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board_autoled_off(LED_INIRQ);
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@ -53,7 +53,7 @@ uintptr_t up_getusrsp(void *regs)
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void up_dump_register(void *dumpregs)
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{
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volatile uintptr_t *regs = dumpregs ? dumpregs : up_current_regs();
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volatile uintptr_t *regs = dumpregs ? dumpregs : running_regs();
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_alert(" PC: %08lx PS: %08lx\n",
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(unsigned long)regs[REG_PC], (unsigned long)regs[REG_PS]);
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