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Refine the preprocessor conditional guard style (#190)

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This commit is contained in:
Xiang Xiao 2020-01-31 10:07:39 -08:00 committed by GitHub
parent 68951e8d72
commit 80277d1630
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GPG key ID: 4AEE18F83AFDEB23
577 changed files with 904 additions and 904 deletions
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2
arch/arm/include/cxd56xx/adc.h
View file

@ -93,4 +93,4 @@
int cxd56_adcinitialize(void);
#endif /* __ARCH_ARM_INCLUDE_CXD56XX_ADC_H */
#endif /* __ARCH_ARM_INCLUDE_CXD56XX_ADC_H */

2
arch/arm/include/cxd56xx/crashdump.h
View file

@ -162,4 +162,4 @@ extern "C"
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_INCLUDE_CXD56XX_CRASHDUMP_H */
#endif /* __ARCH_ARM_INCLUDE_CXD56XX_CRASHDUMP_H */

2
arch/arm/include/cxd56xx/scu.h
View file

@ -557,4 +557,4 @@ void scu_initialize(void);
void scu_uninitialize(void);
#endif /* __ARCH_ARM_INCLUDE_CXD56XX_SCU_H */
#endif /* __ARCH_ARM_INCLUDE_CXD56XX_SCU_H */

2
arch/arm/include/cxd56xx/timer.h
View file

@ -63,4 +63,4 @@ struct timer_sethandler_s
CODE tccb_t handler; /* The timer interrupt handler */
};
#endif /* __ARCH_ARM_INCLUDE_CXD56XX_TIMER_H */
#endif /* __ARCH_ARM_INCLUDE_CXD56XX_TIMER_H */

2
arch/arm/include/setjmp.h
View file

@ -34,7 +34,7 @@
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_SETJUMP_H
#define __ARCH_ARM_INCLUDE_SETJUMP_H 1
#define __ARCH_ARM_INCLUDE_SETJUMP_H
/****************************************************************************
* Included Files

2
arch/arm/include/tls.h
View file

@ -34,7 +34,7 @@
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_TLS_H
#define __ARCH_ARM_INCLUDE_TLS_H 1
#define __ARCH_ARM_INCLUDE_TLS_H
/****************************************************************************
* Included Files

2
arch/arm/src/am335x/am335x_gpio.h
View file

@ -314,4 +314,4 @@ gpio_pinset_t am335x_periph_gpio(gpio_pinset_t pinset);
#if defined(__cplusplus)
}
#endif
#endif /* __ARCH_ARM_SRC_AM335X_AM335X_GPIO_H */
#endif /* __ARCH_ARM_SRC_AM335X_AM335X_GPIO_H */

2
arch/arm/src/arm/arm.h
View file

@ -443,4 +443,4 @@ extern "C"
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_COMMON_ARM_H */
#endif /* __ARCH_ARM_SRC_COMMON_ARM_H */

2
arch/arm/src/armv6-m/exc_return.h
View file

@ -100,4 +100,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_ARMV6_M_EXC_RETURN_H */
#endif /* __ARCH_ARM_SRC_ARMV6_M_EXC_RETURN_H */

2
arch/arm/src/armv6-m/psr.h
View file

@ -74,4 +74,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_COMMON_ARMV6_M_PSR_H */
#endif /* __ARCH_ARM_SRC_COMMON_ARMV6_M_PSR_H */

2
arch/arm/src/armv6-m/svcall.h
View file

@ -142,4 +142,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_ARMV6_M_SVCALL_H */
#endif /* __ARCH_ARM_SRC_ARMV6_M_SVCALL_H */

4
arch/arm/src/armv7-a/addrenv.h
View file

@ -121,5 +121,5 @@ void arm_addrenv_destroy_region(FAR uintptr_t **list, unsigned int listlen,
#endif
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_ARCH_ADDRENV */
#endif /* __ARCH_ARM_SRC_ARMV7_A_ADDRENV_H */
#endif /* CONFIG_ARCH_ADDRENV */
#endif /* __ARCH_ARM_SRC_ARMV7_A_ADDRENV_H */

2
arch/arm/src/armv7-a/arm.h
View file

@ -130,4 +130,4 @@ void arm_data_initialize(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7_A_ARM_H */
#endif /* __ARCH_ARM_SRC_ARMV7_A_ARM_H */

2
arch/arm/src/armv7-a/barriers.h
View file

@ -54,4 +54,4 @@
#define ARM_ISB() arm_isb(15)
#define ARM_DMB() arm_dmb(15)
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_A_BARRIERS_H */
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_A_BARRIERS_H */

2
arch/arm/src/armv7-a/cp15_cacheops.h
View file

@ -1080,4 +1080,4 @@ void cp15_flush_dcache(uintptr_t start, uintptr_t end);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7_A_CP15_CACHEOPS_H */
#endif /* __ARCH_ARM_SRC_ARMV7_A_CP15_CACHEOPS_H */

2
arch/arm/src/armv7-a/fpu.h
View file

@ -90,4 +90,4 @@ void arm_fpuconfig(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7_A_FPU_H */
#endif /* __ARCH_ARM_SRC_ARMV7_A_FPU_H */

2
arch/arm/src/armv7-a/l2cc.h
View file

@ -255,4 +255,4 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr);
# define l2cc_flush(s,e)
#endif /* CONFIG_ARCH_L2CACHE */
#endif /* __ARCH_ARM_SRC_ARMV7_A_L2CC_H */
#endif /* __ARCH_ARM_SRC_ARMV7_A_L2CC_H */

2
arch/arm/src/armv7-a/mmu.h
View file

@ -1510,4 +1510,4 @@ void mmu_invalidate_region(uint32_t vstart, size_t size);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7_A_MMU_H */
#endif /* __ARCH_ARM_SRC_ARMV7_A_MMU_H */

2
arch/arm/src/armv7-a/sctlr.h
View file

@ -416,4 +416,4 @@ extern "C"
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7_A_SCTLR_H */
#endif /* __ARCH_ARM_SRC_ARMV7_A_SCTLR_H */

6
arch/arm/src/armv7-a/smp.h
View file

@ -140,6 +140,6 @@ void __cpu3_start(void);
void arm_cpu_boot(int cpu);
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_SMP */
#endif /* __ARCH_ARM_SRC_ARMV7_A_SMP_H */
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_SMP */
#endif /* __ARCH_ARM_SRC_ARMV7_A_SMP_H */

2
arch/arm/src/armv7-a/svcall.h
View file

@ -127,4 +127,4 @@
************************************************************************************/
#endif /* CONFIG_LIB_SYSCALL */
#endif /* __ARCH_ARM_SRC_ARMV7_A_SVCALL_H */
#endif /* __ARCH_ARM_SRC_ARMV7_A_SVCALL_H */

2
arch/arm/src/armv7-m/barriers.h
View file

@ -54,4 +54,4 @@
#define ARM_ISB() arm_isb(15)
#define ARM_DMB() arm_dmb(15)
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_BARRIERS_H */
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_BARRIERS_H */

2
arch/arm/src/armv7-m/exc_return.h
View file

@ -116,4 +116,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_ARMV7_M_EXC_RETURN_H */
#endif /* __ARCH_ARM_SRC_ARMV7_M_EXC_RETURN_H */

4
arch/arm/src/armv7-m/mpu.h
View file

@ -499,5 +499,5 @@ static inline void mpu_user_peripheral(uintptr_t base, size_t size)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7M_MPU_H */
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7M_MPU_H */

2
arch/arm/src/armv7-m/psr.h
View file

@ -84,4 +84,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_PSR_H */
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_PSR_H */

2
arch/arm/src/armv7-m/ram_vectors.h
View file

@ -115,4 +115,4 @@ void exception_common(void);
int up_ramvec_attach(int irq, up_vector_t vector);
#endif /* CONFIG_ARCH_RAMVECTORS */
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H */
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H */

2
arch/arm/src/armv7-m/svcall.h
View file

@ -142,4 +142,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_ARMV7_M_SVCALL_H */
#endif /* __ARCH_ARM_SRC_ARMV7_M_SVCALL_H */

8
arch/arm/src/armv7-m/up_cache.c
View file

@ -283,7 +283,7 @@ void up_enable_dcache(void)
ARM_DSB();
ARM_ISB();
}
#endif /* CONFIG_ARMV7M_DCACHE */
#endif /* CONFIG_ARMV7M_DCACHE */
/****************************************************************************
* Name: up_disable_dcache
@ -356,7 +356,7 @@ void up_disable_dcache(void)
ARM_DSB();
ARM_ISB();
}
#endif /* CONFIG_ARMV7M_DCACHE */
#endif /* CONFIG_ARMV7M_DCACHE */
/****************************************************************************
* Name: up_invalidate_dcache
@ -427,7 +427,7 @@ void up_invalidate_dcache(uintptr_t start, uintptr_t end)
ARM_DSB();
ARM_ISB();
}
#endif /* CONFIG_ARMV7M_DCACHE */
#endif /* CONFIG_ARMV7M_DCACHE */
/****************************************************************************
* Name: up_invalidate_dcache_all
@ -493,7 +493,7 @@ void up_invalidate_dcache_all(void)
ARM_DSB();
ARM_ISB();
}
#endif /* CONFIG_ARMV7M_DCACHE */
#endif /* CONFIG_ARMV7M_DCACHE */
/****************************************************************************
* Name: up_clean_dcache

2
arch/arm/src/armv7-r/arm.h
View file

@ -167,4 +167,4 @@ void arm_data_initialize(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7_R_CPSR_H */
#endif /* __ARCH_ARM_SRC_ARMV7_R_CPSR_H */

2
arch/arm/src/armv7-r/barriers.h
View file

@ -54,4 +54,4 @@
#define ARM_ISB() arm_isb(15)
#define ARM_DMB() arm_dmb(15)
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_R_BARRIERS_H */
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_R_BARRIERS_H */

2
arch/arm/src/armv7-r/cp15_cacheops.h
View file

@ -1088,4 +1088,4 @@ void cp15_flush_dcache(uintptr_t start, uintptr_t end);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7_R_CP15_CACHEOPS_H */
#endif /* __ARCH_ARM_SRC_ARMV7_R_CP15_CACHEOPS_H */

2
arch/arm/src/armv7-r/fpu.h
View file

@ -90,4 +90,4 @@ void arm_fpuconfig(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7_R_FPU_H */
#endif /* __ARCH_ARM_SRC_ARMV7_R_FPU_H */

2
arch/arm/src/armv7-r/l2cc.h
View file

@ -255,4 +255,4 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr);
# define l2cc_flush(s,e)
#endif /* CONFIG_ARCH_L2CACHE */
#endif /* __ARCH_ARM_SRC_ARMV7_R_L2CC_H */
#endif /* __ARCH_ARM_SRC_ARMV7_R_L2CC_H */

4
arch/arm/src/armv7-r/mpu.h
View file

@ -828,5 +828,5 @@ static inline void mpu_user_intsram_wb(uintptr_t base, size_t size)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7R_MPU_H */
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7R_MPU_H */

2
arch/arm/src/armv7-r/sctlr.h
View file

@ -542,4 +542,4 @@ extern "C"
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7_R_SCTLR_H */
#endif /* __ARCH_ARM_SRC_ARMV7_R_SCTLR_H */

2
arch/arm/src/armv7-r/svcall.h
View file

@ -127,4 +127,4 @@
************************************************************************************/
#endif /* CONFIG_LIB_SYSCALL */
#endif /* __ARCH_ARM_SRC_ARMV7_R_SVCALL_H */
#endif /* __ARCH_ARM_SRC_ARMV7_R_SVCALL_H */

2
arch/arm/src/c5471/chip.h
View file

@ -368,4 +368,4 @@
* Public Function Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_C5471_CHIP_H */
#endif /* __ARCH_ARM_SRC_C5471_CHIP_H */

2
arch/arm/src/common/up_arch.h
View file

@ -83,4 +83,4 @@ void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits);
#endif
#endif /* __ASSEMBLY__ */
#endif /* ___ARCH_ARM_SRC_COMMON_UP_ARCH_H */
#endif /* ___ARCH_ARM_SRC_COMMON_UP_ARCH_H */

2
arch/arm/src/common/up_internal.h
View file

@ -540,4 +540,4 @@ void up_stack_color(FAR void *stackbase, size_t nbytes);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_COMMON_UP_INTERNAL_H */
#endif /* __ARCH_ARM_SRC_COMMON_UP_INTERNAL_H */

2
arch/arm/src/cxd56xx/cxd56_gnss.c
View file

@ -95,7 +95,7 @@ extern int PM_SleepCpu(int cpuid, int mode);
#endif
#define CXD56_GNSS_GPS_CPUID 1
#ifdef CONFIG_CXD56_GNSS_FW_RTK
#ifdef CONFIG_CXD56_GNSS_FW_RTK
# define CXD56_GNSS_FWNAME "gnssfwrtk"
#else
# define CXD56_GNSS_FWNAME "gnssfw"

2
arch/arm/src/dm320/chip.h
View file

@ -58,4 +58,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_DM320_CHIP_H */
#endif /* __ARCH_ARM_SRC_DM320_CHIP_H */

2
arch/arm/src/dm320/dm320_ahb.h
View file

@ -56,4 +56,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_DM320_DM320_AHB_H */
#endif /* __ARCH_ARM_SRC_DM320_DM320_AHB_H */

2
arch/arm/src/dm320/dm320_busc.h
View file

@ -55,4 +55,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_DM320_DM320_BUSC_H */
#endif /* __ARCH_ARM_SRC_DM320_DM320_BUSC_H */

2
arch/arm/src/dm320/dm320_clkc.h
View file

@ -78,4 +78,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_DM320_DM320_CLKC_H */
#endif /* __ARCH_ARM_SRC_DM320_DM320_CLKC_H */

2
arch/arm/src/dm320/dm320_emif.h
View file

@ -105,4 +105,4 @@
#endif
#endif /* __ARCH_ARM_SRC_DM320_DM320_EMIF_H */
#endif /* __ARCH_ARM_SRC_DM320_DM320_EMIF_H */

2
arch/arm/src/dm320/dm320_gio.h
View file

@ -173,4 +173,4 @@
#endif
#endif /* __DM320_DM320_GIO_H */
#endif /* __DM320_DM320_GIO_H */

2
arch/arm/src/dm320/dm320_intc.h
View file

@ -98,4 +98,4 @@
#endif
#endif /* __ARCH_ARM_SRC_DM320_DM320_INTC_H */
#endif /* __ARCH_ARM_SRC_DM320_DM320_INTC_H */

2
arch/arm/src/dm320/dm320_memorymap.h
View file

@ -261,4 +261,4 @@
#endif
#endif /* __ARCH_ARM_SRC_DM320_DM320_MEMORYMAP_H */
#endif /* __ARCH_ARM_SRC_DM320_DM320_MEMORYMAP_H */

2
arch/arm/src/dm320/dm320_osd.h
View file

@ -111,4 +111,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_DM320_DM320_OSD_H */
#endif /* __ARCH_ARM_SRC_DM320_DM320_OSD_H */

2
arch/arm/src/dm320/dm320_timer.h
View file

@ -105,4 +105,4 @@
#endif
#endif /* __ARCH_ARM_SRC_DM320_DM320_TIMER_H */
#endif /* __ARCH_ARM_SRC_DM320_DM320_TIMER_H */

2
arch/arm/src/dm320/dm320_uart.h
View file

@ -173,4 +173,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_DM320_DM320_UART_H */
#endif /* __ARCH_ARM_SRC_DM320_DM320_UART_H */

2
arch/arm/src/dm320/dm320_usb.h
View file

@ -246,4 +246,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_DM320_DM320_USB_H */
#endif /* __ARCH_ARM_SRC_DM320_DM320_USB_H */

2
arch/arm/src/dm320/dm320_usbdev.c
View file

@ -67,7 +67,7 @@
/* Configuration ************************************************************/
#ifndef CONFIG_USBDEV_MAXPOWER
#ifndef CONFIG_USBDEV_MAXPOWER
# define CONFIG_USBDEV_MAXPOWER 100 /* mA */
#endif

2
arch/arm/src/imx1/chip.h
View file

@ -62,4 +62,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_IMX_CHIP_H */
#endif /* __ARCH_ARM_IMX_CHIP_H */

2
arch/arm/src/imx1/imx_aitc.h
View file

@ -116,4 +116,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_IMX_AITC_H */
#endif /* __ARCH_ARM_IMX_AITC_H */

2
arch/arm/src/imx1/imx_cspi.h
View file

@ -236,4 +236,4 @@ int imx_spicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif /* __cplusplus */
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_IMX_CSPI_H */
#endif /* __ARCH_ARM_IMX_CSPI_H */

2
arch/arm/src/imx1/imx_dma.h
View file

@ -247,4 +247,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_IMX_DMA_H */
#endif /* __ARCH_ARM_IMX_DMA_H */

2
arch/arm/src/imx1/imx_eim.h
View file

@ -82,4 +82,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_IMX_EIM_H */
#endif /* __ARCH_ARM_IMX_EIM_H */

4
arch/arm/src/imx1/imx_gpio.h
View file

@ -184,7 +184,7 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_IMX1_IMX_GPIO_H */
#endif /* __ARCH_ARM_SRC_IMX1_IMX_GPIO_H */
#ifndef __ASSEMBLY__
@ -558,4 +558,4 @@ void imxgpio_configpfinput(int port, int bit);
#endif
#endif /* __ARCH_ARM_IMX_GPIOHELPERS_H */
#endif /* __ARCH_ARM_IMX_GPIOHELPERS_H */

2
arch/arm/src/imx1/imx_i2c.h
View file

@ -66,4 +66,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_IMX_I2C_H */
#endif /* __ARCH_ARM_IMX_I2C_H */

2
arch/arm/src/imx1/imx_memorymap.h
View file

@ -256,4 +256,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_IMX_MEMORYMAP_H */
#endif /* __ARCH_ARM_IMX_MEMORYMAP_H */

2
arch/arm/src/imx1/imx_rtc.h
View file

@ -82,4 +82,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_IMX_RTC_H */
#endif /* __ARCH_ARM_IMX_RTC_H */

2
arch/arm/src/imx1/imx_system.h
View file

@ -184,4 +184,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_IMX_SYSTEM_H */
#endif /* __ARCH_ARM_IMX_SYSTEM_H */

2
arch/arm/src/imx1/imx_timer.h
View file

@ -101,4 +101,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_IMX_TIMER_H */
#endif /* __ARCH_ARM_IMX_TIMER_H */

2
arch/arm/src/imx1/imx_uart.h
View file

@ -224,4 +224,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_IMX1_CHIP_IMX_UART_H */
#endif /* __ARCH_ARM_SRC_IMX1_CHIP_IMX_UART_H */

2
arch/arm/src/imx1/imx_usbd.h
View file

@ -317,4 +317,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_IMX_USBD_H */
#endif /* __ARCH_ARM_IMX_USBD_H */

2
arch/arm/src/imx1/imx_wdog.h
View file

@ -78,4 +78,4 @@
* Inline Functions
************************************************************************************/
#endif /* __ARCH_ARM_IMX_WDOG_H */
#endif /* __ARCH_ARM_IMX_WDOG_H */

2
arch/arm/src/imx6/hardware/imx_ecspi.h
View file

@ -287,4 +287,4 @@
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_SRC_IMX6_HARDWARE_ECSPI_H */
#endif /* __ARCH_ARM_SRC_IMX6_HARDWARE_ECSPI_H */

2
arch/arm/src/imx6/hardware/imx_uart.h
View file

@ -364,4 +364,4 @@
#define UART_UMCR_SLADDR_MASK (0xff << UART_UMCR_SLADDR_SHIFT)
# define UART_UMCR_SLADDR(n) ((uint32_t)(n) << UART_UMCR_SLADDR_SHIFT)
#endif /* __ARCH_ARM_SRC_IMX6_HARDWARE_IMX_UART_H */
#endif /* __ARCH_ARM_SRC_IMX6_HARDWARE_IMX_UART_H */

2
arch/arm/src/imx6/imx_config.h
View file

@ -34,7 +34,7 @@
****************************************************************************/
#ifndef __ARCH_ARM_SRC_IMX6_IMX_CONFIG_H
#define __ARCH_ARM_SRC_IMX6_IMX_CONFIG_H 1
#define __ARCH_ARM_SRC_IMX6_IMX_CONFIG_H
/****************************************************************************
* Included Files

2
arch/arm/src/imx6/imx_ecspi.h
View file

@ -162,4 +162,4 @@ int imx_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif /* __cplusplus */
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_IMX6_ECSPI_H */
#endif /* __ARCH_ARM_IMX6_ECSPI_H */

2
arch/arm/src/imx6/imx_gpio.h
View file

@ -298,4 +298,4 @@ int imx_dump_gpio(uint32_t pinset, const char *msg);
#if defined(__cplusplus)
}
#endif
#endif /* __ARCH_ARM_SRC_IMX6_IMX_GPIO_H */
#endif /* __ARCH_ARM_SRC_IMX6_IMX_GPIO_H */

2
arch/arm/src/imxrt/hardware/imxrt_daisy.h
View file

@ -58,4 +58,4 @@
void imxrt_daisy_select(unsigned int index, unsigned int alt);
#endif /* __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_DAISY_H */
#endif /* __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_DAISY_H */

8
arch/arm/src/imxrt/hardware/imxrt_flexpwm.h
View file

@ -1678,10 +1678,10 @@
#define MCTRL_CLDOK_SHIFT (4) /* Bits: 4-7 Clear Load Okay */
#define MCTRL_CLDOK_MASK (15 << MCTRL_CLDOK_SHIFT)
# define MCTRL_CLDOK(n) ((uint32_t)(n) << MCTRL_CLDOK_SHIFT)
# define MCTRL_CLDOK_SM0 (1 << MCTRL_CLDOK_SHIFT) /* Clear Load Okay of submodule 0 */
# define MCTRL_CLDOK_SM1 (2 << MCTRL_CLDOK_SHIFT) /* Clear Load Okay of submodule 1 */
# define MCTRL_CLDOK_SM2 (4 << MCTRL_CLDOK_SHIFT) /* Clear Load Okay of submodule 2 */
# define MCTRL_CLDOK_SM3 (8 << MCTRL_CLDOK_SHIFT) /* Clear Load Okay of submodule 3 */
# define MCTRL_CLDOK_SM0 (1 << MCTRL_CLDOK_SHIFT) /* Clear Load Okay of submodule 0 */
# define MCTRL_CLDOK_SM1 (2 << MCTRL_CLDOK_SHIFT) /* Clear Load Okay of submodule 1 */
# define MCTRL_CLDOK_SM2 (4 << MCTRL_CLDOK_SHIFT) /* Clear Load Okay of submodule 2 */
# define MCTRL_CLDOK_SM3 (8 << MCTRL_CLDOK_SHIFT) /* Clear Load Okay of submodule 3 */
#define MCTRL_RUN_SHIFT (8) /* Bits: 8-11 Run */
#define MCTRL_RUN_MASK (15 << MCTRL_RUN_SHIFT)
# define MCTRL_RUN(n) ((uint32_t)(n) << MCTRL_RUN_SHIFT)

6
arch/arm/src/imxrt/hardware/rt102x/imxrt102x_ccm.h
View file

@ -343,7 +343,7 @@
/* Bits 27-31: Reserved */
# define CCM_CSCDR1_TRACE_PODF(n) ((uint32_t)(n) << CCM_CSCDR1_TRACE_PODF_SHIFT)
/* Clock Divider Register 1 */
/* Clock Divider Register 1 */
#define CCM_CS1CDR_SAI1_CLK_PODF_SHIFT (0) /* Bits 0-5: Divider for sai1 clock podf */
#define CCM_CS1CDR_SAI1_CLK_PODF_MASK (0x3f << CCM_CS1CDR_SAI1_CLK_PODF_SHIFT)
@ -365,7 +365,7 @@
#define CCM_CS1CDR_FLEXIO2_CLK_PODF_MASK (0x7 << CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT)
# define CCM_CS1CDR_FLEXIO2_CLK_PODF(n) ((uint32_t)(n) << CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT)
/* Bits 28-31: Reserved */
/* Clock Divider Register 2 */
/* Clock Divider Register 2 */
#define CCM_CS2CDR_SAI2_CLK_PODF_SHIFT (0) /* Bits 0-5: Divider for sai2 clock podf */
#define CCM_CS2CDR_SAI2_CLK_PODF_MASK (0x3f << CCM_CS2CDR_SAI2_CLK_PODF_SHIFT)
@ -471,7 +471,7 @@
#define CCM_CIMR_MASK_ARM_PODF_LOADED (1 << 26) /* Bit 26: mask interrupt generation due to frequency change of arm_podf */
/* Bits 27-31: Reserved */
/* Clock Output Source Register */
/* Clock Output Source Register */
#define CCM_CCOSR_CLKO1_SEL_SHIFT (0) /* Bits 0-3: Selection of the clock to be generated on CCM_CLKO1 */
#define CCM_CCOSR_CLKO1_SEL_MASK (0xF << CCM_CCOSR_CLKO1_SEL_SHIFT)

6
arch/arm/src/imxrt/hardware/rt105x/imxrt105x_ccm.h
View file

@ -359,7 +359,7 @@
# define CCM_CSCDR1_TRACE_PODF(n) ((uint32_t)(n) << CCM_CSCDR1_TRACE_PODF_SHIFT)
/* Bits 28-31: Reserved */
/* Clock Divider Register 1 */
/* Clock Divider Register 1 */
#define CCM_CS1CDR_SAI1_CLK_PODF_SHIFT (0) /* Bits 0-5: Divider for sai1 clock podf */
#define CCM_CS1CDR_SAI1_CLK_PODF_MASK (0x3f << CCM_CS1CDR_SAI1_CLK_PODF_SHIFT)
@ -382,7 +382,7 @@
# define CCM_CS1CDR_FLEXIO2_CLK_PODF(n) ((uint32_t)(n) << CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT)
/* Bits 28-31: Reserved */
/* Clock Divider Register 2 */
/* Clock Divider Register 2 */
#define CCM_CS2CDR_SAI2_CLK_PODF_SHIFT (0) /* Bits 0-5: Divider for sai2 clock podf */
#define CCM_CS2CDR_SAI2_CLK_PODF_MASK (0x3f << CCM_CS2CDR_SAI2_CLK_PODF_SHIFT)
@ -537,7 +537,7 @@
#define CCM_CIMR_MASK_ARM_PODF_LOADED (1 << 26) /* Bit 26: mask interrupt generation due to frequency change of arm_podf */
/* Bits 27-31: Reserved */
/* Clock Output Source Register */
/* Clock Output Source Register */
#define CCM_CCOSR_CLKO1_SEL_SHIFT (0) /* Bits 0-3: Selection of the clock to be generated on CCM_CLKO1 */
#define CCM_CCOSR_CLKO1_SEL_MASK (0xF << CCM_CCOSR_CLKO1_SEL_SHIFT)

6
arch/arm/src/imxrt/hardware/rt106x/imxrt106x_ccm.h
View file

@ -359,7 +359,7 @@
# define CCM_CSCDR1_TRACE_PODF(n) ((uint32_t)(n) << CCM_CSCDR1_TRACE_PODF_SHIFT)
/* Bits 28-31: Reserved */
/* Clock Divider Register 1 */
/* Clock Divider Register 1 */
#define CCM_CS1CDR_SAI1_CLK_PODF_SHIFT (0) /* Bits 0-5: Divider for sai1 clock podf */
#define CCM_CS1CDR_SAI1_CLK_PODF_MASK (0x3f << CCM_CS1CDR_SAI1_CLK_PODF_SHIFT)
@ -382,7 +382,7 @@
# define CCM_CS1CDR_FLEXIO2_CLK_PODF(n) ((uint32_t)(n) << CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT)
/* Bits 28-31: Reserved */
/* Clock Divider Register 2 */
/* Clock Divider Register 2 */
#define CCM_CS2CDR_SAI2_CLK_PODF_SHIFT (0) /* Bits 0-5: Divider for sai2 clock podf */
#define CCM_CS2CDR_SAI2_CLK_PODF_MASK (0x3f << CCM_CS2CDR_SAI2_CLK_PODF_SHIFT)
@ -537,7 +537,7 @@
#define CCM_CIMR_MASK_ARM_PODF_LOADED (1 << 26) /* Bit 26: mask interrupt generation due to frequency change of arm_podf */
/* Bits 27-31: Reserved */
/* Clock Output Source Register */
/* Clock Output Source Register */
#define CCM_CCOSR_CLKO1_SEL_SHIFT (0) /* Bits 0-3: Selection of the clock to be generated on CCM_CLKO1 */
#define CCM_CCOSR_CLKO1_SEL_MASK (0xF << CCM_CCOSR_CLKO1_SEL_SHIFT)

4
arch/arm/src/imxrt/imxrt_edma.c
View file

@ -745,10 +745,10 @@ void weak_function up_dma_initialize(void)
regval |= EDMA_CR_HOE; /* Halt On Error */
#endif
#ifdef CONFIG_IMXRT_EDMA_CLM
regval |= EDMA_CR_CLM; /* Continuous Link Mode */
regval |= EDMA_CR_CLM; /* Continuous Link Mode */
#endif
#ifdef CONFIG_IMXRT_EDMA_EMLIM
regval |= EDMA_CR_EMLM; /* Enable Minor Loop Mapping */
regval |= EDMA_CR_EMLM; /* Enable Minor Loop Mapping */
#endif
putreg32(regval, IMXRT_EDMA_CR);

2
arch/arm/src/imxrt/imxrt_edma.h
View file

@ -117,7 +117,7 @@
#define EDMA_CONFIG_LINKTYPE_MASK (3 << EDMA_CONFIG_LINKTYPE_SHIFT)
# define EDMA_CONFIG_LINKTYPE_LINKNONE (0 << EDMA_CONFIG_LINKTYPE_SHIFT) /* No channel link */
# define EDMA_CONFIG_LINKTYPE_MINORLINK (1 << EDMA_CONFIG_LINKTYPE_SHIFT) /* Channel link after each minor loop */
# define EDMA_CONFIG_LINKTYPE_MAJORLINK (2 << EDMA_CONFIG_LINKTYPE_SHIFT) /* Channel link when major loop count exhausted */
# define EDMA_CONFIG_LINKTYPE_MAJORLINK (2 << EDMA_CONFIG_LINKTYPE_SHIFT) /* Channel link when major loop count exhausted */
/************************************************************************************
* Public Types

2
arch/arm/src/imxrt/imxrt_gpio.h
View file

@ -368,4 +368,4 @@ int imxrt_dump_gpio(uint32_t pinset, const char *msg);
#if defined(__cplusplus)
}
#endif
#endif /* __ARCH_ARM_SRC_IMXRT_IMXRT_GPIO_H */
#endif /* __ARCH_ARM_SRC_IMXRT_IMXRT_GPIO_H */

2
arch/arm/src/imxrt/imxrt_usdhc.c
View file

@ -3168,4 +3168,4 @@ FAR struct sdio_dev_s *imxrt_usdhc_initialize(int slotno)
return &g_sdhcdev[slotno].dev;
}
#endif /* CONFIG_IMXRT_USDHC */
#endif /* CONFIG_IMXRT_USDHC */

2
arch/arm/src/kinetis/hardware/kinetis_k20k40k60fmc.h
View file

@ -173,7 +173,7 @@
#define KINETIS_FMC_PFB0CR (KINETIS_FMC_BASE+KINETIS_FMC_PFB0CR_OFFSET)
#define KINETIS_FMC_PFB1CR (KINETIS_FMC_BASE+KINETIS_FMC_PFB1CR_OFFSET)
/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
#define KINETIS_FMC_TAGVD(w,s) (KINETIS_FMC_BASE+KINETIS_FMC_TAGVD_OFFSET(w,s))

2
arch/arm/src/kinetis/hardware/kinetis_k28k66fmc.h
View file

@ -160,7 +160,7 @@
#define KINETIS_FMC_PFB01CR (KINETIS_FMC_BASE+KINETIS_FMC_PFB01CR_OFFSET)
#define KINETIS_FMC_PFB23CR (KINETIS_FMC_BASE+KINETIS_FMC_PFB23CR_OFFSET)
/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
#define KINETIS_FMC_TAGVD(w,s) (KINETIS_FMC_BASE+KINETIS_FMC_TAGVD_OFFSET(w,s))

2
arch/arm/src/kinetis/hardware/kinetis_k64fmc.h
View file

@ -125,7 +125,7 @@
#define KINETIS_FMC_PFB0CR (KINETIS_FMC_BASE+KINETIS_FMC_PFB0CR_OFFSET)
#define KINETIS_FMC_PFB1CR (KINETIS_FMC_BASE+KINETIS_FMC_PFB1CR_OFFSET)
/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
#define KINETIS_FMC_TAGVD(w,s) (KINETIS_FMC_BASE+KINETIS_FMC_TAGVD_OFFSET(w,s))

2
arch/arm/src/kinetis/kinetis_i2c.c
View file

@ -1348,7 +1348,7 @@ out:
kinetis_i2c_sem_post(priv);
return ret;
}
#endif /* CONFIG_I2C_RESET */
#endif /* CONFIG_I2C_RESET */
/****************************************************************************
* Public Functions

4
arch/arm/src/kinetis/kinetis_usbdev.c
View file

@ -2833,7 +2833,7 @@ static int khci_interrupt(int irq, void *context, FAR void *arg)
goto interrupt_exit;
}
#ifdef CONFIG_KINETIS_USBOTG
#ifdef CONFIG_KINETIS_USBOTG
/* Check if the ID Pin Changed State */
if ((otgir & USB_OTGISTAT_IDCHG) != 0)
@ -2965,7 +2965,7 @@ static int khci_interrupt(int irq, void *context, FAR void *arg)
interrupt_exit:
kinetis_clrpend(KINETIS_IRQ_USBOTG);
#ifdef CONFIG_KINETIS_USBOTG
#ifdef CONFIG_KINETIS_USBOTG
usbtrace(TRACE_INTEXIT(KHCI_TRACEINTID_INTERRUPT), usbir | otgir);
#else
usbtrace(TRACE_INTEXIT(KHCI_TRACEINTID_INTERRUPT), usbir);

2
arch/arm/src/kl/hardware/kl_fmc.h
View file

@ -173,7 +173,7 @@
#define KL_FMC_PFB0CR (KL_FMC_BASE+KL_FMC_PFB0CR_OFFSET)
#define KL_FMC_PFB1CR (KL_FMC_BASE+KL_FMC_PFB1CR_OFFSET)
/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
#define KL_FMC_TAGVD(w,s) (KL_FMC_BASE+KL_FMC_TAGVD_OFFSET(w,s))

2
arch/arm/src/lc823450/chip.h
View file

@ -173,4 +173,4 @@ static inline uintptr_t up_intstack_base(void)
#endif /* !__ASSEMBLY__ */
#endif /* _ARCH_ARM_SRC_LC823450_CHIP_H */
#endif /* _ARCH_ARM_SRC_LC823450_CHIP_H */

2
arch/arm/src/lc823450/lc823450_dma.h
View file

@ -159,4 +159,4 @@ int lc823450_dmaremain(DMA_HANDLE handle);
}
#endif
#endif /* __ARCH_ARM_SRC_LC823450_LC823450_DMA_H */
#endif /* __ARCH_ARM_SRC_LC823450_LC823450_DMA_H */

2
arch/arm/src/lc823450/lc823450_i2c.c
View file

@ -492,7 +492,7 @@ static int lc823450_i2c_reset(FAR struct i2c_master_s *dev)
modifyreg32(priv->config->base + I2CCTL, I2C_CTL_FMODE, I2C_CTL_FMODE);
return OK;
}
#endif /* CONFIG_I2C_RESET */
#endif /* CONFIG_I2C_RESET */
/****************************************************************************
* Name: lc823450_i2c_enableirq

2
arch/arm/src/lpc17xx_40xx/lpc17_40_usbdev.c
View file

@ -75,7 +75,7 @@
# define CONFIG_LPC17_40_USBDEV_EP0_MAXSIZE 64
#endif
#ifndef CONFIG_USBDEV_MAXPOWER
#ifndef CONFIG_USBDEV_MAXPOWER
# define CONFIG_USBDEV_MAXPOWER 100 /* mA */
#endif

2
arch/arm/src/lpc214x/chip.h
View file

@ -346,4 +346,4 @@
* Public Function Prototypes
****************************************************************************************************/
#endif /* __ARCH_ARM_SRC_LPC214X_CHIP_H */
#endif /* __ARCH_ARM_SRC_LPC214X_CHIP_H */

2
arch/arm/src/lpc214x/lpc214x_apb.h
View file

@ -69,4 +69,4 @@
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_APB_H */
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_APB_H */

2
arch/arm/src/lpc214x/lpc214x_i2c.h
View file

@ -138,4 +138,4 @@
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_I2C_H */
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_I2C_H */

2
arch/arm/src/lpc214x/lpc214x_pinsel.h
View file

@ -256,4 +256,4 @@
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_PINSEL_H */
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_PINSEL_H */

2
arch/arm/src/lpc214x/lpc214x_pll.h
View file

@ -102,4 +102,4 @@
* Public Function Prototypes
****************************************************************************************************/
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_PLL_H */
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_PLL_H */

2
arch/arm/src/lpc214x/lpc214x_power.h
View file

@ -87,4 +87,4 @@
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_POWER_H */
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_POWER_H */

2
arch/arm/src/lpc214x/lpc214x_spi.h
View file

@ -173,4 +173,4 @@ struct spi_dev_s; /* Forward reference */
FAR struct spi_dev_s *lpc214x_spibus_initialize(int port);
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_SPI_H */
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_SPI_H */

2
arch/arm/src/lpc214x/lpc214x_timer.h
View file

@ -149,4 +149,4 @@
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_TIMER_H */
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_TIMER_H */

2
arch/arm/src/lpc214x/lpc214x_uart.h
View file

@ -139,4 +139,4 @@
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_UART_H */
#endif /* __ARCH_ARM_SRC_LPC214X_LPC214X_UART_H */

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