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drivers/: Remove dangling space at the end of lines.

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This commit is contained in:
Gregory Nutt 2017-06-28 13:17:17 -06:00
parent 1c5ec07414
commit 95e20afcd2
18 changed files with 121 additions and 121 deletions
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64
drivers/can/mcp2515.c
View file

@ -330,13 +330,13 @@ static void mcp2515_readregs(FAR struct mcp2515_can_s *priv, uint8_t regaddr,
(void)SPI_SEND(config->spi, regaddr);
SPI_RECVBLOCK(config->spi, buffer, len);
/* Deselect the MCP2515 */
SPI_SELECT(config->spi, SPIDEV_CANBUS(0), false);
/* Unlock bus */
(void)SPI_LOCK(config->spi, false);
#ifdef CONFIG_CANBUS_REGDEBUG
@ -390,13 +390,13 @@ static void mcp2515_writeregs(FAR struct mcp2515_can_s *priv, uint8_t regaddr,
(void)SPI_SEND(config->spi, regaddr);
SPI_SNDBLOCK(config->spi, buffer, len);
/* Deselect the MCP2515 */
SPI_SELECT(config->spi, SPIDEV_CANBUS(0), false);
/* Unlock bus */
(void)SPI_LOCK(config->spi, false);
}
@ -434,21 +434,21 @@ static void mcp2515_modifyreg(FAR struct mcp2515_can_s *priv, uint8_t regaddr,
/* Send the register address */
(void)SPI_SEND(config->spi, regaddr);
/* Send the mask */
(void)SPI_SEND(config->spi, mask);
/* Send the value */
(void)SPI_SEND(config->spi, value);
/* Deselect the MCP2515 */
SPI_SELECT(config->spi, SPIDEV_CANBUS(0), false);
/* Unlock bus */
(void)SPI_LOCK(config->spi, false);
}
@ -564,7 +564,7 @@ static int mcp2515_add_extfilter(FAR struct mcp2515_can_s *priv,
* filterN = RXF0reg + offset + ((priv->nalloc - 1) * 4) ;
* maskN = RXM0reg + offset
*/
if (priv->nalloc <= 3)
{
offset = 0;
@ -622,13 +622,13 @@ static int mcp2515_add_extfilter(FAR struct mcp2515_can_s *priv,
/* EID0 - EID7 */
regval = (uint8_t) (extconfig->xf_id1 & 0xff);
mcp2515_writeregs(priv, MCP2515_RXF0EID0 + offset +
mcp2515_writeregs(priv, MCP2515_RXF0EID0 + offset +
((priv->nalloc - 1) * 4), &regval, 1);
/* EID8 - EID15 */
regval = (uint8_t) ((extconfig->xf_id1 & 0xff00) >> 8);
mcp2515_writeregs(priv, MCP2515_RXF0EID8 + offset +
mcp2515_writeregs(priv, MCP2515_RXF0EID8 + offset +
((priv->nalloc - 1) * 4), &regval, 1);
/* EID16 - EID17 */
@ -638,14 +638,14 @@ static int mcp2515_add_extfilter(FAR struct mcp2515_can_s *priv,
/* STD0 - STD2*/
regval = (regval) | (uint8_t) (((extconfig->xf_id1 & 0x1C0000) >> 16) << 3);
mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
((priv->nalloc - 1) * 4), &regval, 1);
/* STD3 - STD10 */
regval = (uint8_t) ((extconfig->xf_id1 & 0x1fe00000 ) >> 21);
regval |= RXFSIDL_EXIDE;
mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
((priv->nalloc - 1) * 4), &regval, 1);
/* Setup the Mask */
@ -683,14 +683,14 @@ static int mcp2515_add_extfilter(FAR struct mcp2515_can_s *priv,
/* EID0 - EID7 */
regval = (uint8_t) (extconfig->xf_id1 & 0xff);
mcp2515_writeregs(priv, MCP2515_RXF0EID0 + offset +
mcp2515_writeregs(priv, MCP2515_RXF0EID0 + offset +
((priv->nalloc - 1) * 4), &regval, 1);
mcp2515_writeregs(priv, MCP2515_RXM0EID0 + offset, &regval, 1);
/* EID8 - EID15 */
regval = (uint8_t) ((extconfig->xf_id1 & 0xff00) >> 8);
mcp2515_writeregs(priv, MCP2515_RXF0EID8 + offset +
mcp2515_writeregs(priv, MCP2515_RXF0EID8 + offset +
((priv->nalloc - 1) * 4), &regval, 1);
mcp2515_writeregs(priv, MCP2515_RXM0EID8 + offset, &regval, 1);
@ -700,16 +700,16 @@ static int mcp2515_add_extfilter(FAR struct mcp2515_can_s *priv,
/* STD0 - STD2 */
regval = (regval) | (uint8_t) (((extconfig->xf_id1 &
regval = (regval) | (uint8_t) (((extconfig->xf_id1 &
0x1c0000) >> 16) << 3) | RXFSIDL_EXIDE;
mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
((priv->nalloc - 1) * 4), &regval, 1);
mcp2515_writeregs(priv, MCP2515_RXM0SIDL + offset, &regval, 1);
/* STD3 - STD10 */
regval = (uint8_t) ((extconfig->xf_id1 & 0x1fe00000 ) >> 21);
mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
((priv->nalloc - 1) * 4), &regval, 1);
mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset, &regval, 1);
}
@ -888,7 +888,7 @@ static int mcp2515_add_stdfilter(FAR struct mcp2515_can_s *priv,
* filterN = RXF0reg + offset + ((priv->nalloc - 1) * 4) ;
* maskN = RXM0reg + offset
*/
if (priv->nalloc <= 3)
{
offset = 0;
@ -944,11 +944,11 @@ static int mcp2515_add_stdfilter(FAR struct mcp2515_can_s *priv,
/* Setup the Filter */
regval = (uint8_t) (((stdconfig->sf_id1) & 0x7f8) >> 3);
mcp2515_writeregs(priv, MCP2515_RXF0SIDH + offset +
mcp2515_writeregs(priv, MCP2515_RXF0SIDH + offset +
((priv->nalloc - 1) * 4), &regval, 1);
regval = (uint8_t) ((stdconfig->sf_id1 & 0x07 ) << 5);
mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
((priv->nalloc - 1) * 4), &regval, 1);
/* Setup the Mask */
@ -966,12 +966,12 @@ static int mcp2515_add_stdfilter(FAR struct mcp2515_can_s *priv,
/* Setup the Filter */
regval = (uint8_t) (((stdconfig->sf_id1) & 0x7f8) >> 3);
mcp2515_writeregs(priv, MCP2515_RXF0SIDH + offset +
mcp2515_writeregs(priv, MCP2515_RXF0SIDH + offset +
((priv->nalloc - 1) * 4), &regval, 1);
mcp2515_writeregs(priv, MCP2515_RXM0SIDH + offset, &regval, 1);
regval = (uint8_t) ((stdconfig->sf_id1 & 0x07 ) << 5);
mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
((priv->nalloc - 1) * 4), &regval, 1);
mcp2515_writeregs(priv, MCP2515_RXM0SIDL + offset, &regval, 1);
}
@ -979,9 +979,9 @@ static int mcp2515_add_stdfilter(FAR struct mcp2515_can_s *priv,
/* We need to clear the extended ID bits */
regval = 0;
mcp2515_writeregs(priv, MCP2515_RXF0EID0 + offset +
mcp2515_writeregs(priv, MCP2515_RXF0EID0 + offset +
((priv->nalloc - 1) * 4), &regval, 1);
mcp2515_writeregs(priv, MCP2515_RXF0EID8 + offset +
mcp2515_writeregs(priv, MCP2515_RXF0EID8 + offset +
((priv->nalloc - 1) * 4), &regval, 1);
mcp2515_writeregs(priv, MCP2515_RXM0EID0 + offset, &regval, 1);
mcp2515_writeregs(priv, MCP2515_RXM0EID8 + offset, &regval, 1);
@ -1467,7 +1467,7 @@ static int mcp2515_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
* PHSEG1 == PHSEG2 (PHSEG2 = TSEG2)
*
* See more at:
*
*
* http://www.analog.com/en/analog-dialogue/articles/configure-can-bit-timing.html
*/

16
drivers/contactless/mfrc522.h
View file

@ -289,10 +289,10 @@
#define MFRC522_INV_MOD (1 << 3) /* modulation of transmitted data is inverted */
#define MFRC522_TX_SPEED_MASK (7 << 4) /* defines the bit rate during data transmission */
#define MFRC522_TX_106KBD (0 << 4) /* 106 kBd */
#define MFRC522_TX_212KBD (1 << 4) /* 212 kBd */
#define MFRC522_TX_424KBD (2 << 4) /* 424 kBd */
#define MFRC522_TX_848KBD (3 << 4) /* 848 kBd */
#define MFRC522_TX_106KBD (0 << 4) /* 106 kBd */
#define MFRC522_TX_212KBD (1 << 4) /* 212 kBd */
#define MFRC522_TX_424KBD (2 << 4) /* 424 kBd */
#define MFRC522_TX_848KBD (3 << 4) /* 848 kBd */
/* 4-7 << 4 - reserved */
#define MFRC522_TX_CRC_EN (1 << 7) /* enables CRC generation during data transmission */
@ -301,10 +301,10 @@
#define MFRC522_RX_MULTIPLE (1 << 2) /* enable to receive more than one data frame, only at 106kBd */
#define MFRC522_RX_NO_ERR (1 << 3) /* ignore invalid data stream error (less than 4 bits received) */
#define MFRC522_RX_SPEED_MASK (7 << 4) /* defines the bit rate during data reception */
#define MFRC522_RX_106KBD (0 << 4) /* 106 kBd */
#define MFRC522_RX_212KBD (1 << 4) /* 212 kBd */
#define MFRC522_RX_424KBD (2 << 4) /* 424 kBd */
#define MFRC522_RX_848KBD (3 << 4) /* 848 kBd */
#define MFRC522_RX_106KBD (0 << 4) /* 106 kBd */
#define MFRC522_RX_212KBD (1 << 4) /* 212 kBd */
#define MFRC522_RX_424KBD (2 << 4) /* 424 kBd */
#define MFRC522_RX_848KBD (3 << 4) /* 848 kBd */
/* 4-7 << 4 - reserved */
#define MFRC522_RX_CRC_EN (1 << 7) /* enables CRC generation during data reception */

2
drivers/contactless/pn532.c
View file

@ -462,7 +462,7 @@ int pn532_read_ack(struct pn532_dev_s *dev)
*
* Construct frame with
* pn532_frame_init(), pn532_frame_finish()
*
*
* Input Parameters:
* dev - Device instance
* f - Pointer to start frame

2
drivers/ioexpander/gpio_lower_half.c
View file

@ -60,7 +60,7 @@ struct gplh_dev_s
/* Publically visible lower-half state */
struct gpio_dev_s gpio;
/* Private lower half data follows */
uint8_t pin; /* I/O expander pin ID */

2
drivers/ioexpander/pcf8574.c
View file

@ -685,7 +685,7 @@ static int pcf8574_multireadpin(FAR struct ioexpander_dev_s *dev,
gpioinfo("%d. pin=%u value=%u\n", pin, values[i]);
}
ret = OK;
errout_with_lock:

4
drivers/lcd/pcd8544.h
View file

@ -65,8 +65,8 @@
#define PCD8544_DISP_NORMAL 0x04 /* normal mode */
#define PCD8544_DISP_INVERT 0x05 /* inverse video mode */
#define PCD8544_SET_Y_ADDR (1 << 6) /* Set the Y bank 0-5 */
#define PCD8544_SET_X_ADDR (1 << 7) /* Set the X bank 0-83 */
#define PCD8544_SET_Y_ADDR (1 << 6) /* Set the Y bank 0-5 */
#define PCD8544_SET_X_ADDR (1 << 7) /* Set the X bank 0-83 */
/* Command with Instructon Set H = 1 */

18
drivers/lcd/pcf8574_lcd_backpack.c
View file

@ -1016,19 +1016,19 @@ static void lcd_fpos_to_curpos(FAR struct pcf8574_lcd_dev_s *priv,
off_t fpos, uint8_t *row, uint8_t *col, bool* onlf)
{
int virtcols;
virtcols = (priv->cfg.cols + 1);
/* Determine if this is a 'virtual' position (on the synthetic LF) */
*onlf = (priv->cfg.cols == fpos % virtcols);
/* Adjust off any preceding synthetic LF's to get linear position */
fpos -= fpos / virtcols;
/* Compute row/col from linear position */
*row = fpos / priv->cfg.cols;
*col = fpos % priv->cfg.cols;
}
@ -1046,7 +1046,7 @@ static void lcd_curpos_to_fpos(FAR struct pcf8574_lcd_dev_s *priv,
uint8_t row, uint8_t col, off_t* fpos)
{
/* the logical file position is the linear position plus any synthetic LF */
*fpos = (row * priv->cfg.cols) + col + row;
}
@ -1108,7 +1108,7 @@ static int pcf8574_lcd_close(FAR struct file *filep)
/* If we had previously unlinked, but there were open references at the
* time, we need to do the final teardown now.
*/
if (priv->refs == 0 && priv->unlinked)
{
/* We have no real teardown at present */
@ -1158,11 +1158,11 @@ static ssize_t pcf8574_lcd_read(FAR struct file *filep, FAR char *buffer,
while (nIdx < buflen && row < priv->cfg.rows)
{
/* Synthesize end-of-line LF and advance to start of next row */
if (onlf)
{
/* Synthesize LF for all but last row */
if ( row < priv->cfg.rows-1)
{
buffer[nIdx] = '\x0a';

2
drivers/lcd/ssd1306.h
View file

@ -282,7 +282,7 @@ void ssd1306_configspi(FAR struct spi_dev_s *spi);
# define ssd1306_select(priv, cs)
# define ssd1306_cmddata(priv, cmd)
# define ssd1306_configspi(spi)
#endif
#endif
#endif /* __DRIVERS_LCD_SSD1306_H */

2
drivers/lcd/ssd1306_i2c.c
View file

@ -124,7 +124,7 @@ void ssd1306_sendblk(FAR struct ssd1306_dev_s *priv, uint8_t *data, uint8_t len)
*/
/* Send the SSD1306 register address (with no STOP) */
transfer_mode = 0x40; /* Select data transfer */
msg[0].frequency = CONFIG_SSD1306_I2CFREQ; /* I2C frequency */

6
drivers/mtd/at24xx.c
View file

@ -278,7 +278,7 @@ static int at24c_eraseall(FAR struct at24c_dev_s *priv)
while (at24c_i2c_write(priv, at24addr, buf, AT24XX_ADDRSIZE) < 0)
{
finfo("wait\n");
if (!wait--)
if (!wait--)
{
return -ETIMEDOUT;
}
@ -344,7 +344,7 @@ static ssize_t at24c_read_internal(FAR struct at24c_dev_s *priv, off_t offset,
while (at24c_i2c_write(priv, at24addr, buf, AT24XX_ADDRSIZE) < 0)
{
finfo("wait\n");
if (!wait--)
if (!wait--)
{
return -ETIMEDOUT;
}
@ -467,7 +467,7 @@ static ssize_t at24c_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t
while (at24c_i2c_write(priv, at24addr, buf, AT24XX_ADDRSIZE) < 0)
{
finfo("wait\n");
if (!wait--)
if (!wait--)
{
return -ETIMEDOUT;
}

12
drivers/mtd/filemtd.c
View file

@ -138,7 +138,7 @@ static int filemtd_ioctl(FAR struct mtd_dev_s *dev, int cmd,
* Name: filemtd_write
****************************************************************************/
static ssize_t filemtd_write(FAR struct file_dev_s *priv, size_t offset,
static ssize_t filemtd_write(FAR struct file_dev_s *priv, size_t offset,
FAR const void *src, size_t len)
{
FAR const uint8_t *pin = (FAR const uint8_t *)src;
@ -197,16 +197,16 @@ static ssize_t filemtd_write(FAR struct file_dev_s *priv, size_t offset,
*pout++ = newvalue;
buflen--;
/* If our buffer is full, then seek back to beginning of
* the file and write the buffer contents
/* If our buffer is full, then seek back to beginning of
* the file and write the buffer contents
*/
if (buflen == 0)
{
{
lseek(priv->fd, seekpos, SEEK_SET);
write(priv->fd, buf, sizeof(buf));
seekpos += sizeof(buf);
}
}
}
/* Write remaining bytes */
@ -282,7 +282,7 @@ static int filemtd_erase(FAR struct mtd_dev_s *dev, off_t startblock,
while (nbytes)
{
write(priv->fd, buffer, sizeof(buffer));
nbytes -= sizeof(buffer);
nbytes -= sizeof(buffer);
}
return OK;

74
drivers/mtd/mx25lx.c
View file

@ -92,7 +92,7 @@
#define MX25L_MX25L6433F_SECTOR_SHIFT 12 /* Sector size 1 << 12 = 4Kb */
#define MX25L_MX25L6433F_NSECTORS 2048
#define MX25L_MX25L6433F_PAGE_SHIFT 8 /* Page size 1 << 8 = 256 */
#ifdef CONFIG_MX25L_SECTOR512 /* Simulate a 512 byte sector */
# define MX25L_SECTOR512_SHIFT 9 /* Sector size 1 << 9 = 512 bytes */
#endif
@ -124,37 +124,37 @@
#define MX25L_DREAD 0x3b /* 1I / 2O read command 3 1 >=1 */
#define MX25L_4READ 0xeb /* 4 x I/O read command */
#define MX25L_QREAD 0x6b /* 1I / 4O read command 3 1 >=1 */
#define MX25L_WREN 0x06 /* Write Enable 0 0 0 */
#define MX25L_WRDI 0x04 /* Write Disable 0 0 0 */
#define MX25L_RDSR 0x05 /* Read status register 0 0 >=1 */
#define MX25L_RDCR 0x15 /* Read config register 0 0 >=1 */
#define MX25L_WRSR 0x01 /* Write stat/conf register 0 0 2 */
#define MX25L_WREN 0x06 /* Write Enable 0 0 0 */
#define MX25L_WRDI 0x04 /* Write Disable 0 0 0 */
#define MX25L_RDSR 0x05 /* Read status register 0 0 >=1 */
#define MX25L_RDCR 0x15 /* Read config register 0 0 >=1 */
#define MX25L_WRSR 0x01 /* Write stat/conf register 0 0 2 */
#define MX25L_4PP 0x38 /* Quad page program 3 0 1-256 */
#define MX25L_SE 0x20 /* 4Kb Sector erase 3 0 0 */
#define MX25L_BE32 0x52 /* 32Kbit block Erase 3 0 0 */
#define MX25L_BE64 0xd8 /* 64Kbit block Erase 3 0 0 */
#define MX25L_CE 0xc7 /* Chip erase 0 0 0 */
#define MX25L_CE_ALT 0x60 /* Chip erase (alternate) 0 0 0 */
#define MX25L_CE 0xc7 /* Chip erase 0 0 0 */
#define MX25L_CE_ALT 0x60 /* Chip erase (alternate) 0 0 0 */
#define MX25L_PP 0x02 /* Page program 3 0 1-256 */
#define MX25L_DP 0xb9 /* Deep power down 0 0 0 */
#define MX25L_RDP 0xab /* Release deep power down 0 0 0 */
#define MX25L_PGM_SUSPEND 0x75 /* Suspends program 0 0 0 */
#define MX25L_ERS_SUSPEND 0xb0 /* Suspends erase 0 0 0 */
#define MX25L_PGM_RESUME 0x7A /* Resume program 0 0 0 */
#define MX25L_ERS_RESUME 0x30 /* Resume erase 0 0 0 */
#define MX25L_RDID 0x9f /* Read identification 0 0 3 */
#define MX25L_DP 0xb9 /* Deep power down 0 0 0 */
#define MX25L_RDP 0xab /* Release deep power down 0 0 0 */
#define MX25L_PGM_SUSPEND 0x75 /* Suspends program 0 0 0 */
#define MX25L_ERS_SUSPEND 0xb0 /* Suspends erase 0 0 0 */
#define MX25L_PGM_RESUME 0x7A /* Resume program 0 0 0 */
#define MX25L_ERS_RESUME 0x30 /* Resume erase 0 0 0 */
#define MX25L_RDID 0x9f /* Read identification 0 0 3 */
#define MX25L_RES 0xab /* Read electronic ID 0 3 1 */
#define MX25L_REMS 0x90 /* Read manufacture and ID 1 2 >=2 */
#define MX25L_ENSO 0xb1 /* Enter secured OTP 0 0 0 */
#define MX25L_EXSO 0xc1 /* Exit secured OTP 0 0 0 */
#define MX25L_RDSCUR 0x2b /* Read security register 0 0 0 */
#define MX25L_WRSCUR 0x2f /* Write security register 0 0 0 */
#define MX25L_RSTEN 0x66 /* Reset Enable 0 0 0 */
#define MX25L_RST 0x99 /* Reset Memory 0 0 0 */
#define MX25L_ENSO 0xb1 /* Enter secured OTP 0 0 0 */
#define MX25L_EXSO 0xc1 /* Exit secured OTP 0 0 0 */
#define MX25L_RDSCUR 0x2b /* Read security register 0 0 0 */
#define MX25L_WRSCUR 0x2f /* Write security register 0 0 0 */
#define MX25L_RSTEN 0x66 /* Reset Enable 0 0 0 */
#define MX25L_RST 0x99 /* Reset Memory 0 0 0 */
#define MX25L_RDSFDP 0x5a /* read out until CS# high */
#define MX25L_SBL 0xc0 /* Set Burst Length */
#define MX25L_SBL_ALT 0x77 /* Set Burst Length */
#define MX25L_NOP 0x00 /* No Operation 0 0 0 */
#define MX25L_NOP 0x00 /* No Operation 0 0 0 */
/* MX25L Registers ******************************************************************/
/* Read ID (RDID) register values */
@ -578,9 +578,9 @@ static inline void mx25l_pagewrite(FAR struct mx25l_dev_s *priv,
for (; nbytes > 0; nbytes -= (1 << priv->pageshift))
{
/* Enable the write access to the FLASH */
mx25l_writeenable(priv);
/* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
@ -602,10 +602,10 @@ static inline void mx25l_pagewrite(FAR struct mx25l_dev_s *priv,
/* Deselect the FLASH and setup for the next pass through the loop */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
/* Wait for any preceding write or erase operation to complete. */
mx25l_waitwritecomplete(priv);
mx25l_waitwritecomplete(priv);
/* Update addresses */
@ -796,7 +796,7 @@ static int mx25l_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbloc
/* Lock access to the SPI bus until we complete the erase */
mx25l_lock(priv->dev);
while (blocksleft-- > 0)
{
/* MX25LVF parts have complex block overlay structure for the moment
@ -815,8 +815,8 @@ static int mx25l_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbloc
/* Flush the last erase block left in the cache */
mx25l_cacheflush(priv);
#endif
#endif
mx25l_unlock(priv->dev);
return (int)nblocks;
}
@ -828,7 +828,7 @@ static int mx25l_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbloc
static ssize_t mx25l_bread(FAR struct mtd_dev_s *dev, off_t startblock,
size_t nblocks, FAR uint8_t *buffer)
{
FAR struct mx25l_dev_s *priv = (FAR struct mx25l_dev_s *)dev;
FAR struct mx25l_dev_s *priv = (FAR struct mx25l_dev_s *)dev;
ssize_t nbytes;
mxlinfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
@ -841,7 +841,7 @@ static ssize_t mx25l_bread(FAR struct mtd_dev_s *dev, off_t startblock,
if (nbytes > 0)
{
return nbytes >> MX25L_SECTOR512_SHIFT;
}
}
#else
nbytes = mx25l_read(dev, startblock << priv->pageshift, nblocks << priv->pageshift,
buffer);
@ -849,7 +849,7 @@ static ssize_t mx25l_bread(FAR struct mtd_dev_s *dev, off_t startblock,
{
return nbytes >> priv->pageshift;
}
#endif
#endif
return (int)nbytes;
}
@ -877,7 +877,7 @@ static ssize_t mx25l_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
#endif
mx25l_unlock(priv->dev);
return nblocks;
return nblocks;
}
/************************************************************************************
@ -931,11 +931,11 @@ static int mx25l_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
geo->blocksize = (1 << MX25L_SECTOR512_SHIFT);
geo->erasesize = (1 << MX25L_SECTOR512_SHIFT);
geo->neraseblocks = priv->nsectors << (priv->sectorshift - MX25L_SECTOR512_SHIFT);
#else
#else
geo->blocksize = (1 << priv->pageshift);
geo->erasesize = (1 << priv->sectorshift);
geo->neraseblocks = priv->nsectors;
#endif
#endif
ret = OK;
mxlinfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
@ -1035,8 +1035,8 @@ FAR struct mtd_dev_s *mx25l_initialize_spi(FAR struct spi_dev_s *dev)
kmm_free(priv);
return NULL;
}
#endif
#endif
#ifdef CONFIG_MTD_REGISTRATION
/* Register the MTD with the procfs system if enabled */

2
drivers/mtd/sst26.c
View file

@ -181,7 +181,7 @@
#define SST26_LBPR 0x8d /* 14 Lock down Block-Prot. reg 0 0 0 */
#define SST26_NVWLDR 0xe8 /* 14 non-Volatile Write L-D reg 0 0 1-18 */
#define SST26_ULBPR 0x98 /* 14 Global Block Protection unlock 0 0 0 */
#define SST26_RSID 0x88 /* 14 Read Security ID 2 1 1-2048*/
#define SST26_RSID 0x88 /* 14 Read Security ID 2 1 1-2048*/
/* 4 Read Security ID 2 3 1-2048*/
#define SST26_PSID 0xa5 /* 14 Program User Security ID area 2 0 1-256 */
#define SST26_LSID 0x85 /* 14 Lockout Security ID programming 0 0 0 */

4
drivers/spi/spi_transfer.c
View file

@ -92,7 +92,7 @@ int spi_transfer(FAR struct spi_dev_s *spi, FAR struct spi_sequence_s *seq)
{
spierr("ERROR: SPI_SETDELAY failed: %d\n", ret);
SPI_LOCK(spi, false);
return ret;
return ret;
}
#endif
@ -154,7 +154,7 @@ int spi_transfer(FAR struct spi_dev_s *spi, FAR struct spi_sequence_s *seq)
SPI_SELECT(spi, seq->dev, false);
SPI_LOCK(spi, false);
return ret;
return ret;
}
#endif /* CONFIG_SPI_EXCHANGE */

2
drivers/syslog/note_driver.c
View file

@ -74,7 +74,7 @@ static const struct file_operations note_fops =
#endif
#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
, 0 /* unlink */
#endif
#endif
};
/****************************************************************************

6
drivers/syslog/syslog_console.c
View file

@ -51,11 +51,11 @@
* Private Function Prototypes
****************************************************************************/
static ssize_t syslog_console_read(FAR struct file *filep, FAR char *buffer,
static ssize_t syslog_console_read(FAR struct file *filep, FAR char *buffer,
size_t buflen);
static ssize_t syslog_console_write(FAR struct file *filep,
FAR const char *buffer, size_t buflen);
static int syslog_console_ioctl(FAR struct file *filep, int cmd,
static int syslog_console_ioctl(FAR struct file *filep, int cmd,
unsigned long arg);
/****************************************************************************
@ -93,7 +93,7 @@ static int syslog_console_ioctl(FAR struct file *filep, int cmd,
* Name: syslog_console_read
****************************************************************************/
static ssize_t syslog_console_read(FAR struct file *filep, FAR char *buffer,
static ssize_t syslog_console_read(FAR struct file *filep, FAR char *buffer,
size_t buflen)
{
return 0;

2
drivers/syslog/syslog_filechannel.c
View file

@ -170,7 +170,7 @@ int syslog_file_channel(FAR const char *devpath)
(void)syslog_channel(saved_channel);
goto errout_with_lock;
}
/* Then initialize the file interface */
ret = syslog_dev_initialize(devpath, OPEN_FLAGS, OPEN_MODE);

22
drivers/wireless/ieee802154/mrf24j40.c
View file

@ -475,7 +475,7 @@ static int mrf24j40_get_attr(FAR struct ieee802154_radio_s *radio,
ret = IEEE802154_STATUS_SUCCESS;
}
break;
case IEEE802154_ATTR_PHY_CHAN:
{
attrval->phy.chan = dev->chan;
@ -518,7 +518,7 @@ static int mrf24j40_set_attr(FAR struct ieee802154_radio_s *radio,
ret = IEEE802154_STATUS_SUCCESS;
}
break;
case IEEE802154_ATTR_MAC_COORD_SADDR:
{
mrf24j40_setcoordsaddr(dev, attrval->mac.coordsaddr);
@ -555,7 +555,7 @@ static int mrf24j40_set_attr(FAR struct ieee802154_radio_s *radio,
ret = IEEE802154_STATUS_SUCCESS;
}
break;
case IEEE802154_ATTR_PHY_CHAN:
{
mrf24j40_setchannel(dev, attrval->phy.chan);
@ -595,7 +595,7 @@ static int mrf24j40_beaconstart(FAR struct ieee802154_radio_s *radio,
mrf24j40_setreg(dev->spi, MRF24J40_RXMCR, reg);
/* Set the SLOTTED (TXMCR 0x11<5>) bit = 1 to use Slotted CSMA-CA mode */
reg = mrf24j40_getreg(dev->spi, MRF24J40_TXMCR);
reg |= MRF24J40_TXMCR_SLOTTED;
mrf24j40_setreg(dev->spi, MRF24J40_TXMCR, reg);
@ -619,7 +619,7 @@ static int mrf24j40_beaconstart(FAR struct ieee802154_radio_s *radio,
reg |= 0x03 & MRF24J40_WAKECON_INTL;
mrf24j40_setreg(dev->spi, MRF24J40_WAKECON, reg);
/* Program the CAP end slot (ESLOTG1 0x13<3:0>) value. */
/* Program the CAP end slot (ESLOTG1 0x13<3:0>) value. */
reg = mrf24j40_getreg(dev->spi, MRF24J40_ESLOTG1);
reg &= ~MRF24J40_ESLOTG1_CAP;
@ -635,7 +635,7 @@ static int mrf24j40_beaconstart(FAR struct ieee802154_radio_s *radio,
/* If the Sleep Clock Selection, SLPCLKSEL (0x207<7:6), is the internal
* oscillator (100 kHz), set SLPCLKDIV to a minimum value of 0x01.
*/
mrf24j40_setreg(dev->spi, MRF24J40_SLPCON1, 0x01);
/* Select the source of SLPCLK (internal 100kHz) */
@ -652,8 +652,8 @@ static int mrf24j40_beaconstart(FAR struct ieee802154_radio_s *radio,
/* Calibration is complete when the SLPCALRDY bit (SLPCAL2 0x20B<7>) is
* set to ‘1’.
*/
while (!(mrf24j40_getreg(dev->spi, MRF24J40_SLPCAL2) &
while (!(mrf24j40_getreg(dev->spi, MRF24J40_SLPCAL2) &
MRF24J40_SLPCAL2_SLPCALRDY))
{
usleep(1);
@ -672,7 +672,7 @@ static int mrf24j40_beaconstart(FAR struct ieee802154_radio_s *radio,
/* Program the Beacon Interval into the Main Counter, MAINCNT (0x229<1:0>,
* 0x228, 0x227, 0x226), and Remain Counter, REMCNT (0x225, 0x224),
* according to BO and SO values. Refer to Section 3.15.1.3 “Sleep Mode
* Counters”
* Counters”
*/
mrf24j40_setreg(dev->spi, MRF24J40_REMCNTL, (MRF24J40_REMCNT & 0xFF));
@ -739,7 +739,7 @@ static int mrf24j40_sfupdate(FAR struct ieee802154_radio_s *radio,
}
mrf24j40_setreg(dev->spi, MRF24J40_RXMCR, reg);
/* Program the CAP end slot (ESLOTG1 0x13<3:0>) value. */
/* Program the CAP end slot (ESLOTG1 0x13<3:0>) value. */
reg = mrf24j40_getreg(dev->spi, MRF24J40_ESLOTG1);
reg &= ~MRF24J40_ESLOTG1_CAP;
@ -1675,7 +1675,7 @@ static void mrf24j40_gts_setup(FAR struct mrf24j40_radio_s *dev, uint8_t fifo,
****************************************************************************/
static void mrf24j40_setup_fifo(FAR struct mrf24j40_radio_s *dev,
FAR const uint8_t *buf, uint8_t length,
FAR const uint8_t *buf, uint8_t length,
uint32_t fifo_addr)
{
int hlen = 3; /* Include frame control and seq number */