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NXStyle fixes

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Peter van der Perk 2020-06-15 14:09:26 +02:00 committed by patacongo
parent 5f73dc89be
commit b5c5948e1c
8 changed files with 75 additions and 72 deletions
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49
arch/arm/src/kinetis/hardware/kinetis_flexcan.h
View file

@ -71,22 +71,22 @@
#define KINETIS_CAN_MB_OFFSET 0x0080 /* CAN MB register */
#define KINETIS_CAN_RXIMR_OFFSET(n) (0x0880+((n)<<2)) /* Rn Individual Mask Registers */
#define KINETIS_CAN_RXIMR0_OFFSET 0x0880 /* R0 Individual Mask Registers */
#define KINETIS_CAN_RXIMR1_OFFSET 0x0884 /* R1 Individual Mask Registers */
#define KINETIS_CAN_RXIMR2_OFFSET 0x0888 /* R2 Individual Mask Registers */
#define KINETIS_CAN_RXIMR3_OFFSET 0x088c /* R3 Individual Mask Registers */
#define KINETIS_CAN_RXIMR4_OFFSET 0x0890 /* R4 Individual Mask Registers */
#define KINETIS_CAN_RXIMR5_OFFSET 0x0894 /* R5 Individual Mask Registers */
#define KINETIS_CAN_RXIMR6_OFFSET 0x0898 /* R6 Individual Mask Registers */
#define KINETIS_CAN_RXIMR7_OFFSET 0x089c /* R7 Individual Mask Registers */
#define KINETIS_CAN_RXIMR8_OFFSET 0x08a0 /* R8 Individual Mask Registers */
#define KINETIS_CAN_RXIMR9_OFFSET 0x08a4 /* R9 Individual Mask Registers */
#define KINETIS_CAN_RXIMR10_OFFSET 0x08a8 /* R10 Individual Mask Registers */
#define KINETIS_CAN_RXIMR11_OFFSET 0x08ac /* R11 Individual Mask Registers */
#define KINETIS_CAN_RXIMR12_OFFSET 0x08b0 /* R12 Individual Mask Registers */
#define KINETIS_CAN_RXIMR13_OFFSET 0x08b4 /* R13 Individual Mask Registers */
#define KINETIS_CAN_RXIMR14_OFFSET 0x08b8 /* R14 Individual Mask Registers */
#define KINETIS_CAN_RXIMR15_OFFSET 0x08bc /* R15 Individual Mask Registers */
#define KINETIS_CAN_RXIMR0_OFFSET 0x0880 /* R0 Individual Mask Registers */
#define KINETIS_CAN_RXIMR1_OFFSET 0x0884 /* R1 Individual Mask Registers */
#define KINETIS_CAN_RXIMR2_OFFSET 0x0888 /* R2 Individual Mask Registers */
#define KINETIS_CAN_RXIMR3_OFFSET 0x088c /* R3 Individual Mask Registers */
#define KINETIS_CAN_RXIMR4_OFFSET 0x0890 /* R4 Individual Mask Registers */
#define KINETIS_CAN_RXIMR5_OFFSET 0x0894 /* R5 Individual Mask Registers */
#define KINETIS_CAN_RXIMR6_OFFSET 0x0898 /* R6 Individual Mask Registers */
#define KINETIS_CAN_RXIMR7_OFFSET 0x089c /* R7 Individual Mask Registers */
#define KINETIS_CAN_RXIMR8_OFFSET 0x08a0 /* R8 Individual Mask Registers */
#define KINETIS_CAN_RXIMR9_OFFSET 0x08a4 /* R9 Individual Mask Registers */
#define KINETIS_CAN_RXIMR10_OFFSET 0x08a8 /* R10 Individual Mask Registers */
#define KINETIS_CAN_RXIMR11_OFFSET 0x08ac /* R11 Individual Mask Registers */
#define KINETIS_CAN_RXIMR12_OFFSET 0x08b0 /* R12 Individual Mask Registers */
#define KINETIS_CAN_RXIMR13_OFFSET 0x08b4 /* R13 Individual Mask Registers */
#define KINETIS_CAN_RXIMR14_OFFSET 0x08b8 /* R14 Individual Mask Registers */
#define KINETIS_CAN_RXIMR15_OFFSET 0x08bc /* R15 Individual Mask Registers */
/* Register Addresses *******************************************************************************/
@ -178,16 +178,16 @@
#define CAN_CTRL1_CLKSRC (1 << 13) /* Bit 13: CAN Engine Clock Source */
#define CAN_CTRL1_ERRMSK (1 << 14) /* Bit 14: Error Mask */
#define CAN_CTRL1_BOFFMSK (1 << 15) /* Bit 15: Bus Off Mask */
#define CAN_CTRL1_PSEG2_SHIFT (16) /* Bits 16-18: Phase Segment 2 */
#define CAN_CTRL1_PSEG2_SHIFT (16) /* Bits 16-18: Phase Segment 2 */
#define CAN_CTRL1_PSEG2_MASK (7 << CAN_CTRL1_PSEG2_SHIFT)
#define CAN_CTRL1_PSEG2(x) (((uint32_t)(((uint32_t)(x)) << 16)) & 0x70000)
#define CAN_CTRL1_PSEG1_SHIFT (19) /* Bits 19-21: Phase Segment 1 */
#define CAN_CTRL1_PSEG1_SHIFT (19) /* Bits 19-21: Phase Segment 1 */
#define CAN_CTRL1_PSEG1_MASK (7 << CAN_CTRL1_PSEG1_SHIFT)
#define CAN_CTRL1_PSEG1(x) (((uint32_t)(((uint32_t)(x)) << 19)) & 0x380000)
#define CAN_CTRL1_RJW_SHIFT (22) /* Bits 22-23: Resync Jump Width */
#define CAN_CTRL1_RJW_SHIFT (22) /* Bits 22-23: Resync Jump Width */
#define CAN_CTRL1_RJW_MASK (3 << CAN_CTRL1_RJW_SHIFT)
#define CAN_CTRL1_RJW(x) (((uint32_t)(((uint32_t)(x)) << 22)) & 0xC00000)
#define CAN_CTRL1_PRESDIV_SHIFT (24) /* Bits 24-31: Prescaler Division Factor */
#define CAN_CTRL1_PRESDIV_SHIFT (24) /* Bits 24-31: Prescaler Division Factor */
#define CAN_CTRL1_PRESDIV_MASK (0xff << CAN_CTRL1_PRESDIV_SHIFT)
#define CAN_CTRL1_PRESDIV(x) (((uint32_t)(((uint32_t)(x)) << 24)) & 0xFF000000)
@ -225,9 +225,12 @@
#define CAN_ESR1_RX (1 << 3) /* Bit 3: FlexCAN in Reception */
#define CAN_ESR1_FLTCONF_SHIFT (4) /* Bits 4-5: Fault Confinement State */
#define CAN_ESR1_FLTCONF_MASK (3 << CAN_ESR1_FLTCONF_SHIFT)
# define CAN_ESR1_FLTCONF_ACTV (0 << CAN_ESR1_FLTCONF_SHIFT) /* Error Active */
# define CAN_ESR1_FLTCONF_PASV (1 << CAN_ESR1_FLTCONF_SHIFT) /* Error Passive */
# define CAN_ESR1_FLTCONF_OFF (2 << CAN_ESR1_FLTCONF_SHIFT) /* Bus Off */
# define CAN_ESR1_FLTCONF_ACTV (0 << CAN_ESR1_FLTCONF_SHIFT)
/* Error Active */
# define CAN_ESR1_FLTCONF_PASV (1 << CAN_ESR1_FLTCONF_SHIFT)
/* Error Passive */
# define CAN_ESR1_FLTCONF_OFF (2 << CAN_ESR1_FLTCONF_SHIFT)
/* Bus Off */
#define CAN_ESR1_TX (1 << 6) /* Bit 6: FlexCAN in Transmission */
#define CAN_ESR1_IDLE (1 << 7) /* Bit 7: CAN bus is in IDLE state */
#define CAN_ESR1_RXWRN (1 << 8) /* Bit 8: Rx Error Warning */

28
arch/arm/src/kinetis/kinetis_flexcan.c
View file

@ -1517,21 +1517,21 @@ static int kinetis_initialize(struct kinetis_driver_s *priv)
regval = getreg32(priv->base + KINETIS_CAN_CTRL1_OFFSET);
regval |= CAN_CTRL1_PRESDIV(priv->arbi_timing.presdiv) | /* Prescaler divisor factor */
CAN_CTRL1_PROPSEG(priv->arbi_timing.propseg) | /* Propagation segment */
CAN_CTRL1_PSEG1(priv->arbi_timing.pseg1) | /* Phase buffer segment 1 */
CAN_CTRL1_PSEG2(priv->arbi_timing.pseg2) | /* Phase buffer segment 2 */
CAN_CTRL1_RJW(1); /* Resynchronization jump width */
CAN_CTRL1_PSEG1(priv->arbi_timing.pseg1) | /* Phase buffer segment 1 */
CAN_CTRL1_PSEG2(priv->arbi_timing.pseg2) | /* Phase buffer segment 2 */
CAN_CTRL1_RJW(1); /* Resynchronization jump width */
putreg32(regval, priv->base + KINETIS_CAN_CTRL1_OFFSET);
#else
regval = getreg32(priv->base + KINETIS_CAN_CBT_OFFSET);
regval |= CAN_CBT_BTF | /* Enable extended bit timing
* configurations for CAN-FD for setting up
* separately nominal and data phase */
regval |= CAN_CBT_BTF | /* Enable extended bit timing
* configurations for CAN-FD for setting up
* separately nominal and data phase */
CAN_CBT_EPRESDIV(priv->arbi_timing.presdiv) | /* Prescaler divisor factor */
CAN_CBT_EPROPSEG(priv->arbi_timing.propseg) | /* Propagation segment */
CAN_CBT_EPSEG1(priv->arbi_timing.pseg1) | /* Phase buffer segment 1 */
CAN_CBT_EPSEG2(priv->arbi_timing.pseg2) | /* Phase buffer segment 2 */
CAN_CBT_ERJW(1); /* Resynchronization jump width */
CAN_CBT_EPSEG1(priv->arbi_timing.pseg1) | /* Phase buffer segment 1 */
CAN_CBT_EPSEG2(priv->arbi_timing.pseg2) | /* Phase buffer segment 2 */
CAN_CBT_ERJW(1); /* Resynchronization jump width */
putreg32(regval, priv->base + KINETIS_CAN_CBT_OFFSET);
/* Enable CAN FD feature */
@ -1542,11 +1542,11 @@ static int kinetis_initialize(struct kinetis_driver_s *priv)
regval = getreg32(priv->base + KINETIS_CAN_FDCBT_OFFSET);
regval |= CAN_FDCBT_FPRESDIV(priv->data_timing.presdiv) | /* Prescaler divisor factor of 1 */
CAN_FDCBT_FPROPSEG(priv->data_timing.propseg) | /* Propagation
* segment (only register that doesn't add 1) */
CAN_FDCBT_FPSEG1(priv->data_timing.pseg1) | /* Phase buffer segment 1 */
CAN_FDCBT_FPSEG2(priv->data_timing.pseg2) | /* Phase buffer segment 2 */
CAN_FDCBT_FRJW(priv->data_timing.pseg2); /* Resynchorinzation jump width same as PSEG2 */
CAN_FDCBT_FPROPSEG(priv->data_timing.propseg) | /* Propagation
* segment (only register that doesn't add 1) */
CAN_FDCBT_FPSEG1(priv->data_timing.pseg1) | /* Phase buffer segment 1 */
CAN_FDCBT_FPSEG2(priv->data_timing.pseg2) | /* Phase buffer segment 2 */
CAN_FDCBT_FRJW(priv->data_timing.pseg2); /* Resynchorinzation jump width same as PSEG2 */
putreg32(regval, priv->base + KINETIS_CAN_FDCBT_OFFSET);
/* Additional CAN-FD configurations */

28
arch/arm/src/s32k1xx/s32k1xx_flexcan.c
View file

@ -1518,21 +1518,21 @@ static int s32k1xx_initialize(struct s32k1xx_driver_s *priv)
regval = getreg32(priv->base + S32K1XX_CAN_CTRL1_OFFSET);
regval |= CAN_CTRL1_PRESDIV(priv->arbi_timing.presdiv) | /* Prescaler divisor factor */
CAN_CTRL1_PROPSEG(priv->arbi_timing.propseg) | /* Propagation segment */
CAN_CTRL1_PSEG1(priv->arbi_timing.pseg1) | /* Phase buffer segment 1 */
CAN_CTRL1_PSEG2(priv->arbi_timing.pseg2) | /* Phase buffer segment 2 */
CAN_CTRL1_RJW(1); /* Resynchronization jump width */
CAN_CTRL1_PSEG1(priv->arbi_timing.pseg1) | /* Phase buffer segment 1 */
CAN_CTRL1_PSEG2(priv->arbi_timing.pseg2) | /* Phase buffer segment 2 */
CAN_CTRL1_RJW(1); /* Resynchronization jump width */
putreg32(regval, priv->base + S32K1XX_CAN_CTRL1_OFFSET);
#else
regval = getreg32(priv->base + S32K1XX_CAN_CBT_OFFSET);
regval |= CAN_CBT_BTF | /* Enable extended bit timing
* configurations for CAN-FD for setting up
* separately nominal and data phase */
regval |= CAN_CBT_BTF | /* Enable extended bit timing
* configurations for CAN-FD for setting up
* separately nominal and data phase */
CAN_CBT_EPRESDIV(priv->arbi_timing.presdiv) | /* Prescaler divisor factor */
CAN_CBT_EPROPSEG(priv->arbi_timing.propseg) | /* Propagation segment */
CAN_CBT_EPSEG1(priv->arbi_timing.pseg1) | /* Phase buffer segment 1 */
CAN_CBT_EPSEG2(priv->arbi_timing.pseg2) | /* Phase buffer segment 2 */
CAN_CBT_ERJW(1); /* Resynchronization jump width */
CAN_CBT_EPSEG1(priv->arbi_timing.pseg1) | /* Phase buffer segment 1 */
CAN_CBT_EPSEG2(priv->arbi_timing.pseg2) | /* Phase buffer segment 2 */
CAN_CBT_ERJW(1); /* Resynchronization jump width */
putreg32(regval, priv->base + S32K1XX_CAN_CBT_OFFSET);
/* Enable CAN FD feature */
@ -1543,11 +1543,11 @@ static int s32k1xx_initialize(struct s32k1xx_driver_s *priv)
regval = getreg32(priv->base + S32K1XX_CAN_FDCBT_OFFSET);
regval |= CAN_FDCBT_FPRESDIV(priv->data_timing.presdiv) | /* Prescaler divisor factor of 1 */
CAN_FDCBT_FPROPSEG(priv->data_timing.propseg) | /* Propagation
* segment (only register that doesn't add 1) */
CAN_FDCBT_FPSEG1(priv->data_timing.pseg1) | /* Phase buffer segment 1 */
CAN_FDCBT_FPSEG2(priv->data_timing.pseg2) | /* Phase buffer segment 2 */
CAN_FDCBT_FRJW(priv->data_timing.pseg2); /* Resynchorinzation jump width same as PSEG2 */
CAN_FDCBT_FPROPSEG(priv->data_timing.propseg) | /* Propagation
* segment (only register that doesn't add 1) */
CAN_FDCBT_FPSEG1(priv->data_timing.pseg1) | /* Phase buffer segment 1 */
CAN_FDCBT_FPSEG2(priv->data_timing.pseg2) | /* Phase buffer segment 2 */
CAN_FDCBT_FRJW(priv->data_timing.pseg2); /* Resynchorinzation jump width same as PSEG2 */
putreg32(regval, priv->base + S32K1XX_CAN_FDCBT_OFFSET);
/* Additional CAN-FD configurations */

2
boards/arm/s32k1xx/rddrone-uavcan146/include/board.h
View file

@ -148,7 +148,7 @@
/* I2C selections ***********************************************************/
#define PIN_LPI2C0_SCL PIN_LPI2C0_SCL_2 /* PTA3 */
#define PIN_LPI2C0_SDA PIN_LPI2C0_SDA_2 /* PTA2 */
#define PIN_LPI2C0_SDA PIN_LPI2C0_SDA_2 /* PTA2 */
/* CAN selections ***********************************************************/
#define PIN_CAN0_TX PIN_CAN0_TX_4 /* PTE5 */

32
include/net/if.h
View file

@ -174,14 +174,14 @@ struct lifreq
} lifr_ifru;
};
#define lifr_addr lifr_ifru.lifru_addr /* IP address */
#define lifr_dstaddr lifr_ifru.lifru_dstaddr /* P-to-P Address */
#define lifr_broadaddr lifr_ifru.lifru_broadaddr /* Broadcast address */
#define lifr_netmask lifr_ifru.lifru_netmask /* Interface net mask */
#define lifr_hwaddr lifr_ifru.lifru_hwaddr /* MAC address */
#define lifr_mtu lifr_ifru.lifru_mtu /* MTU */
#define lifr_count lifr_ifru.lifru_count /* Number of devices */
#define lifr_flags lifr_ifru.lifru_flags /* interface flags */
#define lifr_addr lifr_ifru.lifru_addr /* IP address */
#define lifr_dstaddr lifr_ifru.lifru_dstaddr /* P-to-P Address */
#define lifr_broadaddr lifr_ifru.lifru_broadaddr /* Broadcast address */
#define lifr_netmask lifr_ifru.lifru_netmask /* Interface net mask */
#define lifr_hwaddr lifr_ifru.lifru_hwaddr /* MAC address */
#define lifr_mtu lifr_ifru.lifru_mtu /* MTU */
#define lifr_count lifr_ifru.lifru_count /* Number of devices */
#define lifr_flags lifr_ifru.lifru_flags /* interface flags */
#define lifr_mii_notify_pid lifr_ifru.llfru_mii_notify.pid /* PID to be notified */
#define lifr_mii_notify_event lifr_ifru.llfru_mii_notify.event /* Describes notification */
#define lifr_mii_phy_id lifr_ifru.lifru_mii_data.phy_id /* PHY device address */
@ -228,14 +228,14 @@ struct ifreq
} ifr_ifru;
};
#define ifr_addr ifr_ifru.ifru_addr /* IP address */
#define ifr_dstaddr ifr_ifru.ifru_dstaddr /* P-to-P Address */
#define ifr_broadaddr ifr_ifru.ifru_broadaddr /* Broadcast address */
#define ifr_netmask ifr_ifru.ifru_netmask /* Interface net mask */
#define ifr_hwaddr ifr_ifru.ifru_hwaddr /* MAC address */
#define ifr_mtu ifr_ifru.ifru_mtu /* MTU */
#define ifr_count ifr_ifru.ifru_count /* Number of devices */
#define ifr_flags ifr_ifru.ifru_flags /* interface flags */
#define ifr_addr ifr_ifru.ifru_addr /* IP address */
#define ifr_dstaddr ifr_ifru.ifru_dstaddr /* P-to-P Address */
#define ifr_broadaddr ifr_ifru.ifru_broadaddr /* Broadcast address */
#define ifr_netmask ifr_ifru.ifru_netmask /* Interface net mask */
#define ifr_hwaddr ifr_ifru.ifru_hwaddr /* MAC address */
#define ifr_mtu ifr_ifru.ifru_mtu /* MTU */
#define ifr_count ifr_ifru.ifru_count /* Number of devices */
#define ifr_flags ifr_ifru.ifru_flags /* interface flags */
#define ifr_mii_notify_pid ifr_ifru.ifru_mii_notify.pid /* PID to be notified */
#define ifr_mii_notify_event ifr_ifru.ifru_mii_notify.event /* Describes notification */
#define ifr_mii_phy_id ifr_ifru.ifru_mii_data.phy_id /* PHY device address */

2
net/ieee802154/ieee802154_sockif.c
View file

@ -782,7 +782,7 @@ static int ieee802154_close(FAR struct socket *psock)
{
/* Yes... free the connection structure */
conn->crefs = 0; /* No more references on the connection */
conn->crefs = 0; /* No more references on the connection */
ieee802154_conn_free(psock->s_conn); /* Free network resources */
}
else

2
net/local/local_sockif.c
View file

@ -390,7 +390,7 @@ static int local_getsockname(FAR struct socket *psock,
}
else /* conn->lctype = LOCAL_TYPE_PATHNAME */
{
/* Get the full length of the socket name (including null terminator) */
/* Get the full length of the socket name (incl. null terminator) */
int namelen = strlen(conn->lc_path) + 1;

4
net/netdev/netdev_ioctl.c
View file

@ -1109,7 +1109,7 @@ static int netdev_ifr_ioctl(FAR struct socket *psock, int cmd,
#ifdef CONFIG_NETDEV_IFINDEX
case SIOCGIFNAME: /* Get interface name */
{
struct net_driver_s *dev = netdev_findbyindex(req->ifr_ifindex);
dev = netdev_findbyindex(req->ifr_ifindex);
if (dev != NULL)
{
strncpy(req->ifr_name, dev->d_ifname, IFNAMSIZ);
@ -1124,7 +1124,7 @@ static int netdev_ifr_ioctl(FAR struct socket *psock, int cmd,
case SIOCGIFINDEX: /* Index to name mapping */
{
struct net_driver_s *dev = netdev_findbyname(req->ifr_name);
dev = netdev_findbyname(req->ifr_name);
if (dev != NULL)
{
req->ifr_ifindex = dev->d_ifindex;