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board nucleo-h743zi:Rework board.h not use CONFIG_STM32_USE_LEGACY_PINMAP

This commit is contained in:
David Sidrane 2023-04-13 08:09:04 -07:00 committed by Mateusz Szafoni
parent 54fbb911f2
commit bbc8562f65
9 changed files with 43 additions and 23 deletions

View file

@ -9,6 +9,7 @@
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STANDARD_SERIAL is not set
# CONFIG_STM32H7_DTCMEXCLUDE is not set
# CONFIG_STM32H7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-h743zi"
CONFIG_ARCH_BOARD_NUCLEO_H743ZI=y

View file

@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_STANDARD_SERIAL is not set
# CONFIG_STM32H7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-h743zi"
CONFIG_ARCH_BOARD_NUCLEO_H743ZI=y

View file

@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32H7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-h743zi"
CONFIG_ARCH_BOARD_NUCLEO_H743ZI=y

View file

@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_STANDARD_SERIAL is not set
# CONFIG_STM32H7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-h743zi"
CONFIG_ARCH_BOARD_NUCLEO_H743ZI=y

View file

@ -8,6 +8,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STANDARD_SERIAL is not set
# CONFIG_STM32H7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-h743zi"
CONFIG_ARCH_BOARD_NUCLEO_H743ZI=y

View file

@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_NX_DISABLE_1BPP is not set
# CONFIG_STANDARD_SERIAL is not set
# CONFIG_STM32H7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-h743zi"
CONFIG_ARCH_BOARD_NUCLEO_H743ZI=y

View file

@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_STANDARD_SERIAL is not set
# CONFIG_STM32H7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-h743zi"
CONFIG_ARCH_BOARD_NUCLEO_H743ZI=y

View file

@ -8,6 +8,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STANDARD_SERIAL is not set
# CONFIG_STM32H7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-h743zi"
CONFIG_ARCH_BOARD_NUCLEO_H743ZI=y

View file

@ -281,9 +281,15 @@
/* Ethernet definitions *****************************************************/
#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 /* PG13 */
#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_1 /* PB 13 */
#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2
#define GPIO_ETH_RMII_TXD0 (GPIO_ETH_RMII_TXD0_2 | GPIO_SPEED_100MHz) /* PG13 */
#define GPIO_ETH_RMII_TXD1 (GPIO_ETH_RMII_TXD1_1 | GPIO_SPEED_100MHz) /* PB13 */
#define GPIO_ETH_RMII_TX_EN (GPIO_ETH_RMII_TX_EN_2 | GPIO_SPEED_100MHz) /* PG11 */
#define GPIO_ETH_MDC (GPIO_ETH_MDC_0 | GPIO_SPEED_100MHz) /* PC1 */
#define GPIO_ETH_MDIO (GPIO_ETH_MDIO_0 | GPIO_SPEED_100MHz) /* PA2 */
#define GPIO_ETH_RMII_RXD0 (GPIO_ETH_RMII_RXD0_0 | GPIO_SPEED_100MHz) /* PC4 */
#define GPIO_ETH_RMII_RXD1 (GPIO_ETH_RMII_RXD1_0 | GPIO_SPEED_100MHz) /* PC5 */
#define GPIO_ETH_RMII_CRS_DV (GPIO_ETH_RMII_CRS_DV_0 | GPIO_SPEED_100MHz) /* PA7 */
#define GPIO_ETH_RMII_REF_CLK (GPIO_ETH_RMII_REF_CLK_0 | GPIO_SPEED_100MHz) /* PA1 */
/* LED definitions **********************************************************/
@ -354,47 +360,53 @@
/* USART3 (Nucleo Virtual Console) */
#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */
#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */
#define GPIO_USART3_RX (GPIO_USART3_RX_3 | GPIO_SPEED_100MHz) /* PD9 */
#define GPIO_USART3_TX (GPIO_USART3_TX_3 | GPIO_SPEED_100MHz) /* PD8 */
#define DMAMAP_USART3_RX DMAMAP_DMA12_USART3RX_0
#define DMAMAP_USART3_TX DMAMAP_DMA12_USART3TX_1
/* USART6 (Arduino Serial Shield) */
#define GPIO_USART6_RX GPIO_USART6_RX_2 /* PG9 */
#define GPIO_USART6_TX GPIO_USART6_TX_2 /* PG14 */
#define GPIO_USART6_RX (GPIO_USART6_RX_2 | GPIO_SPEED_100MHz) /* PG9 */
#define GPIO_USART6_TX (GPIO_USART6_TX_2 | GPIO_SPEED_100MHz) /* PG14 */
#define DMAMAP_USART6_RX DMAMAP_DMA12_USART6RX_1
#define DMAMAP_USART6_TX DMAMAP_DMA12_USART6TX_0
/* I2C1 Use Nucleo I2C1 pins */
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2 /* PB8 - D15 */
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2 /* PB9 - D14 */
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_2 | GPIO_SPEED_50MHz) /* PB8 - D15 */
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2 | GPIO_SPEED_50MHz) /* PB9 - D14 */
/* I2C2 Use Nucleo I2C2 pins */
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_2 /* PF1 - D69 */
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_2 /* PF0 - D68 */
#define GPIO_I2C2_SMBA GPIO_I2C2_SMBA_2 /* PF2 - D70 */
#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_2 | GPIO_SPEED_50MHz) /* PF1 - D69 */
#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_2 | GPIO_SPEED_50MHz) /* PF0 - D68 */
#define GPIO_I2C2_SMBA (GPIO_I2C2_SMBA_2 | GPIO_SPEED_50MHz) /* PF2 - D70 */
/* SPI3 */
#define GPIO_SPI3_MISO GPIO_SPI3_MISO_1 /* PB4 */
#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_4 /* PB5 */
#define GPIO_SPI3_SCK GPIO_SPI3_SCK_1 /* PB3 */
#define GPIO_SPI3_NSS GPIO_SPI3_NSS_2 /* PA4 */
#define GPIO_SPI3_MISO (GPIO_SPI3_MISO_1 | GPIO_SPEED_50MHz) /* PB4 */
#define GPIO_SPI3_MOSI (GPIO_SPI3_MOSI_4 | GPIO_SPEED_50MHz) /* PB5 */
#define GPIO_SPI3_SCK (GPIO_SPI3_SCK_1 | GPIO_SPEED_50MHz) /* PB3 */
#define GPIO_SPI3_NSS (GPIO_SPI3_NSS_2 | GPIO_SPEED_50MHz) /* PA4 */
/* TIM1 */
#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2 /* PE9 - D6 */
#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1NOUT_3 /* PE8 - D42 */
#define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_2 /* PE11 - D5 */
#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2NOUT_3 /* PE10 - D40 */
#define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_2 /* PE13 - D3 */
#define GPIO_TIM1_CH3NOUT GPIO_TIM1_CH3NOUT_3 /* PE12 - D39 */
#define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_2 /* PE14 - D38 */
#define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_2 | GPIO_SPEED_50MHz) /* PE9 - D6 */
#define GPIO_TIM1_CH1NOUT (GPIO_TIM1_CH1NOUT_3 | GPIO_SPEED_50MHz) /* PE8 - D42 */
#define GPIO_TIM1_CH2OUT (GPIO_TIM1_CH2OUT_2 | GPIO_SPEED_50MHz) /* PE11 - D5 */
#define GPIO_TIM1_CH2NOUT (GPIO_TIM1_CH2NOUT_3 | GPIO_SPEED_50MHz) /* PE10 - D40 */
#define GPIO_TIM1_CH3OUT (GPIO_TIM1_CH3OUT_2 | GPIO_SPEED_50MHz) /* PE13 - D3 */
#define GPIO_TIM1_CH3NOUT (GPIO_TIM1_CH3NOUT_3 | GPIO_SPEED_50MHz) /* PE12 - D39 */
#define GPIO_TIM1_CH4OUT (GPIO_TIM1_CH4OUT_2 | GPIO_SPEED_50MHz) /* PE14 - D38 */
/* OTGFS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0 | GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0 | GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0 | GPIO_SPEED_100MHz)
/* DMA **********************************************************************/