forked from nuttx/nuttx-update
drivers/: Fixes to spacing and alignement
This commit is contained in:
parent
e675ddb813
commit
cf14f8d1b5
108 changed files with 1131 additions and 1097 deletions
|
@ -141,9 +141,9 @@ static int dac_setup(FAR struct dac_dev_s *dev)
|
|||
FAR struct spi_dev_s *spi = priv->spi;
|
||||
|
||||
SPI_SELECT(spi, priv->devno, true);
|
||||
SPI_SEND(spi,AD5410_REG_CMD);
|
||||
SPI_SEND(spi,(AD5410_CMD_OUTEN|AD5410_CMD_420MA)>>8);
|
||||
SPI_SEND(spi,AD5410_CMD_OUTEN|AD5410_CMD_420MA);
|
||||
SPI_SEND(spi, AD5410_REG_CMD);
|
||||
SPI_SEND(spi, (AD5410_CMD_OUTEN | AD5410_CMD_420MA) >> 8);
|
||||
SPI_SEND(spi, AD5410_CMD_OUTEN | AD5410_CMD_420MA);
|
||||
SPI_SELECT(spi, priv->devno, false);
|
||||
return OK;
|
||||
}
|
||||
|
@ -167,10 +167,10 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
|
|||
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
|
||||
FAR struct spi_dev_s *spi = priv->spi;
|
||||
|
||||
SPI_SELECT(spi, priv->devno, true);
|
||||
SPI_SEND(spi,AD5410_REG_WR);
|
||||
SPI_SEND(spi,(uint8_t)(msg->am_data>>24));
|
||||
SPI_SEND(spi,(uint8_t)(msg->am_data>>16));
|
||||
SPI_SELECT(spi, priv->devno, true);
|
||||
SPI_SEND(spi, AD5410_REG_WR);
|
||||
SPI_SEND(spi, (uint8_t)(msg->am_data >> 24));
|
||||
SPI_SEND(spi, (uint8_t)(msg->am_data >> 16));
|
||||
SPI_SELECT(spi, priv->devno, false);
|
||||
dac_txdone(&g_dacdev);
|
||||
return 0;
|
||||
|
@ -207,8 +207,8 @@ FAR struct dac_dev_s *up_ad5410initialize(FAR struct spi_dev_s *spi,
|
|||
{
|
||||
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)g_dacdev.ad_priv;
|
||||
|
||||
priv->spi=spi;
|
||||
priv->devno=devno;
|
||||
priv->spi = spi;
|
||||
priv->devno = devno;
|
||||
return &g_dacdev;
|
||||
}
|
||||
#endif
|
||||
|
|
|
@ -67,8 +67,9 @@
|
|||
|
||||
static int adc_open(FAR struct file *filep);
|
||||
static int adc_close(FAR struct file *filep);
|
||||
static ssize_t adc_read(FAR struct file *, FAR char *, size_t);
|
||||
static int adc_ioctl(FAR struct file *filep,int cmd,unsigned long arg);
|
||||
static ssize_t adc_read(FAR struct file *fielp, FAR char *buffer,
|
||||
size_t buflen);
|
||||
static int adc_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
|
|
|
@ -147,17 +147,17 @@ static struct up_dev_s g_adcpriv =
|
|||
{
|
||||
.mux = (const uint8_t [])
|
||||
{
|
||||
CONFIG_ADS1255_MUX,0
|
||||
CONFIG_ADS1255_MUX, 0
|
||||
},
|
||||
.sps = CONFIG_ADS1255_SPS,
|
||||
.sps = CONFIG_ADS1255_SPS,
|
||||
.channel = 0,
|
||||
.irq = CONFIG_ADS1255_IRQ,
|
||||
.irq = CONFIG_ADS1255_IRQ,
|
||||
};
|
||||
|
||||
static struct adc_dev_s g_adcdev =
|
||||
{
|
||||
.ad_ops = &g_adcops,
|
||||
.ad_priv= &g_adcpriv,
|
||||
.ad_ops = &g_adcops,
|
||||
.ad_priv = &g_adcpriv,
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -166,12 +166,12 @@ static struct adc_dev_s g_adcdev =
|
|||
|
||||
static uint8_t getspsreg(uint16_t sps)
|
||||
{
|
||||
static const unsigned short sps_tab[]=
|
||||
static const unsigned short sps_tab[] =
|
||||
{
|
||||
3, 7, 12, 20, 27, 40, 55, 80,
|
||||
300, 750, 1500, 3000, 5000, 10000, 20000, 65535,
|
||||
};
|
||||
static const unsigned char sps_reg[]=
|
||||
static const unsigned char sps_reg[] =
|
||||
{
|
||||
0x03, 0x13, 0x23, 0x33, 0x43, 0x53, 0x63, 0x72,
|
||||
0x82, 0x92, 0xa1, 0xb0, 0xc0, 0xd0, 0xe0, 0xf0,
|
||||
|
@ -206,9 +206,9 @@ static void adc_reset(FAR struct adc_dev_s *dev)
|
|||
SPI_SETFREQUENCY(spi, CONFIG_ADS1255_FREQUENCY);
|
||||
usleep(1000);
|
||||
SPI_SELECT(spi, priv->devno, true);
|
||||
SPI_SEND(spi,ADS125X_WREG+0x03); /* WRITE SPS REG */
|
||||
SPI_SEND(spi,0x00); /* count=1 */
|
||||
SPI_SEND(spi,0x63);
|
||||
SPI_SEND(spi, ADS125X_WREG + 0x03); /* WRITE SPS REG */
|
||||
SPI_SEND(spi, 0x00); /* count=1 */
|
||||
SPI_SEND(spi, 0x63);
|
||||
SPI_SELECT(spi, priv->devno, false);
|
||||
}
|
||||
|
||||
|
@ -227,22 +227,22 @@ static int adc_setup(FAR struct adc_dev_s *dev)
|
|||
if (ret == OK)
|
||||
{
|
||||
SPI_SELECT(spi, priv->devno, true);
|
||||
SPI_SEND(spi,ADS125X_WREG); /* WRITE REG from 0 */
|
||||
SPI_SEND(spi,0x03); /* count=4+1 */
|
||||
SPI_SEND(spi, ADS125X_WREG); /* WRITE REG from 0 */
|
||||
SPI_SEND(spi, 0x03); /* count=4+1 */
|
||||
if (priv->buf)
|
||||
{
|
||||
SPI_SEND(spi,ADS125X_BUFON); /* REG0 STATUS BUFFER ON */
|
||||
SPI_SEND(spi, ADS125X_BUFON); /* REG0 STATUS BUFFER ON */
|
||||
}
|
||||
else
|
||||
{
|
||||
SPI_SEND(spi,ADS125X_BUFOFF);
|
||||
SPI_SEND(spi, ADS125X_BUFOFF);
|
||||
}
|
||||
|
||||
SPI_SEND(spi,priv->mux[0]);
|
||||
SPI_SEND(spi,priv->pga); /* REG2 ADCON PGA=2 */
|
||||
SPI_SEND(spi,getspsreg(priv->sps));
|
||||
SPI_SEND(spi, priv->mux[0]);
|
||||
SPI_SEND(spi, priv->pga); /* REG2 ADCON PGA=2 */
|
||||
SPI_SEND(spi, getspsreg(priv->sps));
|
||||
usleep(1000);
|
||||
SPI_SEND(spi,ADS125X_SELFCAL);
|
||||
SPI_SEND(spi, ADS125X_SELFCAL);
|
||||
SPI_SELECT(spi, priv->devno, false);
|
||||
up_enable_irq(priv->irq);
|
||||
}
|
||||
|
@ -292,30 +292,30 @@ static int adc_interrupt(int irq, void *context)
|
|||
unsigned char ch;
|
||||
|
||||
SPI_SELECT(spi, priv->devno, true);
|
||||
SPI_SEND(spi,ADS125X_RDATA);
|
||||
SPI_SEND(spi, ADS125X_RDATA);
|
||||
up_udelay(10);
|
||||
buf[3]=SPI_SEND(spi,0xff);
|
||||
buf[2]=SPI_SEND(spi,0xff);
|
||||
buf[1]=SPI_SEND(spi,0xff);
|
||||
buf[0]=0;
|
||||
buf[3] = SPI_SEND(spi, 0xff);
|
||||
buf[2] = SPI_SEND(spi, 0xff);
|
||||
buf[1] = SPI_SEND(spi, 0xff);
|
||||
buf[0] = 0;
|
||||
|
||||
priv->channel++;
|
||||
ch = priv->mux[priv->channel];
|
||||
if ( ch == 0 )
|
||||
if (ch == 0)
|
||||
{
|
||||
priv->channel=0;
|
||||
priv->channel = 0;
|
||||
ch = priv->mux[0];
|
||||
}
|
||||
|
||||
SPI_SEND(spi,ADS125X_WREG+0x01);
|
||||
SPI_SEND(spi,0x00);
|
||||
SPI_SEND(spi,ch);
|
||||
SPI_SEND(spi,ADS125X_SYNC);
|
||||
SPI_SEND(spi, ADS125X_WREG + 0x01);
|
||||
SPI_SEND(spi, 0x00);
|
||||
SPI_SEND(spi, ch);
|
||||
SPI_SEND(spi, ADS125X_SYNC);
|
||||
up_udelay(2);
|
||||
SPI_SEND(spi,ADS125X_WAKEUP);
|
||||
SPI_SEND(spi, ADS125X_WAKEUP);
|
||||
SPI_SELECT(spi, priv->devno, false);
|
||||
|
||||
adc_receive(&g_adcdev,priv->channel,*(int32_t *)buf);
|
||||
adc_receive(&g_adcdev, priv->channel, *(int32_t *)buf);
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
|
|
@ -74,9 +74,11 @@
|
|||
|
||||
static int dac_open(FAR struct file *filep);
|
||||
static int dac_close(FAR struct file *filep);
|
||||
static ssize_t dac_read(FAR struct file *, FAR char *, size_t);
|
||||
static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer, size_t buflen);
|
||||
static int dac_ioctl(FAR struct file *filep,int cmd,unsigned long arg);
|
||||
static ssize_t dac_read(FAR struct file *filep, FAR char *buffer,
|
||||
size_t buflen);
|
||||
static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer,
|
||||
size_t buflen);
|
||||
static int dac_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
|
@ -299,7 +301,7 @@ static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer, size_t
|
|||
* shorter than the minimum.
|
||||
*/
|
||||
|
||||
if (buflen % 5 == 0 )
|
||||
if (buflen % 5 == 0)
|
||||
{
|
||||
msglen = 5;
|
||||
}
|
||||
|
@ -324,7 +326,7 @@ static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer, size_t
|
|||
msglen = 5;
|
||||
}
|
||||
|
||||
while ((buflen - nsent) >= msglen )
|
||||
while ((buflen - nsent) >= msglen)
|
||||
{
|
||||
/* Check if adding this new message would over-run the drivers ability to enqueue
|
||||
* xmit data.
|
||||
|
@ -394,27 +396,27 @@ static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer, size_t
|
|||
}
|
||||
else if (msglen == 4)
|
||||
{
|
||||
fifo->af_buffer[fifo->af_tail].am_channel=buffer[nsent];
|
||||
fifo->af_buffer[fifo->af_tail].am_data=*(uint32_t *)&buffer[nsent];
|
||||
fifo->af_buffer[fifo->af_tail].am_data&=0xffffff00;
|
||||
fifo->af_buffer[fifo->af_tail].am_channel = buffer[nsent];
|
||||
fifo->af_buffer[fifo->af_tail].am_data = *(uint32_t *)&buffer[nsent];
|
||||
fifo->af_buffer[fifo->af_tail].am_data &= 0xffffff00;
|
||||
}
|
||||
else if (msglen == 3)
|
||||
{
|
||||
fifo->af_buffer[fifo->af_tail].am_channel=buffer[nsent];
|
||||
fifo->af_buffer[fifo->af_tail].am_data=(*(uint16_t *)&buffer[nsent+1]);
|
||||
fifo->af_buffer[fifo->af_tail].am_data<<=16;
|
||||
fifo->af_buffer[fifo->af_tail].am_channel = buffer[nsent];
|
||||
fifo->af_buffer[fifo->af_tail].am_data = (*(uint16_t *)&buffer[nsent+1]);
|
||||
fifo->af_buffer[fifo->af_tail].am_data <<= 16;
|
||||
}
|
||||
else if (msglen == 2)
|
||||
{
|
||||
fifo->af_buffer[fifo->af_tail].am_channel=0;
|
||||
fifo->af_buffer[fifo->af_tail].am_data=(*(uint16_t *)&buffer[nsent]);
|
||||
fifo->af_buffer[fifo->af_tail].am_data<<=16;
|
||||
fifo->af_buffer[fifo->af_tail].am_channel = 0;
|
||||
fifo->af_buffer[fifo->af_tail].am_data = (*(uint16_t *)&buffer[nsent]);
|
||||
fifo->af_buffer[fifo->af_tail].am_data <<= 16;
|
||||
}
|
||||
else if (msglen == 1)
|
||||
{
|
||||
fifo->af_buffer[fifo->af_tail].am_channel=0;
|
||||
fifo->af_buffer[fifo->af_tail].am_data=buffer[nsent];
|
||||
fifo->af_buffer[fifo->af_tail].am_data<<=24;
|
||||
fifo->af_buffer[fifo->af_tail].am_channel = 0;
|
||||
fifo->af_buffer[fifo->af_tail].am_data = buffer[nsent];
|
||||
fifo->af_buffer[fifo->af_tail].am_data <<= 24;
|
||||
}
|
||||
|
||||
/* Increment the tail of the circular buffer */
|
||||
|
|
|
@ -101,7 +101,7 @@ static int null_start(FAR struct audio_lowerhalf_s *dev);
|
|||
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
|
||||
#ifdef CONFIG_AUDIO_MULTI_SESSION
|
||||
static int null_stop(FAR struct audio_lowerhalf_s *dev,
|
||||
FAR void* session);
|
||||
FAR void *session);
|
||||
#else
|
||||
static int null_stop(FAR struct audio_lowerhalf_s *dev);
|
||||
#endif
|
||||
|
@ -109,9 +109,9 @@ static int null_stop(FAR struct audio_lowerhalf_s *dev);
|
|||
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
|
||||
#ifdef CONFIG_AUDIO_MULTI_SESSION
|
||||
static int null_pause(FAR struct audio_lowerhalf_s *dev,
|
||||
FAR void* session);
|
||||
FAR void *session);
|
||||
static int null_resume(FAR struct audio_lowerhalf_s *dev,
|
||||
FAR void* session);
|
||||
FAR void *session);
|
||||
#else
|
||||
static int null_pause(FAR struct audio_lowerhalf_s *dev);
|
||||
static int null_resume(FAR struct audio_lowerhalf_s *dev);
|
||||
|
@ -432,7 +432,7 @@ static void *null_workerthread(pthread_addr_t pvarg)
|
|||
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
|
||||
while (!priv->terminate)
|
||||
#else
|
||||
for (;;)
|
||||
for (; ; )
|
||||
#endif
|
||||
{
|
||||
/* Wait for messages from our message queue */
|
||||
|
@ -573,7 +573,7 @@ static int null_start(FAR struct audio_lowerhalf_s *dev)
|
|||
|
||||
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
|
||||
#ifdef CONFIG_AUDIO_MULTI_SESSION
|
||||
static int null_stop(FAR struct audio_lowerhalf_s *dev, FAR void* session)
|
||||
static int null_stop(FAR struct audio_lowerhalf_s *dev, FAR void *session)
|
||||
#else
|
||||
static int null_stop(FAR struct audio_lowerhalf_s *dev)
|
||||
#endif
|
||||
|
@ -611,7 +611,7 @@ static int null_stop(FAR struct audio_lowerhalf_s *dev)
|
|||
|
||||
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
|
||||
#ifdef CONFIG_AUDIO_MULTI_SESSION
|
||||
static int null_pause(FAR struct audio_lowerhalf_s *dev, FAR void* session)
|
||||
static int null_pause(FAR struct audio_lowerhalf_s *dev, FAR void *session)
|
||||
#else
|
||||
static int null_pause(FAR struct audio_lowerhalf_s *dev)
|
||||
#endif
|
||||
|
@ -630,7 +630,7 @@ static int null_pause(FAR struct audio_lowerhalf_s *dev)
|
|||
|
||||
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
|
||||
#ifdef CONFIG_AUDIO_MULTI_SESSION
|
||||
static int null_resume(FAR struct audio_lowerhalf_s *dev, FAR void* session)
|
||||
static int null_resume(FAR struct audio_lowerhalf_s *dev, FAR void *session)
|
||||
#else
|
||||
static int null_resume(FAR struct audio_lowerhalf_s *dev)
|
||||
#endif
|
||||
|
|
|
@ -111,35 +111,35 @@ struct vs1053_struct_s
|
|||
|
||||
/* Our specific driver data goes here */
|
||||
|
||||
const FAR struct vs1053_lower_s *hw_lower;/* Pointer to the hardware lower functions */
|
||||
FAR struct spi_dev_s *spi; /* Pointer to the SPI bus */
|
||||
FAR struct ap_buffer_s *apb; /* Pointer to the buffer we are processing */
|
||||
struct dq_queue_s apbq; /* Our queue for enqueued buffers */
|
||||
unsigned long spi_freq; /* Frequency to run the SPI bus at. */
|
||||
unsigned long chip_freq; /* Current chip frequency */
|
||||
mqd_t mq; /* Message queue for receiving messages */
|
||||
char mqname[16]; /* Our message queue name */
|
||||
pthread_t threadid; /* ID of our thread */
|
||||
sem_t apbq_sem; /* Audio Pipeline Buffer Queue sem access */
|
||||
const FAR struct vs1053_lower_s *hw_lower; /* Pointer to the hardware lower functions */
|
||||
FAR struct spi_dev_s *spi; /* Pointer to the SPI bus */
|
||||
FAR struct ap_buffer_s *apb; /* Pointer to the buffer we are processing */
|
||||
struct dq_queue_s apbq; /* Our queue for enqueued buffers */
|
||||
unsigned long spi_freq; /* Frequency to run the SPI bus at. */
|
||||
unsigned long chip_freq; /* Current chip frequency */
|
||||
mqd_t mq; /* Message queue for receiving messages */
|
||||
char mqname[16]; /* Our message queue name */
|
||||
pthread_t threadid; /* ID of our thread */
|
||||
sem_t apbq_sem; /* Audio Pipeline Buffer Queue sem access */
|
||||
#ifndef CONFIG_AUDIO_EXCLUDE_VOLUME
|
||||
int16_t volume; /* Current volume level */
|
||||
int16_t volume; /* Current volume level */
|
||||
#ifndef CONFIG_AUDIO_EXCLUDE_BALANCE
|
||||
int16_t balance; /* Current balance level */
|
||||
int16_t balance; /* Current balance level */
|
||||
#endif /* CONFIG_AUDIO_EXCLUDE_BALANCE */
|
||||
#endif /* CONFIG_AUDIO_EXCLUDE_VOLUME */
|
||||
#ifndef CONFIG_AUDIO_EXCLUDE_TONE
|
||||
uint8_t bass; /* Bass level */
|
||||
uint8_t treble; /* Bass level */
|
||||
uint8_t bass; /* Bass level */
|
||||
uint8_t treble; /* Bass level */
|
||||
#endif
|
||||
uint16_t endfillbytes;
|
||||
uint8_t endfillchar; /* Fill char to send when no more data */
|
||||
uint8_t endfillchar; /* Fill char to send when no more data */
|
||||
bool running;
|
||||
bool paused;
|
||||
bool endmode;
|
||||
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
|
||||
bool cancelmode;
|
||||
#endif
|
||||
bool busy; /* Set true when device reserved */
|
||||
bool busy; /* Set true when device reserved */
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -167,7 +167,7 @@ static int vs1053_resume(FAR struct audio_lowerhalf_s *lower,
|
|||
static int vs1053_reserve(FAR struct audio_lowerhalf_s *lower,
|
||||
FAR void** ppContext);
|
||||
static int vs1053_release(FAR struct audio_lowerhalf_s *lower,
|
||||
FAR void* pContext);
|
||||
FAR void *pContext);
|
||||
#else
|
||||
static int vs1053_configure(FAR struct audio_lowerhalf_s *lower,
|
||||
FAR const struct audio_caps_s *pCaps);
|
||||
|
@ -219,7 +219,10 @@ static const struct audio_ops_s g_audioops =
|
|||
|
||||
/* ISR context pointers */
|
||||
|
||||
static struct vs1053_struct_s* g_isrdata[CONFIG_VS1053_DEVICE_COUNT] = { NULL, };
|
||||
static struct vs1053_struct_s *g_isrdata[CONFIG_VS1053_DEVICE_COUNT] =
|
||||
{
|
||||
NULL,
|
||||
};
|
||||
|
||||
/* Volume control log table. This table is in increments of 2% of
|
||||
* requested volume level and is the register value that should be
|
||||
|
@ -1518,14 +1521,14 @@ static int vs1053_start(FAR struct audio_lowerhalf_s *lower)
|
|||
|
||||
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
|
||||
#ifdef CONFIG_AUDIO_MULTI_SESSION
|
||||
static int vs1053_stop(FAR struct audio_lowerhalf_s *lower, FAR void* session)
|
||||
static int vs1053_stop(FAR struct audio_lowerhalf_s *lower, FAR void *session)
|
||||
#else
|
||||
static int vs1053_stop(FAR struct audio_lowerhalf_s *lower)
|
||||
#endif
|
||||
{
|
||||
FAR struct vs1053_struct_s *dev = (struct vs1053_struct_s *) lower;
|
||||
struct audio_msg_s term_msg;
|
||||
FAR void* value;
|
||||
struct audio_msg_s term_msg;
|
||||
FAR void *value;
|
||||
|
||||
/* Send a message to stop all audio streaming */
|
||||
|
||||
|
@ -1562,7 +1565,7 @@ static int vs1053_stop(FAR struct audio_lowerhalf_s *lower)
|
|||
|
||||
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
|
||||
#ifdef CONFIG_AUDIO_MULTI_SESSION
|
||||
static int vs1053_pause(FAR struct audio_lowerhalf_s *lower, FAR void* session)
|
||||
static int vs1053_pause(FAR struct audio_lowerhalf_s *lower, FAR void *session)
|
||||
#else
|
||||
static int vs1053_pause(FAR struct audio_lowerhalf_s *lower)
|
||||
#endif
|
||||
|
@ -1591,7 +1594,7 @@ static int vs1053_pause(FAR struct audio_lowerhalf_s *lower)
|
|||
|
||||
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
|
||||
#ifdef CONFIG_AUDIO_MULTI_SESSION
|
||||
static int vs1053_resume(FAR struct audio_lowerhalf_s *lower, FAR void* session)
|
||||
static int vs1053_resume(FAR struct audio_lowerhalf_s *lower, FAR void *session)
|
||||
#else
|
||||
static int vs1053_resume(FAR struct audio_lowerhalf_s *lower)
|
||||
#endif
|
||||
|
@ -1620,9 +1623,9 @@ static int vs1053_resume(FAR struct audio_lowerhalf_s *lower)
|
|||
****************************************************************************/
|
||||
|
||||
static int vs1053_enqueuebuffer(FAR struct audio_lowerhalf_s *lower,
|
||||
FAR struct ap_buffer_s *apb )
|
||||
FAR struct ap_buffer_s *apb)
|
||||
{
|
||||
FAR struct vs1053_struct_s *dev = (struct vs1053_struct_s *) lower;
|
||||
FAR struct vs1053_struct_s *dev = (struct vs1053_struct_s *)lower;
|
||||
struct audio_msg_s term_msg;
|
||||
int ret;
|
||||
|
||||
|
@ -1661,7 +1664,7 @@ static int vs1053_enqueuebuffer(FAR struct audio_lowerhalf_s *lower,
|
|||
****************************************************************************/
|
||||
|
||||
static int vs1053_cancelbuffer(FAR struct audio_lowerhalf_s *lower,
|
||||
FAR struct ap_buffer_s *apb )
|
||||
FAR struct ap_buffer_s *apb)
|
||||
{
|
||||
return OK;
|
||||
}
|
||||
|
@ -1871,7 +1874,7 @@ struct audio_lowerhalf_s *vs1053_initialize(FAR struct spi_dev_s *spi,
|
|||
* for the DREQ to be active indicating the device is ready
|
||||
*/
|
||||
|
||||
retry = 200;;
|
||||
retry = 200;
|
||||
while (!lower->read_dreq(lower) && retry)
|
||||
{
|
||||
up_udelay(10);
|
||||
|
|
|
@ -133,7 +133,7 @@ static int wm8904_start(FAR struct audio_lowerhalf_s *dev);
|
|||
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
|
||||
#ifdef CONFIG_AUDIO_MULTI_SESSION
|
||||
static int wm8904_stop(FAR struct audio_lowerhalf_s *dev,
|
||||
FAR void* session);
|
||||
FAR void *session);
|
||||
#else
|
||||
static int wm8904_stop(FAR struct audio_lowerhalf_s *dev);
|
||||
#endif
|
||||
|
@ -141,9 +141,9 @@ static int wm8904_stop(FAR struct audio_lowerhalf_s *dev);
|
|||
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
|
||||
#ifdef CONFIG_AUDIO_MULTI_SESSION
|
||||
static int wm8904_pause(FAR struct audio_lowerhalf_s *dev,
|
||||
FAR void* session);
|
||||
FAR void *session);
|
||||
static int wm8904_resume(FAR struct audio_lowerhalf_s *dev,
|
||||
FAR void* session);
|
||||
FAR void *session);
|
||||
#else
|
||||
static int wm8904_pause(FAR struct audio_lowerhalf_s *dev);
|
||||
static int wm8904_resume(FAR struct audio_lowerhalf_s *dev);
|
||||
|
@ -232,7 +232,10 @@ const uint8_t g_sysclk_scaleb1[WM8904_BCLK_MAXDIV+1] =
|
|||
#ifndef CONFIG_WM8904_CLKDEBUG
|
||||
static
|
||||
#endif
|
||||
const uint8_t g_fllratio[WM8904_NFLLRATIO] = {1, 2, 4, 8, 16};
|
||||
const uint8_t g_fllratio[WM8904_NFLLRATIO] =
|
||||
{
|
||||
1, 2, 4, 8, 16
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
|
@ -726,7 +729,7 @@ static void wm8904_setbitrate(FAR struct wm8904_dev_s *priv)
|
|||
minfout = WM8904_FVCO_MAX / WM8904_MAXOUTDIV;
|
||||
divndx = 0;
|
||||
|
||||
for (;;)
|
||||
for (; ; )
|
||||
{
|
||||
/* Calculate the new value of Fout that we would need to provide
|
||||
* with this SYSCLK divider in place.
|
||||
|
@ -1585,7 +1588,7 @@ static int wm8904_start(FAR struct audio_lowerhalf_s *dev)
|
|||
|
||||
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
|
||||
#ifdef CONFIG_AUDIO_MULTI_SESSION
|
||||
static int wm8904_stop(FAR struct audio_lowerhalf_s *dev, FAR void* session)
|
||||
static int wm8904_stop(FAR struct audio_lowerhalf_s *dev, FAR void *session)
|
||||
#else
|
||||
static int wm8904_stop(FAR struct audio_lowerhalf_s *dev)
|
||||
#endif
|
||||
|
@ -1622,7 +1625,7 @@ static int wm8904_stop(FAR struct audio_lowerhalf_s *dev)
|
|||
|
||||
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
|
||||
#ifdef CONFIG_AUDIO_MULTI_SESSION
|
||||
static int wm8904_pause(FAR struct audio_lowerhalf_s *dev, FAR void* session)
|
||||
static int wm8904_pause(FAR struct audio_lowerhalf_s *dev, FAR void *session)
|
||||
#else
|
||||
static int wm8904_pause(FAR struct audio_lowerhalf_s *dev)
|
||||
#endif
|
||||
|
@ -1651,7 +1654,7 @@ static int wm8904_pause(FAR struct audio_lowerhalf_s *dev)
|
|||
|
||||
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
|
||||
#ifdef CONFIG_AUDIO_MULTI_SESSION
|
||||
static int wm8904_resume(FAR struct audio_lowerhalf_s *dev, FAR void* session)
|
||||
static int wm8904_resume(FAR struct audio_lowerhalf_s *dev, FAR void *session)
|
||||
#else
|
||||
static int wm8904_resume(FAR struct audio_lowerhalf_s *dev)
|
||||
#endif
|
||||
|
|
|
@ -394,7 +394,7 @@ void wm8904_clock_analysis(FAR struct audio_lowerhalf_s *dev,
|
|||
else
|
||||
{
|
||||
syslog(LOG_INFO, " MCLK_DIV: 2\n");
|
||||
sysclk >>=1;
|
||||
sysclk >>= 1;
|
||||
}
|
||||
|
||||
syslog(LOG_INFO, " SYSCLK: %lu (after divider)\n", (unsigned long)sysclk);
|
||||
|
|
|
@ -322,7 +322,7 @@ static int bch_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
|||
#if defined(CONFIG_BCH_ENCRYPTION)
|
||||
else if (cmd == DIOC_SETKEY)
|
||||
{
|
||||
memcpy(bch->key, (void*)arg, CONFIG_BCH_ENCRYPTION_KEY_SIZE);
|
||||
memcpy(bch->key, (FAR void *)arg, CONFIG_BCH_ENCRYPTION_KEY_SIZE);
|
||||
ret = OK;
|
||||
}
|
||||
#endif
|
||||
|
|
|
@ -91,13 +91,16 @@ static void bch_xor(uint32_t *R, uint32_t *A, uint32_t *B)
|
|||
static int bch_cypher(FAR struct bchlib_s *bch, int encrypt)
|
||||
{
|
||||
int blocks = bch->sectsize / 16;
|
||||
uint32_t *buffer = (uint32_t*)bch->buffer;
|
||||
FAR uint32_t *buffer = (FAR uint32_t *)bch->buffer;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < blocks; i++, buffer += 16 / sizeof(uint32_t) )
|
||||
{
|
||||
uint32_t T[4];
|
||||
uint32_t X[4] = {bch->sector, 0, 0, i};
|
||||
uint32_t X[4] =
|
||||
{
|
||||
bch->sector, 0, 0, i
|
||||
};
|
||||
|
||||
aes_cypher(X, X, 16, NULL, bch->key, CONFIG_BCH_ENCRYPTION_KEY_SIZE,
|
||||
AES_MODE_ECB, CYPHER_ENCRYPT);
|
||||
|
|
|
@ -148,7 +148,7 @@ ssize_t bchlib_read(FAR void *handle, FAR char *buffer, size_t offset, size_t le
|
|||
* into the user buffer.
|
||||
*/
|
||||
|
||||
if (len >= bch->sectsize )
|
||||
if (len >= bch->sectsize)
|
||||
{
|
||||
nsectors = len / bch->sectsize;
|
||||
if (sector + nsectors > bch->nsectors)
|
||||
|
|
|
@ -93,7 +93,7 @@ int bchlib_setup(const char *blkdev, bool readonly, FAR void **handle)
|
|||
|
||||
/* Allocate the BCH state structure */
|
||||
|
||||
bch = (FAR struct bchlib_s*)kmm_zalloc(sizeof(struct bchlib_s));
|
||||
bch = (FAR struct bchlib_s *)kmm_zalloc(sizeof(struct bchlib_s));
|
||||
if (!bch)
|
||||
{
|
||||
fdbg("Failed to allocate BCH structure\n");
|
||||
|
|
|
@ -148,7 +148,7 @@ ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset, si
|
|||
* directly from the user buffer.
|
||||
*/
|
||||
|
||||
if (len >= bch->sectsize )
|
||||
if (len >= bch->sectsize)
|
||||
{
|
||||
nsectors = len / bch->sectsize;
|
||||
if (sector + nsectors > bch->nsectors)
|
||||
|
|
|
@ -795,7 +795,7 @@ static int can_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
|||
*/
|
||||
|
||||
case CANIOC_RTR:
|
||||
ret = can_rtrread(dev, (struct canioc_rtr_s*)((uintptr_t)arg));
|
||||
ret = can_rtrread(dev, (FAR struct canioc_rtr_s *)((uintptr_t)arg));
|
||||
break;
|
||||
|
||||
/* Not a "built-in" ioctl command.. perhaps it is unique to this
|
||||
|
|
|
@ -50,11 +50,13 @@
|
|||
* Private Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
static ssize_t devnull_read(FAR struct file *, FAR char *, size_t);
|
||||
static ssize_t devnull_write(FAR struct file *, FAR const char *, size_t);
|
||||
static ssize_t devnull_read(FAR struct file *filep, FAR char *buffer,
|
||||
size_t buflen);
|
||||
static ssize_t devnull_write(FAR struct file *filep, FAR const char *buffer,
|
||||
size_t buflen);
|
||||
#ifndef CONFIG_DISABLE_POLL
|
||||
static int devnull_poll(FAR struct file *filep, FAR struct pollfd *fds,
|
||||
bool setup);
|
||||
bool setup);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -106,7 +108,7 @@ static int devnull_poll(FAR struct file *filep, FAR struct pollfd *fds,
|
|||
{
|
||||
if (setup)
|
||||
{
|
||||
fds->revents |= (fds->events & (POLLIN|POLLOUT));
|
||||
fds->revents |= (fds->events & (POLLIN | POLLOUT));
|
||||
if (fds->revents != 0)
|
||||
{
|
||||
sem_post(fds->sem);
|
||||
|
|
|
@ -50,11 +50,13 @@
|
|||
* Private Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
static ssize_t devzero_read(FAR struct file *, FAR char *, size_t);
|
||||
static ssize_t devzero_write(FAR struct file *, FAR const char *, size_t);
|
||||
static ssize_t devzero_read(FAR struct file *filep, FAR char *buffer,
|
||||
size_t buflen);
|
||||
static ssize_t devzero_write(FAR struct file *filep, FAR const char *buffer,
|
||||
size_t buflen);
|
||||
#ifndef CONFIG_DISABLE_POLL
|
||||
static int devzero_poll(FAR struct file *filep, FAR struct pollfd *fds,
|
||||
bool setup);
|
||||
bool setup);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -109,7 +111,7 @@ static int devzero_poll(FAR struct file *filep, FAR struct pollfd *fds,
|
|||
{
|
||||
if (setup)
|
||||
{
|
||||
fds->revents |= (fds->events & (POLLIN|POLLOUT));
|
||||
fds->revents |= (fds->events & (POLLIN | POLLOUT));
|
||||
if (fds->revents != 0)
|
||||
{
|
||||
sem_post(fds->sem);
|
||||
|
|
|
@ -173,10 +173,10 @@
|
|||
|
||||
struct ee25xx_geom_s
|
||||
{
|
||||
uint8_t bytes : 4; /*power of two of 128 bytes (0:128 1:256 2:512 etc) */
|
||||
uint8_t pagesize : 4; /*power of two of 8 bytes (0:8 1:16 2:32 3:64 etc)*/
|
||||
uint8_t addrlen : 4; /*number of bytes in command address field */
|
||||
uint8_t flags : 4; /*special address management for 25xx040, 1=A8 in inst*/
|
||||
uint8_t bytes : 4; /* Power of two of 128 bytes (0:128 1:256 2:512 etc) */
|
||||
uint8_t pagesize : 4; /* Power of two of 8 bytes (0:8 1:16 2:32 3:64 etc) */
|
||||
uint8_t addrlen : 4; /* Number of bytes in command address field */
|
||||
uint8_t flags : 4; /* Special address management for 25xx040, 1=A8 in inst */
|
||||
};
|
||||
|
||||
/* Private data attached to the inode */
|
||||
|
@ -219,29 +219,29 @@ static const struct ee25xx_geom_s g_ee25xx_devices[] =
|
|||
{
|
||||
/* Microchip devices */
|
||||
|
||||
{ 0, 1, 1, 0}, /* 25xx010A 128 16 1*/
|
||||
{ 1, 1, 1, 0}, /* 25xx020A 256 16 1*/
|
||||
{ 2, 1, 1, 1}, /* 25xx040 512 16 1+bit*/
|
||||
{ 3, 1, 1, 0}, /* 25xx080 1024 16 1*/
|
||||
{ 3, 2, 2, 0}, /* 25xx080B 1024 32 2*/
|
||||
{ 4, 1, 2, 0}, /* 25xx160 2048 16 2*/
|
||||
{ 4, 2, 2, 0}, /* 25xx160B/D 2048 32 2*/
|
||||
{ 5, 2, 2, 0}, /* 25xx320 4096 32 2*/
|
||||
{ 6, 2, 2, 0}, /* 25xx640 8192 32 2*/
|
||||
{ 7, 3, 2, 0}, /* 25xx128 16384 64 2*/
|
||||
{ 8, 3, 2, 0}, /* 25xx256 32768 64 2*/
|
||||
{ 9, 4, 2, 0}, /* 25xx512 65536 128 2*/
|
||||
{10, 5, 3, 0}, /* 25xx1024 131072 256 3*/
|
||||
{ 0, 1, 1, 0}, /* 25xx010A 128 16 1 */
|
||||
{ 1, 1, 1, 0}, /* 25xx020A 256 16 1 */
|
||||
{ 2, 1, 1, 1}, /* 25xx040 512 16 1+bit */
|
||||
{ 3, 1, 1, 0}, /* 25xx080 1024 16 1 */
|
||||
{ 3, 2, 2, 0}, /* 25xx080B 1024 32 2 */
|
||||
{ 4, 1, 2, 0}, /* 25xx160 2048 16 2 */
|
||||
{ 4, 2, 2, 0}, /* 25xx160B/D 2048 32 2 */
|
||||
{ 5, 2, 2, 0}, /* 25xx320 4096 32 2 */
|
||||
{ 6, 2, 2, 0}, /* 25xx640 8192 32 2 */
|
||||
{ 7, 3, 2, 0}, /* 25xx128 16384 64 2 */
|
||||
{ 8, 3, 2, 0}, /* 25xx256 32768 64 2 */
|
||||
{ 9, 4, 2, 0}, /* 25xx512 65536 128 2 */
|
||||
{10, 5, 3, 0}, /* 25xx1024 131072 256 3 */
|
||||
|
||||
/* Atmel devices */
|
||||
|
||||
{ 0, 0, 1, 0}, /* AT25010B 128 8 1*/
|
||||
{ 1, 0, 1, 0}, /* AT25020B 256 8 1*/
|
||||
{ 2, 0, 1, 1}, /* AT25040B 512 8 1+bit*/
|
||||
{ 0, 0, 1, 0}, /* AT25010B 128 8 1 */
|
||||
{ 1, 0, 1, 0}, /* AT25020B 256 8 1 */
|
||||
{ 2, 0, 1, 1}, /* AT25040B 512 8 1+bit */
|
||||
|
||||
/* STM devices */
|
||||
|
||||
{11, 5, 3, 0}, /* M95M02 262144 256 3*/
|
||||
{11, 5, 3, 0}, /* M95M02 262144 256 3 */
|
||||
};
|
||||
|
||||
/* Driver operations */
|
||||
|
@ -337,7 +337,7 @@ static void ee25xx_sendcmd(FAR struct spi_dev_s *spi, uint8_t cmd,
|
|||
|
||||
buf[cmdlen++] = addr & 0xff;
|
||||
|
||||
SPI_SNDBLOCK(spi,buf,cmdlen);
|
||||
SPI_SNDBLOCK(spi, buf, cmdlen);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -488,7 +488,7 @@ static int ee25xx_open(FAR struct file *filep)
|
|||
|
||||
/* Increment the reference count */
|
||||
|
||||
if ( (eedev->refs + 1) == 0)
|
||||
if ((eedev->refs + 1) == 0)
|
||||
{
|
||||
ret = -EMFILE;
|
||||
}
|
||||
|
@ -678,7 +678,7 @@ static ssize_t ee25xx_write(FAR struct file *filep, FAR const char *buffer,
|
|||
|
||||
/* Clamp len to avoid crossing the end of the memory */
|
||||
|
||||
if ( (len + filep->f_pos) > eedev->size)
|
||||
if ((len + filep->f_pos) > eedev->size)
|
||||
{
|
||||
len = eedev->size - filep->f_pos;
|
||||
}
|
||||
|
@ -807,7 +807,7 @@ int ee25xx_initialize(FAR struct spi_dev_s *dev, FAR char *devname,
|
|||
eedev->size = 128 << g_ee25xx_devices[devtype].bytes;
|
||||
eedev->pgsize = 8 << g_ee25xx_devices[devtype].pagesize;
|
||||
eedev->addrlen = g_ee25xx_devices[devtype].addrlen << 3;
|
||||
if ( (g_ee25xx_devices[devtype].flags & 1))
|
||||
if ((g_ee25xx_devices[devtype].flags & 1))
|
||||
{
|
||||
eedev->addrlen = 9;
|
||||
}
|
||||
|
|
|
@ -395,7 +395,7 @@ static int ads7843e_sample(FAR struct ads7843e_dev_s *priv,
|
|||
* sampled data.
|
||||
*/
|
||||
|
||||
memcpy(sample, &priv->sample, sizeof(struct ads7843e_sample_s ));
|
||||
memcpy(sample, &priv->sample, sizeof(struct ads7843e_sample_s));
|
||||
|
||||
/* Now manage state transitions */
|
||||
|
||||
|
@ -480,7 +480,7 @@ static int ads7843e_waitsample(FAR struct ads7843e_dev_s *priv,
|
|||
|
||||
ivdbg("Sampled\n");
|
||||
|
||||
/* Re-acquire the semaphore that manages mutually exclusive access to
|
||||
/* Re-acquire the semaphore that manages mutually exclusive access to
|
||||
* the device structure. We may have to wait here. But we have our sample.
|
||||
* Interrupts and pre-emption will be re-enabled while we wait.
|
||||
*/
|
||||
|
@ -974,10 +974,10 @@ static ssize_t ads7843e_read(FAR struct file *filep, FAR char *buffer, size_t le
|
|||
|
||||
if (sample.contact == CONTACT_UP)
|
||||
{
|
||||
/* Pen is now up. Is the positional data valid? This is important to
|
||||
* know because the release will be sent to the window based on its
|
||||
* last positional data.
|
||||
*/
|
||||
/* Pen is now up. Is the positional data valid? This is important to
|
||||
* know because the release will be sent to the window based on its
|
||||
* last positional data.
|
||||
*/
|
||||
|
||||
if (sample.valid)
|
||||
{
|
||||
|
|
|
@ -143,7 +143,8 @@ static void ajoy_sample(FAR struct ajoy_upperhalf_s *priv);
|
|||
|
||||
static int ajoy_open(FAR struct file *filep);
|
||||
static int ajoy_close(FAR struct file *filep);
|
||||
static ssize_t ajoy_read(FAR struct file *, FAR char *, size_t);
|
||||
static ssize_t ajoy_read(FAR struct file *filep, FAR char *buffer,
|
||||
size_t buflen);
|
||||
static int ajoy_ioctl(FAR struct file *filep, int cmd,
|
||||
unsigned long arg);
|
||||
#ifndef CONFIG_DISABLE_POLL
|
||||
|
|
|
@ -143,7 +143,8 @@ static void djoy_sample(FAR struct djoy_upperhalf_s *priv);
|
|||
|
||||
static int djoy_open(FAR struct file *filep);
|
||||
static int djoy_close(FAR struct file *filep);
|
||||
static ssize_t djoy_read(FAR struct file *, FAR char *, size_t);
|
||||
static ssize_t djoy_read(FAR struct file *filep, FAR char *buffer,
|
||||
size_t buflen);
|
||||
static int djoy_ioctl(FAR struct file *filep, int cmd,
|
||||
unsigned long arg);
|
||||
#ifndef CONFIG_DISABLE_POLL
|
||||
|
@ -585,7 +586,7 @@ static ssize_t djoy_read(FAR struct file *filep, FAR char *buffer,
|
|||
lower = priv->du_lower;
|
||||
DEBUGASSERT(lower && lower->dl_sample);
|
||||
priv->du_sample = lower->dl_sample(lower);
|
||||
*(djoy_buttonset_t*)buffer = priv->du_sample;
|
||||
*(FAR djoy_buttonset_t *)buffer = priv->du_sample;
|
||||
ret = sizeof(djoy_buttonset_t);
|
||||
|
||||
djoy_givesem(&priv->du_exclsem);
|
||||
|
|
|
@ -285,7 +285,7 @@ static uint16_t max11802_sendcmd(FAR struct max11802_dev_s *priv,
|
|||
|
||||
result = ((uint16_t)buffer[0] << 8) | (uint16_t)buffer[1];
|
||||
*tags = result & 0xF;
|
||||
result >>= 4; // Get rid of tags
|
||||
result >>= 4; /* Get rid of tags */
|
||||
|
||||
ivdbg("cmd:%02x response:%04x\n", cmd, result);
|
||||
return result;
|
||||
|
@ -359,7 +359,7 @@ static int max11802_sample(FAR struct max11802_dev_s *priv,
|
|||
* sampled data.
|
||||
*/
|
||||
|
||||
memcpy(sample, &priv->sample, sizeof(struct max11802_sample_s ));
|
||||
memcpy(sample, &priv->sample, sizeof(struct max11802_sample_s));
|
||||
|
||||
/* Now manage state transitions */
|
||||
|
||||
|
@ -980,10 +980,10 @@ static ssize_t max11802_read(FAR struct file *filep, FAR char *buffer,
|
|||
|
||||
if (sample.contact == CONTACT_UP)
|
||||
{
|
||||
/* Pen is now up. Is the positional data valid? This is important to
|
||||
* know because the release will be sent to the window based on its
|
||||
* last positional data.
|
||||
*/
|
||||
/* Pen is now up. Is the positional data valid? This is important to
|
||||
* know because the release will be sent to the window based on its
|
||||
* last positional data.
|
||||
*/
|
||||
|
||||
if (sample.valid)
|
||||
{
|
||||
|
|
|
@ -92,8 +92,8 @@
|
|||
*/
|
||||
|
||||
#define MXT_GETUINT16(p) \
|
||||
(((uint16_t)(((FAR uint8_t*)(p))[1]) << 8) | \
|
||||
(uint16_t)(((FAR uint8_t*)(p))[0]))
|
||||
(((uint16_t)(((FAR uint8_t *)(p))[1]) << 8) | \
|
||||
(uint16_t)(((FAR uint8_t *)(p))[0]))
|
||||
|
||||
/****************************************************************************
|
||||
* Private Types
|
||||
|
@ -1368,7 +1368,7 @@ static ssize_t mxt_read(FAR struct file *filep, FAR char *buffer, size_t len)
|
|||
memset(report, 0, SIZEOF_TOUCH_SAMPLE_S(ncontacts));
|
||||
report->npoints = ncontacts;
|
||||
|
||||
for (i = 0, j= 0; i < priv->nslots && j < ncontacts; i++)
|
||||
for (i = 0, j = 0; i < priv->nslots && j < ncontacts; i++)
|
||||
{
|
||||
FAR struct mxt_sample_s *sample = &priv->sample[i];
|
||||
|
||||
|
|
|
@ -101,7 +101,7 @@ static void stmpe811_worker(FAR void *arg)
|
|||
/* Check for a touchscreen interrupt */
|
||||
|
||||
#ifndef CONFIG_STMPE811_TSC_DISABLE
|
||||
if ((regval & (INT_TOUCH_DET|INT_FIFO_TH|INT_FIFO_OFLOW)) != 0)
|
||||
if ((regval & (INT_TOUCH_DET | INT_FIFO_TH | INT_FIFO_OFLOW)) != 0)
|
||||
{
|
||||
/* Dispatch the touchscreen interrupt if it was brought into the link */
|
||||
|
||||
|
@ -112,8 +112,9 @@ static void stmpe811_worker(FAR void *arg)
|
|||
stmpe811_tscworker(priv, regval);
|
||||
}
|
||||
|
||||
stmpe811_putreg8(priv, STMPE811_INT_STA, (INT_TOUCH_DET|INT_FIFO_TH|INT_FIFO_OFLOW));
|
||||
regval &= ~(INT_TOUCH_DET|INT_FIFO_TH|INT_FIFO_OFLOW);
|
||||
stmpe811_putreg8(priv, STMPE811_INT_STA,
|
||||
(INT_TOUCH_DET | INT_FIFO_TH | INT_FIFO_OFLOW));
|
||||
regval &= ~(INT_TOUCH_DET | INT_FIFO_TH | INT_FIFO_OFLOW);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -101,7 +101,8 @@ int stmpe811_tempinitialize(STMPE811_HANDLE handle)
|
|||
|
||||
/* Aquire data enable */
|
||||
|
||||
stmpe811_putreg8(priv, STMPE811_TEMP_CTRL, (TEMP_CTRL_ACQ|TEMP_CTRL_ENABLE));
|
||||
stmpe811_putreg8(priv, STMPE811_TEMP_CTRL,
|
||||
(TEMP_CTRL_ACQ | TEMP_CTRL_ENABLE));
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
@ -130,7 +131,8 @@ uint16_t stmpe811_tempread(STMPE811_HANDLE handle)
|
|||
|
||||
/* Acquire data enable */
|
||||
|
||||
stmpe811_putreg8(priv, STMPE811_TEMP_CTRL, (TEMP_CTRL_ACQ|TEMP_CTRL_ENABLE));
|
||||
stmpe811_putreg8(priv, STMPE811_TEMP_CTRL,
|
||||
(TEMP_CTRL_ACQ | TEMP_CTRL_ENABLE));
|
||||
|
||||
/* Read the temperature */
|
||||
|
||||
|
|
|
@ -307,7 +307,7 @@ static inline int stmpe811_waitsample(FAR struct stmpe811_dev_s *priv,
|
|||
if (ret < 0)
|
||||
{
|
||||
#ifdef CONFIG_DEBUG
|
||||
// Sample the errno (debug output could change it)
|
||||
/* Sample the errno (debug output could change it) */
|
||||
|
||||
int errval = errno;
|
||||
|
||||
|
@ -577,11 +577,11 @@ errout:
|
|||
|
||||
/****************************************************************************
|
||||
* Name: stmpe811_ioctl
|
||||
*
|
||||
*
|
||||
* Description:
|
||||
* Standard character driver ioctl method.
|
||||
*
|
||||
****************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
static int stmpe811_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
||||
{
|
||||
|
@ -860,7 +860,7 @@ static inline void stmpe811_tscinitialize(FAR struct stmpe811_dev_s *priv)
|
|||
stmpe811_putreg8(priv, STMPE811_TSC_IDRIVE, TSC_IDRIVE_50MA);
|
||||
|
||||
/* Enable the TSC. Use no tracking index, touch-screen controller
|
||||
* operation mode (XYZ).
|
||||
* operation mode (XYZ).
|
||||
*/
|
||||
|
||||
stmpe811_putreg8(priv, STMPE811_TSC_CTRL, TSC_CTRL_EN);
|
||||
|
@ -1019,7 +1019,7 @@ void stmpe811_tscworker(FAR struct stmpe811_dev_s *priv, uint8_t intsta)
|
|||
|
||||
/* The pen is down... check for data in the FIFO */
|
||||
|
||||
else if ((intsta & (INT_FIFO_TH|INT_FIFO_OFLOW)) != 0)
|
||||
else if ((intsta & (INT_FIFO_TH | INT_FIFO_OFLOW)) != 0)
|
||||
{
|
||||
/* Read the next x and y positions from the FIFO. */
|
||||
|
||||
|
|
|
@ -309,7 +309,7 @@ static int tsc2007_sample(FAR struct tsc2007_dev_s *priv,
|
|||
* sampled data.
|
||||
*/
|
||||
|
||||
memcpy(sample, &priv->sample, sizeof(struct tsc2007_sample_s ));
|
||||
memcpy(sample, &priv->sample, sizeof(struct tsc2007_sample_s));
|
||||
|
||||
/* Now manage state transitions */
|
||||
|
||||
|
@ -539,10 +539,10 @@ static int tsc2007_transfer(FAR struct tsc2007_dev_s *priv, uint8_t cmd)
|
|||
return ret;
|
||||
}
|
||||
|
||||
/* Get the MS 8 bits from the first byte and the remaining LS 4 bits from
|
||||
* the second byte. The valid range of data is then from 0 to 4095 with
|
||||
* the LSB unit corresponding to Vref/4096.
|
||||
*/
|
||||
/* Get the MS 8 bits from the first byte and the remaining LS 4 bits from
|
||||
* the second byte. The valid range of data is then from 0 to 4095 with
|
||||
* the LSB unit corresponding to Vref/4096.
|
||||
*/
|
||||
|
||||
ret = (unsigned int)data12[0] << 4 | (unsigned int)data12[1] >> 4;
|
||||
ivdbg("data: 0x%04x\n", ret);
|
||||
|
@ -971,8 +971,8 @@ static ssize_t tsc2007_read(FAR struct file *filep, FAR char *buffer, size_t len
|
|||
|
||||
if (sample.contact == CONTACT_UP)
|
||||
{
|
||||
/* Pen is now up. Is the positional data valid? This is important to
|
||||
* know because the release will be sent to the window based on its
|
||||
/* Pen is now up. Is the positional data valid? This is important to
|
||||
* know because the release will be sent to the window based on its
|
||||
* last positional data.
|
||||
*/
|
||||
|
||||
|
|
|
@ -215,7 +215,7 @@ static int pca9555_getbit(FAR struct i2c_dev_s *i2c, uint8_t addr,
|
|||
static int pca9555_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
|
||||
int direction)
|
||||
{
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
|
||||
return pca9555_setbit(pca->i2c, PCA9555_REG_CONFIG, pin,
|
||||
(direction == IOEXPANDER_DIRECTION_IN));
|
||||
}
|
||||
|
@ -231,7 +231,7 @@ static int pca9555_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
|
|||
static int pca9555_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
|
||||
int opt, void *val)
|
||||
{
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
|
||||
int ival = (int)val;
|
||||
|
||||
if (opt == IOEXPANDER_OPTION_INVERT)
|
||||
|
@ -253,7 +253,7 @@ static int pca9555_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
|
|||
static int pca9555_write(FAR struct ioexpander_dev_s *dev, uint8_t pin,
|
||||
bool value)
|
||||
{
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
|
||||
return pca9555_setbit(pca->i2c, PCA9555_REG_OUTPUT, pin, value);
|
||||
}
|
||||
|
||||
|
@ -268,7 +268,7 @@ static int pca9555_write(FAR struct ioexpander_dev_s *dev, uint8_t pin,
|
|||
static int pca9555_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
|
||||
FAR bool *value)
|
||||
{
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
|
||||
return pca9555_getbit(pca->i2c, PCA9555_REG_INPUT, pin, value);
|
||||
}
|
||||
|
||||
|
@ -283,7 +283,7 @@ static int pca9555_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
|
|||
static int pca9555_readbuf(FAR struct ioexpander_dev_s *dev, uint8_t pin,
|
||||
FAR bool *value)
|
||||
{
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
|
||||
return pca9555_getbit(pca->i2c, PCA9555_REG_OUTPUT, pin, value);
|
||||
}
|
||||
|
||||
|
@ -348,7 +348,7 @@ static int pca9555_multiwrite(FAR struct ioexpander_dev_s *dev,
|
|||
FAR uint8_t *pins, FAR bool *values,
|
||||
int count)
|
||||
{
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
|
||||
uint8_t addr = PCA9555_REG_OUTPUT;
|
||||
uint8_t buf[3];
|
||||
int ret;
|
||||
|
@ -410,7 +410,7 @@ static int pca9555_multireadpin(FAR struct ioexpander_dev_s *dev,
|
|||
FAR uint8_t *pins, FAR bool *values,
|
||||
int count)
|
||||
{
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
|
||||
return pca9555_getmultibits(pca->i2c, PCA9555_REG_INPUT,
|
||||
pins, values, count);
|
||||
}
|
||||
|
@ -427,7 +427,7 @@ static int pca9555_multireadbuf(FAR struct ioexpander_dev_s *dev,
|
|||
FAR uint8_t *pins, FAR bool *values,
|
||||
int count)
|
||||
{
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
|
||||
return pca9555_getmultibits(pca->i2c, PCA9555_REG_OUTPUT,
|
||||
pins, values, count);
|
||||
}
|
||||
|
@ -447,7 +447,7 @@ static int pca9555_multireadbuf(FAR struct ioexpander_dev_s *dev,
|
|||
static int pca9555_attach(FAR struct ioexpander_dev_s *dev, uint8_t pin,
|
||||
ioexpander_handler_t handler)
|
||||
{
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s*)dev;
|
||||
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -62,8 +62,7 @@
|
|||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/*
|
||||
* This is the generic lcd driver interface for the ili9341 Single Chip LCD
|
||||
/* This is the generic lcd driver interface for the ili9341 Single Chip LCD
|
||||
* driver. The driver supports multiple displays, each connected with an own
|
||||
* ili9341 Single Chip LCD driver. The communication with the LCD single chip
|
||||
* driver must be provide by a subdriver accessable trough the ili9341_dev_s
|
||||
|
@ -157,8 +156,7 @@
|
|||
|
||||
/* Memory access control (MADCTL) */
|
||||
|
||||
/*
|
||||
* Landscape: 00100000 / 00101000 / h28
|
||||
/* Landscape: 00100000 / 00101000 / h28
|
||||
*
|
||||
* MY: 0
|
||||
* MX: 0
|
||||
|
@ -186,8 +184,7 @@
|
|||
ILI9341_MADCTL_LANDSCAPE_BGR | \
|
||||
ILI9341_MADCTL_LANDSCAPE_MH)
|
||||
|
||||
/*
|
||||
* Portrait: 00000000 / 00001000 / h08
|
||||
/* Portrait: 00000000 / 00001000 / h08
|
||||
*
|
||||
* MY: 0
|
||||
* MX: 0
|
||||
|
@ -214,8 +211,7 @@
|
|||
ILI9341_MADCTL_PORTRAIT_ML | \
|
||||
ILI9341_MADCTL_PORTRAIT_BGR | \
|
||||
ILI9341_MADCTL_PORTRAIT_MH)
|
||||
/*
|
||||
* RLandscape: 01100000 / 01101000 / h68
|
||||
/* RLandscape: 01100000 / 01101000 / h68
|
||||
*
|
||||
* MY: 0
|
||||
* MX: 1
|
||||
|
@ -244,8 +240,7 @@
|
|||
ILI9341_MADCTL_RLANDSCAPE_BGR | \
|
||||
ILI9341_MADCTL_RLANDSCAPE_MH)
|
||||
|
||||
/*
|
||||
* RPortrait: 11000000 / 11001000 / hc8
|
||||
/* RPortrait: 11000000 / 11001000 / hc8
|
||||
*
|
||||
* MY: 1
|
||||
* MX: 1
|
||||
|
@ -292,8 +287,7 @@
|
|||
#define ILI9341_PIXSET_16BITMCU_PARAM1 (ILI9341_PIXSET_16BITDPI | \
|
||||
ILI9341_PIXSET_16BITDBI)
|
||||
|
||||
/*
|
||||
* 18-bit MCU: 01100110 / h66 (not supported by nuttx until now)
|
||||
/* 18-bit MCU: 01100110 / h66 (not supported by nuttx until now)
|
||||
*
|
||||
* DPI: 6 (RGB18-666 RGB interface)
|
||||
* DBI: 6 (RGB18-666 MCU interface)
|
||||
|
@ -387,8 +381,7 @@
|
|||
* Private Type Definition
|
||||
****************************************************************************/
|
||||
|
||||
/*
|
||||
* Each single connected ili9341 LCD driver needs an own driver instance
|
||||
/* Each single connected ili9341 LCD driver needs an own driver instance
|
||||
* to provide a unique getrun and putrun method. Also store fundamental
|
||||
* parameter in driver internal structure. This minimal overhead should be
|
||||
* acceptable.
|
||||
|
@ -453,14 +446,14 @@ static int ili9341_putrun(int devno, fb_coord_t row, fb_coord_t col,
|
|||
static int ili9341_getrun(int devno, fb_coord_t row, fb_coord_t col,
|
||||
FAR uint8_t * buffer, size_t npixels);
|
||||
#endif
|
||||
/*
|
||||
* Definition of the public visible getrun / putrun methods
|
||||
|
||||
/* Definition of the public visible getrun / putrun methods
|
||||
* each for a single LCD driver
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_LCD_ILI9341_IFACE0
|
||||
static int ili9341_putrun0(fb_coord_t row, fb_coord_t col,
|
||||
FAR const uint8_t * buffer, size_t npixsels);
|
||||
FAR const uint8_t *buffer, size_t npixsels);
|
||||
#endif
|
||||
#ifdef CONFIG_LCD_ILI9341_IFACE1
|
||||
static int ili9341_putrun1(fb_coord_t row, fb_coord_t col,
|
||||
|
@ -659,7 +652,7 @@ static int ili9341_putrun(int devno, fb_coord_t row, fb_coord_t col,
|
|||
{
|
||||
FAR struct ili9341_dev_s *dev = &g_lcddev[devno];
|
||||
FAR struct ili9341_lcd_s *lcd = dev->lcd;
|
||||
FAR const uint16_t *src = (const uint16_t*)buffer;
|
||||
FAR const uint16_t *src = (FAR const uint16_t *)buffer;
|
||||
|
||||
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
|
||||
|
||||
|
@ -720,7 +713,7 @@ static int ili9341_getrun(int devno, fb_coord_t row, fb_coord_t col,
|
|||
{
|
||||
FAR struct ili9341_dev_s *dev = &g_lcddev[devno];
|
||||
FAR struct ili9341_lcd_s *lcd = dev->lcd;
|
||||
FAR uint16_t *dest = (uint16_t*)buffer;
|
||||
FAR uint16_t *dest = (FAR uint16_t *)buffer;
|
||||
|
||||
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
|
||||
|
||||
|
@ -994,7 +987,7 @@ static int ili9341_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
|
|||
pinfo->getrun = priv->getrun;
|
||||
#endif
|
||||
pinfo->bpp = priv->bpp;
|
||||
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */
|
||||
pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
|
||||
|
||||
lcdvdbg("planeno: %d bpp: %d\n", planeno, pinfo->bpp);
|
||||
|
||||
|
|
|
@ -333,15 +333,13 @@ static inline void memlcd_select(FAR struct spi_dev_s *spi)
|
|||
#else
|
||||
static void memlcd_select(FAR struct spi_dev_s *spi)
|
||||
{
|
||||
/*
|
||||
* Select memlcd (locking the SPI bus in case there are multiple
|
||||
/* Select memlcd (locking the SPI bus in case there are multiple
|
||||
* devices competing for the SPI bus
|
||||
*/
|
||||
SPI_LOCK(spi, true);
|
||||
SPI_SELECT(spi, SPIDEV_DISPLAY, true);
|
||||
|
||||
/*
|
||||
* Now make sure that the SPI bus is configured for the memlcd (it
|
||||
/* Now make sure that the SPI bus is configured for the memlcd (it
|
||||
* might have gotten configured for a different device while unlocked)
|
||||
*/
|
||||
SPI_SETMODE(spi, MEMLCD_SPI_MODE);
|
||||
|
@ -435,9 +433,8 @@ static int memlcd_extcominisr(int irq, FAR void *context)
|
|||
struct memlcd_dev_s *mlcd = &g_memlcddev;
|
||||
#ifdef CONFIG_MEMLCD_EXTCOMIN_MODE_HW
|
||||
# error "CONFIG_MEMLCD_EXTCOMIN_MODE_HW unsupported yet!"
|
||||
/*
|
||||
* start a worker thread, do it in bottom half?
|
||||
*/
|
||||
/* Start a worker thread, do it in bottom half? */
|
||||
|
||||
#else
|
||||
pol = !pol;
|
||||
mlcd->priv->setpolarity(pol);
|
||||
|
|
|
@ -529,7 +529,7 @@ static int mio283qt2_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *b
|
|||
{
|
||||
FAR struct mio283qt2_dev_s *priv = &g_lcddev;
|
||||
FAR struct mio283qt2_lcd_s *lcd = priv->lcd;
|
||||
FAR const uint16_t *src = (FAR const uint16_t*)buffer;
|
||||
FAR const uint16_t *src = (FAR const uint16_t *)buffer;
|
||||
int i;
|
||||
|
||||
/* Buffer must be provided and aligned to a 16-bit address boundary */
|
||||
|
@ -578,7 +578,7 @@ static int mio283qt2_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
|
|||
#ifndef CONFIG_LCD_NOGETRUN
|
||||
FAR struct mio283qt2_dev_s *priv = &g_lcddev;
|
||||
FAR struct mio283qt2_lcd_s *lcd = priv->lcd;
|
||||
FAR uint16_t *dest = (FAR uint16_t*)buffer;
|
||||
FAR uint16_t *dest = (FAR uint16_t *)buffer;
|
||||
uint16_t accum;
|
||||
int i;
|
||||
|
||||
|
@ -658,10 +658,10 @@ static int mio283qt2_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planen
|
|||
DEBUGASSERT(dev && pinfo && planeno == 0);
|
||||
lcdvdbg("planeno: %d bpp: %d\n", planeno, MIO283QT2_BPP);
|
||||
|
||||
pinfo->putrun = mio283qt2_putrun; /* Put a run into LCD memory */
|
||||
pinfo->getrun = mio283qt2_getrun; /* Get a run from LCD memory */
|
||||
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */
|
||||
pinfo->bpp = MIO283QT2_BPP; /* Bits-per-pixel */
|
||||
pinfo->putrun = mio283qt2_putrun; /* Put a run into LCD memory */
|
||||
pinfo->getrun = mio283qt2_getrun; /* Get a run from LCD memory */
|
||||
pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
|
||||
pinfo->bpp = MIO283QT2_BPP; /* Bits-per-pixel */
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
|
|
@ -382,16 +382,15 @@ static inline uint16_t mio283qt9a_gramread(FAR struct mio283qt9a_lcd_s *lcd,
|
|||
static void mio283qt9a_setarea(FAR struct mio283qt9a_lcd_s *lcd,
|
||||
uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1)
|
||||
{
|
||||
//lcddbg("setarea x0=%d, y0=%d, x1=%d, y1=%d\n", x0, y0, x1, y1);
|
||||
mio283qt9a_putreg(lcd, 0x2a, (x0 >> 8)); /* Set column address x0 */
|
||||
lcd->write(lcd, (x0 & 0xff)); /* Set x0 */
|
||||
lcd->write(lcd, (x1 >> 8)); /* Set x1 */
|
||||
lcd->write(lcd, (x1 & 0xff)); /* Set x1 */
|
||||
|
||||
mio283qt9a_putreg(lcd, 0x2a, (x0 >> 8)); /* set column address x0 */
|
||||
lcd->write(lcd, (x0 & 0xff)); /* set x0 */
|
||||
lcd->write(lcd, (x1 >> 8)); /* set x1 */
|
||||
lcd->write(lcd, (x1 & 0xff)); /* set x1 */
|
||||
mio283qt9a_putreg(lcd, 0x2b, (y0 >> 8)); /* set page address y0 */
|
||||
lcd->write(lcd, (y0 & 0xff)); /* set y0 */
|
||||
lcd->write(lcd, (y1 >> 8)); /* set y1 */
|
||||
lcd->write(lcd, (y1 & 0xff)); /* set y1 */
|
||||
mio283qt9a_putreg(lcd, 0x2b, (y0 >> 8)); /* Set page address y0 */
|
||||
lcd->write(lcd, (y0 & 0xff)); /* Set y0 */
|
||||
lcd->write(lcd, (y1 >> 8)); /* Set y1 */
|
||||
lcd->write(lcd, (y1 & 0xff)); /* Set y1 */
|
||||
}
|
||||
|
||||
/**************************************************************************************
|
||||
|
@ -445,12 +444,11 @@ static int mio283qt9a_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *
|
|||
{
|
||||
FAR struct mio283qt9a_dev_s *priv = &g_lcddev;
|
||||
FAR struct mio283qt9a_lcd_s *lcd = priv->lcd;
|
||||
FAR const uint16_t *src = (FAR const uint16_t*)buffer;
|
||||
FAR const uint16_t *src = (FAR const uint16_t *)buffer;
|
||||
int i;
|
||||
|
||||
/* Buffer must be provided and aligned to a 16-bit address boundary */
|
||||
|
||||
//lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
|
||||
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
|
||||
|
||||
/* Select the LCD */
|
||||
|
@ -494,7 +492,7 @@ static int mio283qt9a_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer
|
|||
#ifndef CONFIG_LCD_NOGETRUN
|
||||
FAR struct mio283qt9a_dev_s *priv = &g_lcddev;
|
||||
FAR struct mio283qt9a_lcd_s *lcd = priv->lcd;
|
||||
FAR uint16_t *dest = (FAR uint16_t*)buffer;
|
||||
FAR uint16_t *dest = (FAR uint16_t *)buffer;
|
||||
uint16_t accum, test;
|
||||
int i;
|
||||
|
||||
|
@ -520,8 +518,7 @@ static int mio283qt9a_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer
|
|||
|
||||
for (i = 0; i < npixels; i++)
|
||||
{
|
||||
test= mio283qt9a_gramread(lcd, &accum);
|
||||
// lcddbg("read 0x%04x\n", test);
|
||||
test = mio283qt9a_gramread(lcd, &accum);
|
||||
*dest++ = test;
|
||||
}
|
||||
|
||||
|
@ -572,10 +569,10 @@ static int mio283qt9a_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int plane
|
|||
DEBUGASSERT(dev && pinfo && planeno == 0);
|
||||
lcdvdbg("planeno: %d bpp: %d\n", planeno, MIO283QT9A_BPP);
|
||||
|
||||
pinfo->putrun = mio283qt9a_putrun; /* Put a run into LCD memory */
|
||||
pinfo->getrun = mio283qt9a_getrun; /* Get a run from LCD memory */
|
||||
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */
|
||||
pinfo->bpp = MIO283QT9A_BPP; /* Bits-per-pixel */
|
||||
pinfo->putrun = mio283qt9a_putrun; /* Put a run into LCD memory */
|
||||
pinfo->getrun = mio283qt9a_getrun; /* Get a run from LCD memory */
|
||||
pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
|
||||
pinfo->bpp = MIO283QT9A_BPP; /* Bits-per-pixel */
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
|
|
@ -435,10 +435,10 @@ static const struct fb_videoinfo_s g_videoinfo =
|
|||
|
||||
static const struct lcd_planeinfo_s g_planeinfo =
|
||||
{
|
||||
.putrun = nokia_putrun, /* Put a run into LCD memory */
|
||||
.getrun = nokia_getrun, /* Get a run from LCD memory */
|
||||
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
|
||||
.bpp = NOKIA_BPP, /* Bits-per-pixel */
|
||||
.putrun = nokia_putrun, /* Put a run into LCD memory */
|
||||
.getrun = nokia_getrun, /* Get a run from LCD memory */
|
||||
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
|
||||
.bpp = NOKIA_BPP, /* Bits-per-pixel */
|
||||
};
|
||||
|
||||
/* This is the standard, NuttX LCD driver object */
|
||||
|
@ -477,21 +477,21 @@ static struct nokia_dev_s g_lcddev =
|
|||
#if 1 // CONFIG_NOKIA6100_BPP == 12
|
||||
static const uint8_t g_disctl[] =
|
||||
{
|
||||
S1D15G10_DISCTL, /* Display control */
|
||||
DISCTL_CLDIV_2|DISCTL_PERIOD_8, /* P1: Divide clock by 2; switching period = 8 */
|
||||
//DISCTL_CLDIV_NONE|DISCTL_PERIOD_8, /* P1: No clock division; switching period = 8 */
|
||||
32, /* P2: nlines/4 - 1 = 132/4 - 1 = 32 */
|
||||
0, /* P3: No inversely highlighted lines */
|
||||
0 /* P4: No disperion */
|
||||
S1D15G10_DISCTL, /* Display control */
|
||||
DISCTL_CLDIV_2 | DISCTL_PERIOD_8, /* P1: Divide clock by 2; switching period = 8 */
|
||||
//DISCTL_CLDIV_NONE | DISCTL_PERIOD_8, /* P1: No clock division; switching period = 8 */
|
||||
32, /* P2: nlines/4 - 1 = 132/4 - 1 = 32 */
|
||||
0, /* P3: No inversely highlighted lines */
|
||||
0 /* P4: No disperion */
|
||||
};
|
||||
#else /* CONFIG_NOKIA6100_BPP == 8 */
|
||||
static const uint8_t g_disctl[] =
|
||||
{
|
||||
S1D15G10_DISCTL, /* Display control */
|
||||
DISCTL_CLDIV_2|DISCTL_PERIOD_FLD, /* P1: Divide clock by 2; switching period = field */
|
||||
32, /* P2: nlines/4 - 1 = 132/4 - 1 = 32 */
|
||||
0, /* P3: No inversely highlighted lines */
|
||||
0 /* P4: No disperion */
|
||||
S1D15G10_DISCTL, /* Display control */
|
||||
DISCTL_CLDIV_2 | DISCTL_PERIOD_FLD, /* P1: Divide clock by 2; switching period = field */
|
||||
32, /* P2: nlines/4 - 1 = 132/4 - 1 = 32 */
|
||||
0, /* P3: No inversely highlighted lines */
|
||||
0 /* P4: No disperion */
|
||||
};
|
||||
#endif
|
||||
|
||||
|
@ -501,8 +501,8 @@ static const uint8_t g_disctl[] =
|
|||
|
||||
static const uint8_t g_comscn[] =
|
||||
{
|
||||
S1D15G10_COMSCN, /* Common scan direction */
|
||||
1 /* 0x01 = Scan 1->68, 132<-69 */
|
||||
S1D15G10_COMSCN, /* Common scan direction */
|
||||
1 /* 0x01 = Scan 1->68, 132<-69 */
|
||||
};
|
||||
|
||||
/* Power control:
|
||||
|
@ -513,7 +513,7 @@ static const uint8_t g_comscn[] =
|
|||
static const uint8_t g_pwrctr[] =
|
||||
{
|
||||
S1D15G10_PWRCTR, /* Power control */
|
||||
PWCTR_REFVOLTAGE|PWCTR_REGULATOR|PWCTR_BOOSTER2|PWCTR_BOOSTER1
|
||||
PWCTR_REFVOLTAGE | PWCTR_REGULATOR | PWCTR_BOOSTER2 | PWCTR_BOOSTER1
|
||||
};
|
||||
|
||||
/* Data control:
|
||||
|
@ -528,13 +528,13 @@ static const uint8_t g_datctl[] =
|
|||
S1D15G10_DATCTL, /* Data control */
|
||||
0
|
||||
#if CONFIG_NOKIA6100_MY != 0 /* Display row direction */
|
||||
|DATCTL_PGADDR_INV /* Page address inverted */
|
||||
| DATCTL_PGADDR_INV /* Page address inverted */
|
||||
#endif
|
||||
#if CONFIG_NOKIA6100_MX != 0 /* Display column direction */
|
||||
|DATCTL_COLADDR_REV /* Column address reversed */
|
||||
| DATCTL_COLADDR_REV /* Column address reversed */
|
||||
#endif
|
||||
#if CONFIG_NOKIA6100_V != 0 /* Display address direction */
|
||||
|DATCTL_ADDR_PGDIR /* Address scan in page direction */
|
||||
| DATCTL_ADDR_PGDIR /* Address scan in page direction */
|
||||
#endif
|
||||
,
|
||||
#if CONFIG_NOKIA6100_RGBORD != 0
|
||||
|
@ -617,22 +617,22 @@ static const uint8_t g_colmod[] =
|
|||
|
||||
static const uint8_t g_madctl[] =
|
||||
{
|
||||
PCF8833_MADCTL, /* Memory data access control*/
|
||||
PCF8833_MADCTL, /* Memory data access control */
|
||||
0
|
||||
#ifdef CONFIG_NOKIA6100_RGBORD != 0
|
||||
|MADCTL_RGB /* RGB->BGR */
|
||||
| MADCTL_RGB /* RGB->BGR */
|
||||
#endif
|
||||
#ifdef CONFIG_NOKIA6100_MY != 0 /* Display row direction */
|
||||
|MADCTL_MY /* Mirror Y */
|
||||
#ifdef CONFIG_NOKIA6100_MY != 0 /* Display row direction */
|
||||
| MADCTL_MY /* Mirror Y */
|
||||
#endif
|
||||
#ifdef CONFIG_NOKIA6100_MX != 0 /* Display column direction */
|
||||
|MADCTL_MX /* Mirror X */
|
||||
#ifdef CONFIG_NOKIA6100_MX != 0 /* Display column direction */
|
||||
| MADCTL_MX /* Mirror X */
|
||||
#endif
|
||||
#ifdef CONFIG_NOKIA6100_V != 0 /* Display address direction */
|
||||
|MADCTL_V /* ertical RAM write; in Y direction */
|
||||
#ifdef CONFIG_NOKIA6100_V != 0 /* Display address direction */
|
||||
| MADCTL_V /* ertical RAM write; in Y direction */
|
||||
#endif
|
||||
#ifdef CONFIG_NOKIA6100_ML != 0 /* Display scan direction */
|
||||
|MADCTL_LAO /* Line address order bottom to top */
|
||||
#ifdef CONFIG_NOKIA6100_ML != 0 /* Display scan direction */
|
||||
| MADCTL_LAO /* Line address order bottom to top */
|
||||
#endif
|
||||
};
|
||||
|
||||
|
@ -931,7 +931,7 @@ static int nokia_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffe
|
|||
#if NOKIA_YBIAS > 0
|
||||
row += NOKIA_YBIAS;
|
||||
#endif
|
||||
DEBUGASSERT(buffer && col >=0 && (col + npixels) <= NOKIA_XRES && row >= 0 && row < NOKIA_YRES);
|
||||
DEBUGASSERT(buffer && col >= 0 && (col + npixels) <= NOKIA_XRES && row >= 0 && row < NOKIA_YRES);
|
||||
|
||||
/* Set up to write the run. */
|
||||
|
||||
|
|
|
@ -283,20 +283,20 @@ static uint8_t g_framebuffer[RIT_YRES * RIT_XRES / 2];
|
|||
|
||||
static const struct fb_videoinfo_s g_videoinfo =
|
||||
{
|
||||
.fmt = RIT_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
|
||||
.xres = RIT_XRES, /* Horizontal resolution in pixel columns */
|
||||
.yres = RIT_YRES, /* Vertical resolution in pixel rows */
|
||||
.nplanes = 1, /* Number of color planes supported */
|
||||
.fmt = RIT_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
|
||||
.xres = RIT_XRES, /* Horizontal resolution in pixel columns */
|
||||
.yres = RIT_YRES, /* Vertical resolution in pixel rows */
|
||||
.nplanes = 1, /* Number of color planes supported */
|
||||
};
|
||||
|
||||
/* This is the standard, NuttX Plane information object */
|
||||
|
||||
static const struct lcd_planeinfo_s g_planeinfo =
|
||||
{
|
||||
.putrun = rit_putrun, /* Put a run into LCD memory */
|
||||
.getrun = rit_getrun, /* Get a run from LCD memory */
|
||||
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
|
||||
.bpp = RIT_BPP, /* Bits-per-pixel */
|
||||
.putrun = rit_putrun, /* Put a run into LCD memory */
|
||||
.getrun = rit_getrun, /* Get a run from LCD memory */
|
||||
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
|
||||
.bpp = RIT_BPP, /* Bits-per-pixel */
|
||||
};
|
||||
|
||||
/* This is the OLED driver instance (only a single device is supported for now) */
|
||||
|
@ -347,8 +347,8 @@ static const uint8_t g_initcmds[] =
|
|||
(31 << 1) | SSD1329_PRECHRG2_DBL, /* Pre-charge speed == 32, doubled */
|
||||
SSD1329_NOOP,
|
||||
3, SSD1329_GDDRAM_REMAP, /* Set GDDRAM re-map */
|
||||
(SSD1329_COM_SPLIT| /* Enable COM slip even/odd */
|
||||
SSD1329_COM_REMAP| /* Enable COM re-map */
|
||||
(SSD1329_COM_SPLIT | /* Enable COM slip even/odd */
|
||||
SSD1329_COM_REMAP | /* Enable COM re-map */
|
||||
SSD1329_NIBBLE_REMAP), /* Enable nibble re-map */
|
||||
SSD1329_NOOP,
|
||||
3, SSD1329_VERT_START, /* Set Display Start Line */
|
||||
|
@ -405,7 +405,7 @@ static const uint8_t g_sleepon[] =
|
|||
static const uint8_t g_horzinc[] =
|
||||
{
|
||||
SSD1329_GDDRAM_REMAP,
|
||||
(SSD1329_COM_SPLIT|SSD1329_COM_REMAP|SSD1329_NIBBLE_REMAP),
|
||||
(SSD1329_COM_SPLIT | SSD1329_COM_REMAP | SSD1329_NIBBLE_REMAP),
|
||||
};
|
||||
|
||||
/* The following set a window that covers the entire display */
|
||||
|
@ -570,7 +570,7 @@ static void rit_sndbytes(FAR struct rit_dev_s *priv, FAR const uint8_t *buffer,
|
|||
uint8_t tmp;
|
||||
|
||||
ritdbg("buflen: %d cmd: %s [%02x %02x %02x]\n",
|
||||
buflen, cmd ? "YES" : "NO", buffer[0], buffer[1], buffer[2] );
|
||||
buflen, cmd ? "YES" : "NO", buffer[0], buffer[1], buffer[2]);
|
||||
DEBUGASSERT(spi);
|
||||
|
||||
/* Clear/set the D/Cn bit to enable command or data mode */
|
||||
|
@ -769,19 +769,19 @@ static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
|
|||
memcpy(&run[start], buffer, aend - start);
|
||||
}
|
||||
|
||||
/* An even number of byte-aligned pixel pairs have been written (where
|
||||
* zero counts as an even number). If npixels was was odd (including
|
||||
* npixels == 1), then handle the final, byte aligned pixel.
|
||||
*/
|
||||
/* An even number of byte-aligned pixel pairs have been written (where
|
||||
* zero counts as an even number). If npixels was was odd (including
|
||||
* npixels == 1), then handle the final, byte aligned pixel.
|
||||
*/
|
||||
|
||||
if (aend != end)
|
||||
{
|
||||
/* The leftmost column is contained in source bits 7:4 and in
|
||||
* destination bits 7:4
|
||||
*/
|
||||
if (aend != end)
|
||||
{
|
||||
/* The leftmost column is contained in source bits 7:4 and in
|
||||
* destination bits 7:4
|
||||
*/
|
||||
|
||||
run[aend] = (run[aend] & 0x0f) | (buffer[aend - start] & 0xf0);
|
||||
}
|
||||
run[aend] = (run[aend] & 0x0f) | (buffer[aend - start] & 0xf0);
|
||||
}
|
||||
}
|
||||
|
||||
/* CASE 2: First pixel X position is byte aligned
|
||||
|
@ -825,10 +825,10 @@ static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
|
|||
run[i] = (last << 4) | (curr >> 4);
|
||||
}
|
||||
|
||||
/* An odd number of unaligned pixel have been written (where npixels
|
||||
* may have been as small as one). If npixels was was even, then handle
|
||||
* the final, unaligned pixel.
|
||||
*/
|
||||
/* An odd number of unaligned pixel have been written (where npixels
|
||||
* may have been as small as one). If npixels was was even, then handle
|
||||
* the final, unaligned pixel.
|
||||
*/
|
||||
|
||||
if (aend != end)
|
||||
{
|
||||
|
|
|
@ -391,9 +391,10 @@ static void ra8875_waitreg(FAR struct ra8875_lcd_s *lcd, uint8_t regaddr, uint8_
|
|||
{
|
||||
int i = 20000/100;
|
||||
|
||||
while (i-- && ra8875_readreg(lcd, regaddr) & mask) {
|
||||
up_udelay(100);
|
||||
}
|
||||
while (i-- && ra8875_readreg(lcd, regaddr) & mask)
|
||||
{
|
||||
up_udelay(100);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -624,9 +625,9 @@ static int ra8875_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buff
|
|||
#if RA8875_BPP == 16
|
||||
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
|
||||
|
||||
FAR const uint16_t *src = (FAR const uint16_t*)buffer;
|
||||
FAR const uint16_t *src = (FAR const uint16_t *)buffer;
|
||||
#else
|
||||
FAR const uint8_t *src = (FAR const uint8_t*)buffer;
|
||||
FAR const uint8_t *src = (FAR const uint8_t *)buffer;
|
||||
#endif
|
||||
int i;
|
||||
|
||||
|
@ -733,7 +734,7 @@ static int ra8875_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
|
|||
#ifndef CONFIG_LCD_NOGETRUN
|
||||
FAR struct ra8875_dev_s *priv = &g_lcddev;
|
||||
FAR struct ra8875_lcd_s *lcd = priv->lcd;
|
||||
FAR uint16_t *dest = (FAR uint16_t*)buffer;
|
||||
FAR uint16_t *dest = (FAR uint16_t *)buffer;
|
||||
int i;
|
||||
|
||||
/* Buffer must be provided and aligned to a 16-bit address boundary */
|
||||
|
@ -854,10 +855,10 @@ static int ra8875_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
|
|||
DEBUGASSERT(dev && pinfo && planeno == 0);
|
||||
lcdvdbg("planeno: %d bpp: %d\n", planeno, RA8875_BPP);
|
||||
|
||||
pinfo->putrun = ra8875_putrun; /* Put a run into LCD memory */
|
||||
pinfo->getrun = ra8875_getrun; /* Get a run from LCD memory */
|
||||
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */
|
||||
pinfo->bpp = RA8875_BPP; /* Bits-per-pixel */
|
||||
pinfo->putrun = ra8875_putrun; /* Put a run into LCD memory */
|
||||
pinfo->getrun = ra8875_getrun; /* Get a run from LCD memory */
|
||||
pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
|
||||
pinfo->bpp = RA8875_BPP; /* Bits-per-pixel */
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
@ -990,7 +991,7 @@ static inline int ra8875_hwinitialize(FAR struct ra8875_dev_s *priv)
|
|||
uint8_t rv;
|
||||
FAR struct ra8875_lcd_s *lcd = priv->lcd;
|
||||
|
||||
/*@@TODO: Maybe some of these values needs to be configurable?? */
|
||||
/* REVISIT: Maybe some of these values needs to be configurable?? */
|
||||
|
||||
lcdvdbg("hwinitialize\n");
|
||||
|
||||
|
|
|
@ -178,10 +178,10 @@ static const struct fb_videoinfo_s g_videoinfo =
|
|||
|
||||
static const struct lcd_planeinfo_s g_planeinfo =
|
||||
{
|
||||
.putrun = skel_putrun, /* Put a run into LCD memory */
|
||||
.getrun = skel_getrun, /* Get a run from LCD memory */
|
||||
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
|
||||
.bpp = SKEL_BPP, /* Bits-per-pixel */
|
||||
.putrun = skel_putrun, /* Put a run into LCD memory */
|
||||
.getrun = skel_getrun, /* Get a run from LCD memory */
|
||||
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
|
||||
.bpp = SKEL_BPP, /* Bits-per-pixel */
|
||||
};
|
||||
|
||||
/* This is the standard, NuttX LCD driver object */
|
||||
|
|
|
@ -588,7 +588,7 @@ static int ssd1289_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buf
|
|||
{
|
||||
FAR struct ssd1289_dev_s *priv = &g_lcddev;
|
||||
FAR struct ssd1289_lcd_s *lcd = priv->lcd;
|
||||
FAR const uint16_t *src = (FAR const uint16_t*)buffer;
|
||||
FAR const uint16_t *src = (FAR const uint16_t *)buffer;
|
||||
int i;
|
||||
|
||||
/* Buffer must be provided and aligned to a 16-bit address boundary */
|
||||
|
@ -718,7 +718,7 @@ static int ssd1289_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
|
|||
#ifndef CONFIG_LCD_NOGETRUN
|
||||
FAR struct ssd1289_dev_s *priv = &g_lcddev;
|
||||
FAR struct ssd1289_lcd_s *lcd = priv->lcd;
|
||||
FAR uint16_t *dest = (FAR uint16_t*)buffer;
|
||||
FAR uint16_t *dest = (FAR uint16_t *)buffer;
|
||||
uint16_t accum;
|
||||
int i;
|
||||
|
||||
|
@ -872,10 +872,10 @@ static int ssd1289_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
|
|||
DEBUGASSERT(dev && pinfo && planeno == 0);
|
||||
lcdvdbg("planeno: %d bpp: %d\n", planeno, SSD1289_BPP);
|
||||
|
||||
pinfo->putrun = ssd1289_putrun; /* Put a run into LCD memory */
|
||||
pinfo->getrun = ssd1289_getrun; /* Get a run from LCD memory */
|
||||
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */
|
||||
pinfo->bpp = SSD1289_BPP; /* Bits-per-pixel */
|
||||
pinfo->putrun = ssd1289_putrun; /* Put a run into LCD memory */
|
||||
pinfo->getrun = ssd1289_getrun; /* Get a run from LCD memory */
|
||||
pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
|
||||
pinfo->bpp = SSD1289_BPP; /* Bits-per-pixel */
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
|
|
@ -208,10 +208,10 @@ static const struct fb_videoinfo_s g_videoinfo =
|
|||
|
||||
static const struct lcd_planeinfo_s g_planeinfo =
|
||||
{
|
||||
.putrun = ssd1306_putrun, /* Put a run into LCD memory */
|
||||
.getrun = ssd1306_getrun, /* Get a run from LCD memory */
|
||||
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
|
||||
.bpp = SSD1306_DEV_BPP, /* Bits-per-pixel */
|
||||
.putrun = ssd1306_putrun, /* Put a run into LCD memory */
|
||||
.getrun = ssd1306_getrun, /* Get a run from LCD memory */
|
||||
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
|
||||
.bpp = SSD1306_DEV_BPP, /* Bits-per-pixel */
|
||||
};
|
||||
|
||||
/* This is the OLED driver instance (only a single device is supported for now) */
|
||||
|
@ -864,40 +864,40 @@ FAR struct lcd_dev_s *ssd1306_initialize(FAR struct i2c_dev_s *dev, unsigned int
|
|||
|
||||
/* Configure the device */
|
||||
|
||||
ssd1306_sendbyte(priv, SSD1306_DISPOFF); /* Display off 0xae */
|
||||
ssd1306_sendbyte(priv, SSD1306_SETCOLL(0)); /* Set lower column address 0x00 */
|
||||
ssd1306_sendbyte(priv, SSD1306_SETCOLH(0)); /* Set higher column address 0x10 */
|
||||
ssd1306_sendbyte(priv, SSD1306_STARTLINE(0)); /* Set display start line 0x40 */
|
||||
/* ssd1306_sendbyte(priv, SSD1306_PAGEADDR(0));*//* Set page address (Can ignore)*/
|
||||
ssd1306_sendbyte(priv, SSD1306_CONTRAST_MODE); /* Contrast control 0x81 */
|
||||
ssd1306_sendbyte(priv,SSD1306_CONTRAST(SSD1306_DEV_CONTRAST)); /* Default contrast 0xCF */
|
||||
ssd1306_sendbyte(priv, SSD1306_REMAPPLEFT); /* Set segment remap left 95 to 0 | 0xa1 */
|
||||
/* ssd1306_sendbyte(priv, SSD1306_EDISPOFF); */ /* Normal display off 0xa4 (Can ignore)*/
|
||||
ssd1306_sendbyte(priv, SSD1306_NORMAL); /* Normal (un-reversed) display mode 0xa6 */
|
||||
ssd1306_sendbyte(priv, SSD1306_MRATIO_MODE); /* Multiplex ratio 0xa8 */
|
||||
ssd1306_sendbyte(priv, SSD1306_DISPOFF); /* Display off 0xae */
|
||||
ssd1306_sendbyte(priv, SSD1306_SETCOLL(0)); /* Set lower column address 0x00 */
|
||||
ssd1306_sendbyte(priv, SSD1306_SETCOLH(0)); /* Set higher column address 0x10 */
|
||||
ssd1306_sendbyte(priv, SSD1306_STARTLINE(0)); /* Set display start line 0x40 */
|
||||
//ssd1306_sendbyte(priv, SSD1306_PAGEADDR(0)); /* Set page address (Can ignore) */
|
||||
ssd1306_sendbyte(priv, SSD1306_CONTRAST_MODE); /* Contrast control 0x81 */
|
||||
ssd1306_sendbyte(priv, SSD1306_CONTRAST(SSD1306_DEV_CONTRAST)); /* Default contrast 0xCF */
|
||||
ssd1306_sendbyte(priv, SSD1306_REMAPPLEFT); /* Set segment remap left 95 to 0 | 0xa1 */
|
||||
//ssd1306_sendbyte(priv, SSD1306_EDISPOFF); /* Normal display off 0xa4 (Can ignore) */
|
||||
ssd1306_sendbyte(priv, SSD1306_NORMAL); /* Normal (un-reversed) display mode 0xa6 */
|
||||
ssd1306_sendbyte(priv, SSD1306_MRATIO_MODE); /* Multiplex ratio 0xa8 */
|
||||
ssd1306_sendbyte(priv, SSD1306_MRATIO(SSD1306_DEV_DUTY)); /* Duty = 1/64 or 1/32 */
|
||||
/* ssd1306_sendbyte(priv, SSD1306_SCANTOCOM0);*/ /* Com scan direction: Scan from COM[n-1] to COM[0] (Can ignore)*/
|
||||
ssd1306_sendbyte(priv, SSD1306_DISPOFFS_MODE); /* Set display offset 0xd3 */
|
||||
//ssd1306_sendbyte(priv, SSD1306_SCANTOCOM0); /* Com scan direction: Scan from COM[n-1] to COM[0] (Can ignore) */
|
||||
ssd1306_sendbyte(priv, SSD1306_DISPOFFS_MODE); /* Set display offset 0xd3 */
|
||||
ssd1306_sendbyte(priv, SSD1306_DISPOFFS(0));
|
||||
ssd1306_sendbyte(priv, SSD1306_CLKDIV_SET); /* Set clock divider 0xd5*/
|
||||
ssd1306_sendbyte(priv, SSD1306_CLKDIV(8,0)); /* 0x80*/
|
||||
ssd1306_sendbyte(priv, SSD1306_CLKDIV_SET); /* Set clock divider 0xd5 */
|
||||
ssd1306_sendbyte(priv, SSD1306_CLKDIV(8, 0)); /* 0x80 */
|
||||
|
||||
ssd1306_sendbyte(priv, SSD1306_CHRGPER_SET); /* Set pre-charge period 0xd9 */
|
||||
ssd1306_sendbyte(priv, SSD1306_CHRGPER(0x0f,1)); /* 0xf1 or 0x22 Enhanced mode */
|
||||
ssd1306_sendbyte(priv, SSD1306_CHRGPER_SET); /* Set pre-charge period 0xd9 */
|
||||
ssd1306_sendbyte(priv, SSD1306_CHRGPER(0x0f, 1)); /* 0xf1 or 0x22 Enhanced mode */
|
||||
|
||||
ssd1306_sendbyte(priv, SSD1306_CMNPAD_CONFIG); /* Set common pads / set com pins hardware configuration 0xda */
|
||||
ssd1306_sendbyte(priv, SSD1306_CMNPAD_CONFIG); /* Set common pads / set com pins hardware configuration 0xda */
|
||||
ssd1306_sendbyte(priv, SSD1306_CMNPAD(SSD1306_DEV_CMNPAD)); /* 0x12 or 0x02 */
|
||||
|
||||
ssd1306_sendbyte(priv, SSD1306_VCOM_SET); /* set vcomh 0xdb*/
|
||||
ssd1306_sendbyte(priv, SSD1306_VCOM_SET); /* set vcomh 0xdb */
|
||||
ssd1306_sendbyte(priv, SSD1306_VCOM(0x40));
|
||||
|
||||
ssd1306_sendbyte(priv, SSD1306_CHRPUMP_SET); /* Set Charge Pump enable/disable 0x8d ssd1306 */
|
||||
ssd1306_sendbyte(priv, SSD1306_CHRPUMP_ON); /* 0x14 close 0x10 */
|
||||
ssd1306_sendbyte(priv, SSD1306_CHRPUMP_SET); /* Set Charge Pump enable/disable 0x8d ssd1306 */
|
||||
ssd1306_sendbyte(priv, SSD1306_CHRPUMP_ON); /* 0x14 close 0x10 */
|
||||
|
||||
/* ssd1306_sendbyte(priv, SSD1306_DCDC_MODE); */ /* DC/DC control mode: on (SSD1306 Not supported) */
|
||||
/* ssd1306_sendbyte(priv, SSD1306_DCDC_ON); */
|
||||
//ssd1306_sendbyte(priv, SSD1306_DCDC_MODE); /* DC/DC control mode: on (SSD1306 Not supported) */
|
||||
//ssd1306_sendbyte(priv, SSD1306_DCDC_ON);
|
||||
|
||||
ssd1306_sendbyte(priv, SSD1306_DISPON); /* Display ON 0xaf */
|
||||
ssd1306_sendbyte(priv, SSD1306_DISPON); /* Display ON 0xaf */
|
||||
|
||||
/* De-select and unlock the device */
|
||||
|
||||
|
|
|
@ -990,14 +990,16 @@ FAR struct lcd_dev_s *st7565_initialize(FAR struct st7565_lcd_s *lcd,
|
|||
st7565_reset(priv, true);
|
||||
|
||||
/* it seems too long but written in NHD‐C12864KGZ DISPLAY
|
||||
* INITIALIZATION... */
|
||||
* INITIALIZATION...
|
||||
*/
|
||||
|
||||
up_mdelay(150);
|
||||
|
||||
st7565_reset(priv, false);
|
||||
|
||||
/* it seems too long but written in NHD‐C12864KGZ DISPLAY
|
||||
* INITIALIZATION... */
|
||||
* INITIALIZATION...
|
||||
*/
|
||||
|
||||
up_mdelay(150);
|
||||
|
||||
|
@ -1009,7 +1011,7 @@ FAR struct lcd_dev_s *st7565_initialize(FAR struct st7565_lcd_s *lcd,
|
|||
|
||||
st7565_cmddata(priv, true);
|
||||
|
||||
/* reset by command in case of st7565_reset not implemeted */
|
||||
/* Reset by command in case of st7565_reset not implemeted */
|
||||
|
||||
(void)st7565_send_one_data(priv, ST7565_EXIT_SOFTRST);
|
||||
|
||||
|
|
|
@ -315,17 +315,17 @@ static const struct fb_videoinfo_s g_videoinfo =
|
|||
.fmt = ST7567_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
|
||||
.xres = ST7567_XRES, /* Horizontal resolution in pixel columns */
|
||||
.yres = ST7567_YRES, /* Vertical resolution in pixel rows */
|
||||
.nplanes = 1, /* Number of color planes supported */
|
||||
.nplanes = 1, /* Number of color planes supported */
|
||||
};
|
||||
|
||||
/* This is the standard, NuttX Plane information object */
|
||||
|
||||
static const struct lcd_planeinfo_s g_planeinfo =
|
||||
{
|
||||
.putrun = st7567_putrun, /* Put a run into LCD memory */
|
||||
.getrun = st7567_getrun, /* Get a run from LCD memory */
|
||||
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
|
||||
.bpp = ST7567_BPP, /* Bits-per-pixel */
|
||||
.putrun = st7567_putrun, /* Put a run into LCD memory */
|
||||
.getrun = st7567_getrun, /* Get a run from LCD memory */
|
||||
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
|
||||
.bpp = ST7567_BPP, /* Bits-per-pixel */
|
||||
};
|
||||
|
||||
/* This is the standard, NuttX LCD driver object */
|
||||
|
|
|
@ -375,10 +375,10 @@ static const struct fb_videoinfo_s g_videoinfo =
|
|||
|
||||
static const struct lcd_planeinfo_s g_planeinfo =
|
||||
{
|
||||
.putrun = ug2864ambag01_putrun, /* Put a run into LCD memory */
|
||||
.getrun = ug2864ambag01_getrun, /* Get a run from LCD memory */
|
||||
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
|
||||
.bpp = UG2864AMBAG01_BPP, /* Bits-per-pixel */
|
||||
.putrun = ug2864ambag01_putrun, /* Put a run into LCD memory */
|
||||
.getrun = ug2864ambag01_getrun, /* Get a run from LCD memory */
|
||||
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
|
||||
.bpp = UG2864AMBAG01_BPP, /* Bits-per-pixel */
|
||||
};
|
||||
|
||||
/* This is the OLED driver instance (only a single device is supported for now) */
|
||||
|
@ -1099,7 +1099,7 @@ FAR struct lcd_dev_s *ug2864ambag01_initialize(FAR struct spi_dev_s *spi, unsign
|
|||
SPI_SEND(spi, SH1101A_STARTLINE(0)); /* Set display start line */
|
||||
SPI_SEND(spi, SH1101A_PAGEADDR(0)); /* Set page address */
|
||||
SPI_SEND(spi, SH1101A_CONTRAST_MODE); /* Contrast control */
|
||||
SPI_SEND(spi ,UG2864AMBAG01_CONTRAST); /* Default contrast */
|
||||
SPI_SEND(spi, UG2864AMBAG01_CONTRAST); /* Default contrast */
|
||||
SPI_SEND(spi, SH1101A_REMAPPLEFT); /* Set segment remap left */
|
||||
SPI_SEND(spi, SH1101A_EDISPOFF); /* Normal display */
|
||||
SPI_SEND(spi, SH1101A_NORMAL); /* Normal (un-reversed) display mode */
|
||||
|
@ -1109,7 +1109,7 @@ FAR struct lcd_dev_s *ug2864ambag01_initialize(FAR struct spi_dev_s *spi, unsign
|
|||
SPI_SEND(spi, SH1101A_DISPOFFS_MODE); /* Set display offset */
|
||||
SPI_SEND(spi, SH1101A_DISPOFFS(0));
|
||||
SPI_SEND(spi, SH1101A_CLKDIV_SET); /* Set clock divider */
|
||||
SPI_SEND(spi, SH1101A_CLKDIV(0,0));
|
||||
SPI_SEND(spi, SH1101A_CLKDIV(0, 0));
|
||||
SPI_SEND(spi, SH1101A_CMNPAD_CONFIG); /* Set common pads */
|
||||
SPI_SEND(spi, SH1101A_CMNPAD(0x10));
|
||||
SPI_SEND(spi, SH1101A_VCOM_SET);
|
||||
|
|
|
@ -337,10 +337,10 @@ static const struct fb_videoinfo_s g_videoinfo =
|
|||
|
||||
static const struct lcd_planeinfo_s g_planeinfo =
|
||||
{
|
||||
.putrun = ug_putrun, /* Put a run into LCD memory */
|
||||
.getrun = ug_getrun, /* Get a run from LCD memory */
|
||||
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
|
||||
.bpp = UG_BPP, /* Bits-per-pixel */
|
||||
.putrun = ug_putrun, /* Put a run into LCD memory */
|
||||
.getrun = ug_getrun, /* Get a run from LCD memory */
|
||||
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
|
||||
.bpp = UG_BPP, /* Bits-per-pixel */
|
||||
};
|
||||
|
||||
/* This is the standard, NuttX LCD driver object */
|
||||
|
@ -1109,7 +1109,7 @@ FAR struct lcd_dev_s *ug_initialize(FAR struct spi_dev_s *spi, unsigned int devn
|
|||
(void)SPI_SEND(spi, 0x80); /* Data 1: Set 1 of 256 contrast steps */
|
||||
(void)SPI_SEND(spi, SSD1305_MAPCOL131); /* Set segment re-map */
|
||||
(void)SPI_SEND(spi, SSD1305_DISPNORMAL); /* Set normal display */
|
||||
/*(void)SPI_SEND(spi, SSD1305_DISPINVERTED); Set inverse display */
|
||||
//(void)SPI_SEND(spi, SSD1305_DISPINVERTED); /* Set inverse display */
|
||||
(void)SPI_SEND(spi, SSD1305_SETMUX); /* Set multiplex ratio */
|
||||
(void)SPI_SEND(spi, 0x3f); /* Data 1: MUX ratio -1: 15-63 */
|
||||
(void)SPI_SEND(spi, SSD1305_SETOFFSET); /* Set display offset */
|
||||
|
|
|
@ -498,9 +498,11 @@ static int mmcsd_getSCR(FAR struct mmcsd_state_s *priv, uint32_t scr[2])
|
|||
/* Setup up to receive data with interrupt mode */
|
||||
|
||||
SDIO_BLOCKSETUP(priv->dev, 8, 1);
|
||||
SDIO_RECVSETUP(priv->dev, (FAR uint8_t*)scr, 8);
|
||||
SDIO_RECVSETUP(priv->dev, (FAR uint8_t *)scr, 8);
|
||||
|
||||
(void)SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR);
|
||||
(void)SDIO_WAITENABLE(priv->dev,
|
||||
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT |
|
||||
SDIOWAIT_ERROR);
|
||||
|
||||
/* Send CMD55 APP_CMD with argument as card's RCA */
|
||||
|
||||
|
@ -525,7 +527,8 @@ static int mmcsd_getSCR(FAR struct mmcsd_state_s *priv, uint32_t scr[2])
|
|||
|
||||
/* Wait for data to be transferred */
|
||||
|
||||
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR, MMCSD_SCR_DATADELAY);
|
||||
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR,
|
||||
MMCSD_SCR_DATADELAY);
|
||||
if (ret != OK)
|
||||
{
|
||||
fdbg("ERROR: mmcsd_eventwait for READ DATA failed: %d\n", ret);
|
||||
|
@ -954,7 +957,7 @@ struct mmcsd_scr_s decoded;
|
|||
|
||||
fvdbg("SCR:\n");
|
||||
fvdbg(" SCR_STRUCTURE: %d SD_VERSION: %d\n",
|
||||
decoded.scrversion,decoded.sdversion);
|
||||
decoded.scrversion, decoded.sdversion);
|
||||
fvdbg(" DATA_STATE_AFTER_ERASE: %d SD_SECURITY: %d SD_BUS_WIDTHS: %x\n",
|
||||
decoded.erasestate, decoded.security, decoded.buswidth);
|
||||
fvdbg(" Manufacturing data: %08x\n",
|
||||
|
@ -1151,7 +1154,7 @@ static int mmcsd_transferready(FAR struct mmcsd_state_s *priv)
|
|||
*/
|
||||
|
||||
#if defined(CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE)
|
||||
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR,
|
||||
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR,
|
||||
MMCSD_BLOCK_WDATADELAY);
|
||||
if (ret != OK)
|
||||
{
|
||||
|
@ -1353,7 +1356,8 @@ static ssize_t mmcsd_readsingle(FAR struct mmcsd_state_s *priv,
|
|||
/* Configure SDIO controller hardware for the read transfer */
|
||||
|
||||
SDIO_BLOCKSETUP(priv->dev, priv->blocksize, 1);
|
||||
SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR);
|
||||
SDIO_WAITENABLE(priv->dev,
|
||||
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
|
||||
|
||||
#ifdef CONFIG_SDIO_DMA
|
||||
if (priv->dma)
|
||||
|
@ -1388,7 +1392,8 @@ static ssize_t mmcsd_readsingle(FAR struct mmcsd_state_s *priv,
|
|||
|
||||
/* Then wait for the data transfer to complete */
|
||||
|
||||
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR, MMCSD_BLOCK_RDATADELAY);
|
||||
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR,
|
||||
MMCSD_BLOCK_RDATADELAY);
|
||||
if (ret != OK)
|
||||
{
|
||||
fdbg("ERROR: CMD17 transfer failed: %d\n", ret);
|
||||
|
@ -1485,7 +1490,8 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
|
|||
/* Configure SDIO controller hardware for the read transfer */
|
||||
|
||||
SDIO_BLOCKSETUP(priv->dev, priv->blocksize, nblocks);
|
||||
SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR);
|
||||
SDIO_WAITENABLE(priv->dev,
|
||||
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
|
||||
|
||||
#ifdef CONFIG_SDIO_DMA
|
||||
if (priv->dma)
|
||||
|
@ -1518,7 +1524,8 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
|
|||
|
||||
/* Wait for the transfer to complete */
|
||||
|
||||
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR, nblocks * MMCSD_BLOCK_RDATADELAY);
|
||||
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR,
|
||||
nblocks * MMCSD_BLOCK_RDATADELAY);
|
||||
if (ret != OK)
|
||||
{
|
||||
fdbg("ERROR: CMD18 transfer failed: %d\n", ret);
|
||||
|
@ -1698,7 +1705,8 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
|
|||
/* Configure SDIO controller hardware for the write transfer */
|
||||
|
||||
SDIO_BLOCKSETUP(priv->dev, priv->blocksize, 1);
|
||||
SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR);
|
||||
SDIO_WAITENABLE(priv->dev,
|
||||
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
|
||||
#ifdef CONFIG_SDIO_DMA
|
||||
if (priv->dma)
|
||||
{
|
||||
|
@ -1723,7 +1731,8 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
|
|||
|
||||
/* Wait for the transfer to complete */
|
||||
|
||||
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR, MMCSD_BLOCK_WDATADELAY);
|
||||
ret = mmcsd_eventwait(priv,
|
||||
SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR, MMCSD_BLOCK_WDATADELAY);
|
||||
if (ret != OK)
|
||||
{
|
||||
fdbg("ERROR: CMD24 transfer failed: %d\n", ret);
|
||||
|
@ -1733,7 +1742,7 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
|
|||
#if defined(CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE)
|
||||
/* Arm the write complete detection with timeout */
|
||||
|
||||
SDIO_WAITENABLE(priv->dev, SDIOWAIT_WRCOMPLETE|SDIOWAIT_TIMEOUT);
|
||||
SDIO_WAITENABLE(priv->dev, SDIOWAIT_WRCOMPLETE | SDIOWAIT_TIMEOUT);
|
||||
#endif
|
||||
|
||||
/* On success, return the number of blocks written */
|
||||
|
@ -1859,7 +1868,8 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
|
|||
/* Configure SDIO controller hardware for the write transfer */
|
||||
|
||||
SDIO_BLOCKSETUP(priv->dev, priv->blocksize, nblocks);
|
||||
SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR);
|
||||
SDIO_WAITENABLE(priv->dev,
|
||||
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
|
||||
#ifdef CONFIG_SDIO_DMA
|
||||
if (priv->dma)
|
||||
{
|
||||
|
@ -1896,7 +1906,7 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
|
|||
|
||||
/* Wait for the transfer to complete */
|
||||
|
||||
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR, nblocks * MMCSD_BLOCK_WDATADELAY);
|
||||
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR, nblocks * MMCSD_BLOCK_WDATADELAY);
|
||||
if (ret != OK)
|
||||
{
|
||||
fdbg("ERROR: CMD18 transfer failed: %d\n", ret);
|
||||
|
@ -2749,7 +2759,8 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
|
|||
* CMD8 Response: R7
|
||||
*/
|
||||
|
||||
ret = mmcsd_sendcmdpoll(priv, SD_CMD8, MMCSD_CMD8CHECKPATTERN|MMCSD_CMD8VOLTAGE_27);
|
||||
ret = mmcsd_sendcmdpoll(priv, SD_CMD8,
|
||||
MMCSD_CMD8CHECKPATTERN | MMCSD_CMD8VOLTAGE_27);
|
||||
if (ret == OK)
|
||||
{
|
||||
/* CMD8 was sent successfully... Get the R7 response */
|
||||
|
@ -2815,7 +2826,8 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
|
|||
{
|
||||
/* Send ACMD41 */
|
||||
|
||||
mmcsd_sendcmdpoll(priv, SD_ACMD41, MMCSD_ACMD41_VOLTAGEWINDOW_33_32|sdcapacity);
|
||||
mmcsd_sendcmdpoll(priv, SD_ACMD41,
|
||||
MMCSD_ACMD41_VOLTAGEWINDOW_33_32 | sdcapacity);
|
||||
ret = SDIO_RECVR3(priv->dev, SD_ACMD41, &response);
|
||||
if (ret != OK)
|
||||
{
|
||||
|
@ -3009,18 +3021,18 @@ static int mmcsd_probe(FAR struct mmcsd_state_s *priv)
|
|||
|
||||
switch (priv->type)
|
||||
{
|
||||
case MMCSD_CARDTYPE_SDV1: /* Bit 1: SD version 1.x */
|
||||
case MMCSD_CARDTYPE_SDV2: /* SD version 2.x with byte addressing */
|
||||
case MMCSD_CARDTYPE_SDV2|MMCSD_CARDTYPE_BLOCK: /* SD version 2.x with block addressing */
|
||||
case MMCSD_CARDTYPE_SDV1: /* Bit 1: SD version 1.x */
|
||||
case MMCSD_CARDTYPE_SDV2: /* SD version 2.x with byte addressing */
|
||||
case MMCSD_CARDTYPE_SDV2 | MMCSD_CARDTYPE_BLOCK: /* SD version 2.x with block addressing */
|
||||
ret = mmcsd_sdinitialize(priv);
|
||||
break;
|
||||
|
||||
case MMCSD_CARDTYPE_MMC: /* MMC card */
|
||||
case MMCSD_CARDTYPE_MMC: /* MMC card */
|
||||
#ifdef CONFIG_MMCSD_MMCSUPPORT
|
||||
ret = mmcsd_mmcinitialize(priv);
|
||||
break;
|
||||
#endif
|
||||
case MMCSD_CARDTYPE_UNKNOWN: /* Unknown card type */
|
||||
case MMCSD_CARDTYPE_UNKNOWN: /* Unknown card type */
|
||||
default:
|
||||
fdbg("ERROR: Internal confusion: %d\n", priv->type);
|
||||
ret = -EPERM;
|
||||
|
|
|
@ -274,7 +274,7 @@ static const uint32_t g_transpeedru[8] =
|
|||
10000, /* 0: 10 Kbit/sec / 10 */
|
||||
100000, /* 1: 1 Mbit/sec / 10 */
|
||||
1000000, /* 2: 10 Mbit/sec / 10 */
|
||||
10000000, /* 3: 100 Mbit/sec / 10*/
|
||||
10000000, /* 3: 100 Mbit/sec / 10 */
|
||||
|
||||
0, 0, 0, 0 /* 4-7: Reserved values */
|
||||
};
|
||||
|
@ -316,7 +316,7 @@ static const uint16_t g_taactu[8] =
|
|||
1, /* 3: 1 us 1,000 ns */
|
||||
10, /* 4: 10 us 10,000 ns */
|
||||
100, /* 5: 100 us 100,000 ns */
|
||||
1000, /* 6: 1 ms 1,000,000 ns*/
|
||||
1000, /* 6: 1 ms 1,000,000 ns */
|
||||
10000, /* 7: 10 ms 10,000,000 ns */
|
||||
};
|
||||
|
||||
|
@ -677,7 +677,7 @@ static uint32_t mmcsd_taac(FAR struct mmcsd_slot_s *slot, uint8_t *csd)
|
|||
{
|
||||
int tundx;
|
||||
|
||||
/*The TAAC consists of a 3-bit time unit (TU) and a 4-bit time value (TV).
|
||||
/* The TAAC consists of a 3-bit time unit (TU) and a 4-bit time value (TV).
|
||||
* TAAC is in units of time; NSAC is in units of SPI clocks.
|
||||
* The access time we need is then given by:
|
||||
*
|
||||
|
@ -1532,7 +1532,7 @@ static int mmcsd_geometry(FAR struct inode *inode, struct geometry *geometry)
|
|||
/* Then return the card geometry */
|
||||
|
||||
geometry->geo_available =
|
||||
((slot->state & (MMCSD_SLOTSTATUS_NOTREADY|MMCSD_SLOTSTATUS_NODISK)) == 0);
|
||||
((slot->state & (MMCSD_SLOTSTATUS_NOTREADY | MMCSD_SLOTSTATUS_NODISK)) == 0);
|
||||
geometry->geo_mediachanged =
|
||||
((slot->state & MMCSD_SLOTSTATUS_MEDIACHGD) != 0);
|
||||
#if defined(CONFIG_FS_WRITABLE) && !defined(CONFIG_MMCSD_READONLY)
|
||||
|
@ -1713,7 +1713,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
|
|||
if ((slot->ocr & MMCSD_OCR_CCS) != 0)
|
||||
{
|
||||
fdbg("Identified SD ver2 card/with block access\n");
|
||||
slot->type = MMCSD_CARDTYPE_SDV2|MMCSD_CARDTYPE_BLOCK;
|
||||
slot->type = MMCSD_CARDTYPE_SDV2 | MMCSD_CARDTYPE_BLOCK;
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -1862,7 +1862,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
|
|||
|
||||
static void mmcsd_mediachanged(void *arg)
|
||||
{
|
||||
struct mmcsd_slot_s *slot = (struct mmcsd_slot_s*)arg;
|
||||
FAR struct mmcsd_slot_s *slot = (FAR struct mmcsd_slot_s *)arg;
|
||||
FAR struct spi_dev_s *spi;
|
||||
uint8_t oldstate;
|
||||
int ret;
|
||||
|
@ -1892,7 +1892,7 @@ static void mmcsd_mediachanged(void *arg)
|
|||
/* Media is not present */
|
||||
|
||||
fdbg("No card present\n");
|
||||
slot->state |= (MMCSD_SLOTSTATUS_NODISK|MMCSD_SLOTSTATUS_NOTREADY);
|
||||
slot->state |= (MMCSD_SLOTSTATUS_NODISK | MMCSD_SLOTSTATUS_NOTREADY);
|
||||
|
||||
/* Was media removed? */
|
||||
|
||||
|
@ -1906,7 +1906,7 @@ static void mmcsd_mediachanged(void *arg)
|
|||
* ready, then try re-initializing it
|
||||
*/
|
||||
|
||||
else if ((oldstate & (MMCSD_SLOTSTATUS_NODISK|MMCSD_SLOTSTATUS_NOTREADY)) != 0)
|
||||
else if ((oldstate & (MMCSD_SLOTSTATUS_NODISK | MMCSD_SLOTSTATUS_NOTREADY)) != 0)
|
||||
{
|
||||
/* (Re-)initialize for the media in the slot */
|
||||
|
||||
|
@ -2014,7 +2014,7 @@ int mmcsd_spislotinitialize(int minor, int slotno, FAR struct spi_dev_s *spi)
|
|||
* removal of cards.
|
||||
*/
|
||||
|
||||
(void)SPI_REGISTERCALLBACK(spi, mmcsd_mediachanged, (void*)slot);
|
||||
(void)SPI_REGISTERCALLBACK(spi, mmcsd_mediachanged, (FAR void *)slot);
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
|
|
@ -251,12 +251,18 @@ static int at45db_ioctl(FAR struct mtd_dev_s *mtd, int cmd, unsigned long arg);
|
|||
/* Chip erase sequence */
|
||||
|
||||
#define CHIP_ERASE_SIZE 4
|
||||
static const uint8_t g_chiperase[CHIP_ERASE_SIZE] = {0xc7, 0x94, 0x80, 0x9a};
|
||||
static const uint8_t g_chiperase[CHIP_ERASE_SIZE] =
|
||||
{
|
||||
0xc7, 0x94, 0x80, 0x9a
|
||||
};
|
||||
|
||||
/* Sequence to program the device to binary page sizes{256, 512, 1024} */
|
||||
|
||||
#define BINPGSIZE_SIZE 4
|
||||
static const uint8_t g_binpgsize[BINPGSIZE_SIZE] = {0x3d, 0x2a, 0x80, 0xa6};
|
||||
static const uint8_t g_binpgsize[BINPGSIZE_SIZE] =
|
||||
{
|
||||
0x3d, 0x2a, 0x80, 0xa6
|
||||
};
|
||||
|
||||
/************************************************************************************
|
||||
* Private Functions
|
||||
|
@ -270,7 +276,7 @@ static void at45db_lock(FAR struct at45db_dev_s *priv)
|
|||
{
|
||||
/* On SPI buses where there are multiple devices, it will be necessary to lock SPI
|
||||
* to have exclusive access to the buses for a sequence of transfers. The bus
|
||||
& should be locked before the chip is selected.
|
||||
* should be locked before the chip is selected.
|
||||
*
|
||||
* This is a blocking call and will not return until we have exclusive access to
|
||||
* the SPI bus. We will retain that exclusive access until the bus is unlocked.
|
||||
|
|
|
@ -87,7 +87,7 @@ int flash_eraseall(FAR const char *driver)
|
|||
|
||||
/* Open the block driver */
|
||||
|
||||
ret = open_blockdriver(driver ,0, &inode);
|
||||
ret = open_blockdriver(driver, 0, &inode);
|
||||
if (ret < 0)
|
||||
{
|
||||
fdbg("ERROR: Failed to open '%s': %d\n", driver, ret);
|
||||
|
|
|
@ -115,11 +115,13 @@ struct mtdconfig_header_s
|
|||
|
||||
static int mtdconfig_open(FAR struct file *filep);
|
||||
static int mtdconfig_close(FAR struct file *filep);
|
||||
static ssize_t mtdconfig_read(FAR struct file *, FAR char *, size_t);
|
||||
static ssize_t mtdconfig_ioctl(FAR struct file *, int, unsigned long);
|
||||
static ssize_t mtdconfig_read(FAR struct file *filep, FAR char *buffer,
|
||||
size_t buflen);
|
||||
static ssize_t mtdconfig_ioctl(FAR struct file *filep, int cmd,
|
||||
unsigned long arg);
|
||||
#ifndef CONFIG_DISABLE_POLL
|
||||
static int mtdconfig_poll(FAR struct file *filep, FAR struct pollfd *fds,
|
||||
bool setup);
|
||||
bool setup);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -645,8 +647,6 @@ static off_t mtdconfig_ramconsolidate(FAR struct mtdconfig_struct_s *dev)
|
|||
|
||||
/* Now Write the item to the current dst_offset location */
|
||||
|
||||
//printf("REL HDR: ID=%04X,%02X Len=%4d Off=%5d Src off=%4d\n",
|
||||
// phdr->id, phdr->instance, phdr->len, dst_offset, src_offset);
|
||||
ret = mtdconfig_writebytes(dev, dst_offset, (uint8_t *) phdr,
|
||||
sizeof(hdr));
|
||||
if (ret < 0)
|
||||
|
@ -815,8 +815,6 @@ retry_relocate:
|
|||
|
||||
/* Copy this entry to the destination */
|
||||
|
||||
//printf("REL HDR: ID=%04X,%02X Len=%4d Off=%5d Src off=%4d\n",
|
||||
// hdr.id, hdr.instance, hdr.len, dst_offset, src_offset);
|
||||
mtdconfig_writebytes(dev, dst_offset, (uint8_t *) &hdr, sizeof(hdr));
|
||||
src_offset += sizeof(hdr);
|
||||
dst_offset += sizeof(hdr);
|
||||
|
@ -850,7 +848,7 @@ retry_relocate:
|
|||
|
||||
src_offset += sizeof(hdr) + hdr.len;
|
||||
if (src_offset + sizeof(hdr) >= (src_block + 1) * dev->erasesize ||
|
||||
src_offset == (src_block +1 ) * dev->erasesize)
|
||||
src_offset == (src_block + 1) * dev->erasesize)
|
||||
{
|
||||
/* No room left at end of source block */
|
||||
|
||||
|
@ -1181,8 +1179,7 @@ retry_find:
|
|||
hdr.instance = pdata->instance;
|
||||
hdr.len = pdata->len;
|
||||
hdr.flags = MTD_ERASED_FLAGS;
|
||||
//printf("SAV HDR: ID=%04X,%02X Len=%4d Off=%5d\n",
|
||||
// hdr.id, hdr.instance, hdr.len, offset);
|
||||
|
||||
mtdconfig_writebytes(dev, offset, (uint8_t *)&hdr, sizeof(hdr));
|
||||
bytes = mtdconfig_writebytes(dev, offset + sizeof(hdr), pdata->configdata,
|
||||
pdata->len);
|
||||
|
@ -1311,7 +1308,7 @@ static int mtdconfig_poll(FAR struct file *filep, FAR struct pollfd *fds,
|
|||
{
|
||||
if (setup)
|
||||
{
|
||||
fds->revents |= (fds->events & (POLLIN|POLLOUT));
|
||||
fds->revents |= (fds->events & (POLLIN | POLLOUT));
|
||||
if (fds->revents != 0)
|
||||
{
|
||||
sem_post(fds->sem);
|
||||
|
|
|
@ -250,8 +250,8 @@ static int nand_checkblock(FAR struct nand_dev_s *nand, off_t block)
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
//#ifdef CONFIG_MTD_NAND_BLOCKCHECK
|
||||
#if defined(CONFIG_MTD_NAND_BLOCKCHECK) && defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
|
||||
#if defined(CONFIG_MTD_NAND_BLOCKCHECK) && defined(CONFIG_DEBUG_VERBOSE) && \
|
||||
defined(CONFIG_DEBUG_FS)
|
||||
static int nand_devscan(FAR struct nand_dev_s *nand)
|
||||
{
|
||||
FAR struct nand_raw_s *raw;
|
||||
|
@ -329,7 +329,7 @@ static int nand_devscan(FAR struct nand_dev_s *nand)
|
|||
|
||||
return OK;
|
||||
}
|
||||
#endif /* CONFIG_MTD_NAND_BLOCKCHECK */
|
||||
#endif /* CONFIG_MTD_NAND_BLOCKCHECK && CONFIG_DEBUG_VERBOSE && CONFIG_DEBUG_FS */
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nand_chipid
|
||||
|
|
|
@ -327,12 +327,12 @@ void nandscheme_writeextra(FAR const struct nand_scheme_s *scheme,
|
|||
FAR uint8_t *spare, FAR const void *extra,
|
||||
unsigned int size, unsigned int offset)
|
||||
{
|
||||
DEBUGASSERT((size + offset) < scheme->nxbytes);
|
||||
DEBUGASSERT((size + offset) < scheme->nxbytes);
|
||||
|
||||
uint32_t i;
|
||||
for (i = 0; i < size; i++) {
|
||||
|
||||
spare[scheme->xbytepos[i+offset]] = ((uint8_t *) extra)[i];
|
||||
uint32_t i;
|
||||
for (i = 0; i < size; i++)
|
||||
{
|
||||
spare[scheme->xbytepos[i+offset]] = ((uint8_t *) extra)[i];
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -328,39 +328,39 @@ int onfi_read(uintptr_t cmdaddr, uintptr_t addraddr, uintptr_t dataaddr,
|
|||
|
||||
/* JEDEC manufacturer ID */
|
||||
|
||||
onfi->manufacturer = *(uint8_t *)(parmtab + 64);
|
||||
onfi->manufacturer = *(FAR uint8_t *)(parmtab + 64);
|
||||
|
||||
/* Bus width */
|
||||
|
||||
onfi->buswidth = (*(uint8_t *)(parmtab + 6)) & 0x01;
|
||||
onfi->buswidth = (*(FAR uint8_t *)(parmtab + 6)) & 0x01;
|
||||
|
||||
/* Get number of data bytes per page (bytes 80-83 in the param table) */
|
||||
|
||||
onfi->pagesize = *(uint32_t *)(void*)(parmtab + 80);
|
||||
onfi->pagesize = *(FAR uint32_t *)(FAR void *)(parmtab + 80);
|
||||
|
||||
/* Get number of spare bytes per page (bytes 84-85 in the param table) */
|
||||
|
||||
onfi->sparesize = *(uint16_t *)(void*)(parmtab + 84);
|
||||
onfi->sparesize = *(FAR uint16_t *)(FAR voidFAR *)(parmtab + 84);
|
||||
|
||||
/* Number of pages per block. */
|
||||
|
||||
onfi->pagesperblock = *(uint32_t *)(void*)(parmtab + 92);
|
||||
onfi->pagesperblock = *(FAR uint32_t *)(FAR void *)(parmtab + 92);
|
||||
|
||||
/* Number of blocks per logical unit (LUN). */
|
||||
|
||||
onfi->blocksperlun = *(uint32_t *)(void*)(parmtab + 96);
|
||||
onfi->blocksperlun = *(FAR uint32_t *)(FAR void *)(parmtab + 96);
|
||||
|
||||
/* Number of logical units. */
|
||||
|
||||
onfi->luns = *(uint8_t *)(parmtab + 100);
|
||||
onfi->luns = *(FAR uint8_t *)(parmtab + 100);
|
||||
|
||||
/* Number of bits of ECC correction */
|
||||
|
||||
onfi->eccsize = *(uint8_t *)(parmtab + 112);
|
||||
onfi->eccsize = *(FAR uint8_t *)(parmtab + 112);
|
||||
|
||||
/* Device model */
|
||||
|
||||
onfi->model= *(uint8_t *)(parmtab + 49);
|
||||
onfi->model = *(FAR uint8_t *)(parmtab + 49);
|
||||
|
||||
fvdbg("Returning:\n");
|
||||
fvdbg(" manufacturer: 0x%02x\n", onfi->manufacturer);
|
||||
|
@ -483,7 +483,7 @@ bool onfi_ebidetect(uintptr_t cmdaddr, uintptr_t addraddr,
|
|||
ids[2] = READ_NAND(dataaddr);
|
||||
ids[3] = READ_NAND(dataaddr);
|
||||
|
||||
for (i = 0; i< NAND_NMODELS ; i++)
|
||||
for (i = 0; i < NAND_NMODELS ; i++)
|
||||
{
|
||||
if (g_nandmodels[i].devid == ids[1])
|
||||
{
|
||||
|
|
|
@ -739,7 +739,7 @@ static int part_procfs_stat(const char *relpath, struct stat *buf)
|
|||
{
|
||||
/* File/directory size, access block size */
|
||||
|
||||
buf->st_mode = S_IFREG|S_IROTH|S_IRGRP|S_IRUSR;
|
||||
buf->st_mode = S_IFREG | S_IROTH | S_IRGRP | S_IRUSR;
|
||||
buf->st_size = 0;
|
||||
buf->st_blksize = 0;
|
||||
buf->st_blocks = 0;
|
||||
|
|
|
@ -40,7 +40,6 @@
|
|||
#include <nuttx/config.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
//#include <sys/statfs.h>
|
||||
#include <sys/stat.h>
|
||||
|
||||
#include <stdint.h>
|
||||
|
@ -304,7 +303,7 @@ static int mtd_stat(const char *relpath, struct stat *buf)
|
|||
{
|
||||
/* File/directory size, access block size */
|
||||
|
||||
buf->st_mode = S_IFREG|S_IROTH|S_IRGRP|S_IRUSR;
|
||||
buf->st_mode = S_IFREG | S_IROTH | S_IRGRP | S_IRUSR;
|
||||
buf->st_size = 0;
|
||||
buf->st_blksize = 0;
|
||||
buf->st_blocks = 0;
|
||||
|
|
|
@ -295,7 +295,7 @@ static int mtd_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
|
|||
|
||||
/* Then invalidate in cached data */
|
||||
|
||||
ret = rwb_invalidate(&priv->rwb,0, priv->rwb.nblocks);
|
||||
ret = rwb_invalidate(&priv->rwb, 0, priv->rwb.nblocks);
|
||||
if (ret < 0)
|
||||
{
|
||||
fdbg("ERROR: rwb_invalidate failed: %d\n", ret);
|
||||
|
|
|
@ -395,7 +395,7 @@ static int ram_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
|
|||
{
|
||||
/* Return (void*) base address of device memory */
|
||||
|
||||
*ppv = (FAR void*)priv->start;
|
||||
*ppv = (FAR void *)priv->start;
|
||||
ret = OK;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -107,7 +107,7 @@ struct s512_dev_s
|
|||
size_t sectperblock; /* Number of read/write sectors per erase block */
|
||||
uint16_t stdperblock; /* Number of 512 byte sectors in one erase block */
|
||||
uint8_t flags; /* Buffered sector flags */
|
||||
uint32_t eblockno; /* Erase sector number in the cache*/
|
||||
uint32_t eblockno; /* Erase sector number in the cache */
|
||||
FAR uint8_t *eblock; /* Allocated erase block */
|
||||
};
|
||||
|
||||
|
@ -269,9 +269,9 @@ static int s512_erase(FAR struct mtd_dev_s *dev, off_t sector512, size_t nsector
|
|||
}
|
||||
|
||||
/* Erase the block containing this sector if it is not already erased.
|
||||
* The erased indicator will be cleared when the data from the erase sector
|
||||
* is read into the cache and set here when we erase the block.
|
||||
*/
|
||||
* The erased indicator will be cleared when the data from the erase sector
|
||||
* is read into the cache and set here when we erase the block.
|
||||
*/
|
||||
|
||||
if (!IS_ERASED(priv))
|
||||
{
|
||||
|
@ -538,7 +538,7 @@ static int s512_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
|
|||
if (ret >= 0)
|
||||
{
|
||||
priv->flags = 0; /* Buffered sector flags */
|
||||
priv->eblockno = 0; /* Erase sector number in the cache*/
|
||||
priv->eblockno = 0; /* Erase sector number in the cache */
|
||||
priv->eblock = NULL; /* Allocated erase block */
|
||||
}
|
||||
}
|
||||
|
@ -588,7 +588,7 @@ FAR struct mtd_dev_s *s512_initialize(FAR struct mtd_dev_s *mtd)
|
|||
/* We expect that the block size will be >512 and an even multiple of 512 */
|
||||
|
||||
if (ret < 0 || geo.erasesize <= SECTOR_512 ||
|
||||
(geo.erasesize & ~MASK_512) != geo.erasesize )
|
||||
(geo.erasesize & ~MASK_512) != geo.erasesize)
|
||||
{
|
||||
fdbg("ERROR: MTDIOC_GEOMETRY ioctl returned %d, eraseize=%d\n",
|
||||
ret, geo.erasesize);
|
||||
|
|
|
@ -277,8 +277,8 @@ struct smart_struct_s
|
|||
#ifdef CONFIG_SMARTFS_MULTI_ROOT_DIRS
|
||||
struct smart_multiroot_device_s
|
||||
{
|
||||
FAR struct smart_struct_s* dev;
|
||||
uint8_t rootdirnum;
|
||||
FAR struct smart_struct_s *dev;
|
||||
uint8_t rootdirnum;
|
||||
};
|
||||
#endif
|
||||
|
||||
|
@ -440,10 +440,10 @@ static int smart_close(FAR struct inode *inode)
|
|||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_MTD_SMART_ALLOC_DEBUG
|
||||
FAR static void* smart_malloc(FAR struct smart_struct_s *dev,
|
||||
FAR static void *smart_malloc(FAR struct smart_struct_s *dev,
|
||||
size_t bytes, const char *name)
|
||||
{
|
||||
void* ret = kmm_malloc(bytes);
|
||||
FAR void *ret = kmm_malloc(bytes);
|
||||
uint8_t x;
|
||||
|
||||
/* Keep track of the total allocation */
|
||||
|
@ -479,7 +479,7 @@ FAR static void* smart_malloc(FAR struct smart_struct_s *dev,
|
|||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_MTD_SMART_ALLOC_DEBUG
|
||||
static void smart_free(FAR struct smart_struct_s *dev, FAR void* ptr)
|
||||
static void smart_free(FAR struct smart_struct_s *dev, FAR void *ptr)
|
||||
{
|
||||
uint8_t x;
|
||||
|
||||
|
@ -505,7 +505,7 @@ static void smart_free(FAR struct smart_struct_s *dev, FAR void* ptr)
|
|||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_MTD_SMART_PACK_COUNTS
|
||||
static void smart_set_count(FAR struct smart_struct_s *dev, FAR uint8_t* pCount,
|
||||
static void smart_set_count(FAR struct smart_struct_s *dev, FAR uint8_t *pCount,
|
||||
uint16_t block, uint8_t count)
|
||||
{
|
||||
if (dev->sectorsPerBlk > 16)
|
||||
|
@ -533,11 +533,11 @@ static void smart_set_count(FAR struct smart_struct_s *dev, FAR uint8_t* pCount,
|
|||
{
|
||||
if (count == 16)
|
||||
{
|
||||
pCount[(dev->geo.neraseblocks >> 1) + (block>>3)] |= 1 << (block & 0x07);
|
||||
pCount[(dev->geo.neraseblocks >> 1) + (block >> 3)] |= 1 << (block & 0x07);
|
||||
}
|
||||
else
|
||||
{
|
||||
pCount[(dev->geo.neraseblocks >> 1) + (block>>3)] &= ~(1 << (block & 0x07));
|
||||
pCount[(dev->geo.neraseblocks >> 1) + (block >> 3)] &= ~(1 << (block & 0x07));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -554,7 +554,7 @@ static void smart_set_count(FAR struct smart_struct_s *dev, FAR uint8_t* pCount,
|
|||
|
||||
#ifdef CONFIG_MTD_SMART_PACK_COUNTS
|
||||
static uint8_t smart_get_count(FAR struct smart_struct_s *dev,
|
||||
FAR uint8_t* pCount, uint16_t block)
|
||||
FAR uint8_t *pCount, uint16_t block)
|
||||
{
|
||||
uint8_t count;
|
||||
|
||||
|
@ -581,7 +581,7 @@ static uint8_t smart_get_count(FAR struct smart_struct_s *dev,
|
|||
|
||||
if (dev->sectorsPerBlk == 16)
|
||||
{
|
||||
if (pCount[(dev->geo.neraseblocks >> 1) + (block>>3)] & (1 << (block & 0x07)))
|
||||
if (pCount[(dev->geo.neraseblocks >> 1) + (block >> 3)] & (1 << (block & 0x07)))
|
||||
{
|
||||
count |= 0x10;
|
||||
}
|
||||
|
@ -600,7 +600,7 @@ static uint8_t smart_get_count(FAR struct smart_struct_s *dev,
|
|||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_MTD_SMART_PACK_COUNTS
|
||||
static void smart_add_count(struct smart_struct_s *dev, uint8_t* pCount,
|
||||
static void smart_add_count(struct smart_struct_s *dev, uint8_t *pCount,
|
||||
uint16_t block, int adder)
|
||||
{
|
||||
int16_t value;
|
||||
|
@ -675,7 +675,7 @@ int smart_checkfree(FAR struct smart_struct_s *dev, int lineno)
|
|||
}
|
||||
|
||||
/* Modifiy the freesector count to reflect the actual calculated freecount
|
||||
to get us back in line.
|
||||
* to get us back in line.
|
||||
*/
|
||||
|
||||
dev->freesectors = freecount;
|
||||
|
@ -761,13 +761,13 @@ static ssize_t smart_reload(struct smart_struct_s *dev, FAR uint8_t *buffer,
|
|||
static ssize_t smart_read(FAR struct inode *inode, unsigned char *buffer,
|
||||
size_t start_sector, unsigned int nsectors)
|
||||
{
|
||||
struct smart_struct_s *dev;
|
||||
FAR struct smart_struct_s *dev;
|
||||
|
||||
fvdbg("SMART: sector: %d nsectors: %d\n", start_sector, nsectors);
|
||||
|
||||
DEBUGASSERT(inode && inode->i_private);
|
||||
#ifdef CONFIG_SMARTFS_MULTI_ROOT_DIRS
|
||||
dev = ((struct smart_multiroot_device_s*) inode->i_private)->dev;
|
||||
dev = ((FAR struct smart_multiroot_device_s *)inode->i_private)->dev;
|
||||
#else
|
||||
dev = (struct smart_struct_s *)inode->i_private;
|
||||
#endif
|
||||
|
@ -803,7 +803,7 @@ static ssize_t smart_write(FAR struct inode *inode,
|
|||
|
||||
DEBUGASSERT(inode && inode->i_private);
|
||||
#ifdef CONFIG_SMARTFS_MULTI_ROOT_DIRS
|
||||
dev = ((FAR struct smart_multiroot_device_s*) inode->i_private)->dev;
|
||||
dev = ((FAR struct smart_multiroot_device_s *)inode->i_private)->dev;
|
||||
#else
|
||||
dev = (FAR struct smart_struct_s *)inode->i_private;
|
||||
#endif
|
||||
|
@ -912,7 +912,7 @@ static int smart_geometry(FAR struct inode *inode, struct geometry *geometry)
|
|||
if (geometry)
|
||||
{
|
||||
#ifdef CONFIG_SMARTFS_MULTI_ROOT_DIRS
|
||||
dev = ((FAR struct smart_multiroot_device_s*) inode->i_private)->dev;
|
||||
dev = ((FAR struct smart_multiroot_device_s *)inode->i_private)->dev;
|
||||
#else
|
||||
dev = (FAR struct smart_struct_s *)inode->i_private;
|
||||
#endif
|
||||
|
@ -1500,7 +1500,7 @@ static uint16_t smart_cache_lookup(FAR struct smart_struct_s *dev, uint16_t logi
|
|||
/* This is the sector we are looking for! Add it to the cache */
|
||||
|
||||
physical = block * dev->sectorsPerBlk + sector;
|
||||
smart_add_sector_to_cache(dev, logical, physical, __LINE__ );
|
||||
smart_add_sector_to_cache(dev, logical, physical, __LINE__);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -1543,7 +1543,7 @@ static void smart_update_cache(FAR struct smart_struct_s *dev, uint16_t
|
|||
dev->sCache[x].physical = physical;
|
||||
|
||||
/* If we are freeing a sector, then remove the logical entry from
|
||||
the cache.
|
||||
* the cache.
|
||||
*/
|
||||
|
||||
if (physical == 0xFFFF)
|
||||
|
@ -1739,7 +1739,8 @@ static int smart_set_wear_level(FAR struct smart_struct_s *dev, uint16_t block,
|
|||
}
|
||||
|
||||
/* Test if this was the min level. If it was, then
|
||||
we need to rescan for min. */
|
||||
* we need to rescan for min.
|
||||
*/
|
||||
|
||||
if (oldlevel == dev->minwearlevel)
|
||||
{
|
||||
|
@ -1973,7 +1974,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
|
|||
/* Read the sector data */
|
||||
|
||||
ret = MTD_READ(dev->mtd, readaddress, 32,
|
||||
(FAR uint8_t*) dev->rwbuffer);
|
||||
(FAR uint8_t *)dev->rwbuffer);
|
||||
if (ret != 32)
|
||||
{
|
||||
fdbg("Error reading physical sector %d.\n", sector);
|
||||
|
@ -1986,12 +1987,13 @@ static int smart_scan(FAR struct smart_struct_s *dev)
|
|||
dev->rwbuffer[SMART_FMT_POS2] != SMART_FMT_SIG2 ||
|
||||
dev->rwbuffer[SMART_FMT_POS3] != SMART_FMT_SIG3 ||
|
||||
dev->rwbuffer[SMART_FMT_POS4] != SMART_FMT_SIG4)
|
||||
{
|
||||
/* Invalid signature on a sector claiming to be sector 0!
|
||||
* What should we do? Release it?*/
|
||||
{
|
||||
/* Invalid signature on a sector claiming to be sector 0!
|
||||
* What should we do? Release it?
|
||||
*/
|
||||
|
||||
continue;
|
||||
}
|
||||
continue;
|
||||
}
|
||||
|
||||
/* Mark the volume as formatted and set the sector size */
|
||||
|
||||
|
@ -2023,8 +2025,8 @@ static int smart_scan(FAR struct smart_struct_s *dev)
|
|||
* the SMART device structure and the root directory number.
|
||||
*/
|
||||
|
||||
rootdirdev = (struct smart_multiroot_device_s*) smart_malloc(dev,
|
||||
sizeof(*rootdirdev), "Root Dir");
|
||||
rootdirdev = (struct smart_multiroot_device_s *)
|
||||
smart_malloc(dev, sizeof(*rootdirdev), "Root Dir");
|
||||
if (rootdirdev == NULL)
|
||||
{
|
||||
fdbg("Memory alloc failed\n");
|
||||
|
@ -2210,7 +2212,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
|
|||
|
||||
if (logicalsector < SMART_FIRST_ALLOC_SECTOR)
|
||||
{
|
||||
smart_add_sector_to_cache(dev, logicalsector, sector, __LINE__ );
|
||||
smart_add_sector_to_cache(dev, logicalsector, sector, __LINE__);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
@ -2927,7 +2929,7 @@ static inline int smart_llformat(FAR struct smart_struct_s *dev, unsigned long a
|
|||
for (x = 0; x < dev->neraseblocks; x++)
|
||||
{
|
||||
/* Test for a geometry with 65536 sectors. We allow this, though
|
||||
we never use the last two sectors in this mode.
|
||||
* we never use the last two sectors in this mode.
|
||||
*/
|
||||
|
||||
if (x == dev->neraseblocks && dev->totalsectors == 65534)
|
||||
|
@ -3304,7 +3306,7 @@ static int smart_relocate_block(FAR struct smart_struct_s *dev, uint16_t block)
|
|||
if (x == dev->neraseblocks && dev->totalsectors == 65534)
|
||||
{
|
||||
/* We can't use the last two sectors on a 65536 sector device,
|
||||
so "pre-release" them so they never get allocated.
|
||||
* so "pre-release" them so they never get allocated.
|
||||
*/
|
||||
|
||||
prerelease = 2;
|
||||
|
@ -3531,7 +3533,7 @@ retry:
|
|||
#ifdef CONFIG_MTD_SMART_ENABLE_CRC
|
||||
/* First check if there is a temporary alloc in place */
|
||||
|
||||
FAR struct smart_allocsector_s* allocsect;
|
||||
FAR struct smart_allocsector_s *allocsect;
|
||||
allocsect = dev->allocsector;
|
||||
|
||||
while (allocsect)
|
||||
|
@ -3758,7 +3760,7 @@ static int smart_write_wearstatus(struct smart_struct_s *dev)
|
|||
}
|
||||
|
||||
/* Test if we need to write either total block erase count or
|
||||
uneven wearcount (or both)
|
||||
* uneven wearcount (or both)
|
||||
*/
|
||||
|
||||
if (write_buffer)
|
||||
|
@ -4223,9 +4225,9 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
|
|||
#endif /* CONFIG_MTD_SMART_ENABLE_CRC */
|
||||
|
||||
/* If we are not using CRC and on a device that supports re-writing
|
||||
bits from 1 to 0 without neededing a block erase, such as NOR
|
||||
FLASH, then we can simply update the data in place and don't need
|
||||
to relocate the sector. Test if we need to relocate or not.
|
||||
* bits from 1 to 0 without neededing a block erase, such as NOR
|
||||
* FLASH, then we can simply update the data in place and don't need
|
||||
* to relocate the sector. Test if we need to relocate or not.
|
||||
*/
|
||||
|
||||
if (needsrelocate)
|
||||
|
@ -4532,20 +4534,20 @@ static int smart_readsector(FAR struct smart_struct_s *dev,
|
|||
|
||||
#ifdef CONFIG_MTD_SMART_ENABLE_CRC
|
||||
|
||||
/* When CRC is enabled, we read the entire sector into RAM so we can
|
||||
* validate the CRC.
|
||||
*/
|
||||
/* When CRC is enabled, we read the entire sector into RAM so we can
|
||||
* validate the CRC.
|
||||
*/
|
||||
|
||||
ret = MTD_BREAD(dev->mtd, physsector * dev->mtdBlksPerSector,
|
||||
dev->mtdBlksPerSector, (FAR uint8_t *) dev->rwbuffer);
|
||||
if (ret != dev->mtdBlksPerSector)
|
||||
{
|
||||
/* TODO: Mark the block bad */
|
||||
ret = MTD_BREAD(dev->mtd, physsector * dev->mtdBlksPerSector,
|
||||
dev->mtdBlksPerSector, (FAR uint8_t *) dev->rwbuffer);
|
||||
if (ret != dev->mtdBlksPerSector)
|
||||
{
|
||||
/* TODO: Mark the block bad */
|
||||
|
||||
fdbg("Error reading phys sector %d\n", physsector);
|
||||
ret = -EIO;
|
||||
goto errout;
|
||||
}
|
||||
fdbg("Error reading phys sector %d\n", physsector);
|
||||
ret = -EIO;
|
||||
goto errout;
|
||||
}
|
||||
|
||||
#if SMART_STATUS_VERSION == 1
|
||||
/* Test if this sector has CRC enabled or not */
|
||||
|
@ -4610,7 +4612,7 @@ static int smart_readsector(FAR struct smart_struct_s *dev,
|
|||
/* Read the sector data into the buffer */
|
||||
|
||||
readaddr = (uint32_t) physsector * dev->mtdBlksPerSector * dev->geo.blocksize +
|
||||
req->offset + sizeof(struct smart_sect_header_s);;
|
||||
req->offset + sizeof(struct smart_sect_header_s);
|
||||
|
||||
ret = MTD_READ(dev->mtd, readaddr, req->count, (FAR uint8_t *)
|
||||
req->buffer);
|
||||
|
@ -4844,7 +4846,7 @@ static inline int smart_allocsector(FAR struct smart_struct_s *dev,
|
|||
dev->sMap[logsector] = physicalsector;
|
||||
#else
|
||||
dev->sBitMap[logsector >> 3] |= (1 << (logsector & 0x07));
|
||||
smart_add_sector_to_cache(dev, logsector, physicalsector, __LINE__ );
|
||||
smart_add_sector_to_cache(dev, logsector, physicalsector, __LINE__);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MTD_SMART_PACK_COUNTS
|
||||
|
@ -4991,7 +4993,7 @@ static int smart_ioctl(FAR struct inode *inode, int cmd, unsigned long arg)
|
|||
DEBUGASSERT(inode && inode->i_private);
|
||||
|
||||
#ifdef CONFIG_SMARTFS_MULTI_ROOT_DIRS
|
||||
dev = ((FAR struct smart_multiroot_device_s*) inode->i_private)->dev;
|
||||
dev = ((FAR struct smart_multiroot_device_s *)inode->i_private)->dev;
|
||||
#else
|
||||
dev = (FAR struct smart_struct_s *)inode->i_private;
|
||||
#endif
|
||||
|
@ -5027,7 +5029,7 @@ static int smart_ioctl(FAR struct inode *inode, int cmd, unsigned long arg)
|
|||
|
||||
#ifdef CONFIG_SMARTFS_MULTI_ROOT_DIRS
|
||||
ret = smart_getformat(dev, (FAR struct smart_format_s *) arg,
|
||||
((FAR struct smart_multiroot_device_s*) inode->i_private)->rootdirnum);
|
||||
((FAR struct smart_multiroot_device_s *)inode->i_private)->rootdirnum);
|
||||
#else
|
||||
ret = smart_getformat(dev, (FAR struct smart_format_s *) arg);
|
||||
#endif
|
||||
|
@ -5292,8 +5294,8 @@ int smart_initialize(int minor, FAR struct mtd_dev_s *mtd, FAR const char *partn
|
|||
* the SMART device structure and the root directory number.
|
||||
*/
|
||||
|
||||
rootdirdev = (FAR struct smart_multiroot_device_s*) smart_malloc(dev,
|
||||
sizeof(*rootdirdev), "Root Dir");
|
||||
rootdirdev = (FAR struct smart_multiroot_device_s *)
|
||||
smart_malloc(dev, sizeof(*rootdirdev), "Root Dir");
|
||||
if (rootdirdev == NULL)
|
||||
{
|
||||
fdbg("register_blockdriver failed: %d\n", -ret);
|
||||
|
@ -5352,7 +5354,7 @@ errout:
|
|||
#ifdef CONFIG_SMARTFS_MULTI_ROOT_DIRS
|
||||
if (rootdirdev)
|
||||
{
|
||||
smart_free(dev,rootdirdev);
|
||||
smart_free(dev, rootdirdev);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -139,8 +139,8 @@
|
|||
#define SST25_DUMMY 0xa5
|
||||
|
||||
/* Chip Geometries ******************************************************************/
|
||||
/* SST25VF512 capacity is 512Kbit (64Kbit x 8) = 64Kb (8Kb x 8)*/
|
||||
/* SST25VF010 capacity is 1Mbit (128Kbit x 8) = 128Kb (16Kb x 8*/
|
||||
/* SST25VF512 capacity is 512Kbit (64Kbit x 8) = 64Kb (8Kb x 8) */
|
||||
/* SST25VF010 capacity is 1Mbit (128Kbit x 8) = 128Kb (16Kb x 8 */
|
||||
/* SST25VF520 capacity is 2Mbit (256Kbit x 8) = 256Kb (32Kb x 8) */
|
||||
/* SST25VF540 capacity is 4Mbit (512Kbit x 8) = 512Kb (64Kb x 8) */
|
||||
/* SST25VF080 capacity is 8Mbit (1024Kbit x 8) = 1Mb (128Kb x 8) */
|
||||
|
@ -199,7 +199,7 @@ struct sst25_dev_s
|
|||
|
||||
#if defined(CONFIG_SST25_SECTOR512) && !defined(CONFIG_SST25_READONLY)
|
||||
uint8_t flags; /* Buffered sector flags */
|
||||
uint16_t esectno; /* Erase sector number in the cache*/
|
||||
uint16_t esectno; /* Erase sector number in the cache */
|
||||
FAR uint8_t *sector; /* Allocated sector data */
|
||||
#endif
|
||||
};
|
||||
|
@ -583,7 +583,7 @@ static void sst25_byteread(FAR struct sst25_dev_s *priv, FAR uint8_t *buffer,
|
|||
/* Wait for any preceding write or erase operation to complete. */
|
||||
|
||||
status = sst25_waitwritecomplete(priv);
|
||||
DEBUGASSERT((status & (SST25_SR_WEL|SST25_SR_BP_MASK|SST25_SR_AAI)) == 0);
|
||||
DEBUGASSERT((status & (SST25_SR_WEL | SST25_SR_BP_MASK | SST25_SR_AAI)) == 0);
|
||||
UNUSED(status);
|
||||
|
||||
/* Select this FLASH part */
|
||||
|
@ -643,7 +643,7 @@ static void sst25_bytewrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
|
|||
/* Wait for any preceding write or erase operation to complete. */
|
||||
|
||||
status = sst25_waitwritecomplete(priv);
|
||||
DEBUGASSERT((status & (SST25_SR_WEL|SST25_SR_BP_MASK|SST25_SR_AAI)) == 0);
|
||||
DEBUGASSERT((status & (SST25_SR_WEL | SST25_SR_BP_MASK | SST25_SR_AAI)) == 0);
|
||||
|
||||
/* Enable write access to the FLASH */
|
||||
|
||||
|
@ -723,7 +723,7 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
|
|||
/* Wait for any preceding write or erase operation to complete. */
|
||||
|
||||
status = sst25_waitwritecomplete(priv);
|
||||
DEBUGASSERT((status & (SST25_SR_WEL|SST25_SR_BP_MASK|SST25_SR_AAI)) == 0);
|
||||
DEBUGASSERT((status & (SST25_SR_WEL | SST25_SR_BP_MASK | SST25_SR_AAI)) == 0);
|
||||
UNUSED(status);
|
||||
|
||||
/* Enable write access to the FLASH */
|
||||
|
@ -755,7 +755,8 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
|
|||
/* Wait for the preceding write to complete. */
|
||||
|
||||
status = sst25_waitwritecomplete(priv);
|
||||
DEBUGASSERT((status & (SST25_SR_WEL|SST25_SR_BP_MASK|SST25_SR_AAI)) == (SST25_SR_WEL|SST25_SR_AAI));
|
||||
DEBUGASSERT((status & (SST25_SR_WEL | SST25_SR_BP_MASK | SST25_SR_AAI)) ==
|
||||
(SST25_SR_WEL | SST25_SR_AAI));
|
||||
UNUSED(status);
|
||||
|
||||
/* Decrement the word count and advance the write position */
|
||||
|
@ -793,7 +794,8 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
|
|||
/* Wait for the preceding write to complete. */
|
||||
|
||||
status = sst25_waitwritecomplete(priv);
|
||||
DEBUGASSERT((status & (SST25_SR_WEL|SST25_SR_BP_MASK|SST25_SR_AAI)) == (SST25_SR_WEL|SST25_SR_AAI));
|
||||
DEBUGASSERT((status & (SST25_SR_WEL | SST25_SR_BP_MASK | SST25_SR_AAI)) ==
|
||||
(SST25_SR_WEL | SST25_SR_AAI));
|
||||
UNUSED(status);
|
||||
|
||||
/* Decrement the word count and advance the write position */
|
||||
|
|
|
@ -322,7 +322,7 @@ struct st25fl1_dev_s
|
|||
|
||||
#ifdef CONFIG_ST25FL1_SECTOR512
|
||||
uint8_t flags; /* Buffered sector flags */
|
||||
uint16_t esectno; /* Erase sector number in the cache*/
|
||||
uint16_t esectno; /* Erase sector number in the cache */
|
||||
FAR uint8_t *sector; /* Allocated sector data */
|
||||
#endif
|
||||
};
|
||||
|
|
|
@ -657,7 +657,7 @@ static void w25_byteread(FAR struct w25_dev_s *priv, FAR uint8_t *buffer,
|
|||
/* Wait for any preceding write or erase operation to complete. */
|
||||
|
||||
status = w25_waitwritecomplete(priv);
|
||||
DEBUGASSERT((status & (W25_SR_WEL|W25_SR_BP_MASK)) == 0);
|
||||
DEBUGASSERT((status & (W25_SR_WEL | W25_SR_BP_MASK)) == 0);
|
||||
|
||||
/* Make sure that writing is disabled */
|
||||
|
||||
|
@ -715,7 +715,7 @@ static void w25_pagewrite(struct w25_dev_s *priv, FAR const uint8_t *buffer,
|
|||
/* Wait for any preceding write or erase operation to complete. */
|
||||
|
||||
status = w25_waitwritecomplete(priv);
|
||||
DEBUGASSERT((status & (W25_SR_WEL|W25_SR_BP_MASK)) == 0);
|
||||
DEBUGASSERT((status & (W25_SR_WEL | W25_SR_BP_MASK)) == 0);
|
||||
|
||||
/* Enable write access to the FLASH */
|
||||
|
||||
|
|
|
@ -219,9 +219,9 @@ static uint16_t cs89x0_getppreg(struct cs89x0_driver_s *cs89x0, int addr)
|
|||
#endif
|
||||
}
|
||||
|
||||
/* When configured in I/O mode, the CS89x0 is accessed through eight, 16-bit
|
||||
* I/O ports that in the host system's I/O space.
|
||||
*/
|
||||
/* When configured in I/O mode, the CS89x0 is accessed through eight, 16-bit
|
||||
* I/O ports that in the host system's I/O space.
|
||||
*/
|
||||
|
||||
else
|
||||
#endif
|
||||
|
@ -253,9 +253,9 @@ static void cs89x0_putppreg(struct cs89x0_driver_s *cs89x0, int addr, uint16_t v
|
|||
#endif
|
||||
}
|
||||
|
||||
/* When configured in I/O mode, the CS89x0 is accessed through eight, 16-bit
|
||||
* I/O ports that in the host system's I/O space.
|
||||
*/
|
||||
/* When configured in I/O mode, the CS89x0 is accessed through eight, 16-bit
|
||||
* I/O ports that in the host system's I/O space.
|
||||
*/
|
||||
|
||||
else
|
||||
#endif
|
||||
|
@ -397,9 +397,9 @@ static int cs89x0_txpoll(struct net_driver_s *dev)
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void cs89x0_receive(struct cs89x0_driver_s *cs89x0, uint16_t isq)
|
||||
static void cs89x0_receive(FAR struct cs89x0_driver_s *cs89x0, uint16_t isq)
|
||||
{
|
||||
uint16_t *dest;
|
||||
FAR uint16_t *dest;
|
||||
uint16_t rxlength;
|
||||
int nbytes;
|
||||
|
||||
|
@ -422,7 +422,7 @@ static void cs89x0_receive(struct cs89x0_driver_s *cs89x0, uint16_t isq)
|
|||
|
||||
if (isq & RX_CRC_ERROR) != 0)
|
||||
{
|
||||
if (!(isq & (RX_EXTRA_DATA|RX_RUNT)))
|
||||
if (!(isq & (RX_EXTRA_DATA | RX_RUNT)))
|
||||
{
|
||||
cd89x0->cs_stats.rx_crcerrors++;
|
||||
}
|
||||
|
@ -451,7 +451,7 @@ static void cs89x0_receive(struct cs89x0_driver_s *cs89x0, uint16_t isq)
|
|||
* amount of data in cs89x0->cs_dev.d_len
|
||||
*/
|
||||
|
||||
dest = (uint16_t*)cs89x0->cs_dev.d_buf;
|
||||
dest = (FAR uint16_t *)cs89x0->cs_dev.d_buf;
|
||||
for (nbytes = 0; nbytes < rxlength; nbytes += sizeof(uint16_t))
|
||||
{
|
||||
*dest++ = cs89x0_getreg(PPR_RXFRAMELOCATION);
|
||||
|
@ -549,16 +549,16 @@ static void cs89x0_receive(struct cs89x0_driver_s *cs89x0, uint16_t isq)
|
|||
#ifdef CONFIG_NET_ARP
|
||||
if (BUF->type == htons(ETHTYPE_ARP))
|
||||
{
|
||||
arp_arpin(&cs89x0->cs_dev);
|
||||
arp_arpin(&cs89x0->cs_dev);
|
||||
|
||||
/* If the above function invocation resulted in data that should be
|
||||
* sent out on the network, the field d_len will set to a value > 0.
|
||||
*/
|
||||
/* If the above function invocation resulted in data that should be
|
||||
* sent out on the network, the field d_len will set to a value > 0.
|
||||
*/
|
||||
|
||||
if (cs89x0->cs_dev.d_len > 0)
|
||||
{
|
||||
cs89x0_transmit(cs89x0);
|
||||
}
|
||||
if (cs89x0->cs_dev.d_len > 0)
|
||||
{
|
||||
cs89x0_transmit(cs89x0);
|
||||
}
|
||||
}
|
||||
else
|
||||
#endif
|
||||
|
@ -720,13 +720,13 @@ static int cs89x0_interrupt(int irq, FAR void *context)
|
|||
|
||||
case ISQ_RXMISSEVENT:
|
||||
#ifdef CONFIG_C89x0_STATISTICS
|
||||
cd89x0->cs_stats.rx_missederrors += (isq >>6);
|
||||
cd89x0->cs_stats.rx_missederrors += (isq >> 6);
|
||||
#endif
|
||||
break;
|
||||
|
||||
case ISQ_TXCOLEVENT:
|
||||
#ifdef CONFIG_C89x0_STATISTICS
|
||||
cd89x0->cs_stats.collisions += (isq >>6);
|
||||
cd89x0->cs_stats.collisions += (isq >> 6);
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
|
@ -823,7 +823,7 @@ static int cs89x0_ifup(struct net_driver_s *dev)
|
|||
|
||||
ndbg("Bringing up: %d.%d.%d.%d\n",
|
||||
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
|
||||
|
||||
/* Initialize the Ethernet interface */
|
||||
#warning "Missing logic"
|
||||
|
@ -1033,20 +1033,20 @@ int cs89x0_initialize(FAR const cs89x0_driver_s *cs89x0, int devno)
|
|||
|
||||
/* Initialize the driver structure */
|
||||
|
||||
g_cs89x[devno] = cs89x0; /* Used to map IRQ back to instance */
|
||||
cs89x0->cs_dev.d_ifup = cs89x0_ifup; /* I/F down callback */
|
||||
cs89x0->cs_dev.d_ifdown = cs89x0_ifdown; /* I/F up (new IP address) callback */
|
||||
cs89x0->cs_dev.d_txavail = cs89x0_txavail; /* New TX data callback */
|
||||
g_cs89x[devno] = cs89x0; /* Used to map IRQ back to instance */
|
||||
cs89x0->cs_dev.d_ifup = cs89x0_ifup; /* I/F down callback */
|
||||
cs89x0->cs_dev.d_ifdown = cs89x0_ifdown; /* I/F up (new IP address) callback */
|
||||
cs89x0->cs_dev.d_txavail = cs89x0_txavail; /* New TX data callback */
|
||||
#ifdef CONFIG_NET_IGMP
|
||||
cs89x0->cs_dev.d_addmac = cs89x0_addmac; /* Add multicast MAC address */
|
||||
cs89x0->cs_dev.d_rmmac = cs89x0_rmmac; /* Remove multicast MAC address */
|
||||
cs89x0->cs_dev.d_addmac = cs89x0_addmac; /* Add multicast MAC address */
|
||||
cs89x0->cs_dev.d_rmmac = cs89x0_rmmac; /* Remove multicast MAC address */
|
||||
#endif
|
||||
cs89x0->cs_dev.d_private = (void*)cs89x0; /* Used to recover private state from dev */
|
||||
cs89x0->cs_dev.d_private = (FAR void *)cs89x0; /* Used to recover private state from dev */
|
||||
|
||||
/* Create a watchdog for timing polling for and timing of transmisstions */
|
||||
|
||||
cs89x0->cs_txpoll = wd_create(); /* Create periodic poll timer */
|
||||
cs89x0->cs_txtimeout = wd_create(); /* Create TX timeout timer */
|
||||
cs89x0->cs_txpoll = wd_create(); /* Create periodic poll timer */
|
||||
cs89x0->cs_txtimeout = wd_create(); /* Create TX timeout timer */
|
||||
|
||||
/* Read the MAC address from the hardware into cs89x0->cs_dev.d_mac.ether_addr_octet */
|
||||
|
||||
|
|
|
@ -194,8 +194,8 @@
|
|||
#define DM9X_ISR_IOMODE16 (0 << 6) /* IO mode = 16 bit */
|
||||
#define DM9X_ISR_IOMODE32 (1 << 6) /* IO mode = 32 bit */
|
||||
|
||||
#define DM9X_IMRENABLE (DM9X_INT_PR|DM9X_INT_PT|DM9X_INT_LNKCHG|DM9X_IMR_PAR)
|
||||
#define DM9X_IMRRXDISABLE (DM9X_INT_PT|DM9X_INT_LNKCHG|DM9X_IMR_PAR)
|
||||
#define DM9X_IMRENABLE (DM9X_INT_PR | DM9X_INT_PT | DM9X_INT_LNKCHG | DM9X_IMR_PAR)
|
||||
#define DM9X_IMRRXDISABLE (DM9X_INT_PT | DM9X_INT_LNKCHG | DM9X_IMR_PAR)
|
||||
#define DM9X_IMRDISABLE (DM9X_IMR_PAR)
|
||||
|
||||
/* EEPROM/PHY control regiser bits */
|
||||
|
@ -224,7 +224,7 @@
|
|||
#define DM9X_RXC_WTDIS (1 << 6) /* Disable watchdog timer */
|
||||
#define DM9X_RXC_HASHALL (1 << 7) /* Filter all addresses in hash table */
|
||||
|
||||
#define DM9X_RXCSETUP (DM9X_RXC_DISCRC|DM9X_RXC_DISLONG)
|
||||
#define DM9X_RXCSETUP (DM9X_RXC_DISCRC | DM9X_RXC_DISLONG)
|
||||
|
||||
/* EEPHY bit settings */
|
||||
|
||||
|
@ -458,7 +458,7 @@ static void putreg(int reg, uint8_t value)
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void read8(uint8_t *ptr, int len)
|
||||
static void read8(FAR uint8_t *ptr, int len)
|
||||
{
|
||||
nvdbg("Read %d bytes (8-bit mode)\n", len);
|
||||
for (; len > 0; len--)
|
||||
|
@ -467,9 +467,10 @@ static void read8(uint8_t *ptr, int len)
|
|||
}
|
||||
}
|
||||
|
||||
static void read16(uint8_t *ptr, int len)
|
||||
static void read16(FAR uint8_t *ptr, int len)
|
||||
{
|
||||
register uint16_t *ptr16 = (uint16_t*)ptr;
|
||||
FAR uint16_t *ptr16 = (FAR uint16_t *)ptr;
|
||||
|
||||
nvdbg("Read %d bytes (16-bit mode)\n", len);
|
||||
for (; len > 0; len -= sizeof(uint16_t))
|
||||
{
|
||||
|
@ -477,9 +478,10 @@ static void read16(uint8_t *ptr, int len)
|
|||
}
|
||||
}
|
||||
|
||||
static void read32(uint8_t *ptr, int len)
|
||||
static void read32(FARuint8_t *ptr, int len)
|
||||
{
|
||||
register uint32_t *ptr32 = (uint32_t*)ptr;
|
||||
FAR uint32_t *ptr32 = (FAR uint32_t *)ptr;
|
||||
|
||||
nvdbg("Read %d bytes (32-bit mode)\n", len);
|
||||
for (; len > 0; len -= sizeof(uint32_t))
|
||||
{
|
||||
|
@ -548,9 +550,10 @@ static void discard32(int len)
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void write8(const uint8_t *ptr, int len)
|
||||
static void write8(FAR const uint8_t *ptr, int len)
|
||||
{
|
||||
nvdbg("Write %d bytes (8-bit mode)\n", len);
|
||||
|
||||
for (; len > 0; len--)
|
||||
{
|
||||
DM9X_DATA = (*ptr++ & 0xff);
|
||||
|
@ -559,7 +562,8 @@ static void write8(const uint8_t *ptr, int len)
|
|||
|
||||
static void write16(const uint8_t *ptr, int len)
|
||||
{
|
||||
register uint16_t *ptr16 = (uint16_t*)ptr;
|
||||
FAR uint16_t *ptr16 = (FAR uint16_t *)ptr;
|
||||
|
||||
nvdbg("Write %d bytes (16-bit mode)\n", len);
|
||||
|
||||
for (; len > 0; len -= sizeof(uint16_t))
|
||||
|
@ -568,10 +572,12 @@ static void write16(const uint8_t *ptr, int len)
|
|||
}
|
||||
}
|
||||
|
||||
static void write32(const uint8_t *ptr, int len)
|
||||
static void write32(FAR const uint8_t *ptr, int len)
|
||||
{
|
||||
register uint32_t *ptr32 = (uint32_t*)ptr;
|
||||
FAR uint32_t *ptr32 = (FAR uint32_t *)ptr;
|
||||
|
||||
nvdbg("Write %d bytes (32-bit mode)\n", len);
|
||||
|
||||
for (; len > 0; len -= sizeof(uint32_t))
|
||||
{
|
||||
DM9X_DATA = *ptr32++;
|
||||
|
@ -602,7 +608,7 @@ static uint16_t dm9x_readsrom(struct dm9x_driver_s *dm9x, int offset)
|
|||
putreg(DM9X_EEPHYC, DM9X_EEPHYC_ERPRR);
|
||||
up_udelay(200);
|
||||
putreg(DM9X_EEPHYC, 0x00);
|
||||
return (getreg(DM9X_EEPHYDL) + (getreg(DM9X_EEPHYDH) << 8) );
|
||||
return (getreg(DM9X_EEPHYDL) + (getreg(DM9X_EEPHYDH) << 8));
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -632,7 +638,7 @@ static uint16_t dm9x_phyread(struct dm9x_driver_s *dm9x, int reg)
|
|||
|
||||
/* Issue PHY read command pulse in the EEPROM/PHY control register */
|
||||
|
||||
putreg(DM9X_EEPHYC, (DM9X_EEPHYC_ERPRR|DM9X_EEPHYC_EPOS));
|
||||
putreg(DM9X_EEPHYC, (DM9X_EEPHYC_ERPRR | DM9X_EEPHYC_EPOS));
|
||||
up_udelay(100);
|
||||
putreg(DM9X_EEPHYC, 0x00);
|
||||
|
||||
|
@ -654,7 +660,7 @@ static void dm9x_phywrite(struct dm9x_driver_s *dm9x, int reg, uint16_t value)
|
|||
|
||||
/* Issue PHY write command pulse in the EEPROM/PHY control register */
|
||||
|
||||
putreg(DM9X_EEPHYC, (DM9X_EEPHYC_ERPRW|DM9X_EEPHYC_EPOS));
|
||||
putreg(DM9X_EEPHYC, (DM9X_EEPHYC_ERPRW | DM9X_EEPHYC_EPOS));
|
||||
up_udelay(500);
|
||||
putreg(DM9X_EEPHYC, 0x0);
|
||||
}
|
||||
|
@ -803,7 +809,7 @@ static int dm9x_transmit(struct dm9x_driver_s *dm9x)
|
|||
#if !defined(CONFIG_DM9X_ETRANS)
|
||||
/* Issue TX polling command */
|
||||
|
||||
putreg(DM9X_TXC, 0x1); /* Cleared after TX complete*/
|
||||
putreg(DM9X_TXC, 0x1); /* Cleared after TX complete */
|
||||
#endif
|
||||
|
||||
/* Clear count of back-to-back RX packet transfers */
|
||||
|
@ -914,7 +920,7 @@ static int dm9x_txpoll(struct net_driver_s *dev)
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void dm9x_receive(struct dm9x_driver_s *dm9x)
|
||||
static void dm9x_receive(FAR struct dm9x_driver_s *dm9x)
|
||||
{
|
||||
union rx_desc_u rx;
|
||||
bool bchecksumready;
|
||||
|
@ -946,7 +952,7 @@ static void dm9x_receive(struct dm9x_driver_s *dm9x)
|
|||
|
||||
/* Read packet status & length */
|
||||
|
||||
dm9x->dm_read((uint8_t*)&rx, 4);
|
||||
dm9x->dm_read((FAR uint8_t *)&rx, 4);
|
||||
|
||||
/* Check if any errors were reported by the hardware */
|
||||
|
||||
|
@ -1025,9 +1031,9 @@ static void dm9x_receive(struct dm9x_driver_s *dm9x)
|
|||
arp_ipin(&dm9x->dm_dev);
|
||||
ipv4_input(&dm9x->dm_dev);
|
||||
|
||||
/* If the above function invocation resulted in data that should be
|
||||
* sent out on the network, the field d_len will set to a value > 0.
|
||||
*/
|
||||
/* If the above function invocation resulted in data that should be
|
||||
* sent out on the network, the field d_len will set to a value > 0.
|
||||
*/
|
||||
|
||||
if (dm9x->dm_dev.d_len > 0)
|
||||
{
|
||||
|
@ -1062,9 +1068,9 @@ static void dm9x_receive(struct dm9x_driver_s *dm9x)
|
|||
|
||||
ipv6_input(&dm9x->dm_dev);
|
||||
|
||||
/* If the above function invocation resulted in data that should be
|
||||
* sent out on the network, the field d_len will set to a value > 0.
|
||||
*/
|
||||
/* If the above function invocation resulted in data that should be
|
||||
* sent out on the network, the field d_len will set to a value > 0.
|
||||
*/
|
||||
|
||||
if (dm9x->dm_dev.d_len > 0)
|
||||
{
|
||||
|
@ -1095,9 +1101,9 @@ static void dm9x_receive(struct dm9x_driver_s *dm9x)
|
|||
{
|
||||
arp_arpin(&dm9x->dm_dev);
|
||||
|
||||
/* If the above function invocation resulted in data that should be
|
||||
* sent out on the network, the field d_len will set to a value > 0.
|
||||
*/
|
||||
/* If the above function invocation resulted in data that should be
|
||||
* sent out on the network, the field d_len will set to a value > 0.
|
||||
*/
|
||||
|
||||
if (dm9x->dm_dev.d_len > 0)
|
||||
{
|
||||
|
@ -1230,8 +1236,8 @@ static int dm9x_interrupt(int irq, FAR void *context)
|
|||
|
||||
for (i = 0; i < 500; i++)
|
||||
{
|
||||
dm9x_phyread(dm9x,0x1);
|
||||
if (dm9x_phyread(dm9x,0x1) & 0x4) /*Link OK*/
|
||||
dm9x_phyread(dm9x, 0x1);
|
||||
if (dm9x_phyread(dm9x, 0x1) & 0x4) /* Link OK */
|
||||
{
|
||||
/* Wait to get detected speed */
|
||||
|
||||
|
@ -1413,7 +1419,7 @@ static inline void dm9x_phymode(struct dm9x_driver_s *dm9x)
|
|||
|
||||
#ifdef CONFIG_DM9X_MODE_AUTO
|
||||
phyreg0 = 0x1200; /* Auto-negotiation & Restart Auto-negotiation */
|
||||
phyreg4 = 0x01e1; /* Default flow control disable*/
|
||||
phyreg4 = 0x01e1; /* Default flow control disable */
|
||||
#elif defined(CONFIG_DM9X_MODE_10MHD)
|
||||
phyreg4 = 0x21;
|
||||
phyreg0 = 0x1000;
|
||||
|
@ -1459,7 +1465,7 @@ static int dm9x_ifup(struct net_driver_s *dev)
|
|||
|
||||
ndbg("Bringing up: %d.%d.%d.%d\n",
|
||||
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
|
||||
|
||||
/* Initilize DM90x0 chip */
|
||||
|
||||
|
@ -1688,9 +1694,9 @@ static void dm9x_bringup(struct dm9x_driver_s *dm9x)
|
|||
* in 10us; 20us guarantees completion of the reset
|
||||
*/
|
||||
|
||||
putreg(DM9X_NETC, (DM9X_NETC_RST|DM9X_NETC_LBK1));
|
||||
putreg(DM9X_NETC, (DM9X_NETC_RST | DM9X_NETC_LBK1));
|
||||
up_udelay(20);
|
||||
putreg(DM9X_NETC, (DM9X_NETC_RST|DM9X_NETC_LBK1));
|
||||
putreg(DM9X_NETC, (DM9X_NETC_RST | DM9X_NETC_LBK1));
|
||||
up_udelay(20);
|
||||
|
||||
/* Configure I/O mode */
|
||||
|
@ -1729,7 +1735,7 @@ static void dm9x_bringup(struct dm9x_driver_s *dm9x)
|
|||
putreg(DM9X_TXC, 0x00); /* Clear TX Polling */
|
||||
putreg(DM9X_BPTHRES, 0x3f); /* Less 3kb, 600us */
|
||||
putreg(DM9X_SMODEC, 0x00); /* Special mode */
|
||||
putreg(DM9X_NETS, (DM9X_NETS_WAKEST|DM9X_NETS_TX1END|DM9X_NETS_TX2END)); /* Clear TX status */
|
||||
putreg(DM9X_NETS, (DM9X_NETS_WAKEST | DM9X_NETS_TX1END | DM9X_NETS_TX2END)); /* Clear TX status */
|
||||
putreg(DM9X_ISR, DM9X_INT_ALL); /* Clear interrupt status */
|
||||
|
||||
#if defined(CONFIG_DM9X_CHECKSUM)
|
||||
|
@ -1794,7 +1800,7 @@ static void dm9x_reset(struct dm9x_driver_s *dm9x)
|
|||
dm9x->dm_b100M = false;
|
||||
for (i = 0; i < 1000; i++)
|
||||
{
|
||||
if (dm9x_phyread(dm9x,0x1) & 0x4)
|
||||
if (dm9x_phyread(dm9x, 0x1) & 0x4)
|
||||
{
|
||||
if (dm9x_phyread(dm9x, 0) &0x2000)
|
||||
{
|
||||
|
@ -1874,12 +1880,12 @@ int dm9x_initialize(void)
|
|||
g_dm9x[0].dm_dev.d_addmac = dm9x_addmac; /* Add multicast MAC address */
|
||||
g_dm9x[0].dm_dev.d_rmmac = dm9x_rmmac; /* Remove multicast MAC address */
|
||||
#endif
|
||||
g_dm9x[0].dm_dev.d_private = (void*)g_dm9x; /* Used to recover private state from dev */
|
||||
g_dm9x[0].dm_dev.d_private = (FAR void *)g_dm9x; /* Used to recover private state from dev */
|
||||
|
||||
/* Create a watchdog for timing polling for and timing of transmisstions */
|
||||
|
||||
g_dm9x[0].dm_txpoll = wd_create(); /* Create periodic poll timer */
|
||||
g_dm9x[0].dm_txtimeout = wd_create(); /* Create TX timeout timer */
|
||||
g_dm9x[0].dm_txpoll = wd_create(); /* Create periodic poll timer */
|
||||
g_dm9x[0].dm_txtimeout = wd_create(); /* Create TX timeout timer */
|
||||
|
||||
/* Read the MAC address */
|
||||
|
||||
|
|
|
@ -142,7 +142,10 @@ struct e1000_dev_head
|
|||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
static struct e1000_dev_head e1000_list = {0};
|
||||
static struct e1000_dev_head e1000_list =
|
||||
{
|
||||
0
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Function Prototypes
|
||||
|
@ -195,24 +198,24 @@ void e1000_reset(struct e1000_dev *dev)
|
|||
/* Reset the network controller hardware */
|
||||
|
||||
dev_control = 0;
|
||||
dev_control |= (1<<0); /* FD-bit (Full Duplex) */
|
||||
dev_control |= (0<<2); /* GIOMD-bit (GIO Master Disable) */
|
||||
dev_control |= (1<<3); /* LRST-bit (Link Reset) */
|
||||
dev_control |= (1<<6); /* SLU-bit (Set Link Up) */
|
||||
dev_control |= (2<<8); /* SPEED=2 (1000Mbps) */
|
||||
dev_control |= (0<<11); /* FRCSPD-bit (Force Speed) */
|
||||
dev_control |= (0<<12); /* FRCDPLX-bit (Force Duplex) */
|
||||
dev_control |= (0<<20); /* ADVD3WUC-bit (Advertise D3 Wake Up Cap) */
|
||||
dev_control |= (1<<26); /* RST-bit (Device Reset) */
|
||||
dev_control |= (1<<27); /* RFCE-bit (Receive Flow Control Enable) */
|
||||
dev_control |= (1<<28); /* TFCE-bit (Transmit Flow Control Enable) */
|
||||
dev_control |= (0<<30); /* VME-bit (VLAN Mode Enable) */
|
||||
dev_control |= (0<<31); /* PHY_RST-bit (PHY Reset) */
|
||||
dev_control |= (1 << 0); /* FD-bit (Full Duplex) */
|
||||
dev_control |= (0 << 2); /* GIOMD-bit (GIO Master Disable) */
|
||||
dev_control |= (1 << 3); /* LRST-bit (Link Reset) */
|
||||
dev_control |= (1 << 6); /* SLU-bit (Set Link Up) */
|
||||
dev_control |= (2 << 8); /* SPEED=2 (1000Mbps) */
|
||||
dev_control |= (0 << 11); /* FRCSPD-bit (Force Speed) */
|
||||
dev_control |= (0 << 12); /* FRCDPLX-bit (Force Duplex) */
|
||||
dev_control |= (0 << 20); /* ADVD3WUC-bit (Advertise D3 Wake Up Cap) */
|
||||
dev_control |= (1 << 26); /* RST-bit (Device Reset) */
|
||||
dev_control |= (1 << 27); /* RFCE-bit (Receive Flow Control Enable) */
|
||||
dev_control |= (1 << 28); /* TFCE-bit (Transmit Flow Control Enable) */
|
||||
dev_control |= (0 << 30); /* VME-bit (VLAN Mode Enable) */
|
||||
dev_control |= (0 << 31); /* PHY_RST-bit (PHY Reset) */
|
||||
|
||||
e1000_outl(dev, E1000_IMC, 0xFFFFFFFF);
|
||||
e1000_outl(dev, E1000_STATUS, 0x00000000);
|
||||
e1000_outl(dev, E1000_CTRL, dev_control);
|
||||
dev_control &= ~(1<<26); /* clear RST-bit (Device Reset) */
|
||||
dev_control &= ~(1 << 26); /* clear RST-bit (Device Reset) */
|
||||
e1000_outl(dev, E1000_CTRL, dev_control);
|
||||
up_mdelay(10);
|
||||
e1000_outl(dev, E1000_CTRL_EXT, 0x001401C0);
|
||||
|
@ -228,13 +231,13 @@ void e1000_turn_on(struct e1000_dev *dev)
|
|||
/* turn on the controller's receive engine */
|
||||
|
||||
rx_control = e1000_inl(dev, E1000_RCTL);
|
||||
rx_control |= (1<<1);
|
||||
rx_control |= (1 << 1);
|
||||
e1000_outl(dev, E1000_RCTL, rx_control);
|
||||
|
||||
/* turn on the controller's transmit engine */
|
||||
|
||||
tx_control = e1000_inl(dev, E1000_TCTL);
|
||||
tx_control |= (1<<1);
|
||||
tx_control |= (1 << 1);
|
||||
e1000_outl(dev, E1000_TCTL, tx_control);
|
||||
|
||||
/* enable the controller's interrupts */
|
||||
|
@ -242,11 +245,11 @@ void e1000_turn_on(struct e1000_dev *dev)
|
|||
e1000_outl(dev, E1000_ICR, 0xFFFFFFFF);
|
||||
e1000_outl(dev, E1000_IMC, 0xFFFFFFFF);
|
||||
|
||||
ims |= 1<<0; /* TXDW */
|
||||
ims |= 1<<1; /* TXQE */
|
||||
ims |= 1<<2; /* LSC */
|
||||
ims |= 1<<4; /* RXDMT0 */
|
||||
ims |= 1<<7; /* RXT0 */
|
||||
ims |= 1 << 0; /* TXDW */
|
||||
ims |= 1 << 1; /* TXQE */
|
||||
ims |= 1 << 2; /* LSC */
|
||||
ims |= 1 << 4; /* RXDMT0 */
|
||||
ims |= 1 << 7; /* RXT0 */
|
||||
e1000_outl(dev, E1000_IMS, ims);
|
||||
}
|
||||
|
||||
|
@ -258,13 +261,13 @@ void e1000_turn_off(struct e1000_dev *dev)
|
|||
/* turn off the controller's receive engine */
|
||||
|
||||
rx_control = e1000_inl(dev, E1000_RCTL);
|
||||
rx_control &= ~(1<<1);
|
||||
rx_control &= ~(1 << 1);
|
||||
e1000_outl(dev, E1000_RCTL, rx_control);
|
||||
|
||||
/* turn off the controller's transmit engine */
|
||||
|
||||
tx_control = e1000_inl(dev, E1000_TCTL);
|
||||
tx_control &= ~(1<<1);
|
||||
tx_control &= ~(1 << 1);
|
||||
e1000_outl(dev, E1000_TCTL, tx_control);
|
||||
|
||||
/* turn off the controller's interrupts */
|
||||
|
@ -287,39 +290,39 @@ void e1000_init(struct e1000_dev *dev)
|
|||
/* configure the controller's 'receive' engine */
|
||||
|
||||
rx_control = 0;
|
||||
rx_control |= (0<<1); /* EN-bit (Enable) */
|
||||
rx_control |= (0<<2); /* SPB-bit (Store Bad Packets) */
|
||||
rx_control |= (0<<3); /* UPE-bit (Unicast Promiscuous Mode) */
|
||||
rx_control |= (1<<4); /* MPE-bit (Multicast Promiscuous Mode) */
|
||||
rx_control |= (0<<5); /* LPE-bit (Long Packet Enable) */
|
||||
rx_control |= (0<<6); /* LBM=0 (Loop-Back Mode) */
|
||||
rx_control |= (0<<8); /* RDMTS=0 (Rx Descriptor Min Threshold Size) */
|
||||
rx_control |= (0<<10); /* DTYPE=0 (Descriptor Type) */
|
||||
rx_control |= (0<<12); /* MO=0 (Multicast Offset) */
|
||||
rx_control |= (1<<15); /* BAM-bit (Broadcast Address Mode) */
|
||||
rx_control |= (0<<16); /* BSIZE=0 (Buffer Size = 2048) */
|
||||
rx_control |= (0<<18); /* VLE-bit (VLAN filter Enable) */
|
||||
rx_control |= (0<<19); /* CFIEN-bit (Canonical Form Indicator Enable) */
|
||||
rx_control |= (0<<20); /* CFI-bit (Canonical Form Indicator) */
|
||||
rx_control |= (1<<22); /* DPF-bit (Discard Pause Frames) */
|
||||
rx_control |= (0<<23); /* PMCF-bit (Pass MAC Control Frames) */
|
||||
rx_control |= (0<<25); /* BSEX=0 (Buffer Size EXtension) */
|
||||
rx_control |= (1<<26); /* SECRC-bit (Strip Ethernet CRC) */
|
||||
rx_control |= (0<<27); /* FLEXBUF=0 (Flexible Buffer size) */
|
||||
rx_control |= (0 << 1); /* EN-bit (Enable) */
|
||||
rx_control |= (0 << 2); /* SPB-bit (Store Bad Packets) */
|
||||
rx_control |= (0 << 3); /* UPE-bit (Unicast Promiscuous Mode) */
|
||||
rx_control |= (1 << 4); /* MPE-bit (Multicast Promiscuous Mode) */
|
||||
rx_control |= (0 << 5); /* LPE-bit (Long Packet Enable) */
|
||||
rx_control |= (0 << 6); /* LBM=0 (Loop-Back Mode) */
|
||||
rx_control |= (0 << 8); /* RDMTS=0 (Rx Descriptor Min Threshold Size) */
|
||||
rx_control |= (0 << 10); /* DTYPE=0 (Descriptor Type) */
|
||||
rx_control |= (0 << 12); /* MO=0 (Multicast Offset) */
|
||||
rx_control |= (1 << 15); /* BAM-bit (Broadcast Address Mode) */
|
||||
rx_control |= (0 << 16); /* BSIZE=0 (Buffer Size = 2048) */
|
||||
rx_control |= (0 << 18); /* VLE-bit (VLAN filter Enable) */
|
||||
rx_control |= (0 << 19); /* CFIEN-bit (Canonical Form Indicator Enable) */
|
||||
rx_control |= (0 << 20); /* CFI-bit (Canonical Form Indicator) */
|
||||
rx_control |= (1 << 22); /* DPF-bit (Discard Pause Frames) */
|
||||
rx_control |= (0 << 23); /* PMCF-bit (Pass MAC Control Frames) */
|
||||
rx_control |= (0 << 25); /* BSEX=0 (Buffer Size EXtension) */
|
||||
rx_control |= (1 << 26); /* SECRC-bit (Strip Ethernet CRC) */
|
||||
rx_control |= (0 << 27); /* FLEXBUF=0 (Flexible Buffer size) */
|
||||
e1000_outl(dev, E1000_RCTL, rx_control);
|
||||
|
||||
/* configure the controller's 'transmit' engine */
|
||||
|
||||
tx_control = 0;
|
||||
tx_control |= (0<<1); /* EN-bit (Enable) */
|
||||
tx_control |= (1<<3); /* PSP-bit (Pad Short Packets) */
|
||||
tx_control |= (15<<4); /* CT=15 (Collision Threshold) */
|
||||
tx_control |= (63<<12); /* COLD=63 (Collision Distance) */
|
||||
tx_control |= (0<<22); /* SWXOFF-bit (Software XOFF) */
|
||||
tx_control |= (1<<24); /* RTLC-bit (Re-Transmit on Late Collision) */
|
||||
tx_control |= (0<<25); /* UNORTX-bit (Underrun No Re-Transmit) */
|
||||
tx_control |= (0<<26); /* TXCSCMT=0 (TxDesc Mininum Threshold) */
|
||||
tx_control |= (0<<28); /* MULR-bit (Multiple Request Support) */
|
||||
tx_control |= (0 << 1); /* EN-bit (Enable) */
|
||||
tx_control |= (1 << 3); /* PSP-bit (Pad Short Packets) */
|
||||
tx_control |= (15 << 4); /* CT=15 (Collision Threshold) */
|
||||
tx_control |= (63 << 12); /* COLD=63 (Collision Distance) */
|
||||
tx_control |= (0 << 22); /* SWXOFF-bit (Software XOFF) */
|
||||
tx_control |= (1 << 24); /* RTLC-bit (Re-Transmit on Late Collision) */
|
||||
tx_control |= (0 << 25); /* UNORTX-bit (Underrun No Re-Transmit) */
|
||||
tx_control |= (0 << 26); /* TXCSCMT=0 (TxDesc Mininum Threshold) */
|
||||
tx_control |= (0 << 28); /* MULR-bit (Multiple Request Support) */
|
||||
e1000_outl(dev, E1000_TCTL, tx_control);
|
||||
|
||||
/* hardware flow control */
|
||||
|
@ -328,27 +331,27 @@ void e1000_init(struct e1000_dev *dev)
|
|||
|
||||
/* get receive FIFO size */
|
||||
|
||||
pba = (pba & 0x000000ff)<<10;
|
||||
pba = (pba & 0x000000ff) << 10;
|
||||
e1000_outl(dev, E1000_FCAL, 0x00C28001);
|
||||
e1000_outl(dev, E1000_FCAH, 0x00000100);
|
||||
e1000_outl(dev, E1000_FCT, 0x00008808);
|
||||
e1000_outl(dev, E1000_FCTTV, 0x00000680);
|
||||
e1000_outl(dev, E1000_FCRTL, (pba*8/10)|0x80000000);
|
||||
e1000_outl(dev, E1000_FCRTH, pba*9/10);
|
||||
e1000_outl(dev, E1000_FCRTL, (pba * 8 / 10) | 0x80000000);
|
||||
e1000_outl(dev, E1000_FCRTH, pba * 9 / 10);
|
||||
|
||||
/* setup tx rings */
|
||||
|
||||
txd_phys = PADDR((uintptr_t)dev->tx_ring.desc);
|
||||
kmem_phys = PADDR((uintptr_t)dev->tx_ring.buf);
|
||||
for (i=0; i<CONFIG_E1000_N_TX_DESC; i++,kmem_phys+=CONFIG_E1000_BUFF_SIZE)
|
||||
for (i = 0; i < CONFIG_E1000_N_TX_DESC; i++, kmem_phys += CONFIG_E1000_BUFF_SIZE)
|
||||
{
|
||||
dev->tx_ring.desc[i].base_address = kmem_phys;
|
||||
dev->tx_ring.desc[i].base_address = kmem_phys;
|
||||
dev->tx_ring.desc[i].packet_length = 0;
|
||||
dev->tx_ring.desc[i].cksum_offset = 0;
|
||||
dev->tx_ring.desc[i].cksum_origin = 0;
|
||||
dev->tx_ring.desc[i].desc_status = 1;
|
||||
dev->tx_ring.desc[i].desc_command = (1<<0)|(1<<1)|(1<<3);
|
||||
dev->tx_ring.desc[i].special_info = 0;
|
||||
dev->tx_ring.desc[i].cksum_offset = 0;
|
||||
dev->tx_ring.desc[i].cksum_origin = 0;
|
||||
dev->tx_ring.desc[i].desc_status = 1;
|
||||
dev->tx_ring.desc[i].desc_command = (1 << 0) | (1 << 1) | (1 << 3);
|
||||
dev->tx_ring.desc[i].special_info = 0;
|
||||
}
|
||||
|
||||
dev->tx_ring.tail = 0;
|
||||
|
@ -359,14 +362,14 @@ void e1000_init(struct e1000_dev *dev)
|
|||
|
||||
e1000_outl(dev, E1000_TDBAL, txd_phys);
|
||||
e1000_outl(dev, E1000_TDBAH, 0x00000000);
|
||||
e1000_outl(dev, E1000_TDLEN, CONFIG_E1000_N_TX_DESC*16);
|
||||
e1000_outl(dev, E1000_TDLEN, CONFIG_E1000_N_TX_DESC * 16);
|
||||
e1000_outl(dev, E1000_TXDCTL, 0x01010000);
|
||||
|
||||
/* setup rx rings */
|
||||
|
||||
rxd_phys = PADDR((uintptr_t)dev->rx_ring.desc);
|
||||
kmem_phys = PADDR((uintptr_t)dev->rx_ring.buf);
|
||||
for (i=0; i<CONFIG_E1000_N_RX_DESC; i++,kmem_phys+=CONFIG_E1000_BUFF_SIZE)
|
||||
for (i = 0; i < CONFIG_E1000_N_RX_DESC; i++, kmem_phys += CONFIG_E1000_BUFF_SIZE)
|
||||
{
|
||||
dev->rx_ring.desc[i].base_address = kmem_phys;
|
||||
dev->rx_ring.desc[i].packet_length = 0;
|
||||
|
@ -440,7 +443,7 @@ static int e1000_transmit(struct e1000_dev *e1000)
|
|||
|
||||
/* prepare the transmit-descriptor */
|
||||
|
||||
e1000->tx_ring.desc[tail].packet_length = count<60 ? 60:count;
|
||||
e1000->tx_ring.desc[tail].packet_length = count < 60 ? 60 : count;
|
||||
e1000->tx_ring.desc[tail].desc_status = 0;
|
||||
|
||||
/* give ownership of this descriptor to the network controller */
|
||||
|
@ -803,7 +806,7 @@ static int e1000_ifup(struct net_driver_s *dev)
|
|||
|
||||
ndbg("Bringing up: %d.%d.%d.%d\n",
|
||||
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
|
||||
|
||||
/* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
|
||||
|
||||
|
@ -993,7 +996,7 @@ static irqreturn_t e1000_interrupt_handler(int irq, void *dev_id)
|
|||
|
||||
/* Link status change */
|
||||
|
||||
if (intr_cause & (1<<2))
|
||||
if (intr_cause & (1 << 2))
|
||||
{
|
||||
if (e1000_inl(e1000, E1000_STATUS) & 2)
|
||||
{
|
||||
|
@ -1009,14 +1012,14 @@ static irqreturn_t e1000_interrupt_handler(int irq, void *dev_id)
|
|||
|
||||
/* Rx-descriptor Timer expired */
|
||||
|
||||
if (intr_cause & (1<<7))
|
||||
if (intr_cause & (1 << 7))
|
||||
{
|
||||
e1000_receive(e1000);
|
||||
}
|
||||
|
||||
/* Tx queue empty */
|
||||
|
||||
if (intr_cause & (1<<1))
|
||||
if (intr_cause & (1 << 1))
|
||||
{
|
||||
wd_cancel(e1000->txtimeout);
|
||||
}
|
||||
|
@ -1028,7 +1031,7 @@ static irqreturn_t e1000_interrupt_handler(int irq, void *dev_id)
|
|||
|
||||
/* Tx-descriptor Written back */
|
||||
|
||||
if (intr_cause & (1<<0))
|
||||
if (intr_cause & (1 << 0))
|
||||
{
|
||||
devif_poll(&e1000->netdev, e1000_txpoll);
|
||||
}
|
||||
|
@ -1036,7 +1039,7 @@ static irqreturn_t e1000_interrupt_handler(int irq, void *dev_id)
|
|||
|
||||
/* Rx-Descriptors Low */
|
||||
|
||||
if (intr_cause & (1<<4))
|
||||
if (intr_cause & (1 << 4))
|
||||
{
|
||||
int tail;
|
||||
|
||||
|
@ -1054,12 +1057,42 @@ static irqreturn_t e1000_interrupt_handler(int irq, void *dev_id)
|
|||
|
||||
static pci_id_t e1000_id_table[] =
|
||||
{
|
||||
{.sep = {INTEL_VENDERID, E1000_82573L}},
|
||||
{.sep = {INTEL_VENDERID, E1000_82540EM}},
|
||||
{.sep = {INTEL_VENDERID, E1000_82574L}},
|
||||
{.sep = {INTEL_VENDERID, E1000_82567LM}},
|
||||
{.sep = {INTEL_VENDERID, E1000_82541PI}},
|
||||
{.sep = {0,0}}
|
||||
{
|
||||
.sep =
|
||||
{
|
||||
INTEL_VENDERID, E1000_82573L
|
||||
}
|
||||
},
|
||||
{
|
||||
.sep =
|
||||
{
|
||||
INTEL_VENDERID, E1000_82540EM
|
||||
}
|
||||
},
|
||||
{
|
||||
.sep =
|
||||
{
|
||||
INTEL_VENDERID, E1000_82574L
|
||||
}
|
||||
},
|
||||
{
|
||||
.sep =
|
||||
{
|
||||
INTEL_VENDERID, E1000_82567LM
|
||||
}
|
||||
},
|
||||
{
|
||||
.sep =
|
||||
{
|
||||
INTEL_VENDERID, E1000_82541PI
|
||||
}
|
||||
},
|
||||
{
|
||||
.sep =
|
||||
{
|
||||
0, 0
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
static int e1000_probe(uint16_t addr, pci_id_t id)
|
||||
|
@ -1149,14 +1182,14 @@ static int e1000_probe(uint16_t addr, pci_id_t id)
|
|||
|
||||
/* alloc memory for tx ring */
|
||||
|
||||
dev->tx_ring.desc = (struct tx_desc*)kmem;
|
||||
dev->tx_ring.desc = (FAR struct tx_desc *)kmem;
|
||||
kmem += CONFIG_E1000_N_TX_DESC * sizeof(struct tx_desc);
|
||||
dev->tx_ring.buf = kmem;
|
||||
kmem += CONFIG_E1000_N_TX_DESC * CONFIG_E1000_BUFF_SIZE;
|
||||
|
||||
/* alloc memory for rx rings */
|
||||
|
||||
dev->rx_ring.desc = (struct rx_desc*)kmem;
|
||||
dev->rx_ring.desc = (FAR struct rx_desc *)kmem;
|
||||
kmem += CONFIG_E1000_N_RX_DESC * sizeof(struct rx_desc);
|
||||
dev->rx_ring.buf = kmem;
|
||||
|
||||
|
@ -1235,7 +1268,7 @@ void e1000_mod_exit(void)
|
|||
CONFIG_E1000_N_RX_DESC * CONFIG_E1000_BUFF_SIZE;
|
||||
size = ROUNDUP(size, PGSIZE);
|
||||
|
||||
for (dev=e1000_list.next; dev!=NULL; dev=dev->next)
|
||||
for (dev = e1000_list.next; dev != NULL; dev = dev->next)
|
||||
{
|
||||
netdev_unregister(&dev->netdev);
|
||||
e1000_reset(dev);
|
||||
|
|
|
@ -203,7 +203,7 @@
|
|||
# define enc_cmddump(c) \
|
||||
lowsyslog(LOG_DEBUG, "ENC28J60: CMD: %02x\n", c);
|
||||
# define enc_bmdump(c,b,s) \
|
||||
lowsyslog(LOG_DEBUG, "ENC28J60: CMD: %02x buffer: %p length: %d\n", c,b,s);
|
||||
lowsyslog(LOG_DEBUG, "ENC28J60: CMD: %02x buffer: %p length: %d\n", c, b, s);
|
||||
#else
|
||||
# define enc_wrdump(a,v)
|
||||
# define enc_rddump(a,v)
|
||||
|
@ -478,7 +478,7 @@ static uint8_t enc_rdgreg2(FAR struct enc_driver_s *priv, uint8_t cmd)
|
|||
|
||||
/* Select ENC28J60 chip */
|
||||
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
|
||||
|
||||
/* Send the read command and collect the data. The sequence requires
|
||||
* 16-clocks: 8 to clock out the cmd + 8 to clock in the data.
|
||||
|
@ -521,7 +521,7 @@ static void enc_wrgreg2(FAR struct enc_driver_s *priv, uint8_t cmd,
|
|||
|
||||
/* Select ENC28J60 chip */
|
||||
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
|
||||
|
||||
/* Send the write command and data. The sequence requires 16-clocks:
|
||||
* 8 to clock out the cmd + 8 to clock out the data.
|
||||
|
@ -565,7 +565,7 @@ static inline void enc_src(FAR struct enc_driver_s *priv)
|
|||
|
||||
/* Select ENC28J60 chip */
|
||||
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
|
||||
|
||||
/* Send the system reset command. */
|
||||
|
||||
|
@ -612,7 +612,7 @@ static inline void enc_src(FAR struct enc_driver_s *priv)
|
|||
|
||||
static void enc_setbank(FAR struct enc_driver_s *priv, uint8_t bank)
|
||||
{
|
||||
/* Check if the bank setting has changed*/
|
||||
/* Check if the bank setting has changed */
|
||||
|
||||
if (bank != priv->bank)
|
||||
{
|
||||
|
@ -662,7 +662,7 @@ static uint8_t enc_rdbreg(FAR struct enc_driver_s *priv, uint8_t ctrlreg)
|
|||
|
||||
/* Re-select ENC28J60 chip */
|
||||
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
|
||||
|
||||
/* Send the RCR command and collect the data. How we collect the data
|
||||
* depends on if this is a PHY/CAN or not. The normal sequence requires
|
||||
|
@ -719,7 +719,7 @@ static void enc_wrbreg(FAR struct enc_driver_s *priv, uint8_t ctrlreg,
|
|||
|
||||
/* Re-select ENC28J60 chip */
|
||||
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
|
||||
|
||||
/* Send the WCR command and data. The sequence requires 16-clocks:
|
||||
* 8 to clock out the cmd + 8 to clock out the data.
|
||||
|
@ -823,8 +823,8 @@ static void enc_rxdump(FAR struct enc_driver_s *priv)
|
|||
static void enc_txdump(FAR struct enc_driver_s *priv)
|
||||
{
|
||||
lowsyslog(LOG_DEBUG, "Tx Registers:\n");
|
||||
lowsyslog(LOG_DEBUG, " EIE: %02x EIR: %02x ESTAT: %02x\n",
|
||||
enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR),);
|
||||
lowsyslog(LOG_DEBUG, " EIE: %02x EIR: %02x\n",
|
||||
enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR));
|
||||
lowsyslog(LOG_DEBUG, " ESTAT: %02x ECON1: %02x\n",
|
||||
enc_rdgreg(priv, ENC_ESTAT), enc_rdgreg(priv, ENC_ECON1));
|
||||
lowsyslog(LOG_DEBUG, " ETXST: %02x %02x\n",
|
||||
|
@ -873,7 +873,7 @@ static void enc_rdbuffer(FAR struct enc_driver_s *priv, FAR uint8_t *buffer,
|
|||
|
||||
/* Select ENC28J60 chip */
|
||||
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
|
||||
|
||||
/* Send the read buffer memory command (ignoring the response) */
|
||||
|
||||
|
@ -918,7 +918,7 @@ static inline void enc_wrbuffer(FAR struct enc_driver_s *priv,
|
|||
* "The WBM command is started by lowering the CS pin. ..."
|
||||
*/
|
||||
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
|
||||
|
||||
/* Send the write buffer memory command (ignoring the response)
|
||||
*
|
||||
|
@ -1591,7 +1591,7 @@ static void enc_pktif(FAR struct enc_driver_s *priv)
|
|||
|
||||
else
|
||||
{
|
||||
/* Save the packet length (without the 4 byte CRC) in priv->dev.d_len*/
|
||||
/* Save the packet length (without the 4 byte CRC) in priv->dev.d_len */
|
||||
|
||||
priv->dev.d_len = pktlen - 4;
|
||||
|
||||
|
@ -2100,7 +2100,7 @@ static int enc_ifup(struct net_driver_s *dev)
|
|||
|
||||
nlldbg("Bringing up: %d.%d.%d.%d\n",
|
||||
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
|
||||
|
||||
/* Lock the SPI bus so that we have exclusive access */
|
||||
|
||||
|
@ -2171,7 +2171,7 @@ static int enc_ifdown(struct net_driver_s *dev)
|
|||
|
||||
nlldbg("Taking down: %d.%d.%d.%d\n",
|
||||
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
|
||||
|
||||
/* Lock the SPI bus so that we have exclusive access */
|
||||
|
||||
|
|
|
@ -199,7 +199,7 @@
|
|||
# define enc_cmddump(c) \
|
||||
lowsyslog(LOG_DEBUG, "ENCX24J600: CMD: %02x\n", c);
|
||||
# define enc_bmdump(c,b,s) \
|
||||
lowsyslog(LOG_DEBUG, "ENCX24J600: CMD: %02x buffer: %p length: %d\n", c,b,s);
|
||||
lowsyslog(LOG_DEBUG, "ENCX24J600: CMD: %02x buffer: %p length: %d\n", c, b, s);
|
||||
#else
|
||||
# define enc_wrdump(a,v)
|
||||
# define enc_rddump(a,v)
|
||||
|
@ -344,8 +344,8 @@ static int enc_txpoll(struct net_driver_s *dev);
|
|||
/* Common RX logic */
|
||||
|
||||
static struct enc_descr_s *enc_rxgetdescr(FAR struct enc_driver_s *priv);
|
||||
static void enc_rxldpkt(FAR struct enc_driver_s *priv, struct enc_descr_s *descr);
|
||||
static void enc_rxrmpkt(FAR struct enc_driver_s *priv, struct enc_descr_s *descr);
|
||||
static void enc_rxldpkt(FAR struct enc_driver_s *priv, FAR struct enc_descr_s *descr);
|
||||
static void enc_rxrmpkt(FAR struct enc_driver_s *priv, FAR struct enc_descr_s *descr);
|
||||
static void enc_rxdispatch(FAR struct enc_driver_s *priv);
|
||||
|
||||
/* Interrupt handling */
|
||||
|
@ -499,7 +499,7 @@ static void enc_cmd(FAR struct enc_driver_s *priv, uint8_t cmd, uint16_t arg)
|
|||
|
||||
/* Select ENCX24J600 chip */
|
||||
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
|
||||
|
||||
(void)SPI_SEND(priv->spi, cmd); /* Clock out the command */
|
||||
(void)SPI_SEND(priv->spi, arg & 0xff); /* Clock out the low byte */
|
||||
|
@ -533,7 +533,7 @@ static inline void enc_setethrst(FAR struct enc_driver_s *priv)
|
|||
|
||||
/* Select ENC28J60 chip */
|
||||
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
|
||||
|
||||
/* Send the system reset command. */
|
||||
|
||||
|
@ -651,7 +651,7 @@ static void enc_wrreg(FAR struct enc_driver_s *priv, uint16_t ctrlreg,
|
|||
DEBUGASSERT(priv && priv->spi);
|
||||
DEBUGASSERT((ctrlreg & 0xe0) == 0); /* banked regeitsers only */
|
||||
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
|
||||
|
||||
enc_setbank(priv, GETBANK(ctrlreg));
|
||||
|
||||
|
@ -729,7 +729,7 @@ static void enc_bfs(FAR struct enc_driver_s *priv, uint16_t ctrlreg,
|
|||
|
||||
/* Select ENCX24J600 chip */
|
||||
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
|
||||
|
||||
/* Set the bank */
|
||||
|
||||
|
@ -774,7 +774,7 @@ static void enc_bfc(FAR struct enc_driver_s *priv, uint16_t ctrlreg,
|
|||
|
||||
/* Select ENCX24J600 chip */
|
||||
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
|
||||
|
||||
/* Set the bank */
|
||||
|
||||
|
@ -842,8 +842,8 @@ static void enc_rxdump(FAR struct enc_driver_s *priv)
|
|||
static void enc_txdump(FAR struct enc_driver_s *priv)
|
||||
{
|
||||
lowsyslog(LOG_DEBUG, "Tx Registers:\n");
|
||||
lowsyslog(LOG_DEBUG, " EIE: %02x EIR: %02x ESTAT: %02x\n",
|
||||
enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR),);
|
||||
lowsyslog(LOG_DEBUG, " EIE: %02x EIR: %02x\n",
|
||||
enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR));
|
||||
lowsyslog(LOG_DEBUG, " ESTAT: %02x ECON1: %02x\n",
|
||||
enc_rdgreg(priv, ENC_ESTAT), enc_rdgreg(priv, ENC_ECON1));
|
||||
lowsyslog(LOG_DEBUG, " ETXST: %02x %02x\n",
|
||||
|
@ -932,7 +932,7 @@ static inline void enc_wrbuffer(FAR struct enc_driver_s *priv,
|
|||
{
|
||||
DEBUGASSERT(priv && priv->spi);
|
||||
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
|
||||
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
|
||||
|
||||
SPI_SEND(priv->spi, ENC_WGPDATA);
|
||||
SPI_SNDBLOCK(priv->spi, buffer, buflen);
|
||||
|
@ -1071,11 +1071,11 @@ static void enc_wrphy(FAR struct enc_driver_s *priv, uint8_t phyaddr,
|
|||
|
||||
static int enc_transmit(FAR struct enc_driver_s *priv)
|
||||
{
|
||||
struct enc_descr_s *descr;
|
||||
FAR struct enc_descr_s *descr;
|
||||
|
||||
/* dequeue next packet to transmit */
|
||||
|
||||
descr = (struct enc_descr_s*)sq_remfirst(&priv->txqueue);
|
||||
descr = (FAR struct enc_descr_s *)sq_remfirst(&priv->txqueue);
|
||||
|
||||
DEBUGASSERT(descr != NULL);
|
||||
|
||||
|
@ -1110,7 +1110,7 @@ static int enc_transmit(FAR struct enc_driver_s *priv)
|
|||
|
||||
/* free the descriptor */
|
||||
|
||||
sq_addlast((sq_entry_t*)descr, &priv->txfreedescr);
|
||||
sq_addlast((FAR sq_entry_t *)descr, &priv->txfreedescr);
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
@ -1137,7 +1137,7 @@ static int enc_transmit(FAR struct enc_driver_s *priv)
|
|||
static int enc_txenqueue(FAR struct enc_driver_s *priv)
|
||||
{
|
||||
int ret = OK;
|
||||
struct enc_descr_s *descr;
|
||||
FAR struct enc_descr_s *descr;
|
||||
|
||||
DEBUGASSERT(priv->dev.d_len > 0);
|
||||
|
||||
|
@ -1147,7 +1147,7 @@ static int enc_txenqueue(FAR struct enc_driver_s *priv)
|
|||
priv->stats.txrequests++;
|
||||
#endif
|
||||
|
||||
descr = (struct enc_descr_s*)sq_remfirst(&priv->txfreedescr);
|
||||
descr = (FAR struct enc_descr_s *)sq_remfirst(&priv->txfreedescr);
|
||||
|
||||
if (descr != NULL)
|
||||
{
|
||||
|
@ -1167,7 +1167,7 @@ static int enc_txenqueue(FAR struct enc_driver_s *priv)
|
|||
|
||||
/* enqueue packet */
|
||||
|
||||
sq_addlast((sq_entry_t*)descr, &priv->txqueue);
|
||||
sq_addlast((FAR sq_entry_t *)descr, &priv->txqueue);
|
||||
|
||||
/* if currently no transmission is active, trigger the transmission */
|
||||
|
||||
|
@ -1367,7 +1367,7 @@ static void enc_txif(FAR struct enc_driver_s *priv)
|
|||
****************************************************************************/
|
||||
|
||||
static void enc_rxldpkt(FAR struct enc_driver_s *priv,
|
||||
struct enc_descr_s *descr)
|
||||
FAR struct enc_descr_s *descr)
|
||||
{
|
||||
DEBUGASSERT(priv != NULL && descr != NULL);
|
||||
|
||||
|
@ -1414,10 +1414,10 @@ static struct enc_descr_s *enc_rxgetdescr(FAR struct enc_driver_s *priv)
|
|||
|
||||
/* Packets are held in the enc's SRAM until the space is needed */
|
||||
|
||||
enc_rxrmpkt(priv, (struct enc_descr_s*)sq_peek(&priv->rxqueue));
|
||||
enc_rxrmpkt(priv, (FAR struct enc_descr_s *)sq_peek(&priv->rxqueue));
|
||||
}
|
||||
|
||||
return (struct enc_descr_s*)sq_remfirst(&priv->rxfreedescr);
|
||||
return (FAR struct enc_descr_s *)sq_remfirst(&priv->rxfreedescr);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -1439,7 +1439,7 @@ static struct enc_descr_s *enc_rxgetdescr(FAR struct enc_driver_s *priv)
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void enc_rxrmpkt(FAR struct enc_driver_s *priv, struct enc_descr_s *descr)
|
||||
static void enc_rxrmpkt(FAR struct enc_driver_s *priv, FAR struct enc_descr_s *descr)
|
||||
{
|
||||
uint16_t addr;
|
||||
|
||||
|
@ -1452,7 +1452,7 @@ static void enc_rxrmpkt(FAR struct enc_driver_s *priv, struct enc_descr_s *descr
|
|||
|
||||
if (descr != NULL)
|
||||
{
|
||||
if (descr == (struct enc_descr_s*)sq_peek(&priv->rxqueue))
|
||||
if (descr == (FAR struct enc_descr_s *)sq_peek(&priv->rxqueue))
|
||||
{
|
||||
/* Wrap address properly around */
|
||||
addr = (descr->addr - PKTMEM_RX_START + descr->len - 2 + PKTMEM_RX_SIZE)
|
||||
|
@ -1472,10 +1472,10 @@ static void enc_rxrmpkt(FAR struct enc_driver_s *priv, struct enc_descr_s *descr
|
|||
{
|
||||
/* Remove packet from RX queue */
|
||||
|
||||
sq_rem((sq_entry_t*)descr, &priv->rxqueue);
|
||||
sq_rem((FAR sq_entry_t *)descr, &priv->rxqueue);
|
||||
}
|
||||
|
||||
sq_addlast((sq_entry_t*)descr, &priv->rxfreedescr);
|
||||
sq_addlast((FAR sq_entry_t *)descr, &priv->rxfreedescr);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1498,14 +1498,14 @@ static void enc_rxrmpkt(FAR struct enc_driver_s *priv, struct enc_descr_s *descr
|
|||
|
||||
static void enc_rxdispatch(FAR struct enc_driver_s *priv)
|
||||
{
|
||||
struct enc_descr_s *descr;
|
||||
FAR struct enc_descr_s *descr;
|
||||
struct enc_descr_s *next;
|
||||
|
||||
int ret = ERROR;
|
||||
|
||||
/* Process the RX queue */
|
||||
|
||||
descr = (struct enc_descr_s*)sq_peek(&priv->rxqueue);
|
||||
descr = (FAR struct enc_descr_s *)sq_peek(&priv->rxqueue);
|
||||
|
||||
while (descr != NULL)
|
||||
{
|
||||
|
@ -1513,7 +1513,7 @@ static void enc_rxdispatch(FAR struct enc_driver_s *priv)
|
|||
* flink to NULL
|
||||
*/
|
||||
|
||||
next = (struct enc_descr_s*)sq_next(descr);
|
||||
next = (FAR struct enc_descr_s *)sq_next(descr);
|
||||
|
||||
/* Load the packet from the enc's SRAM */
|
||||
|
||||
|
@ -1674,7 +1674,7 @@ static void enc_rxdispatch(FAR struct enc_driver_s *priv)
|
|||
|
||||
static void enc_pktif(FAR struct enc_driver_s *priv)
|
||||
{
|
||||
struct enc_descr_s *descr;
|
||||
FAR struct enc_descr_s *descr;
|
||||
uint8_t rsv[8];
|
||||
uint16_t pktlen;
|
||||
uint32_t rxstat;
|
||||
|
@ -1736,7 +1736,7 @@ static void enc_pktif(FAR struct enc_driver_s *priv)
|
|||
|
||||
descr->addr = curpkt + 8;
|
||||
descr->len = pktlen;
|
||||
sq_addlast((sq_entry_t*)descr, &priv->rxqueue);
|
||||
sq_addlast((FAR sq_entry_t *)descr, &priv->rxqueue);
|
||||
|
||||
/* Check if the packet was received OK */
|
||||
|
||||
|
@ -1810,7 +1810,7 @@ static void enc_pktif(FAR struct enc_driver_s *priv)
|
|||
|
||||
static void enc_rxabtif(FAR struct enc_driver_s *priv)
|
||||
{
|
||||
struct enc_descr_s *descr;
|
||||
FAR struct enc_descr_s *descr;
|
||||
|
||||
#if 0
|
||||
/* Free the last received packet from the RX queue */
|
||||
|
@ -1821,18 +1821,18 @@ static void enc_rxabtif(FAR struct enc_driver_s *priv)
|
|||
nlldbg("ERXTAIL: %04x\n", enc_rdreg(priv, ENC_ERXTAIL));
|
||||
nlldbg("ERXHAED: %04x\n", enc_rdreg(priv, ENC_ERXHEAD));
|
||||
|
||||
descr = (struct enc_descr_s*)sq_peek(&priv->rxqueue);
|
||||
descr = (FAR struct enc_descr_s *)sq_peek(&priv->rxqueue);
|
||||
|
||||
while (descr != NULL)
|
||||
{
|
||||
nlldbg("addr: %04x len: %d\n", descr->addr, descr->len);
|
||||
descr = (struct enc_descr_s*)sq_next(descr);
|
||||
descr = (FAR struct enc_descr_s *)sq_next(descr);
|
||||
}
|
||||
|
||||
DEBUGASSERT(false);
|
||||
#endif
|
||||
|
||||
descr = (struct enc_descr_s*)sq_peek(&priv->rxqueue);
|
||||
descr = (FAR struct enc_descr_s *)sq_peek(&priv->rxqueue);
|
||||
|
||||
if (descr != NULL)
|
||||
{
|
||||
|
@ -2278,7 +2278,7 @@ static int enc_ifup(struct net_driver_s *dev)
|
|||
|
||||
nlldbg("Bringing up: %d.%d.%d.%d\n",
|
||||
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
|
||||
|
||||
/* Lock the SPI bus so that we have exclusive access */
|
||||
|
||||
|
@ -2300,7 +2300,7 @@ static int enc_ifup(struct net_driver_s *dev)
|
|||
enc_bfc(priv, ENC_EIR, EIR_ALLINTS);
|
||||
enc_bfs(priv, ENC_EIE, EIE_INTIE | EIE_LINKIE |
|
||||
EIE_PKTIE | EIE_RXABTIE |
|
||||
EIE_TXIE );
|
||||
EIE_TXIE);
|
||||
|
||||
#ifdef CONFIG_ENCX24J600_STATS
|
||||
enc_bfs(priv, ENC_EIE, EIE_TXABTIE);
|
||||
|
@ -2353,7 +2353,7 @@ static int enc_ifdown(struct net_driver_s *dev)
|
|||
|
||||
nlldbg("Taking down: %d.%d.%d.%d\n",
|
||||
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
|
||||
|
||||
/* Lock the SPI bus so that we have exclusive access */
|
||||
|
||||
|
@ -2739,14 +2739,14 @@ static void enc_resetbuffers(FAR struct enc_driver_s *priv)
|
|||
for (i = 0; i < ENC_NTXDESCR; i++)
|
||||
{
|
||||
priv->txdescralloc[i].addr = PKTMEM_START + PKTMEM_ALIGNED_BUFSIZE * i;
|
||||
sq_addlast((sq_entry_t*)&priv->txdescralloc[i], &priv->txfreedescr);
|
||||
sq_addlast((FAR sq_entry_t *)&priv->txdescralloc[i], &priv->txfreedescr);
|
||||
}
|
||||
|
||||
/* Receive descriptors addresses are set on reception */
|
||||
|
||||
for (i = 0; i < CONFIG_ENCX24J600_NRXDESCR; i++)
|
||||
{
|
||||
sq_addlast((sq_entry_t*)&priv->rxdescralloc[i], &priv->rxfreedescr);
|
||||
sq_addlast((FAR sq_entry_t *)&priv->rxdescralloc[i], &priv->rxfreedescr);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -283,9 +283,9 @@ static int ftmac100_transmit(FAR struct ftmac100_driver_s *priv)
|
|||
FAR struct ftmac100_register_s *iobase = (FAR struct ftmac100_register_s *)priv->iobase;
|
||||
FAR struct ftmac100_txdes_s *txdes;
|
||||
int len = priv->ft_dev.d_len;
|
||||
// irqstate_t flags;
|
||||
// flags = irqsave();
|
||||
// nvdbg("flags=%08x\n", flags);
|
||||
//irqstate_t flags;
|
||||
//flags = irqsave();
|
||||
//nvdbg("flags=%08x\n", flags);
|
||||
|
||||
txdes = ftmac100_current_txdes(priv);
|
||||
|
||||
|
@ -300,7 +300,7 @@ static int ftmac100_transmit(FAR struct ftmac100_driver_s *priv)
|
|||
|
||||
/* Send the packet: address=priv->ft_dev.d_buf, length=priv->ft_dev.d_len */
|
||||
|
||||
// memcpy((void *)txdes->txdes2, priv->ft_dev.d_buf, len);
|
||||
//memcpy((void *)txdes->txdes2, priv->ft_dev.d_buf, len);
|
||||
txdes->txdes2 = (unsigned int)priv->ft_dev.d_buf;
|
||||
txdes->txdes1 &= FTMAC100_TXDES1_EDOTR;
|
||||
txdes->txdes1 |= (FTMAC100_TXDES1_FTS |
|
||||
|
@ -316,7 +316,8 @@ static int ftmac100_transmit(FAR struct ftmac100_driver_s *priv)
|
|||
priv->tx_pending++;
|
||||
|
||||
/* Enable Tx polling */
|
||||
// FIXME: enable interrupts
|
||||
/* FIXME: enable interrupts */
|
||||
|
||||
putreg32(1, &iobase->txpd);
|
||||
|
||||
/* Setup the TX timeout watchdog (perhaps restarting the timer) */
|
||||
|
@ -324,7 +325,7 @@ static int ftmac100_transmit(FAR struct ftmac100_driver_s *priv)
|
|||
(void)wd_start(priv->ft_txtimeout, FTMAC100_TXTIMEOUT,
|
||||
ftmac100_txtimeout_expiry, 1, (uint32_t)priv);
|
||||
|
||||
// irqrestore(flags);
|
||||
//irqrestore(flags);
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
@ -482,10 +483,10 @@ static void ftmac100_init(FAR struct ftmac100_driver_s *priv)
|
|||
rxdes[i].rxdes0 = FTMAC100_RXDES0_RXDMA_OWN;
|
||||
rxdes[i].rxdes1 |= FTMAC100_RXDES1_RXBUF_SIZE(RX_BUF_SIZE);
|
||||
rxdes[i].rxdes2 = (unsigned int)(kmem + i * RX_BUF_SIZE);
|
||||
rxdes[i].rxdes3 = (unsigned int)(rxdes + i + 1); // next ring
|
||||
rxdes[i].rxdes3 = (unsigned int)(rxdes + i + 1); /* Next ring */
|
||||
}
|
||||
|
||||
rxdes[CONFIG_FTMAC100_RX_DESC - 1].rxdes3 = (unsigned int)rxdes; // next ring
|
||||
rxdes[CONFIG_FTMAC100_RX_DESC - 1].rxdes3 = (unsigned int)rxdes; /* Next ring */
|
||||
|
||||
for (i = 0; i < CONFIG_FTMAC100_TX_DESC; i++)
|
||||
{
|
||||
|
@ -495,11 +496,11 @@ static void ftmac100_init(FAR struct ftmac100_driver_s *priv)
|
|||
txdes[i].txdes1 = 0;
|
||||
txdes[i].txdes2 = 0;
|
||||
txdes[i].txdes3 = 0;
|
||||
// txdes[i].txdes3 = (unsigned int)(txdes + i + 1); // next ring
|
||||
// txdes[i].txdes3 = (unsigned int)(txdes + i + 1); /* Next ring */
|
||||
}
|
||||
|
||||
txdes[CONFIG_FTMAC100_TX_DESC - 1].txdes1 = FTMAC100_TXDES1_EDOTR;
|
||||
// txdes[CONFIG_FTMAC100_TX_DESC - 1].txdes3 = (unsigned int)txdes; // next ring
|
||||
//txdes[CONFIG_FTMAC100_TX_DESC - 1].txdes3 = (unsigned int)txdes; /* Next ring */
|
||||
|
||||
/* transmit ring */
|
||||
|
||||
|
@ -513,7 +514,7 @@ static void ftmac100_init(FAR struct ftmac100_driver_s *priv)
|
|||
|
||||
/* set RXINT_THR and TXINT_THR */
|
||||
|
||||
// putreg32 (FTMAC100_ITC_RXINT_THR(1) | FTMAC100_ITC_TXINT_THR(1), &iobase->itc);
|
||||
//putreg32 (FTMAC100_ITC_RXINT_THR(1) | FTMAC100_ITC_TXINT_THR(1), &iobase->itc);
|
||||
|
||||
/* poll receive descriptor automatically */
|
||||
|
||||
|
@ -526,8 +527,8 @@ static void ftmac100_init(FAR struct ftmac100_driver_s *priv)
|
|||
FTMAC100_DBLAC_RXFIFO_HTHR(6) |
|
||||
FTMAC100_DBLAC_RX_THR_EN, &iobase->dblac);
|
||||
|
||||
// putreg32 (getreg32(&iobase->fcr) | 0x1, &iobase->fcr);
|
||||
// putreg32 (getreg32(&iobase->bpr) | 0x1, &iobase->bpr);
|
||||
//putreg32 (getreg32(&iobase->fcr) | 0x1, &iobase->fcr);
|
||||
//putreg32 (getreg32(&iobase->bpr) | 0x1, &iobase->bpr);
|
||||
#endif
|
||||
|
||||
/* enable transmitter, receiver */
|
||||
|
@ -971,16 +972,16 @@ static void ftmac100_interrupt_work(FAR void *arg)
|
|||
{
|
||||
FAR struct ftmac100_driver_s *priv = (FAR struct ftmac100_driver_s *)arg;
|
||||
net_lock_t state;
|
||||
// irqstate_t flags;
|
||||
//irqstate_t flags;
|
||||
|
||||
/* Process pending Ethernet interrupts */
|
||||
|
||||
state = net_lock();
|
||||
// flags = irqsave();
|
||||
//flags = irqsave();
|
||||
|
||||
ftmac100_interrupt_process(priv);
|
||||
|
||||
// irqrestore(flags);
|
||||
//irqrestore(flags);
|
||||
net_unlock(state);
|
||||
|
||||
/* Re-enable Ethernet interrupts */
|
||||
|
@ -1536,8 +1537,7 @@ static int ftmac100_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
|
|||
|
||||
hash_value = crc32part(mac, 6, ~0L);
|
||||
|
||||
/*
|
||||
* The HASH Table is a register array of 2 32-bit registers.
|
||||
/* The HASH Table is a register array of 2 32-bit registers.
|
||||
* It is treated like an array of 64 bits. We want to set
|
||||
* bit BitArray[hash_value]. So we figure out what register
|
||||
* the bit is in, read it, OR in the new bit, then write
|
||||
|
@ -1728,12 +1728,12 @@ int ftmac100_initialize(int intf)
|
|||
priv->ft_dev.d_addmac = ftmac100_addmac; /* Add multicast MAC address */
|
||||
priv->ft_dev.d_rmmac = ftmac100_rmmac; /* Remove multicast MAC address */
|
||||
#endif
|
||||
priv->ft_dev.d_private = (void*)g_ftmac100; /* Used to recover private state from dev */
|
||||
priv->ft_dev.d_private = (FAR void *)g_ftmac100; /* Used to recover private state from dev */
|
||||
|
||||
/* Create a watchdog for timing polling for and timing of transmisstions */
|
||||
|
||||
priv->ft_txpoll = wd_create(); /* Create periodic poll timer */
|
||||
priv->ft_txtimeout = wd_create(); /* Create TX timeout timer */
|
||||
priv->ft_txpoll = wd_create(); /* Create periodic poll timer */
|
||||
priv->ft_txtimeout = wd_create(); /* Create TX timeout timer */
|
||||
|
||||
priv->iobase = CONFIG_FTMAC100_BASE;
|
||||
|
||||
|
|
|
@ -540,7 +540,7 @@ int localhost_initialize(void)
|
|||
#ifdef CONFIG_NET_MULTIBUFFER
|
||||
priv->lo_dev.d_buf = g_iobuffer; /* Attach the IO buffer */
|
||||
#endif
|
||||
priv->lo_dev.d_private = (void*)priv; /* Used to recover private state from dev */
|
||||
priv->lo_dev.d_private = (FAR void *)priv; /* Used to recover private state from dev */
|
||||
|
||||
/* Create a watchdog for timing polling for and timing of transmissions */
|
||||
|
||||
|
|
|
@ -1204,12 +1204,12 @@ int skel_initialize(int intf)
|
|||
priv->sk_dev.d_addmac = skel_addmac; /* Add multicast MAC address */
|
||||
priv->sk_dev.d_rmmac = skel_rmmac; /* Remove multicast MAC address */
|
||||
#endif
|
||||
priv->sk_dev.d_private = (void*)g_skel; /* Used to recover private state from dev */
|
||||
priv->sk_dev.d_private = (FAR void *)g_skel; /* Used to recover private state from dev */
|
||||
|
||||
/* Create a watchdog for timing polling for and timing of transmisstions */
|
||||
|
||||
priv->sk_txpoll = wd_create(); /* Create periodic poll timer */
|
||||
priv->sk_txtimeout = wd_create(); /* Create TX timeout timer */
|
||||
priv->sk_txpoll = wd_create(); /* Create periodic poll timer */
|
||||
priv->sk_txtimeout = wd_create(); /* Create TX timeout timer */
|
||||
|
||||
/* Put the interface in the down state. This usually amounts to resetting
|
||||
* the device and/or calling skel_ifdown().
|
||||
|
|
|
@ -474,7 +474,7 @@ static void slip_txtask(int argc, FAR char *argv[])
|
|||
/* Loop forever */
|
||||
|
||||
msec_start = clock_systimer() * MSEC_PER_TICK;
|
||||
for (;;)
|
||||
for (; ; )
|
||||
{
|
||||
/* Wait for the timeout to expire (or until we are signaled by by */
|
||||
|
||||
|
@ -579,7 +579,7 @@ static inline void slip_receive(FAR struct slip_driver_s *priv)
|
|||
*/
|
||||
|
||||
nvdbg("Receiving packet\n");
|
||||
for (;;)
|
||||
for (; ; )
|
||||
{
|
||||
/* Get the next character in the stream. */
|
||||
|
||||
|
@ -696,7 +696,7 @@ static int slip_rxtask(int argc, FAR char *argv[])
|
|||
|
||||
/* Loop forever */
|
||||
|
||||
for (;;)
|
||||
for (; ; )
|
||||
{
|
||||
/* Wait for the next character to be available on the input stream. */
|
||||
|
||||
|
@ -802,7 +802,7 @@ static int slip_ifup(FAR struct net_driver_s *dev)
|
|||
|
||||
ndbg("Bringing up: %d.%d.%d.%d\n",
|
||||
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
|
||||
|
||||
/* Mark the interface up */
|
||||
|
||||
|
|
|
@ -182,7 +182,7 @@ static void tun_ipv6multicast(FAR struct tun_device_s *priv);
|
|||
#endif
|
||||
|
||||
static int tun_dev_init(FAR struct tun_device_s *priv,
|
||||
FAR struct file *filep, FAR const char* devfmt);
|
||||
FAR struct file *filep, FAR const char *devfmt);
|
||||
static int tun_dev_uninit(FAR struct tun_device_s *priv);
|
||||
|
||||
/* File interface */
|
||||
|
@ -296,7 +296,6 @@ static void tun_pollnotify(FAR struct tun_device_s *priv, pollevent_t eventset)
|
|||
if (eventset != 0)
|
||||
{
|
||||
fds->revents |= eventset;
|
||||
//fvdbg("Report events: %02x\n", fds->revents);
|
||||
sem_post(fds->sem);
|
||||
}
|
||||
}
|
||||
|
@ -458,8 +457,8 @@ static void tun_receive(FAR struct tun_device_s *priv)
|
|||
ipv6_input(&priv->dev);
|
||||
|
||||
/* If the above function invocation resulted in data that should be
|
||||
* sent out on the network, the field d_len will set to a value > 0.
|
||||
*/
|
||||
* sent out on the network, the field d_len will set to a value > 0.
|
||||
*/
|
||||
|
||||
if (priv->dev.d_len > 0)
|
||||
{
|
||||
|
@ -789,8 +788,6 @@ static int tun_txavail(struct net_driver_s *dev)
|
|||
#if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
|
||||
static int tun_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
|
||||
{
|
||||
//FAR struct tun_device_s *priv = (FAR struct tun_device_s *)dev->d_private;
|
||||
|
||||
/* Add the MAC address to the hardware multicast routing table */
|
||||
|
||||
return OK;
|
||||
|
@ -818,8 +815,6 @@ static int tun_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
|
|||
#ifdef CONFIG_NET_IGMP
|
||||
static int tun_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
|
||||
{
|
||||
//FAR struct tun_device_s *priv = (FAR struct tun_device_s *)dev->d_private;
|
||||
|
||||
/* Add the MAC address to the hardware multicast routing table */
|
||||
|
||||
return OK;
|
||||
|
@ -864,7 +859,7 @@ static void tun_ipv6multicast(FAR struct tun_device_s *priv)
|
|||
****************************************************************************/
|
||||
|
||||
static int tun_dev_init(FAR struct tun_device_s *priv, FAR struct file *filep,
|
||||
FAR const char* devfmt)
|
||||
FAR const char *devfmt)
|
||||
{
|
||||
int ret;
|
||||
|
||||
|
@ -878,7 +873,7 @@ static int tun_dev_init(FAR struct tun_device_s *priv, FAR struct file *filep,
|
|||
priv->dev.d_addmac = tun_addmac; /* Add multicast MAC address */
|
||||
priv->dev.d_rmmac = tun_rmmac; /* Remove multicast MAC address */
|
||||
#endif
|
||||
priv->dev.d_private = (void*)priv; /* Used to recover private state from dev */
|
||||
priv->dev.d_private = (FAR void *)priv; /* Used to recover private state from dev */
|
||||
|
||||
/* Initialize the wait semaphore */
|
||||
|
||||
|
@ -1187,7 +1182,7 @@ static int tun_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
|||
{
|
||||
uint8_t free_tuns;
|
||||
int intf;
|
||||
FAR struct ifreq *ifr = (FAR struct ifreq*)arg;
|
||||
FAR struct ifreq *ifr = (FAR struct ifreq *)arg;
|
||||
|
||||
if (!ifr || (ifr->ifr_flags & IFF_MASK) != IFF_TUN)
|
||||
{
|
||||
|
|
|
@ -103,12 +103,11 @@ struct vnet_driver_s
|
|||
{
|
||||
bool sk_bifup; /* true:ifup false:ifdown */
|
||||
WDOG_ID sk_txpoll; /* TX poll timer */
|
||||
//WDOG_ID sk_txtimeout; /* TX timeout timer */
|
||||
|
||||
/* This holds the information visible to uIP/NuttX */
|
||||
|
||||
struct rgmp_vnet *vnet;
|
||||
struct net_driver_s sk_dev; /* Interface understood by uIP */
|
||||
|
||||
/* This holds the information visible to the NuttX */
|
||||
|
||||
struct net_driver_s sk_dev; /* Interface understood by the network */
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -185,10 +184,6 @@ static int vnet_transmit(FAR struct vnet_driver_s *vnet)
|
|||
err = vnet_xmit(vnet->vnet, (char *)vnet->sk_dev.d_buf, vnet->sk_dev.d_len);
|
||||
if (err)
|
||||
{
|
||||
/* Setup the TX timeout watchdog (perhaps restarting the timer) */
|
||||
|
||||
//(void)wd_start(vnet->sk_txtimeout, VNET_TXTIMEOUT, vnet_txtimeout, 1, (uint32_t)vnet);
|
||||
|
||||
/* When vnet_xmit fail, it means TX buffer is full. Watchdog
|
||||
* is of no use here because no TX done INT will happen. So
|
||||
* we reset the TX buffer directly.
|
||||
|
@ -213,8 +208,9 @@ static int vnet_transmit(FAR struct vnet_driver_s *vnet)
|
|||
* Function: vnet_txpoll
|
||||
*
|
||||
* Description:
|
||||
* The transmitter is available, check if uIP has any outgoing packets ready
|
||||
* to send. This is a callback from devif_poll(). devif_poll() may be called:
|
||||
* The transmitter is available, check if the network has any outgoing
|
||||
* packets ready to send. This is a callback from devif_poll().
|
||||
* devif_poll() may be called:
|
||||
*
|
||||
* 1. When the preceding TX packet send is complete,
|
||||
* 2. When the preceding TX packet send timesout and the interface is reset
|
||||
|
@ -309,9 +305,9 @@ void rtos_vnet_recv(struct rgmp_vnet *rgmp_vnet, char *data, int len)
|
|||
|
||||
do
|
||||
{
|
||||
/* Check for errors and update statistics */
|
||||
|
||||
/* Check if the packet is a valid size for the uIP buffer configuration */
|
||||
/* Check if the packet is a valid size for the network buffer
|
||||
* configuration.
|
||||
*/
|
||||
|
||||
if (len > CONFIG_NET_ETH_MTU || len < 14)
|
||||
{
|
||||
|
@ -418,8 +414,9 @@ void rtos_vnet_recv(struct rgmp_vnet *rgmp_vnet, char *data, int len)
|
|||
{
|
||||
arp_arpin(&vnet->sk_dev);
|
||||
|
||||
/* If the above function invocation resulted in data that should be
|
||||
* sent out on the network, the field d_len will set to a value > 0.
|
||||
/* If the above function invocation resulted in data that should
|
||||
* be sent out on the network, the field d_len will set to a
|
||||
* value > 0.
|
||||
*/
|
||||
|
||||
if (vnet->sk_dev.d_len > 0)
|
||||
|
@ -451,15 +448,7 @@ void rtos_vnet_recv(struct rgmp_vnet *rgmp_vnet, char *data, int len)
|
|||
|
||||
static void vnet_txdone(FAR struct vnet_driver_s *vnet)
|
||||
{
|
||||
/* Check for errors and update statistics */
|
||||
|
||||
/* If no further xmits are pending, then cancel the TX timeout and
|
||||
* disable further Tx interrupts.
|
||||
*/
|
||||
|
||||
//wd_cancel(vnet->sk_txtimeout);
|
||||
|
||||
/* Then poll uIP for new XMIT data */
|
||||
/* Poll the network for new XMIT data */
|
||||
|
||||
(void)devif_poll(&vnet->sk_dev, vnet_txpoll);
|
||||
}
|
||||
|
@ -491,7 +480,7 @@ static void vnet_txtimeout(int argc, uint32_t arg, ...)
|
|||
|
||||
/* Then reset the hardware */
|
||||
|
||||
/* Then poll uIP for new XMIT data */
|
||||
/* Then poll the network for new XMIT data */
|
||||
|
||||
(void)devif_poll(&vnet->sk_dev, vnet_txpoll);
|
||||
}
|
||||
|
@ -530,9 +519,9 @@ static void vnet_polltimer(int argc, uint32_t arg, ...)
|
|||
return;
|
||||
}
|
||||
|
||||
/* If so, update TCP timing states and poll uIP for new XMIT data. Hmmm..
|
||||
* might be bug here. Does this mean if there is a transmit in progress,
|
||||
* we will missing TCP time state updates?
|
||||
/* If so, update TCP timing states and poll the network for new XMIT data.
|
||||
* Hmmm.. might be bug here. Does this mean if there is a transmit in
|
||||
* progress, we will missing TCP time state updates?
|
||||
*/
|
||||
|
||||
(void)devif_timer(&vnet->sk_dev, vnet_txpoll, VNET_POLLHSEC);
|
||||
|
@ -565,7 +554,7 @@ static int vnet_ifup(struct net_driver_s *dev)
|
|||
|
||||
ndbg("Bringing up: %d.%d.%d.%d\n",
|
||||
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
|
||||
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
|
||||
|
||||
/* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
|
||||
|
||||
|
@ -605,7 +594,6 @@ static int vnet_ifdown(struct net_driver_s *dev)
|
|||
/* Cancel the TX poll timer and TX timeout timers */
|
||||
|
||||
wd_cancel(vnet->sk_txpoll);
|
||||
//wd_cancel(vnet->sk_txtimeout);
|
||||
|
||||
/* Put the EMAC is its reset, non-operational state. This should be
|
||||
* a known configuration that will guarantee the vnet_ifup() always
|
||||
|
@ -663,7 +651,7 @@ static int vnet_txavail(struct net_driver_s *dev)
|
|||
goto out;
|
||||
}
|
||||
|
||||
/* If so, then poll uIP for new XMIT data */
|
||||
/* If so, then poll the network for new XMIT data */
|
||||
|
||||
(void)devif_poll(&vnet->sk_dev, vnet_txpoll);
|
||||
}
|
||||
|
@ -774,15 +762,14 @@ int vnet_init(struct rgmp_vnet *vnet)
|
|||
priv->sk_dev.d_addmac = vnet_addmac; /* Add multicast MAC address */
|
||||
priv->sk_dev.d_rmmac = vnet_rmmac; /* Remove multicast MAC address */
|
||||
#endif
|
||||
priv->sk_dev.d_private = (void*)priv; /* Used to recover private state from dev */
|
||||
priv->sk_dev.d_private = (FAR void *)priv; /* Used to recover private state from dev */
|
||||
|
||||
/* Create a watchdog for timing polling for and timing of transmisstions */
|
||||
|
||||
priv->sk_txpoll = wd_create(); /* Create periodic poll timer */
|
||||
//priv->sk_txtimeout = wd_create(); /* Create TX timeout timer */
|
||||
priv->sk_txpoll = wd_create(); /* Create periodic poll timer */
|
||||
|
||||
priv->vnet = vnet;
|
||||
vnet->priv = priv;
|
||||
priv->vnet = vnet;
|
||||
vnet->priv = priv;
|
||||
|
||||
/* Register the device with the OS */
|
||||
|
||||
|
|
|
@ -121,7 +121,7 @@ static const struct file_operations fifo_fops =
|
|||
|
||||
int mkfifo(FAR const char *pathname, mode_t mode)
|
||||
{
|
||||
struct pipe_dev_s *dev;
|
||||
FAR struct pipe_dev_s *dev;
|
||||
int ret;
|
||||
|
||||
/* Allocate and initialize a new device structure instance */
|
||||
|
@ -132,7 +132,7 @@ int mkfifo(FAR const char *pathname, mode_t mode)
|
|||
return -ENOMEM;
|
||||
}
|
||||
|
||||
ret = register_driver(pathname, &fifo_fops, mode, (void*)dev);
|
||||
ret = register_driver(pathname, &fifo_fops, mode, (FAR void *)dev);
|
||||
if (ret != 0)
|
||||
{
|
||||
pipecommon_freedev(dev);
|
||||
|
|
|
@ -234,7 +234,7 @@ int pipe(int fd[2])
|
|||
|
||||
/* Register the pipe device */
|
||||
|
||||
ret = register_driver(devname, &pipe_fops, 0666, (void*)dev);
|
||||
ret = register_driver(devname, &pipe_fops, 0666, (FAR void *)dev);
|
||||
if (ret != 0)
|
||||
{
|
||||
(void)sem_post(&g_pipesem);
|
||||
|
|
|
@ -197,12 +197,12 @@ void pipecommon_freedev(FAR struct pipe_dev_s *dev)
|
|||
|
||||
int pipecommon_open(FAR struct file *filep)
|
||||
{
|
||||
struct inode *inode = filep->f_inode;
|
||||
struct pipe_dev_s *dev = inode->i_private;
|
||||
int sval;
|
||||
int ret;
|
||||
FAR struct inode *inode = filep->f_inode;
|
||||
FAR struct pipe_dev_s *dev = inode->i_private;
|
||||
int sval;
|
||||
int ret;
|
||||
|
||||
DEBUGASSERT(dev);
|
||||
DEBUGASSERT(dev != NULL);
|
||||
|
||||
/* Make sure that we have exclusive access to the device structure. The
|
||||
* sem_wait() call should fail only if we are awakened by a signal.
|
||||
|
@ -223,7 +223,7 @@ int pipecommon_open(FAR struct file *filep)
|
|||
|
||||
if (dev->d_refs == 0 && dev->d_buffer == NULL)
|
||||
{
|
||||
dev->d_buffer = (uint8_t*)kmm_malloc(CONFIG_DEV_PIPE_SIZE);
|
||||
dev->d_buffer = (FAR uint8_t *)kmm_malloc(CONFIG_DEV_PIPE_SIZE);
|
||||
if (!dev->d_buffer)
|
||||
{
|
||||
(void)sem_post(&dev->d_bfsem);
|
||||
|
@ -418,7 +418,7 @@ ssize_t pipecommon_read(FAR struct file *filep, FAR char *buffer, size_t len)
|
|||
struct inode *inode = filep->f_inode;
|
||||
struct pipe_dev_s *dev = inode->i_private;
|
||||
#ifdef CONFIG_DEV_PIPEDUMP
|
||||
FAR uint8_t *start = (uint8_t*)buffer;
|
||||
FAR uint8_t *start = (FAR uint8_t *)buffer;
|
||||
#endif
|
||||
ssize_t nread = 0;
|
||||
int sval;
|
||||
|
@ -514,7 +514,7 @@ ssize_t pipecommon_write(FAR struct file *filep, FAR const char *buffer, size_t
|
|||
int sval;
|
||||
|
||||
DEBUGASSERT(dev);
|
||||
pipe_dumpbuffer("To PIPE:", (uint8_t*)buffer, len);
|
||||
pipe_dumpbuffer("To PIPE:", (FAR uint8_t *)buffer, len);
|
||||
|
||||
if (len == 0)
|
||||
{
|
||||
|
@ -545,7 +545,7 @@ ssize_t pipecommon_write(FAR struct file *filep, FAR const char *buffer, size_t
|
|||
/* Loop until all of the bytes have been written */
|
||||
|
||||
last = 0;
|
||||
for (;;)
|
||||
for (; ; )
|
||||
{
|
||||
/* Calculate the write index AFTER the next byte is written */
|
||||
|
||||
|
|
|
@ -72,8 +72,8 @@
|
|||
|
||||
static int bat_charger_open(FAR struct file *filep);
|
||||
static int bat_charger_close(FAR struct file *filep);
|
||||
static ssize_t bat_charger_read(FAR struct file *, FAR char *,
|
||||
size_t nbytes);
|
||||
static ssize_t bat_charger_read(FAR struct file *filep, FAR char *buffer,
|
||||
size_t buflen);
|
||||
static ssize_t bat_charger_write(FAR struct file *filep,
|
||||
FAR const char *buffer, size_t buflen);
|
||||
static int bat_charger_ioctl(FAR struct file *filep, int cmd,
|
||||
|
|
|
@ -72,7 +72,8 @@
|
|||
|
||||
static int bat_gauge_open(FAR struct file *filep);
|
||||
static int bat_gauge_close(FAR struct file *filep);
|
||||
static ssize_t bat_gauge_read(FAR struct file *, FAR char *, size_t nbytes);
|
||||
static ssize_t bat_gauge_read(FAR struct file *filep, FAR char *buflen,
|
||||
size_t buflen);
|
||||
static ssize_t bat_gauge_write(FAR struct file *filep, FAR const char *buffer,
|
||||
size_t buflen);
|
||||
static int bat_gauge_ioctl(FAR struct file *filep, int cmd,
|
||||
|
|
|
@ -129,24 +129,25 @@ enum pm_state_e pm_checkstate(void)
|
|||
now = clock_systimer();
|
||||
if (now - g_pmglobals.stime >= TIME_SLICE_TICKS)
|
||||
{
|
||||
int16_t accum;
|
||||
int16_t accum;
|
||||
|
||||
/* Sample the count, reset the time and count, and assess the PM
|
||||
* state. This is an atomic operation because interrupts are
|
||||
* still disabled.
|
||||
*/
|
||||
/* Sample the count, reset the time and count, and assess the PM
|
||||
* state. This is an atomic operation because interrupts are
|
||||
* still disabled.
|
||||
*/
|
||||
|
||||
accum = g_pmglobals.accum;
|
||||
g_pmglobals.stime = now;
|
||||
g_pmglobals.accum = 0;
|
||||
accum = g_pmglobals.accum;
|
||||
g_pmglobals.stime = now;
|
||||
g_pmglobals.accum = 0;
|
||||
|
||||
/* Reassessing the PM state may require some computation. However,
|
||||
* the work will actually be performed on a worker thread at a user-
|
||||
* controlled priority.
|
||||
*/
|
||||
/* Reassessing the PM state may require some computation. However,
|
||||
* the work will actually be performed on a worker thread at a user-
|
||||
* controlled priority.
|
||||
*/
|
||||
|
||||
(void)pm_update(accum);
|
||||
(void)pm_update(accum);
|
||||
}
|
||||
|
||||
irqrestore(flags);
|
||||
|
||||
/* Return the recommended state. Assuming that we are called from the
|
||||
|
|
|
@ -328,7 +328,8 @@ void pm_update(int16_t accum)
|
|||
/* The work will be performed on the worker thread */
|
||||
|
||||
DEBUGASSERT(g_pmglobals.work.worker == NULL);
|
||||
(void)work_queue(HPWORK, &g_pmglobals.work, pm_worker, (FAR void*)((intptr_t)accum), 0);
|
||||
(void)work_queue(HPWORK, &g_pmglobals.work, pm_worker,
|
||||
(FAR void *)((intptr_t)accum), 0);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_PM */
|
||||
|
|
|
@ -438,7 +438,7 @@ static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
|||
|
||||
case PWMIOC_SETCHARACTERISTICS:
|
||||
{
|
||||
FAR const struct pwm_info_s *info = (FAR const struct pwm_info_s*)((uintptr_t)arg);
|
||||
FAR const struct pwm_info_s *info = (FAR const struct pwm_info_s *)((uintptr_t)arg);
|
||||
DEBUGASSERT(info != NULL && lower->ops->start != NULL);
|
||||
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
|
@ -475,7 +475,7 @@ static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
|||
|
||||
case PWMIOC_GETCHARACTERISTICS:
|
||||
{
|
||||
FAR struct pwm_info_s *info = (FAR struct pwm_info_s*)((uintptr_t)arg);
|
||||
FAR struct pwm_info_s *info = (FAR struct pwm_info_s *)((uintptr_t)arg);
|
||||
DEBUGASSERT(info != NULL);
|
||||
|
||||
memcpy(info, &upper->info, sizeof(struct pwm_info_s));
|
||||
|
|
|
@ -561,7 +561,7 @@ int rwb_invalidate_readahead(FAR struct rwbuffer_s *rwb,
|
|||
rhbend = rwb->rhblockstart + rwb->rhnblocks;
|
||||
invend = startblock + blockcount;
|
||||
|
||||
if (rhbend <= startblock || rwb->rhblockstart >= invend )
|
||||
if (rhbend <= startblock || rwb->rhblockstart >= invend)
|
||||
{
|
||||
ret = OK;
|
||||
}
|
||||
|
@ -640,7 +640,7 @@ int rwb_initialize(FAR struct rwbuffer_s *rwb)
|
|||
/* Setup so that rwb_uninitialize can handle a failure */
|
||||
|
||||
#ifdef CONFIG_DRVR_WRITEBUFFER
|
||||
DEBUGASSERT(rwb->wrflush!= NULL);
|
||||
DEBUGASSERT(rwb->wrflush != NULL);
|
||||
rwb->wrbuffer = NULL;
|
||||
#endif
|
||||
#ifdef CONFIG_DRVR_READAHEAD
|
||||
|
@ -785,7 +785,7 @@ int rwb_read(FAR struct rwbuffer_s *rwb, off_t startblock, uint32_t nblocks,
|
|||
/* Loop until we have read all of the requested blocks */
|
||||
|
||||
rwb_semtake(&rwb->rhsem);
|
||||
for (remaining = nblocks; remaining > 0;)
|
||||
for (remaining = nblocks; remaining > 0; )
|
||||
{
|
||||
/* Is there anything in the read-ahead buffer? */
|
||||
|
||||
|
|
|
@ -144,7 +144,8 @@ static int bmp180_getpressure(FAR struct bmp180_dev_s *priv);
|
|||
|
||||
static int bmp180_open(FAR struct file *filep);
|
||||
static int bmp180_close(FAR struct file *filep);
|
||||
static ssize_t bmp180_read(FAR struct file *, FAR char *, size_t);
|
||||
static ssize_t bmp180_read(FAR struct file *filep, FAR char *buffer,
|
||||
size_t buflen);
|
||||
static ssize_t bmp180_write(FAR struct file *filep, FAR const char *buffer,
|
||||
size_t buflen);
|
||||
|
||||
|
@ -523,7 +524,7 @@ static ssize_t bmp180_read(FAR struct file *filep, FAR char *buffer,
|
|||
return -1;
|
||||
}
|
||||
|
||||
if ( buflen != 4)
|
||||
if (buflen != 4)
|
||||
{
|
||||
sndbg("You can't read something other than 32 bits (4 bytes)\n");
|
||||
return -1;
|
||||
|
|
|
@ -249,7 +249,7 @@ FAR struct lis331dl_dev_s *lis331dl_init(FAR struct i2c_dev_s *i2c,
|
|||
{
|
||||
/* Copy LIS331DL registers to our private structure and power-up device */
|
||||
|
||||
if (lis331dl_readregs(dev)==OK && lis331dl_powerup(dev) == OK)
|
||||
if (lis331dl_readregs(dev) == OK && lis331dl_powerup(dev) == OK)
|
||||
{
|
||||
/* Normal exit point */
|
||||
|
||||
|
|
|
@ -89,8 +89,10 @@ static int lm75_writeconf(FAR struct lm75_dev_s *priv, uint8_t conf);
|
|||
|
||||
static int lm75_open(FAR struct file *filep);
|
||||
static int lm75_close(FAR struct file *filep);
|
||||
static ssize_t lm75_read(FAR struct file *, FAR char *, size_t);
|
||||
static ssize_t lm75_write(FAR struct file *filep, FAR const char *buffer, size_t buflen);
|
||||
static ssize_t lm75_read(FAR struct file *filep, FAR char *buffer,
|
||||
size_t buflen);
|
||||
static ssize_t lm75_write(FAR struct file *filep, FAR const char *buffer,
|
||||
size_t buflen);
|
||||
static int lm75_ioctl(FAR struct file *filep,int cmd,unsigned long arg);
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -338,7 +340,7 @@ static ssize_t lm75_read(FAR struct file *filep, FAR char *buffer, size_t buflen
|
|||
ret = lm75_readtemp(priv, &temp);
|
||||
if (ret < 0)
|
||||
{
|
||||
sndbg("lm75_readtemp failed: %d\n",ret);
|
||||
sndbg("lm75_readtemp failed: %d\n", ret);
|
||||
return (ssize_t)ret;
|
||||
}
|
||||
|
||||
|
@ -387,7 +389,7 @@ static int lm75_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
|||
|
||||
case SNIOC_WRITECONF:
|
||||
ret = lm75_writeconf(priv, (uint8_t)arg);
|
||||
sndbg("conf: %02x ret: %d\n", *(uint8_t*)arg, ret);
|
||||
sndbg("conf: %02x ret: %d\n", *(FAR uint8_t *)arg, ret);
|
||||
break;
|
||||
|
||||
/* Shutdown the LM75, Arg: None */
|
||||
|
|
|
@ -384,7 +384,7 @@ static ssize_t lm92_read(FAR struct file *filep, FAR char *buffer,
|
|||
ret = lm92_readtemp(priv, &temp);
|
||||
if (ret < 0)
|
||||
{
|
||||
sndbg("lm92_readtemp failed: %d\n",ret);
|
||||
sndbg("lm92_readtemp failed: %d\n", ret);
|
||||
return (ssize_t)ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -37,7 +37,7 @@
|
|||
/* NOTE: Some Maxim MAX31855 chips have an issue it report value 25% lower
|
||||
* of real temperature, for more info read this thread:
|
||||
* http://www.eevblog.com/forum/projects/max31855-temperature-error/
|
||||
*/
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
|
@ -87,7 +87,8 @@ struct max31855_dev_s
|
|||
|
||||
static int max31855_open(FAR struct file *filep);
|
||||
static int max31855_close(FAR struct file *filep);
|
||||
static ssize_t max31855_read(FAR struct file *, FAR char *, size_t);
|
||||
static ssize_t max31855_read(FAR struct file *filep, FAR char *buffer,
|
||||
size_t buflen);
|
||||
static ssize_t max31855_write(FAR struct file *filep, FAR const char *buffer,
|
||||
size_t buflen);
|
||||
|
||||
|
|
|
@ -86,7 +86,8 @@ static int mpl115a_getpressure(FAR struct mpl115a_dev_s *priv);
|
|||
|
||||
static int mpl115a_open(FAR struct file *filep);
|
||||
static int mpl115a_close(FAR struct file *filep);
|
||||
static ssize_t mpl115a_read(FAR struct file *, FAR char *, size_t);
|
||||
static ssize_t mpl115a_read(FAR struct file *filep, FAR char *buffer,
|
||||
size_t buflen);
|
||||
static ssize_t mpl115a_write(FAR struct file *filep, FAR const char *buffer, size_t buflen);
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -249,8 +250,8 @@ static int mpl115a_getpressure(FAR struct mpl115a_dev_s *priv)
|
|||
|
||||
/* Check if coefficient data were read correctly */
|
||||
|
||||
if ( (priv->mpl115a_cal_a0 == 0) || (priv->mpl115a_cal_b1 == 0) ||
|
||||
(priv->mpl115a_cal_b2 == 0) || (priv->mpl115a_cal_c12 == 0) )
|
||||
if ((priv->mpl115a_cal_a0 == 0) || (priv->mpl115a_cal_b1 == 0) ||
|
||||
(priv->mpl115a_cal_b2 == 0) || (priv->mpl115a_cal_c12 == 0))
|
||||
{
|
||||
mpl115a_updatecaldata(priv);
|
||||
}
|
||||
|
@ -324,7 +325,7 @@ static ssize_t mpl115a_read(FAR struct file *filep, FAR char *buffer, size_t buf
|
|||
return -1;
|
||||
}
|
||||
|
||||
if ( buflen != 2)
|
||||
if (buflen != 2)
|
||||
{
|
||||
sndbg("You can't read something other than 16 bits (2 bytes)\n");
|
||||
return -1;
|
||||
|
|
|
@ -231,10 +231,9 @@ static int qe_close(FAR struct file *filep)
|
|||
|
||||
lower->ops->shutdown(lower);
|
||||
}
|
||||
ret = OK;
|
||||
|
||||
//errout_with_sem:
|
||||
sem_post(&upper->exclsem);
|
||||
ret = OK;
|
||||
|
||||
errout:
|
||||
return ret;
|
||||
|
@ -243,7 +242,7 @@ errout:
|
|||
/************************************************************************************
|
||||
* Name: qe_read
|
||||
*
|
||||
* Description:
|
||||
* Description:O
|
||||
* A dummy read method. This is provided only to satsify the VFS layer.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
|
|
@ -49,16 +49,6 @@
|
|||
#include "uart.h"
|
||||
#include <nuttx/sercomm/sercomm.h>
|
||||
|
||||
/* stubs to make serial driver happy */
|
||||
|
||||
void sercomm_recvchars(void *a) { }
|
||||
void sercomm_xmitchars(void *a) { }
|
||||
|
||||
/* Stubs to make memory allocator happy */
|
||||
|
||||
void cons_puts(void *foo){}
|
||||
void delay_ms(int ms){}
|
||||
|
||||
/************************************************************************************
|
||||
* Fileops Prototypes and Structures
|
||||
************************************************************************************/
|
||||
|
@ -102,7 +92,8 @@ static void recv_cb(uint8_t dlci, struct msgb *msg)
|
|||
* Fileops
|
||||
****************************************************************************/
|
||||
|
||||
/* XXX: recvmsg is overwritten when multiple msg arrive! */
|
||||
/* REVISIT: recvmsg is overwritten when multiple msg arrive! */
|
||||
|
||||
static ssize_t sc_console_read(file_t *filep, FAR char *buffer, size_t buflen)
|
||||
{
|
||||
size_t len;
|
||||
|
@ -130,7 +121,7 @@ static ssize_t sc_console_read(file_t *filep, FAR char *buffer, size_t buflen)
|
|||
return len;
|
||||
}
|
||||
|
||||
/* XXX: redirect to old Osmocom-BB comm/sercomm_cons.c -> 2 buffers */
|
||||
/* REVISIT: redirect to old Osmocom-BB comm/sercomm_cons.c -> 2 buffers */
|
||||
|
||||
extern int sercomm_puts(const char *s);
|
||||
|
||||
|
@ -180,7 +171,7 @@ static int sc_console_ioctl(struct file *filep, int cmd, unsigned long arg)
|
|||
|
||||
int sercomm_register(FAR const char *path, FAR uart_dev_t *dev)
|
||||
{
|
||||
/* XXX: initialize MODEMUART to be used for sercomm*/
|
||||
/* REVISIT: initialize MODEMUART to be used for sercomm */
|
||||
|
||||
uart_init(SERCOMM_UART_NR, 1);
|
||||
uart_baudrate(SERCOMM_UART_NR, UART_115200);
|
||||
|
@ -199,3 +190,23 @@ int sercomm_register(FAR const char *path, FAR uart_dev_t *dev)
|
|||
dbg("Registering %s\n", path);
|
||||
return register_driver(path, &g_sercom_console_ops, 0666, NULL);
|
||||
}
|
||||
|
||||
/* Stubs to make serial driver happy */
|
||||
|
||||
void sercomm_recvchars(void *a)
|
||||
{
|
||||
}
|
||||
|
||||
void sercomm_xmitchars(void *a)
|
||||
{
|
||||
}
|
||||
|
||||
/* Stubs to make memory allocator happy */
|
||||
|
||||
void cons_puts(void *foo)
|
||||
{
|
||||
}
|
||||
|
||||
void delay_ms(int ms)
|
||||
{
|
||||
}
|
||||
|
|
|
@ -46,7 +46,6 @@
|
|||
#include <arch/calypso/debug.h>
|
||||
|
||||
#include <arch/calypso/defines.h>
|
||||
//#include <arch/calypso/console.h>
|
||||
#include <nuttx/sercomm/sercomm.h>
|
||||
|
||||
#include "uart.h"
|
||||
|
@ -269,8 +268,6 @@ static void uart_irq_handler_cons(__unused enum irq_nr irqnr)
|
|||
const uint8_t uart = CONS_UART_NR;
|
||||
uint8_t iir;
|
||||
|
||||
//uart_putchar_nb(uart, 'U');
|
||||
|
||||
iir = uart_reg_read(uart, IIR);
|
||||
if (iir & IIR_INT_PENDING)
|
||||
{
|
||||
|
@ -313,8 +310,6 @@ static void uart_irq_handler_sercomm(__unused enum irq_nr irqnr, __unused void *
|
|||
const uint8_t uart = SERCOMM_UART_NR;
|
||||
uint8_t iir, ch;
|
||||
|
||||
//uart_putchar_nb(uart, 'U');
|
||||
|
||||
iir = uart_reg_read(uart, IIR);
|
||||
if (iir & IIR_INT_PENDING)
|
||||
{
|
||||
|
@ -422,7 +417,7 @@ void uart_init(uint8_t uart, uint8_t interrupts)
|
|||
#if 0
|
||||
if (uart == 1)
|
||||
{
|
||||
/* assign UART to MCU and unmask interrupts*/
|
||||
/* assign UART to MCU and unmask interrupts */
|
||||
|
||||
writeb(UART_REG_UIR, 0x00);
|
||||
}
|
||||
|
@ -454,7 +449,7 @@ void uart_init(uint8_t uart, uint8_t interrupts)
|
|||
|
||||
/* THR interrupt only when TX FIFO and TX shift register are empty */
|
||||
|
||||
uart_reg_write(uart, SCR, (1 << 0));// | (1 << 3));
|
||||
uart_reg_write(uart, SCR, (1 << 0)); /* | (1 << 3)); */
|
||||
|
||||
/* 8 bit, 1 stop bit, no parity, no break */
|
||||
|
||||
|
@ -570,7 +565,6 @@ int uart_getchar_nb(uint8_t uart, uint8_t *ch)
|
|||
}
|
||||
|
||||
*ch = readb(UART_REG(uart, RHR));
|
||||
//printf("getchar_nb(%u) = %02x\n", uart, *ch);
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
|
|
@ -125,7 +125,7 @@ static ssize_t lowconsole_write(struct file *filep, const char *buffer, size_t b
|
|||
|
||||
/****************************************************************************
|
||||
* Name: lowconsole_init
|
||||
****************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
void lowconsole_init(void)
|
||||
{
|
||||
|
|
|
@ -169,7 +169,7 @@ static void uart_pollnotify(FAR uart_dev_t *dev, pollevent_t eventset)
|
|||
if (fds)
|
||||
{
|
||||
#ifdef CONFIG_SERIAL_REMOVABLE
|
||||
fds->revents |= ((fds->events | (POLLERR|POLLHUP)) & eventset);
|
||||
fds->revents |= ((fds->events | (POLLERR | POLLHUP)) & eventset);
|
||||
#else
|
||||
fds->revents |= (fds->events & eventset);
|
||||
#endif
|
||||
|
@ -207,7 +207,7 @@ static int uart_putxmitchar(FAR uart_dev_t *dev, int ch, bool oktoblock)
|
|||
|
||||
/* Loop until we are able to add the character to the TX buffer */
|
||||
|
||||
for (;;)
|
||||
for (; ; )
|
||||
{
|
||||
if (nexthead != dev->xmit.tail)
|
||||
{
|
||||
|
@ -270,9 +270,9 @@ static int uart_putxmitchar(FAR uart_dev_t *dev, int ch, bool oktoblock)
|
|||
|
||||
if (ret < 0)
|
||||
{
|
||||
/* A signal received while waiting for the xmit buffer to become
|
||||
* non-full will abort the transfer.
|
||||
*/
|
||||
/* A signal received while waiting for the xmit buffer to become
|
||||
* non-full will abort the transfer.
|
||||
*/
|
||||
|
||||
return -EINTR;
|
||||
}
|
||||
|
@ -898,7 +898,7 @@ static int uart_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
|||
{
|
||||
case TCGETS:
|
||||
{
|
||||
FAR struct termios *termiosp = (struct termios*)arg;
|
||||
FAR struct termios *termiosp = (FAR struct termios *)arg;
|
||||
|
||||
if (!termiosp)
|
||||
{
|
||||
|
@ -916,7 +916,7 @@ static int uart_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
|||
|
||||
case TCSETS:
|
||||
{
|
||||
FAR struct termios *termiosp = (struct termios*)arg;
|
||||
FAR struct termios *termiosp = (FAR struct termios *)arg;
|
||||
|
||||
if (!termiosp)
|
||||
{
|
||||
|
@ -1044,7 +1044,7 @@ int uart_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup)
|
|||
|
||||
if (dev->disconnected)
|
||||
{
|
||||
eventset |= (POLLERR|POLLHUP);
|
||||
eventset |= (POLLERR | POLLHUP);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -1437,7 +1437,7 @@ void uart_connected(FAR uart_dev_t *dev, bool connected)
|
|||
|
||||
/* Notify all poll/select waiters that a hangup occurred */
|
||||
|
||||
uart_pollnotify(dev, (POLLERR|POLLHUP));
|
||||
uart_pollnotify(dev, (POLLERR | POLLHUP));
|
||||
}
|
||||
|
||||
irqrestore(flags);
|
||||
|
|
|
@ -464,7 +464,7 @@ static uart_dev_t g_uart3port =
|
|||
* Name: u16550_serialin
|
||||
****************************************************************************/
|
||||
|
||||
static inline uart_datawidth_t u16550_serialin(struct u16550_s *priv, int offset)
|
||||
static inline uart_datawidth_t u16550_serialin(FAR struct u16550_s *priv, int offset)
|
||||
{
|
||||
return uart_getreg(priv->uartbase, offset);
|
||||
}
|
||||
|
@ -473,7 +473,8 @@ static inline uart_datawidth_t u16550_serialin(struct u16550_s *priv, int offset
|
|||
* Name: u16550_serialout
|
||||
****************************************************************************/
|
||||
|
||||
static inline void u16550_serialout(struct u16550_s *priv, int offset, uart_datawidth_t value)
|
||||
static inline void u16550_serialout(FAR struct u16550_s *priv, int offset,
|
||||
uart_datawidth_t value)
|
||||
{
|
||||
uart_putreg(priv->uartbase, offset, value);
|
||||
}
|
||||
|
@ -483,7 +484,8 @@ static inline void u16550_serialout(struct u16550_s *priv, int offset, uart_data
|
|||
****************************************************************************/
|
||||
|
||||
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
||||
static inline void u16550_disableuartint(struct u16550_s *priv, uart_datawidth_t *ier)
|
||||
static inline void u16550_disableuartint(FAR struct u16550_s *priv,
|
||||
FAR uart_datawidth_t *ier)
|
||||
{
|
||||
if (ier)
|
||||
{
|
||||
|
@ -502,7 +504,7 @@ static inline void u16550_disableuartint(struct u16550_s *priv, uart_datawidth_t
|
|||
****************************************************************************/
|
||||
|
||||
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
||||
static inline void u16550_restoreuartint(struct u16550_s *priv, uint32_t ier)
|
||||
static inline void u16550_restoreuartint(FAR struct u16550_s *priv, uint32_t ier)
|
||||
{
|
||||
priv->ier |= ier & UART_IER_ALLIE;
|
||||
u16550_serialout(priv, UART_IER_OFFSET, priv->ier);
|
||||
|
@ -515,7 +517,7 @@ static inline void u16550_restoreuartint(struct u16550_s *priv, uint32_t ier)
|
|||
* Name: u16550_enablebreaks
|
||||
****************************************************************************/
|
||||
|
||||
static inline void u16550_enablebreaks(struct u16550_s *priv, bool enable)
|
||||
static inline void u16550_enablebreaks(FAR struct u16550_s *priv, bool enable)
|
||||
{
|
||||
uint32_t lcr = u16550_serialin(priv, UART_LCR_OFFSET);
|
||||
if (enable)
|
||||
|
@ -543,7 +545,7 @@ static inline void u16550_enablebreaks(struct u16550_s *priv, bool enable)
|
|||
************************************************************************************/
|
||||
|
||||
#ifndef CONFIG_16550_SUPRESS_CONFIG
|
||||
static inline uint32_t u16550_divisor(struct u16550_s *priv)
|
||||
static inline uint32_t u16550_divisor(FAR struct u16550_s *priv)
|
||||
{
|
||||
return (priv->uartclk + (priv->baud << 3)) / (priv->baud << 4);
|
||||
}
|
||||
|
@ -566,17 +568,19 @@ static inline uint32_t u16550_divisor(struct u16550_s *priv)
|
|||
static int u16550_setup(struct uart_dev_s *dev)
|
||||
{
|
||||
#ifndef CONFIG_16550_SUPRESS_CONFIG
|
||||
struct u16550_s *priv = (struct u16550_s*)dev->priv;
|
||||
FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
|
||||
uint16_t div;
|
||||
uint32_t lcr;
|
||||
|
||||
/* Clear fifos */
|
||||
|
||||
u16550_serialout(priv, UART_FCR_OFFSET, (UART_FCR_RXRST|UART_FCR_TXRST));
|
||||
u16550_serialout(priv, UART_FCR_OFFSET,
|
||||
(UART_FCR_RXRST | UART_FCR_TXRST));
|
||||
|
||||
/* Set trigger */
|
||||
|
||||
u16550_serialout(priv, UART_FCR_OFFSET, (UART_FCR_FIFOEN|UART_FCR_RXTRIGGER_8));
|
||||
u16550_serialout(priv, UART_FCR_OFFSET,
|
||||
(UART_FCR_FIFOEN | UART_FCR_RXTRIGGER_8));
|
||||
|
||||
/* Set up the IER */
|
||||
|
||||
|
@ -618,7 +622,7 @@ static int u16550_setup(struct uart_dev_s *dev)
|
|||
}
|
||||
else if (priv->parity == 2)
|
||||
{
|
||||
lcr |= (UART_LCR_PEN|UART_LCR_EPS);
|
||||
lcr |= (UART_LCR_PEN | UART_LCR_EPS);
|
||||
}
|
||||
|
||||
/* Enter DLAB=1 */
|
||||
|
@ -638,7 +642,8 @@ static int u16550_setup(struct uart_dev_s *dev)
|
|||
/* Configure the FIFOs */
|
||||
|
||||
u16550_serialout(priv, UART_FCR_OFFSET,
|
||||
(UART_FCR_RXTRIGGER_8|UART_FCR_TXRST|UART_FCR_RXRST|UART_FCR_FIFOEN));
|
||||
(UART_FCR_RXTRIGGER_8 | UART_FCR_TXRST | UART_FCR_RXRST |
|
||||
UART_FCR_FIFOEN));
|
||||
#endif
|
||||
return OK;
|
||||
}
|
||||
|
@ -654,7 +659,7 @@ static int u16550_setup(struct uart_dev_s *dev)
|
|||
|
||||
static void u16550_shutdown(struct uart_dev_s *dev)
|
||||
{
|
||||
struct u16550_s *priv = (struct u16550_s*)dev->priv;
|
||||
FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
|
||||
u16550_disableuartint(priv, NULL);
|
||||
}
|
||||
|
||||
|
@ -676,7 +681,7 @@ static void u16550_shutdown(struct uart_dev_s *dev)
|
|||
static int u16550_attach(struct uart_dev_s *dev)
|
||||
{
|
||||
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
||||
struct u16550_s *priv = (struct u16550_s*)dev->priv;
|
||||
FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
|
||||
int ret;
|
||||
|
||||
/* Attach and enable the IRQ */
|
||||
|
@ -711,7 +716,7 @@ static int u16550_attach(struct uart_dev_s *dev)
|
|||
static void u16550_detach(FAR struct uart_dev_s *dev)
|
||||
{
|
||||
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
||||
FAR struct u16550_s *priv = (struct u16550_s*)dev->priv;
|
||||
FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
|
||||
#ifndef CONFIG_ARCH_NOINTC
|
||||
up_disable_irq(priv->irq);
|
||||
#endif
|
||||
|
@ -767,7 +772,7 @@ static int u16550_interrupt(int irq, void *context)
|
|||
}
|
||||
#endif
|
||||
ASSERT(dev != NULL);
|
||||
priv = (struct u16550_s*)dev->priv;
|
||||
priv = (FAR struct u16550_s *)dev->priv;
|
||||
|
||||
/* Loop until there are no characters to be transferred or,
|
||||
* until we have been looping for a long time.
|
||||
|
@ -863,7 +868,7 @@ static int u16550_ioctl(struct file *filep, int cmd, unsigned long arg)
|
|||
{
|
||||
struct inode *inode = filep->f_inode;
|
||||
struct uart_dev_s *dev = inode->i_private;
|
||||
struct u16550_s *priv = (struct u16550_s*)dev->priv;
|
||||
struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
|
||||
|
||||
#ifdef CONFIG_SERIAL_UART_ARCH_IOCTL
|
||||
int ret = uart_ioctl(filep, cmd, arg);
|
||||
|
@ -879,7 +884,7 @@ static int u16550_ioctl(struct file *filep, int cmd, unsigned long arg)
|
|||
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
|
||||
case TIOCSERGSTRUCT:
|
||||
{
|
||||
struct u16550_s *user = (struct u16550_s*)arg;
|
||||
FAR struct u16550_s *user = (FAR struct u16550_s *)arg;
|
||||
if (!user)
|
||||
{
|
||||
set_errno(EINVAL);
|
||||
|
@ -931,7 +936,7 @@ static int u16550_ioctl(struct file *filep, int cmd, unsigned long arg)
|
|||
|
||||
static int u16550_receive(struct uart_dev_s *dev, uint32_t *status)
|
||||
{
|
||||
struct u16550_s *priv = (struct u16550_s*)dev->priv;
|
||||
FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
|
||||
uint32_t rbr;
|
||||
|
||||
*status = u16550_serialin(priv, UART_LSR_OFFSET);
|
||||
|
@ -950,7 +955,7 @@ static int u16550_receive(struct uart_dev_s *dev, uint32_t *status)
|
|||
static void u16550_rxint(struct uart_dev_s *dev, bool enable)
|
||||
{
|
||||
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
||||
struct u16550_s *priv = (struct u16550_s*)dev->priv;
|
||||
FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
|
||||
if (enable)
|
||||
{
|
||||
priv->ier |= UART_IER_ERBFI;
|
||||
|
@ -973,7 +978,7 @@ static void u16550_rxint(struct uart_dev_s *dev, bool enable)
|
|||
|
||||
static bool u16550_rxavailable(struct uart_dev_s *dev)
|
||||
{
|
||||
struct u16550_s *priv = (struct u16550_s*)dev->priv;
|
||||
FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
|
||||
return ((u16550_serialin(priv, UART_LSR_OFFSET) & UART_LSR_DR) != 0);
|
||||
}
|
||||
|
||||
|
@ -987,7 +992,7 @@ static bool u16550_rxavailable(struct uart_dev_s *dev)
|
|||
|
||||
static void u16550_send(struct uart_dev_s *dev, int ch)
|
||||
{
|
||||
struct u16550_s *priv = (struct u16550_s*)dev->priv;
|
||||
FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
|
||||
u16550_serialout(priv, UART_THR_OFFSET, (uart_datawidth_t)ch);
|
||||
}
|
||||
|
||||
|
@ -1002,7 +1007,7 @@ static void u16550_send(struct uart_dev_s *dev, int ch)
|
|||
static void u16550_txint(struct uart_dev_s *dev, bool enable)
|
||||
{
|
||||
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
||||
struct u16550_s *priv = (struct u16550_s*)dev->priv;
|
||||
FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
|
||||
irqstate_t flags;
|
||||
|
||||
flags = irqsave();
|
||||
|
@ -1037,7 +1042,7 @@ static void u16550_txint(struct uart_dev_s *dev, bool enable)
|
|||
|
||||
static bool u16550_txready(struct uart_dev_s *dev)
|
||||
{
|
||||
struct u16550_s *priv = (struct u16550_s*)dev->priv;
|
||||
FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
|
||||
return ((u16550_serialin(priv, UART_LSR_OFFSET) & UART_LSR_THRE) != 0);
|
||||
}
|
||||
|
||||
|
@ -1051,7 +1056,7 @@ static bool u16550_txready(struct uart_dev_s *dev)
|
|||
|
||||
static bool u16550_txempty(struct uart_dev_s *dev)
|
||||
{
|
||||
struct u16550_s *priv = (struct u16550_s*)dev->priv;
|
||||
FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
|
||||
return ((u16550_serialin(priv, UART_LSR_OFFSET) & UART_LSR_THRE) != 0);
|
||||
}
|
||||
|
||||
|
@ -1063,7 +1068,7 @@ static bool u16550_txempty(struct uart_dev_s *dev)
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void u16550_putc(struct u16550_s *priv, int ch)
|
||||
static void u16550_putc(FAR struct u16550_s *priv, int ch)
|
||||
{
|
||||
while ((u16550_serialin(priv, UART_LSR_OFFSET) & UART_LSR_THRE) == 0);
|
||||
u16550_serialout(priv, UART_THR_OFFSET, (uart_datawidth_t)ch);
|
||||
|
@ -1150,7 +1155,7 @@ void up_serialinit(void)
|
|||
#ifdef HAVE_16550_CONSOLE
|
||||
int up_putc(int ch)
|
||||
{
|
||||
struct u16550_s *priv = (struct u16550_s*)CONSOLE_DEV.priv;
|
||||
FAR struct u16550_s *priv = (FAR struct u16550_s *)CONSOLE_DEV.priv;
|
||||
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
||||
uart_datawidth_t ier;
|
||||
|
||||
|
|
|
@ -108,8 +108,10 @@ static ssize_t ramlog_addchar(FAR struct ramlog_dev_s *priv, char ch);
|
|||
|
||||
/* Character driver methods */
|
||||
|
||||
static ssize_t ramlog_read(FAR struct file *, FAR char *, size_t);
|
||||
static ssize_t ramlog_write(FAR struct file *, FAR const char *, size_t);
|
||||
static ssize_t ramlog_read(FAR struct file *filep, FAR char *buffer,
|
||||
size_t buflen);
|
||||
static ssize_t ramlog_write(FAR struct file *filep, FAR const char *buffer,
|
||||
size_t buflen);
|
||||
#ifndef CONFIG_DISABLE_POLL
|
||||
static int ramlog_poll(FAR struct file *filep, FAR struct pollfd *fds,
|
||||
bool setup);
|
||||
|
@ -468,7 +470,7 @@ static ssize_t ramlog_write(FAR struct file *filep, FAR const char *buffer, size
|
|||
|
||||
/* Then output the character */
|
||||
|
||||
ret = ramlog_addchar(priv,ch);
|
||||
ret = ramlog_addchar(priv, ch);
|
||||
if (ret < 0)
|
||||
{
|
||||
/* The buffer is full and nothing was saved. Break out of the
|
||||
|
|
|
@ -130,7 +130,7 @@ static ssize_t syslog_console_write(FAR struct file *filep,
|
|||
|
||||
/****************************************************************************
|
||||
* Name: syslog_console_init
|
||||
****************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
void syslog_console_init(void)
|
||||
{
|
||||
|
|
|
@ -368,7 +368,7 @@ static int cs2100_refclk(FAR const struct cs2100_config_s *config)
|
|||
|
||||
/* Set the minimum loop bandwidth */
|
||||
|
||||
DEBUGASSERT(config->loopbw >=1 && config->loopbw <= 128);
|
||||
DEBUGASSERT(config->loopbw >= 1 && config->loopbw <= 128);
|
||||
|
||||
if (config->loopbw < 2)
|
||||
{
|
||||
|
|
|
@ -79,7 +79,8 @@ static int rtc_open(FAR struct file *filep);
|
|||
static int rtc_close(FAR struct file *filep);
|
||||
#endif
|
||||
|
||||
static ssize_t rtc_read(FAR struct file *filep, FAR char *, size_t);
|
||||
static ssize_t rtc_read(FAR struct file *filep, FAR char *buffer,
|
||||
size_t buflen);
|
||||
static ssize_t rtc_write(FAR struct file *filep, FAR const char *buffer,
|
||||
size_t buflen);
|
||||
static int rtc_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
|
||||
|
|
|
@ -84,7 +84,6 @@
|
|||
struct timer_upperhalf_s
|
||||
{
|
||||
uint8_t crefs; /* The number of times the device has been opened */
|
||||
//sem_t exclsem; /* Supports mutual exclusion */
|
||||
FAR char *path; /* Registration path */
|
||||
|
||||
/* The contained lower-half driver */
|
||||
|
@ -143,15 +142,6 @@ static int timer_open(FAR struct file *filep)
|
|||
|
||||
tmrvdbg("crefs: %d\n", upper->crefs);
|
||||
|
||||
/* Get exclusive access to the device structures */
|
||||
|
||||
ret = 1; //sem_wait(&upper->exclsem);
|
||||
if (ret < 0)
|
||||
{
|
||||
ret = -get_errno();
|
||||
goto errout;
|
||||
}
|
||||
|
||||
/* Increment the count of references to the device. If this the first
|
||||
* time that the driver has been opened for this device, then initialize
|
||||
* the device.
|
||||
|
@ -163,7 +153,7 @@ static int timer_open(FAR struct file *filep)
|
|||
/* More than 255 opens; uint8_t overflows to zero */
|
||||
|
||||
ret = -EMFILE;
|
||||
goto errout_with_sem;
|
||||
goto errout;
|
||||
}
|
||||
|
||||
/* Save the new open count */
|
||||
|
@ -171,9 +161,6 @@ static int timer_open(FAR struct file *filep)
|
|||
upper->crefs = tmp;
|
||||
ret = OK;
|
||||
|
||||
errout_with_sem:
|
||||
// sem_post(&upper->exclsem);
|
||||
|
||||
errout:
|
||||
return ret;
|
||||
}
|
||||
|
@ -188,21 +175,11 @@ errout:
|
|||
|
||||
static int timer_close(FAR struct file *filep)
|
||||
{
|
||||
FAR struct inode *inode = filep->f_inode;
|
||||
FAR struct inode *inode = filep->f_inode;
|
||||
FAR struct timer_upperhalf_s *upper = inode->i_private;
|
||||
int ret;
|
||||
|
||||
tmrvdbg("crefs: %d\n", upper->crefs);
|
||||
|
||||
/* Get exclusive access to the device structures */
|
||||
|
||||
ret = 1; //sem_wait(&upper->exclsem);
|
||||
if (ret < 0)
|
||||
{
|
||||
ret = -get_errno();
|
||||
goto errout;
|
||||
}
|
||||
|
||||
/* Decrement the references to the driver. If the reference count will
|
||||
* decrement to 0, then uninitialize the driver.
|
||||
*/
|
||||
|
@ -212,11 +189,7 @@ static int timer_close(FAR struct file *filep)
|
|||
upper->crefs--;
|
||||
}
|
||||
|
||||
//sem_post(&upper->exclsem);
|
||||
ret = OK;
|
||||
|
||||
errout:
|
||||
return ret;
|
||||
return OK;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
|
@ -267,14 +240,6 @@ static int timer_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
|||
tmrvdbg("cmd: %d arg: %ld\n", cmd, arg);
|
||||
DEBUGASSERT(upper && lower);
|
||||
|
||||
/* Get exclusive access to the device structures */
|
||||
|
||||
ret = 1; //sem_wait(&upper->exclsem);
|
||||
if (ret < 0)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Handle built-in ioctl commands */
|
||||
|
||||
switch (cmd)
|
||||
|
@ -288,7 +253,7 @@ static int timer_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
|||
{
|
||||
/* Start the timer, resetting the time to the current timeout */
|
||||
|
||||
if(lower->ops->start)
|
||||
if (lower->ops->start)
|
||||
{
|
||||
ret = lower->ops->start(lower);
|
||||
}
|
||||
|
@ -308,7 +273,7 @@ static int timer_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
|||
{
|
||||
/* Stop the timer */
|
||||
|
||||
if(lower->ops->start)
|
||||
if (lower->ops->start)
|
||||
{
|
||||
ret = lower->ops->stop(lower);
|
||||
}
|
||||
|
@ -435,7 +400,6 @@ static int timer_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
|||
break;
|
||||
}
|
||||
|
||||
//sem_post(&upper->exclsem);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -492,7 +456,6 @@ FAR void *timer_register(FAR const char *path,
|
|||
* by kmm_zalloc()).
|
||||
*/
|
||||
|
||||
//sem_init(&upper->exclsem, 0, 1);
|
||||
upper->lower = lower;
|
||||
|
||||
/* Copy the registration path */
|
||||
|
@ -519,7 +482,6 @@ errout_with_path:
|
|||
kmm_free(upper->path);
|
||||
|
||||
errout_with_upper:
|
||||
//sem_destroy(&upper->exclsem);
|
||||
kmm_free(upper);
|
||||
|
||||
errout:
|
||||
|
@ -566,7 +528,6 @@ void timer_unregister(FAR void *handle)
|
|||
/* Then free all of the driver resources */
|
||||
|
||||
kmm_free(upper->path);
|
||||
//sem_destroy(&upper->exclsem);
|
||||
kmm_free(upper);
|
||||
}
|
||||
|
||||
|
|
|
@ -92,7 +92,7 @@ struct cdcacm_dev_s
|
|||
FAR struct usbdev_s *usbdev; /* usbdev driver pointer */
|
||||
|
||||
uint8_t config; /* Configuration number */
|
||||
uint8_t nwrq; /* Number of queue write requests (in reqlist)*/
|
||||
uint8_t nwrq; /* Number of queue write requests (in reqlist) */
|
||||
uint8_t nrdq; /* Number of queue read requests (in epbulkout) */
|
||||
uint8_t minor; /* The device minor number */
|
||||
bool rxenabled; /* true: UART RX "interrupts" enabled */
|
||||
|
@ -201,7 +201,8 @@ static int cdcuart_setup(FAR struct uart_dev_s *dev);
|
|||
static void cdcuart_shutdown(FAR struct uart_dev_s *dev);
|
||||
static int cdcuart_attach(FAR struct uart_dev_s *dev);
|
||||
static void cdcuart_detach(FAR struct uart_dev_s *dev);
|
||||
static int cdcuart_ioctl(FAR struct file *filep,int cmd,unsigned long arg);
|
||||
static int cdcuart_ioctl(FAR struct file *filep, int cmd,
|
||||
unsigned long arg);
|
||||
static void cdcuart_rxint(FAR struct uart_dev_s *dev, bool enable);
|
||||
#ifdef CONFIG_SERIAL_IFLOWCONTROL
|
||||
static bool cdcuart_rxflowcontrol(FAR struct uart_dev_s *dev,
|
||||
|
@ -829,7 +830,7 @@ static void cdcacm_rdcomplete(FAR struct usbdev_ep_s *ep,
|
|||
|
||||
/* Extract references to private data */
|
||||
|
||||
priv = (FAR struct cdcacm_dev_s*)ep->priv;
|
||||
priv = (FAR struct cdcacm_dev_s *)ep->priv;
|
||||
|
||||
/* Process the received data unless this is some unusual condition */
|
||||
|
||||
|
@ -898,7 +899,7 @@ static void cdcacm_wrcomplete(FAR struct usbdev_ep_s *ep,
|
|||
/* Return the write request to the free list */
|
||||
|
||||
flags = irqsave();
|
||||
sq_addlast((sq_entry_t*)reqcontainer, &priv->reqlist);
|
||||
sq_addlast((FAR sq_entry_t *)reqcontainer, &priv->reqlist);
|
||||
priv->nwrq++;
|
||||
irqrestore(flags);
|
||||
|
||||
|
@ -944,7 +945,7 @@ static void cdcacm_wrcomplete(FAR struct usbdev_ep_s *ep,
|
|||
static int cdcacm_bind(FAR struct usbdevclass_driver_s *driver,
|
||||
FAR struct usbdev_s *dev)
|
||||
{
|
||||
FAR struct cdcacm_dev_s *priv = ((FAR struct cdcacm_driver_s*)driver)->dev;
|
||||
FAR struct cdcacm_dev_s *priv = ((FAR struct cdcacm_driver_s *)driver)->dev;
|
||||
FAR struct cdcacm_req_s *reqcontainer;
|
||||
irqstate_t flags;
|
||||
uint16_t reqlen;
|
||||
|
@ -1079,7 +1080,7 @@ static int cdcacm_bind(FAR struct usbdevclass_driver_s *driver,
|
|||
reqcontainer->req->callback = cdcacm_wrcomplete;
|
||||
|
||||
flags = irqsave();
|
||||
sq_addlast((sq_entry_t*)reqcontainer, &priv->reqlist);
|
||||
sq_addlast((FAR sq_entry_t *)reqcontainer, &priv->reqlist);
|
||||
priv->nwrq++; /* Count of write requests available */
|
||||
irqrestore(flags);
|
||||
}
|
||||
|
@ -1132,7 +1133,7 @@ static void cdcacm_unbind(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = ((FAR struct cdcacm_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct cdcacm_driver_s *)driver)->dev;
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
if (!priv)
|
||||
|
@ -1261,7 +1262,7 @@ static int cdcacm_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
/* Extract reference to private data */
|
||||
|
||||
usbtrace(TRACE_CLASSSETUP, ctrl->req);
|
||||
priv = ((FAR struct cdcacm_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct cdcacm_driver_s *)driver)->dev;
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
if (!priv || !priv->ctrlreq)
|
||||
|
@ -1387,7 +1388,7 @@ static int cdcacm_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
{
|
||||
if (ctrl->type == USB_DIR_IN)
|
||||
{
|
||||
*(uint8_t*)ctrlreq->buf = priv->config;
|
||||
*(FAR uint8_t *)ctrlreq->buf = priv->config;
|
||||
ret = 1;
|
||||
}
|
||||
}
|
||||
|
@ -1412,13 +1413,13 @@ static int cdcacm_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
case USB_REQ_GETINTERFACE:
|
||||
{
|
||||
if (ctrl->type == (USB_DIR_IN|USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
if (ctrl->type == (USB_DIR_IN | USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
priv->config == CDCACM_CONFIGIDNONE)
|
||||
{
|
||||
if ((index == CDCACM_NOTIFID && value == CDCACM_NOTALTIFID) ||
|
||||
(index == CDCACM_DATAIFID && value == CDCACM_DATAALTIFID))
|
||||
{
|
||||
*(uint8_t*) ctrlreq->buf = value;
|
||||
*(FAR uint8_t *) ctrlreq->buf = value;
|
||||
ret = 1;
|
||||
}
|
||||
else
|
||||
|
@ -1449,7 +1450,7 @@ static int cdcacm_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
case ACM_GET_LINE_CODING:
|
||||
{
|
||||
if (ctrl->type == (USB_DIR_IN|USB_REQ_TYPE_CLASS|USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
if (ctrl->type == (USB_DIR_IN | USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
index == CDCACM_NOTIFID)
|
||||
{
|
||||
/* Return the current line status from the private data structure */
|
||||
|
@ -1470,7 +1471,7 @@ static int cdcacm_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
case ACM_SET_LINE_CODING:
|
||||
{
|
||||
if (ctrl->type == (USB_DIR_OUT|USB_REQ_TYPE_CLASS|USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
if (ctrl->type == (USB_DIR_OUT | USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
len == SIZEOF_CDC_LINECODING && /* dataout && len == outlen && */
|
||||
index == CDCACM_NOTIFID)
|
||||
{
|
||||
|
@ -1511,7 +1512,7 @@ static int cdcacm_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
case ACM_SET_CTRL_LINE_STATE:
|
||||
{
|
||||
if (ctrl->type == (USB_DIR_OUT|USB_REQ_TYPE_CLASS|USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
if (ctrl->type == (USB_DIR_OUT | USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
index == CDCACM_NOTIFID)
|
||||
{
|
||||
/* Save the control line state in the private data structure. Only bits
|
||||
|
@ -1537,11 +1538,11 @@ static int cdcacm_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
}
|
||||
break;
|
||||
|
||||
/* Sends special carrier*/
|
||||
/* Sends special carrier */
|
||||
|
||||
case ACM_SEND_BREAK:
|
||||
{
|
||||
if (ctrl->type == (USB_DIR_OUT|USB_REQ_TYPE_CLASS|USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
if (ctrl->type == (USB_DIR_OUT | USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
index == CDCACM_NOTIFID)
|
||||
{
|
||||
/* If there is a registered callback to handle the SendBreak request,
|
||||
|
@ -1633,7 +1634,7 @@ static void cdcacm_disconnect(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = ((FAR struct cdcacm_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct cdcacm_driver_s *)driver)->dev;
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
if (!priv)
|
||||
|
@ -1698,7 +1699,7 @@ static void cdcacm_suspend(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = ((FAR struct cdcacm_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct cdcacm_driver_s *)driver)->dev;
|
||||
|
||||
/* And let the "upper half" driver now that we are suspended */
|
||||
|
||||
|
@ -1732,7 +1733,7 @@ static void cdcacm_resume(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = ((FAR struct cdcacm_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct cdcacm_driver_s *)driver)->dev;
|
||||
|
||||
/* Are we still configured? */
|
||||
|
||||
|
@ -1775,7 +1776,7 @@ static int cdcuart_setup(FAR struct uart_dev_s *dev)
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = (FAR struct cdcacm_dev_s*)dev->priv;
|
||||
priv = (FAR struct cdcacm_dev_s *)dev->priv;
|
||||
|
||||
/* Check if we have been configured */
|
||||
|
||||
|
@ -1832,8 +1833,8 @@ static int cdcuart_attach(FAR struct uart_dev_s *dev)
|
|||
* Name: cdcuart_detach
|
||||
*
|
||||
* Description:
|
||||
* Does not apply to the USB serial class device
|
||||
*
|
||||
* Does not apply to the USB serial class device
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void cdcuart_detach(FAR struct uart_dev_s *dev)
|
||||
|
@ -1849,7 +1850,7 @@ static void cdcuart_detach(FAR struct uart_dev_s *dev)
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int cdcuart_ioctl(FAR struct file *filep,int cmd,unsigned long arg)
|
||||
static int cdcuart_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
||||
{
|
||||
struct inode *inode = filep->f_inode;
|
||||
struct cdcacm_dev_s *priv = inode->i_private;
|
||||
|
@ -1933,7 +1934,7 @@ static int cdcuart_ioctl(FAR struct file *filep,int cmd,unsigned long arg)
|
|||
* 1. Format and send a request header with:
|
||||
*
|
||||
* bmRequestType:
|
||||
* USB_REQ_DIR_IN|USB_REQ_TYPE_CLASS|USB_REQ_RECIPIENT_INTERFACE
|
||||
* USB_REQ_DIR_IN | USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE
|
||||
* bRequest: ACM_SERIAL_STATE
|
||||
* wValue: 0
|
||||
* wIndex: 0
|
||||
|
@ -1949,7 +1950,7 @@ static int cdcuart_ioctl(FAR struct file *filep,int cmd,unsigned long arg)
|
|||
#ifdef CONFIG_SERIAL_TERMIOS
|
||||
case TCGETS:
|
||||
{
|
||||
struct termios *termiosp = (struct termios*)arg;
|
||||
struct termios *termiosp = (FAR struct termios *)arg;
|
||||
|
||||
if (!termiosp)
|
||||
{
|
||||
|
@ -1967,7 +1968,7 @@ static int cdcuart_ioctl(FAR struct file *filep,int cmd,unsigned long arg)
|
|||
|
||||
case TCSETS:
|
||||
{
|
||||
struct termios *termiosp = (struct termios*)arg;
|
||||
struct termios *termiosp = (FAR struct termios *)arg;
|
||||
|
||||
if (!termiosp)
|
||||
{
|
||||
|
@ -2075,7 +2076,7 @@ static void cdcuart_rxint(FAR struct uart_dev_s *dev, bool enable)
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = (FAR struct cdcacm_dev_s*)dev->priv;
|
||||
priv = (FAR struct cdcacm_dev_s *)dev->priv;
|
||||
serdev = &priv->serdev;
|
||||
|
||||
/* We need exclusive access to the RX buffer and private structure
|
||||
|
@ -2085,19 +2086,19 @@ static void cdcuart_rxint(FAR struct uart_dev_s *dev, bool enable)
|
|||
flags = irqsave();
|
||||
if (enable)
|
||||
{
|
||||
/* RX "interrupts" are enabled. Is this a transition from disabled
|
||||
* to enabled state?
|
||||
*/
|
||||
/* RX "interrupts" are enabled. Is this a transition from disabled
|
||||
* to enabled state?
|
||||
*/
|
||||
|
||||
if (!priv->rxenabled)
|
||||
{
|
||||
/* Yes. During the time that RX interrupts are disabled, the
|
||||
* the serial driver will be extracting data from the circular
|
||||
* buffer and modifying recv.tail. During this time, we
|
||||
* should avoid modifying recv.head; When interrupts are restored,
|
||||
* we can update the head pointer for all of the data that we
|
||||
* put into circular buffer while "interrupts" were disabled.
|
||||
*/
|
||||
if (!priv->rxenabled)
|
||||
{
|
||||
/* Yes. During the time that RX interrupts are disabled, the
|
||||
* the serial driver will be extracting data from the circular
|
||||
* buffer and modifying recv.tail. During this time, we
|
||||
* should avoid modifying recv.head; When interrupts are restored,
|
||||
* we can update the head pointer for all of the data that we
|
||||
* put into circular buffer while "interrupts" were disabled.
|
||||
*/
|
||||
|
||||
if (priv->rxhead != serdev->recv.head)
|
||||
{
|
||||
|
@ -2204,7 +2205,7 @@ static void cdcuart_txint(FAR struct uart_dev_s *dev, bool enable)
|
|||
|
||||
/* Extract references to private data */
|
||||
|
||||
priv = (FAR struct cdcacm_dev_s*)dev->priv;
|
||||
priv = (FAR struct cdcacm_dev_s *)dev->priv;
|
||||
|
||||
/* If the new state is enabled and if there is data in the XMIT buffer,
|
||||
* send the next packet now.
|
||||
|
@ -2233,7 +2234,7 @@ static void cdcuart_txint(FAR struct uart_dev_s *dev, bool enable)
|
|||
|
||||
static bool cdcuart_txempty(FAR struct uart_dev_s *dev)
|
||||
{
|
||||
FAR struct cdcacm_dev_s *priv = (FAR struct cdcacm_dev_s*)dev->priv;
|
||||
FAR struct cdcacm_dev_s *priv = (FAR struct cdcacm_dev_s *)dev->priv;
|
||||
|
||||
usbtrace(CDCACM_CLASSAPI_TXEMPTY, 0);
|
||||
|
||||
|
@ -2287,7 +2288,7 @@ int cdcacm_classobject(int minor, FAR struct usbdevclass_driver_s **classdev)
|
|||
|
||||
/* Allocate the structures needed */
|
||||
|
||||
alloc = (FAR struct cdcacm_alloc_s*)kmm_malloc(sizeof(struct cdcacm_alloc_s));
|
||||
alloc = (FAR struct cdcacm_alloc_s *)kmm_malloc(sizeof(struct cdcacm_alloc_s));
|
||||
if (!alloc)
|
||||
{
|
||||
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_ALLOCDEVSTRUCT), 0);
|
||||
|
@ -2414,7 +2415,7 @@ int cdcacm_initialize(int minor, FAR void **handle)
|
|||
|
||||
if (handle)
|
||||
{
|
||||
*handle = (FAR void*)drvr;
|
||||
*handle = (FAR void *)drvr;
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
|
|
@ -602,7 +602,7 @@ int16_t cdcacm_mkcfgdesc(FAR uint8_t *buf)
|
|||
{
|
||||
cdcacm_cpepdesc((FAR const struct usb_epdesc_s *)group->desc,
|
||||
group->hsepsize,
|
||||
(FAR struct usb_epdesc_s*)dest);
|
||||
(FAR struct usb_epdesc_s *)dest);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
|
|
|
@ -267,7 +267,7 @@ static void composite_freereq(FAR struct usbdev_ep_s *ep,
|
|||
static int composite_bind(FAR struct usbdevclass_driver_s *driver,
|
||||
FAR struct usbdev_s *dev)
|
||||
{
|
||||
FAR struct composite_dev_s *priv = ((FAR struct composite_driver_s*)driver)->dev;
|
||||
FAR struct composite_dev_s *priv = ((FAR struct composite_driver_s *)driver)->dev;
|
||||
int ret;
|
||||
|
||||
usbtrace(TRACE_CLASSBIND, 0);
|
||||
|
@ -352,7 +352,7 @@ static void composite_unbind(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = ((FAR struct composite_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct composite_driver_s *)driver)->dev;
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
if (!priv)
|
||||
|
@ -417,7 +417,7 @@ static int composite_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
/* Extract a reference to private data */
|
||||
|
||||
usbtrace(TRACE_CLASSSETUP, ctrl->req);
|
||||
priv = ((FAR struct composite_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct composite_driver_s *)driver)->dev;
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
if (!priv)
|
||||
|
@ -562,7 +562,7 @@ static int composite_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
case USB_REQ_GETINTERFACE:
|
||||
{
|
||||
if (ctrl->type == (USB_DIR_IN|USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
if (ctrl->type == (USB_DIR_IN | USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
priv->config == COMPOSITE_CONFIGIDNONE)
|
||||
{
|
||||
ret = composite_classsetup(priv, dev, ctrl, dataout, outlen);
|
||||
|
@ -651,7 +651,7 @@ static void composite_disconnect(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = ((FAR struct composite_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct composite_driver_s *)driver)->dev;
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
if (!priv)
|
||||
|
@ -704,7 +704,7 @@ static void composite_suspend(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = ((FAR struct composite_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct composite_driver_s *)driver)->dev;
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
if (!priv)
|
||||
|
@ -746,7 +746,7 @@ static void composite_resume(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = ((FAR struct composite_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct composite_driver_s *)driver)->dev;
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
if (!priv)
|
||||
|
@ -798,7 +798,7 @@ FAR void *composite_initialize(void)
|
|||
|
||||
/* Allocate the structures needed */
|
||||
|
||||
alloc = (FAR struct composite_alloc_s*)kmm_malloc(sizeof(struct composite_alloc_s));
|
||||
alloc = (FAR struct composite_alloc_s *)kmm_malloc(sizeof(struct composite_alloc_s));
|
||||
if (!alloc)
|
||||
{
|
||||
usbtrace(TRACE_CLSERROR(USBCOMPOSITE_TRACEERR_ALLOCDEVSTRUCT), 0);
|
||||
|
|
|
@ -256,7 +256,7 @@ struct pl2303_dev_s
|
|||
FAR struct usbdev_s *usbdev; /* usbdev driver pointer */
|
||||
|
||||
uint8_t config; /* Configuration number */
|
||||
uint8_t nwrq; /* Number of queue write requests (in reqlist)*/
|
||||
uint8_t nwrq; /* Number of queue write requests (in reqlist) */
|
||||
uint8_t nrdq; /* Number of queue read requests (in epbulkout) */
|
||||
bool rxenabled; /* true: UART RX "interrupts" enabled */
|
||||
uint8_t linest[7]; /* Fake line status */
|
||||
|
@ -926,7 +926,7 @@ static int16_t usbclass_mkcfgdesc(uint8_t *buf, uint8_t speed, uint8_t type)
|
|||
static int16_t usbclass_mkcfgdesc(uint8_t *buf)
|
||||
#endif
|
||||
{
|
||||
FAR struct usb_cfgdesc_s *cfgdesc = (struct usb_cfgdesc_s*)buf;
|
||||
FAR struct usb_cfgdesc_s *cfgdesc = (FAR struct usb_cfgdesc_s *)buf;
|
||||
#ifdef CONFIG_USBDEV_DUALSPEED
|
||||
bool hispeed = (speed == USB_SPEED_HIGH);
|
||||
uint16_t bulkmxpacket;
|
||||
|
@ -975,9 +975,9 @@ static int16_t usbclass_mkcfgdesc(uint8_t *buf)
|
|||
bulkmxpacket = 64;
|
||||
}
|
||||
|
||||
usbclass_mkepbulkdesc(&g_epbulkoutdesc, bulkmxpacket, (struct usb_epdesc_s*)buf);
|
||||
usbclass_mkepbulkdesc(&g_epbulkoutdesc, bulkmxpacket, (FAR struct usb_epdesc_s *)buf);
|
||||
buf += USB_SIZEOF_EPDESC;
|
||||
usbclass_mkepbulkdesc(&g_epbulkindesc, bulkmxpacket, (struct usb_epdesc_s*)buf);
|
||||
usbclass_mkepbulkdesc(&g_epbulkindesc, bulkmxpacket, (FAR struct usb_epdesc_s *)buf);
|
||||
#else
|
||||
memcpy(buf, &g_epbulkoutdesc, USB_SIZEOF_EPDESC);
|
||||
buf += USB_SIZEOF_EPDESC;
|
||||
|
@ -1212,7 +1212,7 @@ static void usbclass_rdcomplete(FAR struct usbdev_ep_s *ep,
|
|||
|
||||
/* Extract references to private data */
|
||||
|
||||
priv = (FAR struct pl2303_dev_s*)ep->priv;
|
||||
priv = (FAR struct pl2303_dev_s *)ep->priv;
|
||||
|
||||
/* Process the received data unless this is some unusual condition */
|
||||
|
||||
|
@ -1280,7 +1280,7 @@ static void usbclass_wrcomplete(FAR struct usbdev_ep_s *ep,
|
|||
/* Return the write request to the free list */
|
||||
|
||||
flags = irqsave();
|
||||
sq_addlast((sq_entry_t*)reqcontainer, &priv->reqlist);
|
||||
sq_addlast((FAR sq_entry_t *)reqcontainer, &priv->reqlist);
|
||||
priv->nwrq++;
|
||||
irqrestore(flags);
|
||||
|
||||
|
@ -1320,7 +1320,7 @@ static void usbclass_wrcomplete(FAR struct usbdev_ep_s *ep,
|
|||
static int usbclass_bind(FAR struct usbdevclass_driver_s *driver,
|
||||
FAR struct usbdev_s *dev)
|
||||
{
|
||||
FAR struct pl2303_dev_s *priv = ((FAR struct pl2303_driver_s*)driver)->dev;
|
||||
FAR struct pl2303_dev_s *priv = ((FAR struct pl2303_driver_s *)driver)->dev;
|
||||
FAR struct pl2303_req_s *reqcontainer;
|
||||
irqstate_t flags;
|
||||
uint16_t reqlen;
|
||||
|
@ -1449,7 +1449,7 @@ static int usbclass_bind(FAR struct usbdevclass_driver_s *driver,
|
|||
reqcontainer->req->callback = usbclass_wrcomplete;
|
||||
|
||||
flags = irqsave();
|
||||
sq_addlast((sq_entry_t*)reqcontainer, &priv->reqlist);
|
||||
sq_addlast((FAR sq_entry_t *)reqcontainer, &priv->reqlist);
|
||||
priv->nwrq++; /* Count of write requests available */
|
||||
irqrestore(flags);
|
||||
}
|
||||
|
@ -1498,7 +1498,7 @@ static void usbclass_unbind(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = ((FAR struct pl2303_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct pl2303_driver_s *)driver)->dev;
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
if (!priv)
|
||||
|
@ -1626,7 +1626,7 @@ static int usbclass_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
/* Extract reference to private data */
|
||||
|
||||
usbtrace(TRACE_CLASSSETUP, ctrl->req);
|
||||
priv = ((FAR struct pl2303_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct pl2303_driver_s *)driver)->dev;
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
if (!priv || !priv->ctrlreq)
|
||||
|
@ -1722,7 +1722,7 @@ static int usbclass_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
{
|
||||
if (ctrl->type == USB_DIR_IN)
|
||||
{
|
||||
*(uint8_t*)ctrlreq->buf = priv->config;
|
||||
*(FAR uint8_t *)ctrlreq->buf = priv->config;
|
||||
ret = 1;
|
||||
}
|
||||
}
|
||||
|
@ -1746,7 +1746,7 @@ static int usbclass_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
case USB_REQ_GETINTERFACE:
|
||||
{
|
||||
if (ctrl->type == (USB_DIR_IN|USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
if (ctrl->type == (USB_DIR_IN | USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
priv->config == PL2303_CONFIGIDNONE)
|
||||
{
|
||||
if (index != PL2303_INTERFACEID)
|
||||
|
@ -1755,7 +1755,7 @@ static int usbclass_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
}
|
||||
else
|
||||
{
|
||||
*(uint8_t*) ctrlreq->buf = PL2303_ALTINTERFACEID;
|
||||
*(FAR uint8_t *) ctrlreq->buf = PL2303_ALTINTERFACEID;
|
||||
ret = 1;
|
||||
}
|
||||
}
|
||||
|
@ -1817,7 +1817,7 @@ static int usbclass_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
{
|
||||
if ((ctrl->type & USB_DIR_IN) != 0)
|
||||
{
|
||||
*(uint32_t*)ctrlreq->buf = 0xdeadbeef;
|
||||
*(FAR uint32_t *)ctrlreq->buf = 0xdeadbeef;
|
||||
ret = 4;
|
||||
}
|
||||
else
|
||||
|
@ -1886,7 +1886,7 @@ static void usbclass_disconnect(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = ((FAR struct pl2303_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct pl2303_driver_s *)driver)->dev;
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
if (!priv)
|
||||
|
@ -1949,7 +1949,7 @@ static void usbclass_suspend(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = ((FAR struct pl2303_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct pl2303_driver_s *)driver)->dev;
|
||||
|
||||
/* And let the "upper half" driver now that we are suspended */
|
||||
|
||||
|
@ -1983,7 +1983,7 @@ static void usbclass_resume(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = ((FAR struct pl2303_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct pl2303_driver_s *)driver)->dev;
|
||||
|
||||
/* Are we still configured? */
|
||||
|
||||
|
@ -2026,7 +2026,7 @@ static int usbser_setup(FAR struct uart_dev_s *dev)
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = (FAR struct pl2303_dev_s*)dev->priv;
|
||||
priv = (FAR struct pl2303_dev_s *)dev->priv;
|
||||
|
||||
/* Check if we have been configured */
|
||||
|
||||
|
@ -2083,8 +2083,8 @@ static int usbser_attach(FAR struct uart_dev_s *dev)
|
|||
* Name: usbser_detach
|
||||
*
|
||||
* Description:
|
||||
* Does not apply to the USB serial class device
|
||||
*
|
||||
* Does not apply to the USB serial class device
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void usbser_detach(FAR struct uart_dev_s *dev)
|
||||
|
@ -2129,7 +2129,7 @@ static void usbser_rxint(FAR struct uart_dev_s *dev, bool enable)
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = (FAR struct pl2303_dev_s*)dev->priv;
|
||||
priv = (FAR struct pl2303_dev_s *)dev->priv;
|
||||
serdev = &priv->serdev;
|
||||
|
||||
/* We need exclusive access to the RX buffer and private structure
|
||||
|
@ -2139,19 +2139,19 @@ static void usbser_rxint(FAR struct uart_dev_s *dev, bool enable)
|
|||
flags = irqsave();
|
||||
if (enable)
|
||||
{
|
||||
/* RX "interrupts" are enabled. Is this a transition from disabled
|
||||
* to enabled state?
|
||||
*/
|
||||
/* RX "interrupts" are enabled. Is this a transition from disabled
|
||||
* to enabled state?
|
||||
*/
|
||||
|
||||
if (!priv->rxenabled)
|
||||
{
|
||||
/* Yes. During the time that RX interrupts are disabled, the
|
||||
* the serial driver will be extracting data from the circular
|
||||
* buffer and modifying recv.tail. During this time, we
|
||||
* should avoid modifying recv.head; When interrupts are restored,
|
||||
* we can update the head pointer for all of the data that we
|
||||
* put into cicular buffer while "interrupts" were disabled.
|
||||
*/
|
||||
if (!priv->rxenabled)
|
||||
{
|
||||
/* Yes. During the time that RX interrupts are disabled, the
|
||||
* the serial driver will be extracting data from the circular
|
||||
* buffer and modifying recv.tail. During this time, we
|
||||
* should avoid modifying recv.head; When interrupts are restored,
|
||||
* we can update the head pointer for all of the data that we
|
||||
* put into cicular buffer while "interrupts" were disabled.
|
||||
*/
|
||||
|
||||
if (priv->rxhead != serdev->recv.head)
|
||||
{
|
||||
|
@ -2220,7 +2220,7 @@ static void usbser_txint(FAR struct uart_dev_s *dev, bool enable)
|
|||
|
||||
/* Extract references to private data */
|
||||
|
||||
priv = (FAR struct pl2303_dev_s*)dev->priv;
|
||||
priv = (FAR struct pl2303_dev_s *)dev->priv;
|
||||
|
||||
/* If the new state is enabled and if there is data in the XMIT buffer,
|
||||
* send the next packet now.
|
||||
|
@ -2249,7 +2249,7 @@ static void usbser_txint(FAR struct uart_dev_s *dev, bool enable)
|
|||
|
||||
static bool usbser_txempty(FAR struct uart_dev_s *dev)
|
||||
{
|
||||
FAR struct pl2303_dev_s *priv = (FAR struct pl2303_dev_s*)dev->priv;
|
||||
FAR struct pl2303_dev_s *priv = (FAR struct pl2303_dev_s *)dev->priv;
|
||||
|
||||
usbtrace(PL2303_CLASSAPI_TXEMPTY, 0);
|
||||
|
||||
|
@ -2290,7 +2290,7 @@ int usbdev_serialinitialize(int minor)
|
|||
|
||||
/* Allocate the structures needed */
|
||||
|
||||
alloc = (FAR struct pl2303_alloc_s*)kmm_malloc(sizeof(struct pl2303_alloc_s));
|
||||
alloc = (FAR struct pl2303_alloc_s *)kmm_malloc(sizeof(struct pl2303_alloc_s));
|
||||
if (!alloc)
|
||||
{
|
||||
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_ALLOCDEVSTRUCT), 0);
|
||||
|
@ -2315,7 +2315,7 @@ int usbdev_serialinitialize(int minor)
|
|||
priv->linest[3] = (115200 >> 24) & 0xff;
|
||||
priv->linest[4] = 0; /* One stop bit */
|
||||
priv->linest[5] = 0; /* No parity */
|
||||
priv->linest[6] = 8; /*8 data bits */
|
||||
priv->linest[6] = 8; /* 8 data bits */
|
||||
|
||||
/* Initialize the serial driver sub-structure */
|
||||
|
||||
|
|
|
@ -255,7 +255,7 @@ static void usbmsc_freereq(FAR struct usbdev_ep_s *ep, struct usbdev_req_s *req)
|
|||
static int usbmsc_bind(FAR struct usbdevclass_driver_s *driver,
|
||||
FAR struct usbdev_s *dev)
|
||||
{
|
||||
FAR struct usbmsc_dev_s *priv = ((FAR struct usbmsc_driver_s*)driver)->dev;
|
||||
FAR struct usbmsc_dev_s *priv = ((FAR struct usbmsc_driver_s *)driver)->dev;
|
||||
FAR struct usbmsc_req_s *reqcontainer;
|
||||
irqstate_t flags;
|
||||
int ret = OK;
|
||||
|
@ -361,7 +361,7 @@ static int usbmsc_bind(FAR struct usbdevclass_driver_s *driver,
|
|||
reqcontainer->req->callback = usbmsc_wrcomplete;
|
||||
|
||||
flags = irqsave();
|
||||
sq_addlast((sq_entry_t*)reqcontainer, &priv->wrreqlist);
|
||||
sq_addlast((FAR sq_entry_t *)reqcontainer, &priv->wrreqlist);
|
||||
irqrestore(flags);
|
||||
}
|
||||
|
||||
|
@ -413,7 +413,7 @@ static void usbmsc_unbind(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
/* Extract reference to private data */
|
||||
|
||||
priv = ((FAR struct usbmsc_driver_s*)driver)->dev;
|
||||
priv = ((FAR struct usbmsc_driver_s *)driver)->dev;
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
if (!priv)
|
||||
|
@ -699,7 +699,7 @@ static int usbmsc_setup(FAR struct usbdevclass_driver_s *driver,
|
|||
|
||||
case USB_REQ_GETINTERFACE:
|
||||
{
|
||||
if (ctrl->type == (USB_DIR_IN|USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
if (ctrl->type == (USB_DIR_IN | USB_REQ_RECIPIENT_INTERFACE) &&
|
||||
priv->config == USBMSC_CONFIGIDNONE)
|
||||
{
|
||||
if (index != USBMSC_INTERFACEID)
|
||||
|
@ -1083,13 +1083,13 @@ void usbmsc_wrcomplete(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req)
|
|||
|
||||
/* Extract references to private data */
|
||||
|
||||
priv = (FAR struct usbmsc_dev_s*)ep->priv;
|
||||
priv = (FAR struct usbmsc_dev_s *)ep->priv;
|
||||
privreq = (FAR struct usbmsc_req_s *)req->priv;
|
||||
|
||||
/* Return the write request to the free list */
|
||||
|
||||
flags = irqsave();
|
||||
sq_addlast((sq_entry_t*)privreq, &priv->wrreqlist);
|
||||
sq_addlast((FAR sq_entry_t *)privreq, &priv->wrreqlist);
|
||||
irqrestore(flags);
|
||||
|
||||
/* Process the received data unless this is some unusual condition */
|
||||
|
@ -1144,7 +1144,7 @@ void usbmsc_rdcomplete(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req)
|
|||
|
||||
/* Extract references to private data */
|
||||
|
||||
priv = (FAR struct usbmsc_dev_s*)ep->priv;
|
||||
priv = (FAR struct usbmsc_dev_s *)ep->priv;
|
||||
privreq = (FAR struct usbmsc_req_s *)req->priv;
|
||||
|
||||
/* Process the received data unless this is some unusual condition */
|
||||
|
@ -1158,7 +1158,7 @@ void usbmsc_rdcomplete(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req)
|
|||
/* Add the filled read request from the rdreqlist */
|
||||
|
||||
flags = irqsave();
|
||||
sq_addlast((sq_entry_t*)privreq, &priv->rdreqlist);
|
||||
sq_addlast((FAR sq_entry_t *)privreq, &priv->rdreqlist);
|
||||
irqrestore(flags);
|
||||
|
||||
/* Signal the worker thread that there is received data to be processed */
|
||||
|
@ -1326,7 +1326,7 @@ int usbmsc_configure(unsigned int nluns, void **handle)
|
|||
|
||||
/* Allocate the structures needed */
|
||||
|
||||
alloc = (FAR struct usbmsc_alloc_s*)kmm_malloc(sizeof(struct usbmsc_alloc_s));
|
||||
alloc = (FAR struct usbmsc_alloc_s *)kmm_malloc(sizeof(struct usbmsc_alloc_s));
|
||||
if (!alloc)
|
||||
{
|
||||
usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_ALLOCDEVSTRUCT), 0);
|
||||
|
@ -1347,7 +1347,9 @@ int usbmsc_configure(unsigned int nluns, void **handle)
|
|||
|
||||
/* Allocate the LUN table */
|
||||
|
||||
priv->luntab = (struct usbmsc_lun_s*)kmm_malloc(priv->nluns*sizeof(struct usbmsc_lun_s));
|
||||
priv->luntab = (FAR struct usbmsc_lun_s *)
|
||||
kmm_malloc(priv->nluns*sizeof(struct usbmsc_lun_s));
|
||||
|
||||
if (!priv->luntab)
|
||||
{
|
||||
ret = -ENOMEM;
|
||||
|
@ -1369,7 +1371,7 @@ int usbmsc_configure(unsigned int nluns, void **handle)
|
|||
|
||||
/* Return the handle and success */
|
||||
|
||||
*handle = (FAR void*)alloc;
|
||||
*handle = (FAR void *)alloc;
|
||||
return OK;
|
||||
|
||||
errout:
|
||||
|
@ -1489,7 +1491,7 @@ int usbmsc_bindlun(FAR void *handle, FAR const char *drvrpath,
|
|||
|
||||
if (!priv->iobuffer)
|
||||
{
|
||||
priv->iobuffer = (uint8_t*)kmm_malloc(geo.geo_sectorsize);
|
||||
priv->iobuffer = (FAR uint8_t *)kmm_malloc(geo.geo_sectorsize);
|
||||
if (!priv->iobuffer)
|
||||
{
|
||||
usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_ALLOCIOBUFFER), geo.geo_sectorsize);
|
||||
|
@ -1501,14 +1503,14 @@ int usbmsc_bindlun(FAR void *handle, FAR const char *drvrpath,
|
|||
else if (priv->iosize < geo.geo_sectorsize)
|
||||
{
|
||||
void *tmp;
|
||||
tmp = (uint8_t*)kmm_realloc(priv->iobuffer, geo.geo_sectorsize);
|
||||
tmp = (FAR uint8_t *)kmm_realloc(priv->iobuffer, geo.geo_sectorsize);
|
||||
if (!tmp)
|
||||
{
|
||||
usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_REALLOCIOBUFFER), geo.geo_sectorsize);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
priv->iobuffer = (uint8_t*)tmp;
|
||||
priv->iobuffer = (FAR uint8_t *)tmp;
|
||||
priv->iosize = geo.geo_sectorsize;
|
||||
}
|
||||
|
||||
|
@ -1701,7 +1703,6 @@ errout_with_lock:
|
|||
*
|
||||
* Returned Value:
|
||||
* 0 on success; a negated errno on failure
|
||||
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue