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Replace nxsem API when used as a lock with nxmutex API

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Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
anjiahao 2022-09-06 14:18:45 +08:00 committed by Masayuki Ishikawa
parent 0dfd1f004d
commit d1d46335df
710 changed files with 7503 additions and 14852 deletions
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113
arch/arm/src/am335x/am335x_i2c.c
View file

@ -36,6 +36,7 @@
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include <nuttx/clock.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/i2c/i2c_master.h>
@ -181,7 +182,7 @@ struct am335x_i2c_priv_s
const struct am335x_i2c_config_s *config;
int refs; /* Reference count */
sem_t sem_excl; /* Mutual exclusion semaphore */
mutex_t lock; /* Mutual exclusion mutex */
#ifndef CONFIG_I2C_POLLED
sem_t sem_isr; /* Interrupt wait semaphore */
#endif
@ -219,9 +220,6 @@ static inline void am335x_i2c_putreg(struct am335x_i2c_priv_s *priv,
static inline void am335x_i2c_modifyreg(struct am335x_i2c_priv_s *priv,
uint16_t offset, uint32_t clearbits,
uint32_t setbits);
static inline int am335x_i2c_sem_wait(struct am335x_i2c_priv_s *priv);
static int
am335x_i2c_sem_wait_noncancelable(struct am335x_i2c_priv_s *priv);
#ifdef CONFIG_AM335X_I2C_DYNTIMEO
static uint32_t am335x_i2c_toticks(int msgc, struct i2c_msg_s *msgs);
@ -231,10 +229,6 @@ static inline int
am335x_i2c_sem_waitdone(struct am335x_i2c_priv_s *priv);
static inline bool
am335x_i2c_sem_waitstop(struct am335x_i2c_priv_s *priv);
static inline void am335x_i2c_sem_post(struct am335x_i2c_priv_s *priv);
static inline void am335x_i2c_sem_init(struct am335x_i2c_priv_s *priv);
static inline void
am335x_i2c_sem_destroy(struct am335x_i2c_priv_s *priv);
#ifdef CONFIG_I2C_TRACE
static void am335x_i2c_tracereset(struct am335x_i2c_priv_s *priv);
@ -320,6 +314,10 @@ static struct am335x_i2c_priv_s am335x_i2c0_priv =
.ops = &am335x_i2c_ops,
.config = &am335x_i2c0_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
#endif
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
@ -351,6 +349,10 @@ static struct am335x_i2c_priv_s am335x_i2c1_priv =
.ops = &am335x_i2c_ops,
.config = &am335x_i2c1_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
#endif
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
@ -382,6 +384,10 @@ static struct am335x_i2c_priv_s am335x_i2c2_priv =
.ops = &am335x_i2c_ops,
.config = &am335x_i2c2_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
#endif
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
@ -439,34 +445,6 @@ static inline void am335x_i2c_modifyreg(struct am335x_i2c_priv_s *priv,
modifyreg32(priv->config->base + offset, clearbits, setbits);
}
/****************************************************************************
* Name: am335x_i2c_sem_wait
*
* Description:
* Take the exclusive access, waiting as necessary. May be interrupted by
* a signal.
*
****************************************************************************/
static inline int am335x_i2c_sem_wait(struct am335x_i2c_priv_s *priv)
{
return nxsem_wait(&priv->sem_excl);
}
/****************************************************************************
* Name: am335x_i2c_sem_wait_noncancelable
*
* Description:
* Take the exclusive access, waiting as necessary.
*
****************************************************************************/
static int
am335x_i2c_sem_wait_noncancelable(struct am335x_i2c_priv_s *priv)
{
return nxsem_wait_uninterruptible(&priv->sem_excl);
}
/****************************************************************************
* Name: am335x_i2c_toticks
*
@ -691,57 +669,6 @@ am335x_i2c_sem_waitstop(struct am335x_i2c_priv_s *priv)
return false;
}
/****************************************************************************
* Name: am335x_i2c_sem_post
*
* Description:
* Release the mutual exclusion semaphore
*
****************************************************************************/
static inline void am335x_i2c_sem_post(struct am335x_i2c_priv_s *priv)
{
nxsem_post(&priv->sem_excl);
}
/****************************************************************************
* Name: am335x_i2c_sem_init
*
* Description:
* Initialize semaphores
*
****************************************************************************/
static inline void am335x_i2c_sem_init(struct am335x_i2c_priv_s *priv)
{
nxsem_init(&priv->sem_excl, 0, 1);
#ifndef CONFIG_I2C_POLLED
/* This semaphore is used for signaling and, hence, should not have
* priority inheritance enabled.
*/
nxsem_init(&priv->sem_isr, 0, 0);
nxsem_set_protocol(&priv->sem_isr, SEM_PRIO_NONE);
#endif
}
/****************************************************************************
* Name: am335x_i2c_sem_destroy
*
* Description:
* Destroy semaphores.
*
****************************************************************************/
static inline void am335x_i2c_sem_destroy(struct am335x_i2c_priv_s *priv)
{
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
nxsem_destroy(&priv->sem_isr);
#endif
}
/****************************************************************************
* Name: am335x_i2c_trace*
*
@ -1382,7 +1309,7 @@ static int am335x_i2c_transfer(struct i2c_master_s *dev,
/* Ensure that address or flags don't change meanwhile */
ret = am335x_i2c_sem_wait(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -1498,7 +1425,7 @@ static int am335x_i2c_transfer(struct i2c_master_s *dev,
priv->ptr = NULL;
}
am335x_i2c_sem_post(priv);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -1535,7 +1462,7 @@ static int am335x_i2c_reset(struct i2c_master_s *dev)
/* Lock out other clients */
ret = am335x_i2c_sem_wait_noncancelable(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -1630,7 +1557,7 @@ out:
/* Release the port for re-use by other clients */
am335x_i2c_sem_post(priv);
nxmutex_unlock(&priv->lock);
return ret;
}
#endif /* CONFIG_I2C_RESET */
@ -1683,7 +1610,6 @@ struct i2c_master_s *am335x_i2cbus_initialize(int port)
if ((volatile int)priv->refs++ == 0)
{
am335x_i2c_sem_init(priv);
am335x_i2c_init(priv);
}
@ -1728,9 +1654,6 @@ int am335x_i2cbus_uninitialize(struct i2c_master_s *dev)
am335x_i2c_deinit(priv);
/* Release unused resources */
am335x_i2c_sem_destroy(priv);
return OK;
}

3
arch/arm/src/am335x/am335x_lcdc.c
View file

@ -53,7 +53,6 @@
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/video/fb.h>
#include "arm_internal.h"
@ -143,7 +142,6 @@ struct am335x_lcd_dev_s
struct am335x_panel_info_s panel;
sem_t exclsem; /* Assure mutually exclusive access */
nxgl_coord_t stride; /* Width of framebuffer in bytes */
size_t fbsize; /* Size of the framebuffer allocation */
};
@ -586,7 +584,6 @@ int am335x_lcd_initialize(const struct am335x_panel_info_s *panel)
/* Initialize the device state singleton */
nxsem_init(&priv->exclsem, 0, 1);
memcpy(&priv->panel, panel, sizeof(struct am335x_panel_info_s));
/* Save framebuffer information */

34
arch/arm/src/cxd56xx/cxd56_adc.c
View file

@ -36,7 +36,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/fs/fs.h>
#include <nuttx/irq.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <arch/chip/scu.h>
#include <arch/chip/adc.h>
@ -174,7 +174,7 @@ struct cxd56adc_dev_s
struct scufifo_wm_s *wm; /* water mark */
struct math_filter_s *filter; /* math filter */
struct scuev_notify_s * notify; /* notify */
sem_t exclsem; /* exclusive semaphore */
mutex_t lock; /* exclusive mutex */
int crefs; /* reference count */
};
@ -718,14 +718,14 @@ static int cxd56_adc_open(struct file *filep)
/* Increment reference counter */
nxsem_wait_uninterruptible(&priv->exclsem);
nxmutex_lock(&priv->lock);
priv->crefs++;
DEBUGASSERT(priv->crefs > 0);
if (priv->crefs > 1)
{
nxsem_post(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -738,7 +738,7 @@ static int cxd56_adc_open(struct file *filep)
priv->seq = seq_open(SEQ_TYPE_NORMAL, type);
if (!priv->seq)
{
nxsem_post(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return -ENOENT;
}
@ -751,14 +751,13 @@ static int cxd56_adc_open(struct file *filep)
ret = set_ofstgain(priv);
if (ret < 0)
{
nxsem_post(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
ainfo("open ch%d freq%d scufifo%d\n", priv->ch, priv->freq, priv->fsize);
nxsem_post(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -781,14 +780,14 @@ static int cxd56_adc_close(struct file *filep)
/* Decrement reference counter */
nxsem_wait_uninterruptible(&priv->exclsem);
nxmutex_lock(&priv->lock);
DEBUGASSERT(priv->crefs > 0);
priv->crefs--;
if (priv->crefs > 0)
{
nxsem_post(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -815,8 +814,7 @@ static int cxd56_adc_close(struct file *filep)
priv->notify = NULL;
}
nxsem_post(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -1110,7 +1108,7 @@ int cxd56_adcinitialize(void)
return ret;
}
nxsem_init(&g_lpadc0priv.exclsem, 0, 1);
nxmutex_init(&g_lpadc0priv.lock);
#endif
#if defined (CONFIG_CXD56_LPADC1) || defined (CONFIG_CXD56_LPADC0_1) || defined (CONFIG_CXD56_LPADC_ALL)
ret = register_driver("/dev/lpadc1", &g_adcops, 0666, &g_lpadc1priv);
@ -1120,7 +1118,7 @@ int cxd56_adcinitialize(void)
return ret;
}
nxsem_init(&g_lpadc1priv.exclsem, 0, 1);
nxmutex_init(&g_lpadc1priv.lock);
#endif
#if defined (CONFIG_CXD56_LPADC2) || defined (CONFIG_CXD56_LPADC_ALL)
ret = register_driver("/dev/lpadc2", &g_adcops, 0666, &g_lpadc2priv);
@ -1130,7 +1128,7 @@ int cxd56_adcinitialize(void)
return ret;
}
nxsem_init(&g_lpadc2priv.exclsem, 0, 1);
nxmutex_init(&g_lpadc2priv.lock);
#endif
#if defined (CONFIG_CXD56_LPADC3) || defined (CONFIG_CXD56_LPADC_ALL)
ret = register_driver("/dev/lpadc3", &g_adcops, 0666, &g_lpadc3priv);
@ -1140,7 +1138,7 @@ int cxd56_adcinitialize(void)
return ret;
}
nxsem_init(&g_lpadc3priv.exclsem, 0, 1);
nxmutex_init(&g_lpadc3priv.lock);
#endif
#ifdef CONFIG_CXD56_HPADC0
ret = register_driver("/dev/hpadc0", &g_adcops, 0666, &g_hpadc0priv);
@ -1150,7 +1148,7 @@ int cxd56_adcinitialize(void)
return ret;
}
nxsem_init(&g_hpadc0priv.exclsem, 0, 1);
nxmutex_init(&g_hpadc0priv.lock);
#endif
#ifdef CONFIG_CXD56_HPADC1
ret = register_driver("/dev/hpadc1", &g_adcops, 0666, &g_hpadc1priv);
@ -1160,7 +1158,7 @@ int cxd56_adcinitialize(void)
return ret;
}
nxsem_init(&g_hpadc1priv.exclsem, 0, 1);
nxmutex_init(&g_hpadc1priv.lock);
#endif
return ret;

10
arch/arm/src/cxd56xx/cxd56_charger.c
View file

@ -39,6 +39,7 @@
#include <math.h>
#include <nuttx/kmalloc.h>
#include <nuttx/mutex.h>
#include <nuttx/power/battery_charger.h>
#include <nuttx/power/battery_ioctl.h>
@ -64,7 +65,7 @@
struct charger_dev_s
{
sem_t batsem;
mutex_t batlock;
};
/****************************************************************************
@ -451,7 +452,7 @@ static int charger_ioctl(struct file *filep, int cmd, unsigned long arg)
struct charger_dev_s *priv = inode->i_private;
int ret = -ENOTTY;
nxsem_wait_uninterruptible(&priv->batsem);
nxmutex_lock(&priv->batlock);
switch (cmd)
{
@ -593,8 +594,7 @@ static int charger_ioctl(struct file *filep, int cmd, unsigned long arg)
break;
}
nxsem_post(&priv->batsem);
nxmutex_unlock(&priv->batlock);
return ret;
}
@ -623,7 +623,7 @@ int cxd56_charger_initialize(const char *devpath)
/* Initialize the CXD5247 device structure */
nxsem_init(&priv->batsem, 0, 1);
nxmutex_init(&priv->batlock);
/* Register battery driver */

55
arch/arm/src/cxd56xx/cxd56_clock.c
View file

@ -31,6 +31,7 @@
#include <stdint.h>
#include <arch/chip/pm.h>
#include <nuttx/mutex.h>
#include "arm_internal.h"
#include "chip.h"
@ -155,7 +156,7 @@ static uint32_t g_active_imgdevs = 0;
/* Exclusive control */
static sem_t g_clockexc = SEM_INITIALIZER(1);
static mutex_t g_clocklock = NXMUTEX_INITIALIZER;
/* For peripherals inside SCU block
*
@ -219,19 +220,19 @@ const struct scu_peripheral g_scuhpadc =
* Private Functions
****************************************************************************/
static void clock_semtake(sem_t *id)
static void clock_lock(mutex_t *lock)
{
if (!up_interrupt_context())
{
nxsem_wait_uninterruptible(id);
nxmutex_lock(lock);
}
}
static void clock_semgive(sem_t *id)
static void clock_unlock(mutex_t *lock)
{
if (!up_interrupt_context())
{
nxsem_post(id);
nxmutex_unlock(lock);
}
}
@ -889,11 +890,11 @@ static void cxd56_spim_clock_disable(void)
static void cxd56_img_spi_clock_enable(void)
{
clock_semtake(&g_clockexc);
clock_lock(&g_clocklock);
enable_pwd(PDID_APP_SUB);
cxd56_img_clock_enable();
putreg32(0x00010002, CXD56_CRG_GEAR_IMG_SPI);
clock_semgive(&g_clockexc);
clock_unlock(&g_clocklock);
}
/****************************************************************************
@ -906,11 +907,11 @@ static void cxd56_img_spi_clock_enable(void)
static void cxd56_img_spi_clock_disable(void)
{
clock_semtake(&g_clockexc);
clock_lock(&g_clocklock);
putreg32(0, CXD56_CRG_GEAR_IMG_SPI);
cxd56_img_clock_disable();
disable_pwd(PDID_APP_SUB);
clock_semgive(&g_clockexc);
clock_unlock(&g_clocklock);
}
#endif
@ -926,11 +927,11 @@ static void cxd56_img_spi_clock_disable(void)
static void cxd56_img_wspi_clock_enable(void)
{
clock_semtake(&g_clockexc);
clock_lock(&g_clocklock);
enable_pwd(PDID_APP_SUB);
cxd56_img_clock_enable();
putreg32(0x00010004, CXD56_CRG_GEAR_IMG_WSPI);
clock_semgive(&g_clockexc);
clock_unlock(&g_clocklock);
}
/****************************************************************************
@ -943,11 +944,11 @@ static void cxd56_img_wspi_clock_enable(void)
static void cxd56_img_wspi_clock_disable(void)
{
clock_semtake(&g_clockexc);
clock_lock(&g_clocklock);
putreg32(0, CXD56_CRG_GEAR_IMG_WSPI);
cxd56_img_clock_disable();
disable_pwd(PDID_APP_SUB);
clock_semgive(&g_clockexc);
clock_unlock(&g_clocklock);
}
#endif
@ -1089,7 +1090,7 @@ void cxd56_spi_clock_gear_adjust(int port, uint32_t maxfreq)
return;
}
clock_semtake(&g_clockexc);
clock_lock(&g_clocklock);
baseclock = cxd56_get_appsmp_baseclock();
if (baseclock != 0)
{
@ -1108,7 +1109,7 @@ void cxd56_spi_clock_gear_adjust(int port, uint32_t maxfreq)
putreg32(gear, addr);
}
clock_semgive(&g_clockexc);
clock_unlock(&g_clocklock);
}
#if defined(CONFIG_CXD56_I2C2)
@ -1320,7 +1321,7 @@ void cxd56_img_uart_clock_enable()
{
uint32_t val = 0;
clock_semtake(&g_clockexc);
clock_lock(&g_clocklock);
enable_pwd(PDID_APP_SUB);
cxd56_img_clock_enable();
@ -1333,7 +1334,7 @@ void cxd56_img_uart_clock_enable()
#endif /* CONFIG_CXD56_UART2 */
putreg32(val, CXD56_CRG_GEAR_IMG_UART);
clock_semgive(&g_clockexc);
clock_unlock(&g_clocklock);
}
/****************************************************************************
@ -1348,7 +1349,7 @@ void cxd56_img_uart_clock_disable()
{
uint32_t val = 0;
clock_semtake(&g_clockexc);
clock_lock(&g_clocklock);
val = getreg32(CXD56_CRG_GEAR_IMG_UART);
val &= ~(1UL << 16);
@ -1357,7 +1358,7 @@ void cxd56_img_uart_clock_disable()
cxd56_img_clock_disable();
disable_pwd(PDID_APP_SUB);
clock_semgive(&g_clockexc);
clock_unlock(&g_clocklock);
}
/****************************************************************************
@ -1370,13 +1371,13 @@ void cxd56_img_uart_clock_disable()
void cxd56_img_cisif_clock_enable(void)
{
clock_semtake(&g_clockexc);
clock_lock(&g_clocklock);
enable_pwd(PDID_APP_SUB);
cxd56_img_clock_enable();
g_active_imgdevs |= FLAG_IMG_CISIF;
clock_semgive(&g_clockexc);
clock_unlock(&g_clocklock);
}
/****************************************************************************
@ -1389,13 +1390,13 @@ void cxd56_img_cisif_clock_enable(void)
void cxd56_img_cisif_clock_disable(void)
{
clock_semtake(&g_clockexc);
clock_lock(&g_clocklock);
g_active_imgdevs &= ~FLAG_IMG_CISIF;
cxd56_img_clock_disable();
disable_pwd(PDID_APP_SUB);
clock_semgive(&g_clockexc);
clock_unlock(&g_clocklock);
}
/****************************************************************************
@ -1408,13 +1409,13 @@ void cxd56_img_cisif_clock_disable(void)
void cxd56_img_ge2d_clock_enable(void)
{
clock_semtake(&g_clockexc);
clock_lock(&g_clocklock);
enable_pwd(PDID_APP_SUB);
cxd56_img_clock_enable();
g_active_imgdevs |= FLAG_IMG_GE2D;
clock_semgive(&g_clockexc);
clock_unlock(&g_clocklock);
}
/****************************************************************************
@ -1427,13 +1428,13 @@ void cxd56_img_ge2d_clock_enable(void)
void cxd56_img_ge2d_clock_disable(void)
{
clock_semtake(&g_clockexc);
clock_lock(&g_clocklock);
g_active_imgdevs &= ~FLAG_IMG_GE2D;
cxd56_img_clock_disable();
disable_pwd(PDID_APP_SUB);
clock_semgive(&g_clockexc);
clock_unlock(&g_clocklock);
}
static uint32_t cxd56_get_clock(enum clock_source cs)

17
arch/arm/src/cxd56xx/cxd56_dmac.c
View file

@ -34,7 +34,7 @@
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include "cxd56_dmac.h"
@ -290,7 +290,7 @@ struct dma_channel_s
/* This is the array of all DMA channels */
static struct dma_channel_s g_dmach[NCHANNELS];
static sem_t g_dmaexc;
static mutex_t g_dmalock;
static int dma_init(int ch);
static int dma_uninit(int ch);
@ -727,7 +727,7 @@ void weak_function arm_dma_initialize(void)
up_enable_irq(irq_map[i]);
}
nxsem_init(&g_dmaexc, 0, 1);
nxmutex_init(&g_dmalock);
}
/****************************************************************************
@ -762,7 +762,7 @@ DMA_HANDLE cxd56_dmachannel(int ch, ssize_t maxsize)
/* Get exclusive access to allocate channel */
nxsem_wait_uninterruptible(&g_dmaexc);
nxmutex_lock(&g_dmalock);
if (ch < 0 || ch >= NCHANNELS)
{
@ -806,12 +806,11 @@ DMA_HANDLE cxd56_dmachannel(int ch, ssize_t maxsize)
dmach->inuse = true;
nxsem_post(&g_dmaexc);
nxmutex_unlock(&g_dmalock);
return (DMA_HANDLE)dmach;
err:
nxsem_post(&g_dmaexc);
nxmutex_unlock(&g_dmalock);
return NULL;
}
@ -845,7 +844,7 @@ void cxd56_dmafree(DMA_HANDLE handle)
return;
}
nxsem_wait_uninterruptible(&g_dmaexc);
nxmutex_lock(&g_dmalock);
if (!dmach->inuse)
{
@ -863,7 +862,7 @@ void cxd56_dmafree(DMA_HANDLE handle)
dmach->inuse = false;
err:
nxsem_post(&g_dmaexc);
nxmutex_unlock(&g_dmalock);
}
/****************************************************************************

38
arch/arm/src/cxd56xx/cxd56_emmc.c
View file

@ -35,6 +35,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/fs/fs.h>
#include <nuttx/irq.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <arch/board/board.h>
@ -91,7 +92,7 @@ struct emmc_dma_desc_s
struct cxd56_emmc_state_s
{
sem_t excsem;
mutex_t lock;
int crefs;
uint32_t total_sectors;
};
@ -143,16 +144,6 @@ struct cxd56_emmc_state_s g_emmcdev;
* Private Functions
****************************************************************************/
static int emmc_takesem(sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
static void emmc_givesem(sem_t *sem)
{
nxsem_post(sem);
}
static void emmc_cmdstarted(void)
{
uint32_t val;
@ -429,7 +420,7 @@ static void emmc_send(int datatype, uint32_t opcode, uint32_t arg,
/* Wait for command or data transfer done */
ret = emmc_takesem(&g_waitsem);
ret = nxsem_wait_uninterruptible(&g_waitsem);
if (ret < 0)
{
return;
@ -592,8 +583,7 @@ static int emmc_interrupt(int irq, void *context, void *arg)
ferr("End-bit error/write no CRC.\n");
}
emmc_givesem(&g_waitsem);
nxsem_post(&g_waitsem);
return OK;
}
@ -705,7 +695,7 @@ static int cxd56_emmc_readsectors(struct cxd56_emmc_state_s *priv,
return -ENOMEM;
}
ret = emmc_takesem(&priv->excsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
kmm_free(descs);
@ -746,9 +736,8 @@ static int cxd56_emmc_readsectors(struct cxd56_emmc_state_s *priv,
}
finish:
emmc_givesem(&priv->excsem);
nxmutex_unlock(&priv->lock);
kmm_free(descs);
return ret;
}
@ -767,7 +756,7 @@ static int cxd56_emmc_writesectors(struct cxd56_emmc_state_s *priv,
return -ENOMEM;
}
ret = emmc_takesem(&priv->excsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
kmm_free(descs);
@ -822,9 +811,8 @@ static int cxd56_emmc_writesectors(struct cxd56_emmc_state_s *priv,
emmc_flushwritefifo();
finish:
emmc_givesem(&priv->excsem);
nxmutex_unlock(&priv->lock);
kmm_free(descs);
return ret;
}
#endif
@ -839,14 +827,14 @@ static int cxd56_emmc_open(struct inode *inode)
/* Just increment the reference count on the driver */
ret = emmc_takesem(&priv->excsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
}
priv->crefs++;
emmc_givesem(&priv->excsem);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -861,14 +849,14 @@ static int cxd56_emmc_close(struct inode *inode)
/* Decrement the reference count on the block driver */
DEBUGASSERT(priv->crefs > 0);
ret = emmc_takesem(&priv->excsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
}
priv->crefs--;
emmc_givesem(&priv->excsem);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -952,7 +940,7 @@ int cxd56_emmcinitialize(void)
priv = &g_emmcdev;
memset(priv, 0, sizeof(struct cxd56_emmc_state_s));
nxsem_init(&priv->excsem, 0, 1);
nxmutex_init(&priv->lock);
nxsem_init(&g_waitsem, 0, 0);
nxsem_set_protocol(&g_waitsem, SEM_PRIO_NONE);

17
arch/arm/src/cxd56xx/cxd56_farapi.c
View file

@ -28,6 +28,7 @@
#include <nuttx/sched.h>
#include <nuttx/irq.h>
#include <nuttx/signal.h>
#include <nuttx/mutex.h>
#include <assert.h>
#include <debug.h>
#include <errno.h>
@ -113,7 +114,7 @@ extern struct modulelist_s _image_modlist_base[];
****************************************************************************/
static sem_t g_farwait;
static sem_t g_farlock;
static mutex_t g_farlock;
static struct pm_cpu_wakelock_s g_wlock =
{
.count = 0,
@ -124,11 +125,6 @@ static struct pm_cpu_wakelock_s g_wlock =
* Private Functions
****************************************************************************/
static int farapi_semtake(sem_t *id)
{
return nxsem_wait_uninterruptible(id);
}
#ifdef CONFIG_CXD56_FARAPI_DEBUG
static void dump_farapi_message(struct farmsg_s *msg)
{
@ -225,7 +221,7 @@ void farapi_main(int id, void *arg, struct modulelist_s *mlist)
}
#endif
farapi_semtake(&g_farlock);
nxmutex_lock(&g_farlock);
api = &msg.u.api;
@ -256,7 +252,7 @@ void farapi_main(int id, void *arg, struct modulelist_s *mlist)
/* Wait event flag message as Far API done */
farapi_semtake(&g_farwait);
nxsem_wait_uninterruptible(&g_farwait);
/* Permit hot sleep with Far API done */
@ -265,8 +261,7 @@ void farapi_main(int id, void *arg, struct modulelist_s *mlist)
dump_farapi_message(&msg);
err:
nxsem_post(&g_farlock);
nxmutex_unlock(&g_farlock);
#ifdef CONFIG_SMP
if (0 != cpu)
{
@ -295,7 +290,7 @@ void cxd56_farapiinitialize(void)
}
#endif
nxsem_init(&g_farlock, 0, 1);
nxmutex_init(&g_farlock);
nxsem_init(&g_farwait, 0, 0);
nxsem_set_protocol(&g_farwait, SEM_PRIO_NONE);

10
arch/arm/src/cxd56xx/cxd56_gauge.c
View file

@ -36,6 +36,7 @@
#include <debug.h>
#include <nuttx/kmalloc.h>
#include <nuttx/mutex.h>
#include <nuttx/power/battery_gauge.h>
#include <nuttx/power/battery_ioctl.h>
@ -55,7 +56,7 @@
struct bat_gauge_dev_s
{
sem_t batsem;
mutex_t batlock;
};
/****************************************************************************
@ -279,7 +280,7 @@ static int gauge_ioctl(struct file *filep, int cmd, unsigned long arg)
struct bat_gauge_dev_s *priv = inode->i_private;
int ret = -ENOTTY;
nxsem_wait_uninterruptible(&priv->batsem);
nxmutex_lock(&priv->batlock);
switch (cmd)
{
@ -317,8 +318,7 @@ static int gauge_ioctl(struct file *filep, int cmd, unsigned long arg)
break;
}
nxsem_post(&priv->batsem);
nxmutex_unlock(&priv->batlock);
return ret;
}
@ -347,7 +347,7 @@ int cxd56_gauge_initialize(const char *devpath)
/* Initialize the CXD5247 device structure */
nxsem_init(&priv->batsem, 0, 1);
nxmutex_init(&priv->batlock);
/* Register battery driver */

37
arch/arm/src/cxd56xx/cxd56_ge2d.c
View file

@ -27,6 +27,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/fs/fs.h>
#include <nuttx/irq.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <stdio.h>
@ -50,8 +51,6 @@ static ssize_t ge2d_read(struct file *filep, char *buffer,
static ssize_t ge2d_write(struct file *filep, const char *buffer,
size_t len);
static int ge2d_ioctl(struct file *filep, int cmd, unsigned long arg);
static int ge2d_semtake(sem_t *id);
static void ge2d_semgive(sem_t *id);
static int ge2d_irqhandler(int irq, void *context, void *arg);
/****************************************************************************
@ -66,30 +65,12 @@ static const struct file_operations g_ge2dfops =
};
static sem_t g_wait;
static sem_t g_lock;
static mutex_t g_lock;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: ge2d_semtake
****************************************************************************/
static int ge2d_semtake(sem_t *id)
{
return nxsem_wait_uninterruptible(id);
}
/****************************************************************************
* Name: ge2d_semgive
****************************************************************************/
static void ge2d_semgive(sem_t *id)
{
nxsem_post(id);
}
/****************************************************************************
* Name: ge2d_read
****************************************************************************/
@ -119,7 +100,7 @@ static ssize_t ge2d_write(struct file *filep, const char *buffer,
/* Get exclusive access */
ge2d_semtake(&g_lock);
nxmutex_lock(&g_lock);
/* Set operation buffer and start processing.
* Descriptor start address bit 0 is select to bus, always 1 (memory),
@ -141,14 +122,13 @@ static ssize_t ge2d_write(struct file *filep, const char *buffer,
/* Wait for interrupts for processing done. */
ge2d_semtake(&g_wait);
nxsem_wait_uninterruptible(&g_wait);
/* Disable interrupts */
putreg32(0, GE2D_INTR_ENABLE);
ge2d_semgive(&g_lock);
nxmutex_unlock(&g_lock);
return len;
}
@ -192,8 +172,7 @@ static int ge2d_irqhandler(int irq, void *context, void *arg)
/* Release semaphore anyway */
ge2d_semgive(&g_wait);
nxsem_post(&g_wait);
return OK;
}
@ -205,7 +184,7 @@ int cxd56_ge2dinitialize(const char *devname)
{
int ret;
nxsem_init(&g_lock, 0, 1);
nxmutex_init(&g_lock);
nxsem_init(&g_wait, 0, 0);
nxsem_set_protocol(&g_wait, SEM_PRIO_NONE);
@ -238,7 +217,7 @@ void cxd56_ge2duninitialize(const char *devname)
cxd56_img_ge2d_clock_disable();
nxsem_destroy(&g_lock);
nxmutex_destroy(&g_lock);
nxsem_destroy(&g_wait);
unregister_driver(devname);

13
arch/arm/src/cxd56xx/cxd56_geofence.c
View file

@ -33,6 +33,7 @@
#include <debug.h>
#include <nuttx/kmalloc.h>
#include <nuttx/mutex.h>
#include <nuttx/fs/fs.h>
#include <nuttx/board.h>
#include <nuttx/spi/spi.h>
@ -58,7 +59,7 @@
struct cxd56_geofence_dev_s
{
sem_t devsem;
mutex_t devlock;
struct pollfd *fds[CONFIG_GEOFENCE_NPOLLWAITERS];
};
@ -435,7 +436,7 @@ static void cxd56_geofence_sighandler(uint32_t data, void *userdata)
(struct cxd56_geofence_dev_s *)userdata;
int ret;
ret = nxsem_wait(&priv->devsem);
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
{
return;
@ -443,7 +444,7 @@ static void cxd56_geofence_sighandler(uint32_t data, void *userdata)
poll_notify(priv->fds, CONFIG_GEOFENCE_NPOLLWAITERS, POLLIN);
nxsem_post(&priv->devsem);
nxmutex_unlock(&priv->devlock);
}
/****************************************************************************
@ -557,7 +558,7 @@ static int cxd56_geofence_poll(struct file *filep,
inode = filep->f_inode;
priv = (struct cxd56_geofence_dev_s *)inode->i_private;
ret = nxsem_wait(&priv->devsem);
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
{
return ret;
@ -608,7 +609,7 @@ static int cxd56_geofence_poll(struct file *filep,
}
errout:
nxsem_post(&priv->devsem);
nxmutex_unlock(&priv->devlock);
return ret;
}
@ -640,7 +641,7 @@ static int cxd56_geofence_register(const char *devpath)
}
memset(priv, 0, sizeof(struct cxd56_geofence_dev_s));
nxsem_init(&priv->devsem, 0, 1);
nxmutex_init(&priv->devlock);
ret = cxd56_geofence_initialize(priv);
if (ret < 0)

32
arch/arm/src/cxd56xx/cxd56_gnss.c
View file

@ -34,6 +34,7 @@
#include <debug.h>
#include <nuttx/kmalloc.h>
#include <nuttx/mutex.h>
#include <nuttx/board.h>
#include <nuttx/signal.h>
#include <nuttx/fs/fs.h>
@ -154,7 +155,7 @@ struct cxd56_devsig_table_s
struct cxd56_gnss_dev_s
{
sem_t devsem;
mutex_t devlock;
sem_t syncsem;
uint8_t num_open;
uint8_t notify_data;
@ -165,7 +166,7 @@ struct cxd56_gnss_dev_s
struct cxd56_gnss_sig_s sigs[CONFIG_CXD56_GNSS_NSIGNALRECEIVERS];
#endif
struct cxd56_gnss_shared_info_s shared_info;
sem_t ioctllock;
mutex_t ioctllock;
sem_t apiwait;
int apiret;
};
@ -1483,7 +1484,7 @@ static int cxd56_gnss_set_signal(struct file *filep, unsigned long arg)
inode = filep->f_inode;
priv = (struct cxd56_gnss_dev_s *)inode->i_private;
ret = nxsem_wait(&priv->devsem);
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
{
return ret;
@ -2270,7 +2271,7 @@ static void cxd56_gnss_common_signalhandler(uint32_t data,
int i;
int ret;
ret = nxsem_wait(&priv->devsem);
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
{
return;
@ -2294,7 +2295,7 @@ static void cxd56_gnss_common_signalhandler(uint32_t data,
fw_gd_setnotifymask(sigtype, FALSE);
}
nxsem_post(&priv->devsem);
nxmutex_unlock(&priv->devlock);
}
#endif /* CONFIG_CXD56_GNSS_NSIGNALRECEIVERS != 0 */
@ -2378,7 +2379,7 @@ static void cxd56_gnss_default_sighandler(uint32_t data, void *userdata)
break;
}
ret = nxsem_wait(&priv->devsem);
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
{
return;
@ -2386,7 +2387,7 @@ static void cxd56_gnss_default_sighandler(uint32_t data, void *userdata)
poll_notify(priv->fds, CONFIG_CXD56_GNSS_NPOLLWAITERS, POLLIN);
nxsem_post(&priv->devsem);
nxmutex_unlock(&priv->devlock);
#if CONFIG_CXD56_GNSS_NSIGNALRECEIVERS != 0
cxd56_gnss_common_signalhandler(data, userdata);
@ -2594,7 +2595,7 @@ static int cxd56_gnss_open(struct file *filep)
usleep(100 * 1000);
}
ret = nxsem_wait(&priv->devsem);
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
{
return ret;
@ -2695,7 +2696,7 @@ static int cxd56_gnss_close(struct file *filep)
inode = filep->f_inode;
priv = (struct cxd56_gnss_dev_s *)inode->i_private;
ret = nxsem_wait(&priv->devsem);
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
{
return ret;
@ -2842,7 +2843,7 @@ static int cxd56_gnss_ioctl(struct file *filep, int cmd,
return -EINVAL;
}
ret = nxsem_wait(&priv->ioctllock);
ret = nxmutex_lock(&priv->ioctllock);
if (ret < 0)
{
return ret;
@ -2850,8 +2851,7 @@ static int cxd56_gnss_ioctl(struct file *filep, int cmd,
ret = g_cmdlist[cmd](filep, arg);
nxsem_post(&priv->ioctllock);
nxmutex_unlock(&priv->ioctllock);
return ret;
}
@ -2882,7 +2882,7 @@ static int cxd56_gnss_poll(struct file *filep, struct pollfd *fds,
inode = filep->f_inode;
priv = (struct cxd56_gnss_dev_s *)inode->i_private;
ret = nxsem_wait(&priv->devsem);
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
{
return ret;
@ -2933,7 +2933,7 @@ static int cxd56_gnss_poll(struct file *filep, struct pollfd *fds,
}
errout:
nxsem_post(&priv->devsem);
nxmutex_unlock(&priv->devlock);
return ret;
}
@ -3015,7 +3015,7 @@ static int cxd56_gnss_register(const char *devpath)
memset(priv, 0, sizeof(struct cxd56_gnss_dev_s));
ret = nxsem_init(&priv->devsem, 0, 1);
ret = nxmutex_init(&priv->devlock);
if (ret < 0)
{
gnsserr("Failed to initialize gnss devsem!\n");
@ -3031,7 +3031,7 @@ static int cxd56_gnss_register(const char *devpath)
nxsem_set_protocol(&priv->apiwait, SEM_PRIO_NONE);
ret = nxsem_init(&priv->ioctllock, 0, 1);
ret = nxmutex_init(&priv->ioctllock);
if (ret < 0)
{
gnsserr("Failed to initialize gnss ioctllock!\n");

17
arch/arm/src/cxd56xx/cxd56_hostif.c
View file

@ -24,6 +24,7 @@
#include <nuttx/config.h>
#include <nuttx/kmalloc.h>
#include <nuttx/mutex.h>
#include <nuttx/irq.h>
#include <stdio.h>
@ -89,7 +90,7 @@ struct cxd56_hifdev_s
uint32_t flags;
const void *buffer;
size_t len;
sem_t exclsem;
mutex_t lock;
int crefs;
};
@ -220,14 +221,14 @@ static int hif_open(struct file *filep)
/* Increment reference counter */
nxsem_wait_uninterruptible(&priv->exclsem);
nxmutex_lock(&priv->lock);
priv->crefs++;
DEBUGASSERT(priv->crefs > 0);
if (priv->crefs > 1)
{
nxsem_post(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -238,8 +239,7 @@ static int hif_open(struct file *filep)
priv->flags |= O_NONBLOCK;
}
nxsem_post(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -256,13 +256,12 @@ static int hif_close(struct file *filep)
/* Decrement reference counter */
nxsem_wait_uninterruptible(&priv->exclsem);
nxmutex_lock(&priv->lock);
DEBUGASSERT(priv->crefs > 0);
priv->crefs--;
nxsem_post(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -424,7 +423,7 @@ static int hif_initialize(struct hostif_buff_s *buffer)
return ret;
}
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
priv->crefs = 0;
}

59
arch/arm/src/cxd56xx/cxd56_i2c.c
View file

@ -34,6 +34,7 @@
#include <assert.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include <nuttx/i2c/i2c_master.h>
#include <nuttx/irq.h>
@ -79,7 +80,7 @@ struct cxd56_i2cdev_s
int8_t port; /* Port number */
uint32_t base_freq; /* branch frequency */
sem_t mutex; /* Only one thread can access at a time */
mutex_t lock; /* Only one thread can access at a time */
sem_t wait; /* Place to wait for transfer completion */
struct wdog_s timeout; /* watchdog to timeout when bus hung */
uint32_t frequency; /* Current I2C frequency */
@ -103,6 +104,8 @@ static struct cxd56_i2cdev_s g_i2c0dev =
.port = 0,
.base = CXD56_SCU_I2C0_BASE,
.irqid = CXD56_IRQ_SCU_I2C0,
.lock = NXMUTEX_INITIALIZER,
.wait = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
.refs = 0,
};
#endif
@ -112,6 +115,8 @@ static struct cxd56_i2cdev_s g_i2c1dev =
.port = 1,
.base = CXD56_SCU_I2C1_BASE,
.irqid = CXD56_IRQ_SCU_I2C1,
.lock = NXMUTEX_INITIALIZER,
.wait = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
.refs = 0,
};
#endif
@ -121,6 +126,8 @@ static struct cxd56_i2cdev_s g_i2c2dev =
.port = 2,
.base = CXD56_I2CM_BASE,
.irqid = CXD56_IRQ_I2CM,
.lock = NXMUTEX_INITIALIZER,
.wait = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
.refs = 0,
};
#endif
@ -129,9 +136,6 @@ static struct cxd56_i2cdev_s g_i2c2dev =
* Private Functions
****************************************************************************/
static inline int i2c_takesem(sem_t *sem);
static inline int i2c_givesem(sem_t *sem);
static inline uint32_t i2c_reg_read(struct cxd56_i2cdev_s *priv,
uint32_t offset);
static inline void i2c_reg_write(struct cxd56_i2cdev_s *priv,
@ -158,24 +162,6 @@ static int cxd56_i2c_transfer_scu(struct i2c_master_s *dev,
struct i2c_msg_s *msgs, int count);
#endif
/****************************************************************************
* Name: i2c_takesem
****************************************************************************/
static inline int i2c_takesem(sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
/****************************************************************************
* Name: i2c_givesem
****************************************************************************/
static inline int i2c_givesem(sem_t *sem)
{
return nxsem_post(sem);
}
/****************************************************************************
* Name: cxd56_i2c_pincontrol
*
@ -372,7 +358,7 @@ static void cxd56_i2c_timeout(wdparm_t arg)
irqstate_t flags = enter_critical_section();
priv->error = -ENODEV;
i2c_givesem(&priv->wait);
nxsem_post(&priv->wait);
leave_critical_section(flags);
}
@ -479,7 +465,7 @@ static int cxd56_i2c_interrupt(int irq, void *context, void *arg)
ret = wd_cancel(&priv->timeout);
if (ret == OK)
{
i2c_givesem(&priv->wait);
nxsem_post(&priv->wait);
}
}
@ -542,7 +528,7 @@ static int cxd56_i2c_receive(struct cxd56_i2cdev_s *priv, int last)
i2c_reg_rmw(priv, CXD56_IC_INTR_MASK, INTR_RX_FULL, INTR_RX_FULL);
leave_critical_section(flags);
i2c_takesem(&priv->wait);
nxsem_wait_uninterruptible(&priv->wait);
if (priv->error != OK)
{
@ -589,8 +575,7 @@ static int cxd56_i2c_send(struct cxd56_i2cdev_s *priv, int last)
i2c_reg_rmw(priv, CXD56_IC_INTR_MASK, INTR_TX_EMPTY, INTR_TX_EMPTY);
leave_critical_section(flags);
i2c_takesem(&priv->wait);
nxsem_wait_uninterruptible(&priv->wait);
return 0;
}
@ -618,7 +603,7 @@ static int cxd56_i2c_transfer(struct i2c_master_s *dev,
/* Get exclusive access to the I2C bus */
i2c_takesem(&priv->mutex);
nxmutex_lock(&priv->lock);
/* Check wait semaphore value. If the value is not 0, the transfer can not
* be performed normally.
@ -696,8 +681,7 @@ static int cxd56_i2c_transfer(struct i2c_master_s *dev,
cxd56_i2c_clock_gate_enable(priv->port);
i2c_givesem(&priv->mutex);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -835,7 +819,7 @@ static int cxd56_i2c_transfer_scu(struct i2c_master_s *dev,
/* Get exclusive access to the I2C bus */
i2c_takesem(&priv->mutex);
nxmutex_lock(&priv->lock);
/* Apply frequency for request msgs */
@ -869,8 +853,7 @@ static int cxd56_i2c_transfer_scu(struct i2c_master_s *dev,
}
}
i2c_givesem(&priv->mutex);
nxmutex_unlock(&priv->lock);
return ret;
}
#endif
@ -957,7 +940,7 @@ struct i2c_master_s *cxd56_i2cbus_initialize(int port)
#ifdef CONFIG_CXD56_I2C0
if (port == 0)
{
priv = &g_i2c0dev;
priv = &g_i2c0dev;
# ifndef CONFIG_CXD56_I2C0_SCUSEQ
priv->dev.ops = &cxd56_i2c_ops;
# else
@ -969,7 +952,7 @@ struct i2c_master_s *cxd56_i2cbus_initialize(int port)
#ifdef CONFIG_CXD56_I2C1
if (port == 1)
{
priv = &g_i2c1dev;
priv = &g_i2c1dev;
# ifndef CONFIG_CXD56_I2C1_SCUSEQ
priv->dev.ops = &cxd56_i2c_ops;
# else
@ -1034,10 +1017,6 @@ struct i2c_master_s *cxd56_i2cbus_initialize(int port)
cxd56_i2c_pincontrol(port, true);
nxsem_init(&priv->mutex, 0, 1);
nxsem_init(&priv->wait, 0, 0);
nxsem_set_protocol(&priv->wait, SEM_PRIO_NONE);
/* Attach Interrupt Handler */
irq_attach(priv->irqid, cxd56_i2c_interrupt, priv);
@ -1100,8 +1079,6 @@ int cxd56_i2cbus_uninitialize(struct i2c_master_s *dev)
irq_detach(priv->irqid);
wd_cancel(&priv->timeout);
nxsem_destroy(&priv->mutex);
nxsem_destroy(&priv->wait);
return OK;
}

26
arch/arm/src/cxd56xx/cxd56_icc.c
View file

@ -145,21 +145,6 @@ static struct iccdev_s *g_cpumsg[NCPUS];
* Private Functions
****************************************************************************/
static int icc_semtake(sem_t *semid)
{
return nxsem_wait_uninterruptible(semid);
}
static int icc_semtrytake(sem_t *semid)
{
return nxsem_trywait(semid);
}
static void icc_semgive(sem_t *semid)
{
nxsem_post(semid);
}
static struct iccdev_s *icc_getprotocol(int protoid)
{
if (protoid < 0 || protoid >= NPROTOCOLS)
@ -234,7 +219,7 @@ static int icc_irqhandler(int cpuid, uint32_t word[2])
sq_addlast((sq_entry_t *)req, &priv->recvq);
icc_semgive(&priv->rxwait);
nxsem_post(&priv->rxwait);
/* If signal registered by cxd56_iccnotify(), then send POSIX signal to
* process.
@ -295,7 +280,7 @@ static int icc_msghandler(int cpuid, int protoid, uint32_t pdata,
static void icc_rxtimeout(wdparm_t arg)
{
struct iccdev_s *priv = (struct iccdev_s *)arg;
icc_semgive(&priv->rxwait);
nxsem_post(&priv->rxwait);
}
static int icc_recv(struct iccdev_s *priv, iccmsg_t *msg, int32_t ms)
@ -308,7 +293,7 @@ static int icc_recv(struct iccdev_s *priv, iccmsg_t *msg, int32_t ms)
{
/* Try to take the semaphore without waiging. */
ret = icc_semtrytake(&priv->rxwait);
ret = nxsem_trywait(&priv->rxwait);
if (ret < 0)
{
return ret;
@ -316,7 +301,7 @@ static int icc_recv(struct iccdev_s *priv, iccmsg_t *msg, int32_t ms)
}
else if (ms == 0)
{
icc_semtake(&priv->rxwait);
nxsem_wait_uninterruptible(&priv->rxwait);
}
else
{
@ -324,8 +309,7 @@ static int icc_recv(struct iccdev_s *priv, iccmsg_t *msg, int32_t ms)
timo = ms * 1000 / CONFIG_USEC_PER_TICK;
wd_start(&priv->rxtimeout, timo, icc_rxtimeout, (wdparm_t)priv);
icc_semtake(&priv->rxwait);
nxsem_wait_uninterruptible(&priv->rxwait);
wd_cancel(&priv->rxtimeout);
}

48
arch/arm/src/cxd56xx/cxd56_powermgr.c
View file

@ -27,6 +27,7 @@
#include <nuttx/config.h>
#include <nuttx/kmalloc.h>
#include <nuttx/mutex.h>
#include <nuttx/mqueue.h>
#include <nuttx/queue.h>
@ -149,7 +150,6 @@ static int cxd56_pm_do_callback(uint8_t id,
static int cxd56_pm_needcallback(uint32_t target,
struct cxd56_pm_target_id_s *table);
static void cxd56_pm_clkchange(struct cxd56_pm_message_s *message);
static int cxd56_pm_semtake(sem_t *id);
static void cxd56_pm_checkfreqlock(void);
static int cxd56_pm_maintask(int argc, char *argv[]);
#if defined(CONFIG_CXD56_HOT_SLEEP)
@ -167,8 +167,8 @@ static int cxd56_pmmsghandler(int cpuid, int protoid, uint32_t pdata,
static struct cxd56_pm_target_id_s g_target_id_table;
static struct file g_queuedesc;
static sem_t g_bootsync;
static sem_t g_regcblock;
static sem_t g_freqlock;
static mutex_t g_regcblock;
static mutex_t g_freqlock;
static sem_t g_freqlockwait;
static dq_queue_t g_cbqueue;
static sq_queue_t g_freqlockqueue;
@ -179,11 +179,6 @@ static int g_freqlock_flag;
static struct pm_cpu_wakelock_s g_wlock =
PM_CPUWAKELOCK_INIT(PM_CPUWAKELOCK_TAG('P', 'M', 0));
static int cxd56_pm_semtake(sem_t *id)
{
return nxsem_wait_uninterruptible(id);
}
/****************************************************************************
* Public Functions
****************************************************************************/
@ -311,13 +306,13 @@ static void cxd56_pm_clkchange(struct cxd56_pm_message_s *message)
return;
}
cxd56_pm_semtake(&g_regcblock);
nxmutex_lock(&g_regcblock);
ret = cxd56_pm_do_callback(id, &g_target_id_table);
cxd56_pmsendmsg(mid, ret);
nxsem_post(&g_regcblock);
nxmutex_unlock(&g_regcblock);
}
static void cxd56_pm_checkfreqlock(void)
@ -337,7 +332,7 @@ static void cxd56_pm_checkfreqlock(void)
{
g_freqlock_flag = flag;
cxd56_pmsendmsg(MSGID_FREQLOCK, flag);
cxd56_pm_semtake(&g_freqlockwait);
nxsem_wait_uninterruptible(&g_freqlockwait);
}
}
@ -486,12 +481,12 @@ void *cxd56_pm_register_callback(uint32_t target,
{
struct pm_cbentry_s *entry = NULL;
cxd56_pm_semtake(&g_regcblock);
nxmutex_lock(&g_regcblock);
entry = (struct pm_cbentry_s *)kmm_malloc(sizeof(struct pm_cbentry_s));
if (entry == NULL)
{
nxsem_post(&g_regcblock);
nxmutex_unlock(&g_regcblock);
return NULL;
}
@ -499,19 +494,19 @@ void *cxd56_pm_register_callback(uint32_t target,
entry->callback = callback;
dq_addlast((dq_entry_t *)entry, &g_cbqueue);
nxsem_post(&g_regcblock);
nxmutex_unlock(&g_regcblock);
return (void *)entry;
}
void cxd56_pm_unregister_callback(void *handle)
{
cxd56_pm_semtake(&g_regcblock);
nxmutex_lock(&g_regcblock);
dq_rem((dq_entry_t *)handle, &g_cbqueue);
kmm_free(handle);
nxsem_post(&g_regcblock);
nxmutex_unlock(&g_regcblock);
}
static int cxd56_pmmsghandler(int cpuid, int protoid, uint32_t pdata,
@ -583,7 +578,7 @@ void up_pm_acquire_freqlock(struct pm_cpu_freqlock_s *lock)
up_pm_acquire_wakelock(&g_wlock);
cxd56_pm_semtake(&g_freqlock);
nxmutex_lock(&g_freqlock);
if (lock->flag == PM_CPUFREQLOCK_FLAG_HOLD)
{
@ -608,8 +603,7 @@ void up_pm_acquire_freqlock(struct pm_cpu_freqlock_s *lock)
lock->count++;
nxsem_post(&g_freqlock);
nxmutex_unlock(&g_freqlock);
up_pm_release_wakelock(&g_wlock);
}
@ -640,7 +634,7 @@ void up_pm_release_freqlock(struct pm_cpu_freqlock_s *lock)
up_pm_acquire_wakelock(&g_wlock);
cxd56_pm_semtake(&g_freqlock);
nxmutex_lock(&g_freqlock);
for (entry = sq_peek(&g_freqlockqueue); entry; entry = sq_next(entry))
{
@ -657,8 +651,7 @@ void up_pm_release_freqlock(struct pm_cpu_freqlock_s *lock)
}
exit:
nxsem_post(&g_freqlock);
nxmutex_unlock(&g_freqlock);
up_pm_release_wakelock(&g_wlock);
}
@ -683,7 +676,7 @@ int up_pm_get_freqlock_count(struct pm_cpu_freqlock_s *lock)
DEBUGASSERT(lock);
cxd56_pm_semtake(&g_freqlock);
nxmutex_lock(&g_freqlock);
for (entry = sq_peek(&g_freqlockqueue); entry; entry = sq_next(entry))
{
@ -694,7 +687,7 @@ int up_pm_get_freqlock_count(struct pm_cpu_freqlock_s *lock)
}
}
nxsem_post(&g_freqlock);
nxmutex_unlock(&g_freqlock);
return count;
}
@ -831,13 +824,13 @@ int cxd56_pm_initialize(void)
sq_init(&g_freqlockqueue);
sq_init(&g_wakelockqueue);
ret = nxsem_init(&g_regcblock, 0, 1);
ret = nxmutex_init(&g_regcblock);
if (ret < 0)
{
return ret;
}
ret = nxsem_init(&g_freqlock, 0, 1);
ret = nxmutex_init(&g_freqlock);
if (ret < 0)
{
return ret;
@ -867,8 +860,7 @@ int cxd56_pm_initialize(void)
/* wait until cxd56_pm_maintask thread is ready */
cxd56_pm_semtake(&g_bootsync);
nxsem_wait_uninterruptible(&g_bootsync);
return OK;
}

47
arch/arm/src/cxd56xx/cxd56_scu.c
View file

@ -26,6 +26,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/irq.h>
#include <nuttx/signal.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <inttypes.h>
@ -186,8 +187,8 @@ struct decimator_s
struct cxd56_scudev_s
{
sem_t syncwait; /* Semaphore for synchronize with SCU firmware */
sem_t syncexc; /* Semaphore for exclusive access to sync */
sem_t syncwait; /* Semaphore for synchronize with SCU firmware */
mutex_t synclock; /* Mutex for exclusive access to sync */
/* SCU hardware resource management bitmaps (1 = allocated) */
@ -230,8 +231,6 @@ static int8_t seq_alloc(void);
static inline void seq_free(int8_t sid);
static inline int8_t oneshot_alloc(void);
static inline void oneshot_free(int8_t tid);
static int seq_semtake(sem_t *id);
static void seq_semgive(sem_t *id);
static void seq_fifosetactive(struct seq_s *seq, int fifoid);
static void seq_fifosetinactive(struct seq_s *seq, int fifoid);
static int seq_fifoisactive(struct seq_s *seq, int fifoid);
@ -359,24 +358,6 @@ static const struct coeff_addr_s g_caddrs[3][2] =
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: seq_semtake
****************************************************************************/
static int seq_semtake(sem_t *id)
{
return nxsem_wait_uninterruptible(id);
}
/****************************************************************************
* Name: seq_semgive
****************************************************************************/
static void seq_semgive(sem_t *id)
{
nxsem_post(id);
}
/****************************************************************************
* Name: seq_fifosetactive
****************************************************************************/
@ -1083,7 +1064,7 @@ static int seq_oneshot(int bustype, int slave, uint16_t *inst,
/* Wait for one shot is done */
seq_semtake(&priv->oneshotwait[tid]);
nxsem_wait_uninterruptible(&priv->oneshotwait[tid]);
/* Disable interrupt for one shot sequencer */
@ -1451,7 +1432,7 @@ static void seq_sync(struct seq_s *seq, int req)
{
struct cxd56_scudev_s *priv = &g_scudev;
seq_semtake(&priv->syncexc);
nxmutex_lock(&priv->synclock);
/* Save current request */
@ -1468,11 +1449,11 @@ static void seq_sync(struct seq_s *seq, int req)
/* Wait for interrupt from SCU firmware */
seq_semtake(&priv->syncwait);
nxsem_wait_uninterruptible(&priv->syncwait);
priv->currentreq = 0;
seq_semgive(&priv->syncexc);
nxmutex_unlock(&priv->synclock);
}
/****************************************************************************
@ -1628,7 +1609,7 @@ static void seq_handleoneshot(struct cxd56_scudev_s *priv, uint32_t intr)
{
putreg32(bit, SCU_INT_CLEAR_MAIN);
seq_semgive(&priv->oneshotwait[i]);
nxsem_post(&priv->oneshotwait[i]);
}
}
}
@ -1655,7 +1636,7 @@ static void seq_handleisopdoneintr(struct cxd56_scudev_s *priv,
putreg32(1 << 27, SCU_INT_DISABLE_MAIN);
putreg32(1 << 27, SCU_INT_CLEAR_MAIN);
seq_semgive(&priv->syncwait);
nxsem_post(&priv->syncwait);
}
}
@ -1754,7 +1735,7 @@ static int seq_scuirqhandler(int irq, void *context, void *arg)
tid = out - 1;
priv->oneshoterr[tid] = -EIO;
seq_semgive(&priv->oneshotwait[tid]);
nxsem_post(&priv->oneshotwait[tid]);
}
}
}
@ -2886,7 +2867,7 @@ static void seq_fifodmadone(DMA_HANDLE handle, uint8_t status, void *arg)
{
struct scufifo_s *fifo = (struct scufifo_s *)arg;
fifo->dmaresult = status;
seq_semgive(&fifo->dmawait);
nxsem_post(&fifo->dmawait);
}
#else
/****************************************************************************
@ -3045,7 +3026,7 @@ int seq_read(struct seq_s *seq, int fifoid, char *buffer, int length)
/* Wait for DMA is done */
seq_semtake(&fifo->dmawait);
nxsem_wait_uninterruptible(&fifo->dmawait);
if (fifo->dmaresult)
{
/* ERROR */
@ -3446,7 +3427,7 @@ void scu_initialize(void)
memset(priv, 0, sizeof(struct cxd56_scudev_s));
nxsem_init(&priv->syncexc, 0, 1);
nxmutex_init(&priv->synclock);
nxsem_init(&priv->syncwait, 0, 0);
nxsem_set_protocol(&priv->syncwait, SEM_PRIO_NONE);
@ -3520,7 +3501,7 @@ void scu_uninitialize(void)
cxd56_scuseq_clock_disable();
nxsem_destroy(&priv->syncwait);
nxsem_destroy(&priv->syncexc);
nxmutex_destroy(&priv->synclock);
for (i = 0; i < 3; i++)
{

30
arch/arm/src/cxd56xx/cxd56_sdhci.c
View file

@ -308,8 +308,6 @@ struct cxd56_sdhcregs_s
/* Low-level helpers ********************************************************/
static int cxd56_takesem(struct cxd56_sdiodev_s *priv);
#define cxd56_givesem(priv) (nxsem_post(&(priv)->waitsem))
static void cxd56_configwaitints(struct cxd56_sdiodev_s *priv,
uint32_t waitints, sdio_eventset_t waitevents,
sdio_eventset_t wkupevents);
@ -484,27 +482,6 @@ static uint32_t cxd56_sdhci_adma_dscr[CXD56_SDIO_MAX_LEN_ADMA_DSCR * 2];
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: cxd56_takesem
*
* Description:
* Take the wait semaphore (handling false alarm wakeups due to the receipt
* of signals).
*
* Input Parameters:
* dev - Instance of the SDIO device driver state structure.
*
* Returned Value:
* Normally OK, but may return -ECANCELED in the rare event that the task
* has been canceled.
*
****************************************************************************/
static int cxd56_takesem(struct cxd56_sdiodev_s *priv)
{
return nxsem_wait_uninterruptible(&priv->waitsem);
}
/****************************************************************************
* Name: cxd56_configwaitints
*
@ -1006,7 +983,7 @@ static void cxd56_endwait(struct cxd56_sdiodev_s *priv,
/* Wake up the waiting thread */
cxd56_givesem(priv);
nxsem_post(&priv->waitsem);
}
/****************************************************************************
@ -2599,7 +2576,7 @@ static sdio_eventset_t cxd56_sdio_eventwait(struct sdio_dev_s *dev)
* there will be no wait.
*/
ret = cxd56_takesem(priv);
ret = nxsem_wait_uninterruptible(&priv->waitsem);
if (ret < 0)
{
/* Task canceled. Cancel the wdog (assuming it was started) and
@ -2641,7 +2618,7 @@ static sdio_eventset_t cxd56_sdio_eventwait(struct sdio_dev_s *dev)
cxd56_configwaitints(priv, 0, 0, 0);
#ifdef CONFIG_SDIO_DMA
priv->xfrflags = 0;
priv->xfrflags = 0;
if (priv->aligned_buffer)
{
if (priv->dma_cmd == MMCSD_CMD17 || priv->dma_cmd == MMCSD_CMD18)
@ -2655,7 +2632,6 @@ static sdio_eventset_t cxd56_sdio_eventwait(struct sdio_dev_s *dev)
/* Free aligned buffer */
kmm_free(priv->aligned_buffer);
priv->aligned_buffer = NULL;
}
#endif

17
arch/arm/src/cxd56xx/cxd56_sph.c
View file

@ -78,8 +78,6 @@ struct sph_dev_s
static int sph_open(struct file *filep);
static int sph_ioctl(struct file *filep, int cmd, unsigned long arg);
static int sph_semtake(sem_t *id);
static void sph_semgive(sem_t *id);
static int sph_lock(struct sph_dev_s *priv);
static int sph_trylock(struct sph_dev_s *priv);
static inline int sph_unlock(struct sph_dev_s *priv);
@ -148,16 +146,6 @@ static int sph_ioctl(struct file *filep, int cmd, unsigned long arg)
return ret;
}
static int sph_semtake(sem_t *id)
{
return nxsem_wait_uninterruptible(id);
}
static void sph_semgive(sem_t *id)
{
nxsem_post(id);
}
static int sph_lock(struct sph_dev_s *priv)
{
uint32_t sts;
@ -182,7 +170,7 @@ static int sph_lock(struct sph_dev_s *priv)
sts = getreg32(CXD56_SPH_STS(priv->id));
if (sph_state_busy(sts))
{
sph_semtake(&priv->wait);
nxsem_wait_uninterruptible(&priv->wait);
}
/* Get latest status for determining locked owner. */
@ -268,8 +256,7 @@ static int cxd56_sphirqhandler(int irq, void *context, void *arg)
/* Give semaphore for hardware semaphore is locked */
sph_semgive(&g_sphdev[id].wait);
nxsem_post(&g_sphdev[id].wait);
return OK;
}

14
arch/arm/src/cxd56xx/cxd56_spi.c
View file

@ -37,7 +37,7 @@
#include <arch/chip/pm.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include "arm_internal.h"
@ -69,7 +69,7 @@ struct cxd56_spidev_s
#ifdef CONFIG_CXD56_SPI_INTERRUPTS
uint8_t spiirq; /* SPI IRQ number */
#endif
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (4 to 16) */
@ -402,13 +402,13 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
/* Take the semaphore (perhaps waiting) */
/* Take the mutex (perhaps waiting) */
return nxsem_wait_uninterruptible(&priv->exclsem);
return nxmutex_lock(&priv->lock);
}
else
{
return nxsem_post(&priv->exclsem);
return nxmutex_unlock(&priv->lock);
}
}
@ -1244,9 +1244,9 @@ struct spi_dev_s *cxd56_spibus_initialize(int port)
spi_setfrequency((struct spi_dev_s *)priv, 400000);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
#ifdef CONFIG_CXD56_SPI3_SCUSEQ
/* Enable the SPI, but not enable port 3 when SCU support enabled.

31
arch/arm/src/cxd56xx/cxd56_sysctl.c
View file

@ -27,6 +27,7 @@
#include <nuttx/arch.h>
#include <nuttx/fs/fs.h>
#include <nuttx/fs/ioctl.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <stdio.h>
@ -57,8 +58,6 @@
****************************************************************************/
static int sysctl_ioctl(struct file *filep, int cmd, unsigned long arg);
static int sysctl_semtake(sem_t *semid);
static void sysctl_semgive(sem_t *semid);
static int sysctl_rxhandler(int cpuid, int protoid,
uint32_t pdata, uint32_t data,
void *userdata);
@ -67,7 +66,7 @@ static int sysctl_rxhandler(int cpuid, int protoid,
* Private Data
****************************************************************************/
static sem_t g_exc;
static mutex_t g_lock;
static sem_t g_sync;
static int g_errcode = 0;
@ -96,16 +95,6 @@ static int sysctl_ioctl(struct file *filep, int cmd, unsigned long arg)
return ret;
}
static int sysctl_semtake(sem_t *semid)
{
return nxsem_wait_uninterruptible(semid);
}
static void sysctl_semgive(sem_t *semid)
{
nxsem_post(semid);
}
static int sysctl_rxhandler(int cpuid, int protoid,
uint32_t pdata, uint32_t data,
void *userdata)
@ -115,8 +104,7 @@ static int sysctl_rxhandler(int cpuid, int protoid,
g_errcode = (int)data;
sysctl_semgive(&g_sync);
nxsem_post(&g_sync);
return OK;
}
@ -131,7 +119,7 @@ int cxd56_sysctlcmd(uint8_t id, uint32_t data)
/* Get exclusive access */
ret = sysctl_semtake(&g_exc);
ret = nxmutex_lock(&g_lock);
if (ret < 0)
{
return ret;
@ -146,17 +134,17 @@ int cxd56_sysctlcmd(uint8_t id, uint32_t data)
ret = cxd56_iccsend(CXD56_PROTO_SYSCTL, &msg, SYSCTL_TIMEOUT);
if (ret < 0)
{
sysctl_semgive(&g_exc);
nxmutex_unlock(&g_lock);
_err("Timeout.\n");
return ret;
}
/* Wait for reply message from system CPU */
ret = sysctl_semtake(&g_sync);
ret = nxsem_wait_uninterruptible(&g_sync);
if (ret < 0)
{
sysctl_semgive(&g_exc);
nxmutex_unlock(&g_lock);
return ret;
}
@ -164,8 +152,7 @@ int cxd56_sysctlcmd(uint8_t id, uint32_t data)
ret = g_errcode;
sysctl_semgive(&g_exc);
nxmutex_unlock(&g_lock);
return ret;
}
@ -173,7 +160,7 @@ void cxd56_sysctlinitialize(void)
{
cxd56_iccinit(CXD56_PROTO_SYSCTL);
nxsem_init(&g_exc, 0, 1);
nxmutex_init(&g_lock);
nxsem_init(&g_sync, 0, 0);
nxsem_set_protocol(&g_sync, SEM_PRIO_NONE);

38
arch/arm/src/cxd56xx/cxd56_uart0.c
View file

@ -27,7 +27,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/fs/fs.h>
#include <nuttx/irq.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <stdio.h>
#include <stdint.h>
@ -71,8 +71,6 @@ static ssize_t uart0_read(struct file *filep,
char *buffer, size_t len);
static ssize_t uart0_write(struct file *filep,
const char *buffer, size_t len);
static int uart0_semtake(sem_t *id);
static void uart0_semgive(sem_t *id);
/****************************************************************************
* FarAPI prototypes
@ -99,30 +97,12 @@ static const struct file_operations g_uart0fops =
.write = uart0_write
};
static sem_t g_lock;
static mutex_t g_lock;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: uart0_semtake
****************************************************************************/
static int uart0_semtake(sem_t *id)
{
return nxsem_wait_uninterruptible(id);
}
/****************************************************************************
* Name: uart0_semgive
****************************************************************************/
static void uart0_semgive(sem_t *id)
{
nxsem_post(id);
}
/****************************************************************************
* Name: uart0_open
****************************************************************************/
@ -218,13 +198,12 @@ static ssize_t uart0_read(struct file *filep,
{
int ret;
uart0_semtake(&g_lock);
nxmutex_lock(&g_lock);
ret = fw_pd_uartreceive(0, buffer, len,
((filep->f_oflags & O_NONBLOCK) != 0));
uart0_semgive(&g_lock);
nxmutex_unlock(&g_lock);
return (ssize_t)ret;
}
@ -237,13 +216,12 @@ static ssize_t uart0_write(struct file *filep,
{
int ret;
uart0_semtake(&g_lock);
nxmutex_lock(&g_lock);
ret = fw_pd_uartsend(0, (void *)buffer, len,
((filep->f_oflags & O_NONBLOCK) != 0));
uart0_semgive(&g_lock);
nxmutex_unlock(&g_lock);
return (ssize_t)ret;
}
@ -255,7 +233,7 @@ int cxd56_uart0initialize(const char *devname)
{
int ret;
nxsem_init(&g_lock, 0, 1);
nxmutex_init(&g_lock);
ret = register_driver(devname, &g_uart0fops, 0666, NULL);
if (ret != 0)
@ -273,7 +251,7 @@ int cxd56_uart0initialize(const char *devname)
void cxd56_uart0uninitialize(const char *devname)
{
unregister_driver(devname);
nxsem_destroy(&g_lock);
nxmutex_destroy(&g_lock);
}
#endif /* CONFIG_CXD56_UART0 */

11
arch/arm/src/cxd56xx/cxd56_udmac.c
View file

@ -33,6 +33,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include "arm_internal.h"
@ -67,8 +68,8 @@ struct dma_channel_s
struct dma_controller_s
{
sem_t exclsem; /* Protects channel table */
sem_t chansem; /* Count of free channels */
mutex_t lock; /* Protects channel table */
sem_t chansem; /* Count of free channels */
};
/****************************************************************************
@ -238,7 +239,7 @@ void cxd56_udmainitialize(void)
/* Initialize the channel list */
nxsem_init(&g_dmac.exclsem, 0, 1);
nxmutex_init(&g_dmac.lock);
nxsem_init(&g_dmac.chansem, 0, CXD56_DMA_NCHANNELS);
for (i = 0; i < CXD56_DMA_NCHANNELS; i++)
@ -306,7 +307,7 @@ DMA_HANDLE cxd56_udmachannel(void)
/* Get exclusive access to the DMA channel list */
ret = nxsem_wait_uninterruptible(&g_dmac.exclsem);
ret = nxmutex_lock(&g_dmac.lock);
if (ret < 0)
{
nxsem_post(&g_dmac.chansem);
@ -332,7 +333,7 @@ DMA_HANDLE cxd56_udmachannel(void)
}
}
nxsem_post(&g_dmac.exclsem);
nxmutex_unlock(&g_dmac.lock);
/* Attach DMA interrupt vector */

9
arch/arm/src/efm32/efm32_dma.c
View file

@ -33,6 +33,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include "arm_internal.h"
@ -67,7 +68,7 @@ struct dma_channel_s
struct dma_controller_s
{
sem_t exclsem; /* Protects channel table */
mutex_t lock; /* Protects channel table */
sem_t chansem; /* Count of free channels */
};
@ -265,7 +266,7 @@ void weak_function arm_dma_initialize(void)
/* Initialize the channel list */
nxsem_init(&g_dmac.exclsem, 0, 1);
nxmutex_init(&g_dmac.lock);
nxsem_init(&g_dmac.chansem, 0, EFM32_DMA_NCHANNELS);
for (i = 0; i < EFM32_DMA_NCHANNELS; i++)
@ -343,7 +344,7 @@ DMA_HANDLE efm32_dmachannel(void)
/* Get exclusive access to the DMA channel list */
ret = nxsem_wait_uninterruptible(&g_dmac.exclsem);
ret = nxmutex_lock(&g_dmac.lock);
if (ret < 0)
{
nxsem_post(&g_dmac.chansem);
@ -372,7 +373,7 @@ DMA_HANDLE efm32_dmachannel(void)
}
}
nxsem_post(&g_dmac.exclsem);
nxmutex_unlock(&g_dmac.lock);
/* Since we have reserved a DMA descriptor by taking a count from chansem,
* it would be a serious logic failure if we could not find a free channel

108
arch/arm/src/efm32/efm32_i2c.c
View file

@ -53,6 +53,7 @@
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include <nuttx/clock.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/i2c/i2c_master.h>
@ -218,7 +219,7 @@ struct efm32_i2c_priv_s
const struct efm32_i2c_config_s *config;
int refs; /* Reference count */
sem_t sem_excl; /* Mutual exclusion semaphore */
mutex_t lock; /* Mutual exclusion mutex */
#ifndef CONFIG_I2C_POLLED
sem_t sem_isr; /* Interrupt wait semaphore */
#endif
@ -260,18 +261,12 @@ static inline void efm32_i2c_putreg(struct efm32_i2c_priv_s *priv,
static inline void efm32_i2c_modifyreg(struct efm32_i2c_priv_s *priv,
uint8_t offset, uint32_t clearbits,
uint32_t setbits);
static inline int efm32_i2c_sem_wait(struct efm32_i2c_priv_s *priv);
static int
efm32_i2c_sem_wait_noncancelable(struct efm32_i2c_priv_s *priv);
#ifdef CONFIG_EFM32_I2C_DYNTIMEO
static uint32_t efm32_i2c_toticks(int msgc, struct i2c_msg_s *msgs);
#endif /* CONFIG_EFM32_I2C_DYNTIMEO */
static inline int efm32_i2c_sem_waitdone(struct efm32_i2c_priv_s *priv);
static inline void efm32_i2c_sem_post(struct efm32_i2c_priv_s *priv);
static inline void efm32_i2c_sem_init(struct efm32_i2c_priv_s *priv);
static inline void efm32_i2c_sem_destroy(struct efm32_i2c_priv_s *priv);
#ifdef CONFIG_I2C_TRACE
static void efm32_i2c_tracereset(struct efm32_i2c_priv_s *priv);
@ -335,6 +330,10 @@ static struct efm32_i2c_priv_s efm32_i2c0_priv =
.ops = &efm32_i2c_ops,
.config = &efm32_i2c0_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
#endif
.result = I2CRESULT_NONE,
.msgc = 0,
.msgv = NULL,
@ -362,6 +361,10 @@ static struct efm32_i2c_priv_s efm32_i2c1_priv =
.ops = &efm32_i2c_ops,
.config = &efm32_i2c1_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
#endif
.result = I2CRESULT_NONE,
.msgc = 0,
.msgv = NULL,
@ -459,34 +462,6 @@ static const char *efm32_i2c_state_str(int i2c_state)
}
#endif
/****************************************************************************
* Name: efm32_i2c_sem_wait
*
* Description:
* Take the exclusive access, waiting as necessary. May be interrupted by
* a signal.
*
****************************************************************************/
static inline int efm32_i2c_sem_wait(struct efm32_i2c_priv_s *priv)
{
return nxsem_wait(&priv->sem_excl);
}
/****************************************************************************
* Name: efm32_i2c_sem_wait_noncancelable
*
* Description:
* Take the exclusive access, waiting as necessary
*
****************************************************************************/
static int
efm32_i2c_sem_wait_noncancelable(struct efm32_i2c_priv_s *priv)
{
return nxsem_wait_uninterruptible(&priv->sem_excl);
}
/****************************************************************************
* Name: efm32_i2c_toticks
*
@ -628,57 +603,6 @@ static inline int efm32_i2c_sem_waitdone(struct efm32_i2c_priv_s *priv)
}
#endif
/****************************************************************************
* Name: efm32_i2c_sem_post
*
* Description:
* Release the mutual exclusion semaphore
*
****************************************************************************/
static inline void efm32_i2c_sem_post(struct efm32_i2c_priv_s *priv)
{
nxsem_post(&priv->sem_excl);
}
/****************************************************************************
* Name: efm32_i2c_sem_init
*
* Description:
* Initialize semaphores
*
****************************************************************************/
static inline void efm32_i2c_sem_init(struct efm32_i2c_priv_s *priv)
{
nxsem_init(&priv->sem_excl, 0, 1);
#ifndef CONFIG_I2C_POLLED
/* This semaphore is used for signaling and, hence, should not have
* priority inheritance enabled.
*/
nxsem_init(&priv->sem_isr, 0, 0);
nxsem_set_protocol(&priv->sem_isr, SEM_PRIO_NONE);
#endif
}
/****************************************************************************
* Name: efm32_i2c_sem_destroy
*
* Description:
* Destroy semaphores.
*
****************************************************************************/
static inline void efm32_i2c_sem_destroy(struct efm32_i2c_priv_s *priv)
{
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
nxsem_destroy(&priv->sem_isr);
#endif
}
/****************************************************************************
* Name: efm32_i2c_trace*
*
@ -1415,7 +1339,7 @@ static int efm32_i2c_transfer(struct i2c_master_s *dev,
/* Ensure that address or flags don't change meanwhile */
ret = efm32_i2c_sem_wait(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -1546,7 +1470,7 @@ static int efm32_i2c_transfer(struct i2c_master_s *dev,
priv->dcnt = 0;
priv->ptr = NULL;
efm32_i2c_sem_post(priv);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -1582,7 +1506,7 @@ int efm32_i2c_reset(struct i2c_master_s *dev)
/* Lock out other clients */
ret = efm32_i2c_sem_wait_noncancelable(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -1671,7 +1595,7 @@ out:
/* Release the port for re-use by other clients */
efm32_i2c_sem_post(priv);
nxmutex_unlock(&priv->lock);
return ret;
}
#endif /* CONFIG_I2C_RESET */
@ -1721,7 +1645,6 @@ struct i2c_master_s *efm32_i2cbus_initialize(int port)
if ((volatile int)priv->refs++ == 0)
{
efm32_i2c_sem_init(priv);
efm32_i2c_init(priv);
}
@ -1765,9 +1688,6 @@ int efm32_i2cbus_uninitialize(struct i2c_master_s *dev)
efm32_i2c_deinit(priv);
/* Release unused resources */
efm32_i2c_sem_destroy(priv);
return OK;
}

11
arch/arm/src/efm32/efm32_spi.c
View file

@ -35,6 +35,7 @@
#include <nuttx/arch.h>
#include <nuttx/wdog.h>
#include <nuttx/clock.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/spi/spi.h>
@ -116,7 +117,7 @@ struct efm32_spidev_s
sem_t txdmasem; /* Wait for TX DMA to complete */
#endif
sem_t exclsem; /* Supports mutually exclusive access */
mutex_t lock; /* Supports mutually exclusive access */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t mode; /* Mode 0,1,2,3 */
@ -718,11 +719,11 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -1576,9 +1577,9 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
spi_putreg(config, EFM32_USART_CMD_OFFSET, USART_CMD_MASTEREN);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
#ifdef CONFIG_EFM32_SPI_DMA
/* Allocate two DMA channels... one for the RX and one for the TX side of

70
arch/arm/src/efm32/efm32_usbhost.c
View file

@ -38,6 +38,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/clock.h>
#include <nuttx/signal.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/usb/usb.h>
#include <nuttx/usb/usbhost.h>
@ -250,7 +251,7 @@ struct efm32_usbhost_s
volatile bool connected; /* Connected to device */
volatile bool change; /* Connection change */
volatile bool pscwait; /* True: Thread is waiting for a port event */
sem_t exclsem; /* Support mutually exclusive access */
mutex_t lock; /* Support mutually exclusive access */
sem_t pscsem; /* Semaphore to wait for a port event */
struct efm32_ctrlinfo_s ep0; /* Root hub port EP0 description */
@ -303,11 +304,6 @@ static inline void efm32_modifyreg(uint32_t addr, uint32_t clrbits,
# define efm32_pktdump(m,b,n)
#endif
/* Semaphores ***************************************************************/
static int efm32_takesem(sem_t *sem);
#define efm32_givesem(s) nxsem_post(s);
/* Byte stream access helper functions **************************************/
static inline uint16_t efm32_getle16(const uint8_t *val);
@ -746,20 +742,6 @@ static inline void efm32_modifyreg(uint32_t addr, uint32_t clrbits,
efm32_putreg(addr, (((efm32_getreg(addr)) & ~clrbits) | setbits));
}
/****************************************************************************
* Name: efm32_takesem
*
* Description:
* This is just a wrapper to handle the annoying behavior of semaphore
* waits that return due to the receipt of a signal.
*
****************************************************************************/
static int efm32_takesem(sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
/****************************************************************************
* Name: efm32_getle16
*
@ -1269,7 +1251,7 @@ static void efm32_chan_wakeup(struct efm32_usbhost_s *priv,
USBHOST_VTRACE2_CHANWAKEUP_OUT,
chan->epno, chan->result);
efm32_givesem(&chan->waitsem);
nxsem_post(chan->waitsem);
chan->waiter = false;
}
@ -2965,7 +2947,7 @@ static void efm32_gint_connected(struct efm32_usbhost_s *priv)
priv->smstate = SMSTATE_ATTACHED;
if (priv->pscwait)
{
efm32_givesem(&priv->pscsem);
nxsem_post(&priv->pscsem);
priv->pscwait = false;
}
}
@ -3012,7 +2994,7 @@ static void efm32_gint_disconnected(struct efm32_usbhost_s *priv)
if (priv->pscwait)
{
efm32_givesem(&priv->pscsem);
nxsem_post(&priv->pscsem);
priv->pscwait = false;
}
}
@ -3918,7 +3900,7 @@ static int efm32_wait(struct usbhost_connection_s *conn,
/* Wait for the next connection event */
priv->pscwait = true;
ret = efm32_takesem(&priv->pscsem);
ret = nxsem_wait_uninterruptible(&priv->pscsem);
if (ret < 0)
{
return ret;
@ -4099,7 +4081,7 @@ static int efm32_ep0configure(struct usbhost_driver_s *drvr,
* structures.
*/
ret = efm32_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -4123,7 +4105,7 @@ static int efm32_ep0configure(struct usbhost_driver_s *drvr,
efm32_chan_configure(priv, ep0info->inndx);
efm32_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -4166,7 +4148,7 @@ static int efm32_epalloc(struct usbhost_driver_s *drvr,
* structures.
*/
ret = efm32_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -4187,7 +4169,7 @@ static int efm32_epalloc(struct usbhost_driver_s *drvr,
ret = efm32_xfrep_alloc(priv, epdesc, ep);
}
efm32_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -4220,7 +4202,7 @@ static int efm32_epfree(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
/* We must have exclusive access to the USB host hardware and structures */
ret = efm32_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -4252,7 +4234,7 @@ static int efm32_epfree(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
kmm_free(ctrlep);
}
efm32_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -4490,7 +4472,7 @@ static int efm32_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
* structures.
*/
ret = efm32_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -4534,7 +4516,7 @@ static int efm32_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
{
/* All success transactions exit here */
efm32_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -4549,7 +4531,7 @@ static int efm32_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
/* All failures exit here after all retries and timeouts are exhausted */
efm32_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return -ETIMEDOUT;
}
@ -4577,7 +4559,7 @@ static int efm32_ctrlout(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
/* We must have exclusive access to the USB host hardware and structures */
ret = efm32_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -4625,7 +4607,7 @@ static int efm32_ctrlout(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
{
/* All success transactins exit here */
efm32_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -4641,7 +4623,7 @@ static int efm32_ctrlout(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
/* All failures exit here after all retries and timeouts are exhausted */
efm32_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return -ETIMEDOUT;
}
@ -4698,7 +4680,7 @@ static ssize_t efm32_transfer(struct usbhost_driver_s *drvr,
/* We must have exclusive access to the USB host hardware and structures */
ret = efm32_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return (ssize_t)ret;
@ -4715,7 +4697,7 @@ static ssize_t efm32_transfer(struct usbhost_driver_s *drvr,
nbytes = efm32_out_transfer(priv, chidx, buffer, buflen);
}
efm32_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return nbytes;
}
@ -4770,7 +4752,7 @@ static int efm32_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
/* We must have exclusive access to the USB host hardware and structures */
ret = efm32_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -4787,7 +4769,7 @@ static int efm32_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
ret = efm32_out_asynch(priv, chidx, buffer, buflen, callback, arg);
}
efm32_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
#endif /* CONFIG_USBHOST_ASYNCH */
@ -4846,7 +4828,7 @@ static int efm32_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
/* Wake'em up! */
efm32_givesem(&chan->waitsem);
nxsem_post(&chan->waitsem);
chan->waiter = false;
}
@ -4923,7 +4905,7 @@ static int efm32_connect(struct usbhost_driver_s *drvr,
if (priv->pscwait)
{
priv->pscwait = false;
efm32_givesem(&priv->pscsem);
nxsem_post(&priv->pscsem);
}
leave_critical_section(flags);
@ -5277,10 +5259,10 @@ static inline void efm32_sw_initialize(struct efm32_usbhost_s *priv)
usbhost_devaddr_initialize(&priv->rhport);
/* Initialize semaphores */
/* Initialize semaphores & mutex */
nxsem_init(&priv->pscsem, 0, 0);
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
/* The pscsem semaphore is used for signaling and, hence, should not have
* priority inheritance enabled.

31
arch/arm/src/gd32f4/gd32f4xx_dma.c
View file

@ -211,32 +211,6 @@ static void gd32_dma_clock_enable(uint32_t dmabase)
modifyreg32(regaddr, 0, rcu_en);
}
/****************************************************************************
* Name: gd32_dmasem_take
*
* Description:
* Used to request exclusive access to a DMA channel.
*
****************************************************************************/
static int gd32_dmasem_take(struct gd32_dma_channel_s *dmachan)
{
return nxsem_wait_uninterruptible(&dmachan->chsem);
}
/****************************************************************************
* Name: gd32_dmasem_give
*
* Description:
* Used to free exclusive access to a DMA channel.
*
****************************************************************************/
static inline void gd32_dmasem_give(struct gd32_dma_channel_s *dmachan)
{
nxsem_post(&dmachan->chsem);
}
/****************************************************************************
* Name: gd32_dma_channel_get
*
@ -647,10 +621,9 @@ DMA_HANDLE gd32_dma_channel_alloc(uint8_t periph_req)
/* Get exclusive access to the DMA channel */
ret = gd32_dmasem_take(dmachan);
ret = nxsem_wait_uninterruptible(&dmachan->chsem);
if (ret < 0)
{
gd32_dmasem_give(dmachan);
return NULL;
}
@ -692,7 +665,7 @@ void gd32_dma_channel_free(DMA_HANDLE handle)
/* Release the channel */
gd32_dmasem_give(dmachan);
nxsem_post(&dmachan->chsem);
}
/****************************************************************************

45
arch/arm/src/gd32f4/gd32f4xx_fmc.c
View file

@ -24,7 +24,7 @@
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <stdbool.h>
#include <assert.h>
@ -41,43 +41,12 @@
* Private Data
****************************************************************************/
static sem_t g_gd32_fmc_sem = SEM_INITIALIZER(1);
static mutex_t g_gd32_fmc_lock = NXMUTEX_INITIALIZER;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: gd32_fmc_sem_lock
*
* Description:
* Lock semaphore
*
* Return Value:
* Zero(OK) - On success
* EINVAL - Invalid attempt to get the semaphore
* ECANCELED - May be returned if the thread is canceled while waiting
*
****************************************************************************/
static int gd32_fmc_sem_lock(void)
{
return nxsem_wait_uninterruptible(&g_gd32_fmc_sem);
}
/****************************************************************************
* Name: gd32_fmc_sem_unlock
*
* Description:
* Lock semaphore
*
****************************************************************************/
static void gd32_fmc_sem_unlock(void)
{
nxsem_post(&g_gd32_fmc_sem);
}
/****************************************************************************
* Name: gd32_fmc_state_get
*
@ -203,7 +172,7 @@ int gd32_fmc_unlock(void)
{
int ret;
ret = gd32_fmc_sem_lock();
ret = nxmutex_lock(&g_gd32_fmc_lock);
if (ret < 0)
{
return ret;
@ -217,8 +186,7 @@ int gd32_fmc_unlock(void)
putreg32(FMC_UNLOCK_KEY1, GD32_FMC_KEY);
}
gd32_fmc_sem_unlock();
nxmutex_unlock(&g_gd32_fmc_lock);
return ret;
}
@ -234,7 +202,7 @@ int gd32_fmc_lock(void)
{
int ret;
ret = gd32_fmc_sem_lock();
ret = nxmutex_lock(&g_gd32_fmc_lock);
if (ret < 0)
{
return ret;
@ -244,8 +212,7 @@ int gd32_fmc_lock(void)
modifyreg32(GD32_FMC_CTL, 0, FMC_CTL_LK);
gd32_fmc_sem_unlock();
nxmutex_unlock(&g_gd32_fmc_lock);
return ret;
}

48
arch/arm/src/gd32f4/gd32f4xx_progmem.c
View file

@ -31,7 +31,7 @@
#include <arch/board/board.h>
#include <nuttx/progmem.h>
#include <nuttx/irq.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include "gd32f4xx_progmem.h"
#include "gd32f4xx_fmc.h"
@ -126,7 +126,7 @@ typedef struct
static const size_t sector_sizes[FMC_PROGMEM_SECTOR_NUM] =
FMC_PROGMEM_SECTOR_SIZES;
static sem_t g_gd32_progmem_sem = SEM_INITIALIZER(1);
static mutex_t g_gd32_progmem_lock = NXMUTEX_INITIALIZER;
/****************************************************************************
* Private Function Prototypes
@ -248,37 +248,6 @@ static fmc_sector_info_struct gd32_fmc_sector_info_get(uint32_t addr)
return sector_info;
}
/****************************************************************************
* Name: gd32_progmem_sem_lock
*
* Description:
* Lock semaphore
*
* Return Value:
* Zero(OK) - On success
* EINVAL - Invalid attempt to get the semaphore
* ECANCELED - May be returned if the thread is canceled while waiting
*
****************************************************************************/
static int gd32_progmem_sem_lock(void)
{
return nxsem_wait_uninterruptible(&g_gd32_progmem_sem);
}
/****************************************************************************
* Name: gd32_progmem_sem_unlock
*
* Description:
* Lock semaphore
*
****************************************************************************/
static void gd32_progmem_sem_unlock(void)
{
nxsem_post(&g_gd32_progmem_sem);
}
/****************************************************************************
* Public Functions
****************************************************************************/
@ -572,8 +541,7 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
return -EFAULT;
}
ret = gd32_progmem_sem_lock();
ret = nxmutex_lock(&g_gd32_progmem_lock);
if (ret < 0)
{
return -EFAULT;
@ -590,7 +558,7 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
if (getreg8(addr) != *byte)
{
gd32_fmc_lock();
gd32_progmem_sem_unlock();
nxmutex_unlock(&g_gd32_progmem_lock);
return -EIO;
}
@ -599,8 +567,7 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
}
gd32_fmc_lock();
gd32_progmem_sem_unlock();
nxmutex_unlock(&g_gd32_progmem_lock);
return count;
}
@ -653,8 +620,7 @@ ssize_t up_progmem_read(size_t addr, void *buf, size_t count)
return -EFAULT;
}
ret = gd32_progmem_sem_lock();
ret = nxmutex_lock(&g_gd32_progmem_lock);
if (ret < 0)
{
return -EFAULT;
@ -668,7 +634,7 @@ ssize_t up_progmem_read(size_t addr, void *buf, size_t count)
addr++;
}
gd32_progmem_sem_unlock();
nxmutex_unlock(&g_gd32_progmem_lock);
}
#endif

11
arch/arm/src/gd32f4/gd32f4xx_spi.c
View file

@ -57,6 +57,7 @@
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/spi/spi.h>
@ -148,7 +149,7 @@ struct gd32_spidev_s
uint32_t spiclock; /* Clocking for the SPI module */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint8_t nbits; /* Width of word in bits (8 to 16) */
uint8_t mode; /* Mode 0,1,2,3 */
#ifdef CONFIG_GD32F4_SPI_INTERRUPT
@ -1096,11 +1097,11 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -2111,9 +2112,9 @@ static void spi_bus_initialize(struct gd32_spidev_s *priv)
spi_setfrequency((struct spi_dev_s *)priv, 400000);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI lock that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
#ifdef CONFIG_GD32F4_SPI_DMA
/* Initialize the SPI semaphores that is used to wait for DMA completion.

9
arch/arm/src/imx1/imx_spi.c
View file

@ -34,6 +34,7 @@
#include <nuttx/spi/spi.h>
#include <nuttx/irq.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <arch/board/board.h>
@ -85,7 +86,7 @@ struct imx_spidev_s
#ifndef CONFIG_SPI_POLLWAIT
sem_t waitsem; /* Wait for transfer to complete */
#endif
sem_t exclsem; /* Supports mutually exclusive access */
mutex_t lock; /* Supports mutually exclusive access */
/* These following are the source and destination buffers of the transfer.
* they are retained in this structure so that they will be accessible
@ -703,11 +704,11 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -1116,7 +1117,7 @@ struct spi_dev_s *imx_spibus_initialize(int port)
nxsem_init(&priv->waitsem, 0, 0);
nxsem_set_protocol(&priv->waitsem, SEM_PRIO_NONE);
#endif
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
/* Initialize control register:
* min frequency, ignore ready, master mode, mode=0, 8-bit

9
arch/arm/src/imx6/imx_ecspi.c
View file

@ -31,6 +31,7 @@
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/spi/spi.h>
@ -128,7 +129,7 @@ struct imx_spidev_s
#ifndef CONFIG_SPI_POLLWAIT
sem_t waitsem; /* Wait for transfer to complete */
#endif
sem_t exclsem; /* Supports mutually exclusive access */
mutex_t lock; /* Supports mutually exclusive access */
/* These following are the source and destination buffers of the transfer.
* they are retained in this structure so that they will be accessible
@ -777,11 +778,11 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -1292,7 +1293,7 @@ struct spi_dev_s *imx_spibus_initialize(int port)
nxsem_init(&priv->waitsem, 0, 0);
nxsem_set_protocol(&priv->waitsem, SEM_PRIO_NONE);
#endif
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
/* Initialize control register:
* min frequency, ignore ready, master mode, mode=0, 8-bit

32
arch/arm/src/imxrt/imxrt_edma.c
View file

@ -57,6 +57,7 @@
#include <nuttx/arch.h>
#include <nuttx/queue.h>
#include <nuttx/spinlock.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include "arm_internal.h"
@ -136,9 +137,9 @@ struct imxrt_dmach_s
struct imxrt_edma_s
{
/* These semaphores protect the DMA channel and descriptor tables */
/* These mutex protect the DMA channel and descriptor tables */
sem_t chsem; /* Protects channel table */
mutex_t chlock; /* Protects channel table */
#if CONFIG_IMXRT_EDMA_NTCD > 0
sem_t dsem; /* Supports wait for free descriptors */
#endif
@ -171,25 +172,6 @@ static struct imxrt_edmatcd_s g_tcd_pool[CONFIG_IMXRT_EDMA_NTCD]
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: imxrt_takechsem() and imxrt_givechsem()
*
* Description:
* Used to get exclusive access to the DMA channel table for channel
* allocation.
*
****************************************************************************/
static int imxrt_takechsem(void)
{
return nxsem_wait_uninterruptible(&g_edma.chsem);
}
static inline void imxrt_givechsem(void)
{
nxsem_post(&g_edma.chsem);
}
/****************************************************************************
* Name: imxrt_takedsem() and imxrt_givedsem()
*
@ -764,9 +746,9 @@ void weak_function arm_dma_initialize(void)
g_edma.dmach[i].chan = i;
}
/* Initialize semaphores */
/* Initialize mutex & semaphores */
nxsem_init(&g_edma.chsem, 0, 1);
nxmutex_init(&g_edma.chlock);
#if CONFIG_IMXRT_EDMA_NTCD > 0
nxsem_init(&g_edma.dsem, 0, CONFIG_IMXRT_EDMA_NTCD);
@ -880,7 +862,7 @@ DMACH_HANDLE imxrt_dmach_alloc(uint32_t dmamux, uint8_t dchpri)
/* Search for an available DMA channel */
dmach = NULL;
ret = imxrt_takechsem();
ret = nxmutex_lock(&g_edma.chlock);
if (ret < 0)
{
return NULL;
@ -917,7 +899,7 @@ DMACH_HANDLE imxrt_dmach_alloc(uint32_t dmamux, uint8_t dchpri)
}
}
imxrt_givechsem();
nxmutex_unlock(&g_edma.chlock);
/* Show the result of the allocation */

163
arch/arm/src/imxrt/imxrt_ehci.c
View file

@ -36,6 +36,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/wqueue.h>
#include <nuttx/signal.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/usb/usb.h>
#include <nuttx/usb/usbhost.h>
@ -275,7 +276,7 @@ struct imxrt_ehci_s
{
volatile bool pscwait; /* TRUE: Thread is waiting for port status change event */
sem_t exclsem; /* Support mutually exclusive access */
mutex_t lock; /* Support mutually exclusive access */
sem_t pscsem; /* Semaphore to wait for port status change events */
struct imxrt_epinfo_s ep0; /* Endpoint 0 */
@ -416,12 +417,6 @@ static inline void imxrt_putreg(uint32_t regval, volatile uint32_t *regaddr);
static int ehci_wait_usbsts(uint32_t maskbits, uint32_t donebits,
unsigned int delay);
/* Semaphores ***************************************************************/
static int imxrt_takesem(sem_t *sem);
static int imxrt_takesem_noncancelable(sem_t *sem);
#define imxrt_givesem(s) nxsem_post(s);
/* Allocators ***************************************************************/
static struct imxrt_qh_s *imxrt_qh_alloc(void);
@ -1053,61 +1048,13 @@ static int ehci_wait_usbsts(uint32_t maskbits, uint32_t donebits,
return (regval == donebits) ? OK : -ETIMEDOUT;
}
/****************************************************************************
* Name: imxrt_takesem
*
* Description:
* This is just a wrapper to handle the annoying behavior of semaphore
* waits that return due to the receipt of a signal.
*
****************************************************************************/
static int imxrt_takesem(sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
/****************************************************************************
* Name: imxrt_takesem_noncancelable
*
* Description:
* This is just a wrapper to handle the annoying behavior of semaphore
* waits that return due to the receipt of a signal. This version also
* ignores attempts to cancel the thread.
*
****************************************************************************/
static int imxrt_takesem_noncancelable(sem_t *sem)
{
int result;
int ret = OK;
do
{
result = nxsem_wait_uninterruptible(sem);
/* The only expected error is ECANCELED which would occur if the
* calling thread were canceled.
*/
DEBUGASSERT(result == OK || result == -ECANCELED);
if (ret == OK && result < 0)
{
ret = result;
}
}
while (result < 0);
return ret;
}
/****************************************************************************
* Name: imxrt_qh_alloc
*
* Description:
* Allocate a Queue Head (QH) structure by removing it from the free list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1133,7 +1080,7 @@ static struct imxrt_qh_s *imxrt_qh_alloc(void)
* Description:
* Free a Queue Head (QH) structure by returning it to the free list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1154,7 +1101,7 @@ static void imxrt_qh_free(struct imxrt_qh_s *qh)
* Allocate a Queue Element Transfer Descriptor (qTD) by removing it from
* the free list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1182,7 +1129,7 @@ static struct imxrt_qtd_s *imxrt_qtd_alloc(void)
* free list
*
* Assumption:
* Caller holds the exclsem
* Caller holds the lock
*
****************************************************************************/
@ -1630,7 +1577,7 @@ static inline uint8_t imxrt_ehci_speed(uint8_t usbspeed)
* this to minimize race conditions. This logic would have to be expanded
* if we want to have more than one packet in flight at a time!
*
* Assumption: The caller holds the EHCI exclsem
* Assumption: The caller holds the EHCI lock
*
****************************************************************************/
@ -1676,7 +1623,7 @@ static int imxrt_ioc_setup(struct imxrt_rhport_s *rhport,
* Description:
* Wait for the IOC event.
*
* Assumption: The caller does *NOT* hold the EHCI exclsem. That would
* Assumption: The caller does *NOT* hold the EHCI lock. That would
* cause a deadlock when the bottom-half, worker thread needs to take the
* semaphore.
*
@ -1692,7 +1639,7 @@ static int imxrt_ioc_wait(struct imxrt_epinfo_s *epinfo)
while (epinfo->iocwait)
{
ret = imxrt_takesem(&epinfo->iocsem);
ret = nxsem_wait_uninterruptible(&epinfo->iocsem);
if (ret < 0)
{
break;
@ -1708,7 +1655,7 @@ static int imxrt_ioc_wait(struct imxrt_epinfo_s *epinfo)
* Description:
* Add a new, ready-to-go QH w/attached qTDs to the asynchronous queue.
*
* Assumptions: The caller holds the EHCI exclsem
* Assumptions: The caller holds the EHCI lock
*
****************************************************************************/
@ -2155,7 +2102,7 @@ static struct imxrt_qtd_s *imxrt_qtd_statusphase(uint32_t tokenbits)
* This is a blocking function; it will not return until the control
* transfer has completed.
*
* Assumption: The caller holds the EHCI exclsem.
* Assumption: The caller holds the EHCI lock.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is return on
@ -2438,7 +2385,7 @@ errout_with_qh:
* frame list), followed by shorter poll rates, with queue heads with a
* poll rate of one, on the very end."
*
* Assumption: The caller holds the EHCI exclsem.
* Assumption: The caller holds the EHCI lock.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is return on
@ -2542,8 +2489,8 @@ errout_with_qh:
* Description:
* Wait for an IN or OUT transfer to complete.
*
* Assumption: The caller holds the EHCI exclsem. The caller must be aware
* that the EHCI exclsem will released while waiting for the transfer to
* Assumption: The caller holds the EHCI lock. The caller must be aware
* that the EHCI lock will released while waiting for the transfer to
* complete, but will be re-acquired when before returning. The state of
* EHCI resources could be very different upon return.
*
@ -2561,29 +2508,29 @@ static ssize_t imxrt_transfer_wait(struct imxrt_epinfo_s *epinfo)
int ret;
int ret2;
/* Release the EHCI semaphore while we wait. Other threads need the
/* Release the EHCI lock while we wait. Other threads need the
* opportunity to access the EHCI resources while we wait.
*
* REVISIT: Is this safe? NO. This is a bug and needs rethinking.
* We need to lock all of the port-resources (not EHCI common) until
* the transfer is complete. But we can't use the common EHCI exclsem
* the transfer is complete. But we can't use the common EHCI lock
* or we will deadlock while waiting (because the working thread that
* wakes this thread up needs the exclsem).
* wakes this thread up needs the lock).
*/
/* REVISIT */
imxrt_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
/* Wait for the IOC completion event */
ret = imxrt_ioc_wait(epinfo);
/* Re-acquire the EHCI semaphore. The caller expects to be holding
/* Re-acquire the EHCI lock. The caller expects to be holding
* this upon return.
*/
ret2 = imxrt_takesem_noncancelable(&g_ehci.exclsem);
ret2 = nxmutex_lock(&g_ehci.lock);
if (ret >= 0 && ret2 < 0)
{
ret = ret2;
@ -2607,9 +2554,7 @@ static ssize_t imxrt_transfer_wait(struct imxrt_epinfo_s *epinfo)
}
#endif
/* Did imxrt_ioc_wait() or imxrt_takesem_noncancelable() report an
* error?
*/
/* Did imxrt_ioc_wait() or nxmutex_lock() report an error? */
if (ret < 0)
{
@ -2917,7 +2862,7 @@ static int imxrt_qh_ioccheck(struct imxrt_qh_s *qh, uint32_t **bp, void *arg)
/* Yes... wake it up */
epinfo->iocwait = false;
imxrt_givesem(&epinfo->iocsem);
nxsem_post(&epinfo->iocsem);
}
#ifdef CONFIG_USBHOST_ASYNCH
@ -3076,7 +3021,7 @@ static int imxrt_qh_cancel(struct imxrt_qh_s *qh, uint32_t **bp, void *arg)
* detected (actual number of bytes received was less than the expected
* number of bytes)."
*
* Assumptions: The caller holds the EHCI exclsem
* Assumptions: The caller holds the EHCI lock
*
****************************************************************************/
@ -3213,7 +3158,7 @@ static inline void imxrt_portsc_bottomhalf(void)
if (g_ehci.pscwait)
{
imxrt_givesem(&g_ehci.pscsem);
nxsem_post(&g_ehci.pscsem);
g_ehci.pscwait = false;
}
}
@ -3253,7 +3198,7 @@ static inline void imxrt_portsc_bottomhalf(void)
if (g_ehci.pscwait)
{
imxrt_givesem(&g_ehci.pscsem);
nxsem_post(&g_ehci.pscsem);
g_ehci.pscwait = false;
}
}
@ -3330,7 +3275,7 @@ static void imxrt_ehci_bottomhalf(void *arg)
* real option (other than to reschedule and delay).
*/
imxrt_takesem_noncancelable(&g_ehci.exclsem);
nxmutex_lock(&g_ehci.lock);
/* Handle all unmasked interrupt sources
* USB Interrupt (USBINT)
@ -3441,7 +3386,7 @@ static void imxrt_ehci_bottomhalf(void *arg)
/* We are done with the EHCI structures */
imxrt_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
/* Re-enable relevant EHCI interrupts. Interrupts should still be enabled
* at the level of the interrupt controller.
@ -3600,7 +3545,7 @@ static int imxrt_wait(struct usbhost_connection_s *conn,
*/
g_ehci.pscwait = true;
ret = imxrt_takesem(&g_ehci.pscsem);
ret = nxsem_wait_uninterruptible(&g_ehci.pscsem);
if (ret < 0)
{
return ret;
@ -3935,7 +3880,7 @@ static int imxrt_ep0configure(struct usbhost_driver_s *drvr,
/* We must have exclusive access to the EHCI data structures. */
ret = imxrt_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret >= 0)
{
/* Remember the new device address and max packet size */
@ -3944,7 +3889,7 @@ static int imxrt_ep0configure(struct usbhost_driver_s *drvr,
epinfo->speed = speed;
epinfo->maxpacket = maxpacketsize;
imxrt_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
}
return ret;
@ -4307,7 +4252,7 @@ static int imxrt_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
* structures.
*/
ret = imxrt_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return ret;
@ -4319,7 +4264,7 @@ static int imxrt_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
if (ret != OK)
{
usbhost_trace1(EHCI_TRACE1_DEVDISCONNECTED, -ret);
goto errout_with_sem;
goto errout_with_lock;
}
/* Now initiate the transfer */
@ -4334,13 +4279,13 @@ static int imxrt_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
/* And wait for the transfer to complete */
nbytes = imxrt_transfer_wait(ep0info);
imxrt_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
return nbytes >= 0 ? OK : (int)nbytes;
errout_with_iocwait:
ep0info->iocwait = false;
errout_with_sem:
imxrt_givesem(&g_ehci.exclsem);
errout_with_lock:
nxmutex_unlock(&g_ehci.lock);
return ret;
}
@ -4409,7 +4354,7 @@ static ssize_t imxrt_transfer(struct usbhost_driver_s *drvr,
* structures.
*/
ret = imxrt_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return (ssize_t)ret;
@ -4423,7 +4368,7 @@ static ssize_t imxrt_transfer(struct usbhost_driver_s *drvr,
if (ret != OK)
{
usbhost_trace1(EHCI_TRACE1_DEVDISCONNECTED, -ret);
goto errout_with_sem;
goto errout_with_lock;
}
/* Initiate the transfer */
@ -4461,14 +4406,14 @@ static ssize_t imxrt_transfer(struct usbhost_driver_s *drvr,
/* Then wait for the transfer to complete */
nbytes = imxrt_transfer_wait(epinfo);
imxrt_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
return nbytes;
errout_with_iocwait:
epinfo->iocwait = false;
errout_with_sem:
errout_with_lock:
uerr("!!!\n");
imxrt_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
return (ssize_t)ret;
}
@ -4523,7 +4468,7 @@ static int imxrt_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
* structures.
*/
ret = imxrt_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return ret;
@ -4535,7 +4480,7 @@ static int imxrt_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
if (ret != OK)
{
usbhost_trace1(EHCI_TRACE1_DEVDISCONNECTED, -ret);
goto errout_with_sem;
goto errout_with_lock;
}
/* Initiate the transfer */
@ -4572,14 +4517,14 @@ static int imxrt_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
/* The transfer is in progress */
imxrt_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
return OK;
errout_with_callback:
epinfo->callback = NULL;
epinfo->arg = NULL;
errout_with_sem:
imxrt_givesem(&g_ehci.exclsem);
errout_with_lock:
nxmutex_unlock(&g_ehci.lock);
return ret;
}
#endif /* CONFIG_USBHOST_ASYNCH */
@ -4627,7 +4572,7 @@ static int imxrt_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
* interrupt level.
*/
ret = imxrt_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return ret;
@ -4670,7 +4615,7 @@ static int imxrt_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
#endif
{
ret = OK;
goto errout_with_sem;
goto errout_with_lock;
}
/* Handle the cancellation according to the type of the transfer */
@ -4733,7 +4678,7 @@ static int imxrt_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
default:
usbhost_trace1(EHCI_TRACE1_BADXFRTYPE, epinfo->xfrtype);
ret = -ENOSYS;
goto errout_with_sem;
goto errout_with_lock;
}
/* Find and remove the QH. There are four possibilities:
@ -4763,7 +4708,7 @@ exit_terminate:
/* Yes... wake it up */
DEBUGASSERT(callback == NULL);
imxrt_givesem(&epinfo->iocsem);
nxsem_post(&epinfo->iocsem);
}
/* No.. Is there a pending asynchronous transfer? */
@ -4778,11 +4723,11 @@ exit_terminate:
#else
/* Wake up the waiting thread */
imxrt_givesem(&epinfo->iocsem);
nxsem_post(&epinfo->iocsem);
#endif
errout_with_sem:
imxrt_givesem(&g_ehci.exclsem);
errout_with_lock:
nxmutex_unlock(&g_ehci.lock);
return ret;
}
@ -4829,7 +4774,7 @@ static int imxrt_connect(struct usbhost_driver_s *drvr,
if (g_ehci.pscwait)
{
g_ehci.pscwait = false;
imxrt_givesem(&g_ehci.pscsem);
nxsem_post(&g_ehci.pscsem);
}
leave_critical_section(flags);
@ -5055,7 +5000,7 @@ struct usbhost_connection_s *imxrt_ehci_initialize(int controller)
/* Initialize the EHCI state data structure */
nxsem_init(&g_ehci.exclsem, 0, 1);
nxmutex_init(&g_ehci.lock);
nxsem_init(&g_ehci.pscsem, 0, 0);
/* The pscsem semaphore is used for signaling and, hence, should not have

55
arch/arm/src/imxrt/imxrt_enc.c
View file

@ -32,7 +32,7 @@
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include <nuttx/sensors/qencoder.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include "chip.h"
#include "arm_internal.h"
@ -302,7 +302,7 @@ struct imxrt_enc_lowerhalf_s
const struct imxrt_qeconfig_s *config; /* static configuration */
struct qe_index_s *data;
sem_t sem_excl; /* Mutual exclusion semaphore to
mutex_t lock; /* Mutual exclusion mutex to
* ensure atomic 32-bit reads.
*/
};
@ -324,10 +324,6 @@ static inline void imxrt_enc_modifyreg16
static void imxrt_enc_clock_enable (uint32_t base);
static void imxrt_enc_clock_disable (uint32_t base);
static inline int imxrt_enc_sem_wait(struct imxrt_enc_lowerhalf_s *priv);
static inline void imxrt_enc_sem_post
(struct imxrt_enc_lowerhalf_s *priv);
static int imxrt_enc_reconfig(struct imxrt_enc_lowerhalf_s *priv,
uint16_t args);
static void imxrt_enc_set_initial_val(struct imxrt_enc_lowerhalf_s *priv,
@ -635,32 +631,6 @@ void imxrt_enc_clock_disable(uint32_t base)
#endif /* CONFIG_ARCH_FAMILY_IMXRT105x || CONFIG_ARCH_FAMILY_IMXRT106x */
}
/****************************************************************************
* Name: imxrt_enc_sem_wait
*
* Description:
* Take exclusive access to the position register, waiting as necessary
*
****************************************************************************/
static inline int imxrt_enc_sem_wait(struct imxrt_enc_lowerhalf_s *priv)
{
return nxsem_wait_uninterruptible(&priv->sem_excl);
}
/****************************************************************************
* Name: imxrt_enc_sem_post
*
* Description:
* Release the mutual exclusion semaphore
*
****************************************************************************/
static inline void imxrt_enc_sem_post(struct imxrt_enc_lowerhalf_s *priv)
{
nxsem_post(&priv->sem_excl);
}
/****************************************************************************
* Name: imxrt_enc_reconfig
*
@ -939,7 +909,7 @@ static int imxrt_setup(struct qe_lowerhalf_s *lower)
uint32_t regval;
int ret;
ret = imxrt_enc_sem_wait(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -1003,8 +973,7 @@ static int imxrt_setup(struct qe_lowerhalf_s *lower)
regval = ((config->init_flags >> MOD_SHIFT) & 1) ? ENC_CTRL2_MOD : 0;
imxrt_enc_putreg16(priv, IMXRT_ENC_CTRL2_OFFSET, regval);
imxrt_enc_sem_post(priv);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -1026,7 +995,7 @@ static int imxrt_shutdown(struct qe_lowerhalf_s *lower)
/* Ensure any in-progress operations are done. */
ret = imxrt_enc_sem_wait(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -1059,7 +1028,7 @@ static int imxrt_shutdown(struct qe_lowerhalf_s *lower)
imxrt_enc_clock_disable(priv->config->base);
imxrt_enc_sem_post(priv);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -1080,7 +1049,7 @@ static int imxrt_position(struct qe_lowerhalf_s *lower, int32_t *pos)
int i;
int ret;
ret = imxrt_enc_sem_wait(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -1107,13 +1076,13 @@ static int imxrt_position(struct qe_lowerhalf_s *lower, int32_t *pos)
if (lpos != imxrt_enc_getreg16(priv, IMXRT_ENC_LPOSH_OFFSET))
{
imxrt_enc_sem_post(priv);
nxmutex_unlock(&priv->lock);
return -EAGAIN;
}
upos = imxrt_enc_getreg16(priv, IMXRT_ENC_UPOSH_OFFSET);
imxrt_enc_sem_post(priv);
nxmutex_unlock(&priv->lock);
*pos = (int32_t)((upos << 16) | lpos);
return OK;
@ -1135,14 +1104,14 @@ static int imxrt_reset(struct qe_lowerhalf_s *lower)
/* Write a 1 to the SWIP bit to load UINIT and LINIT into UPOS and LPOS */
ret = imxrt_enc_sem_wait(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
}
imxrt_enc_modifyreg16(priv, IMXRT_ENC_CTRL_OFFSET, 0, ENC_CTRL_SWIP);
imxrt_enc_sem_post(priv);
nxmutex_unlock(&priv->lock);
return OK;
}
@ -1258,7 +1227,7 @@ int imxrt_qeinitialize(const char *devpath, int enc)
/* Initialize private data */
nxsem_init(&priv->sem_excl, 0, 1);
nxmutex_init(&priv->lock);
/* Register the upper-half driver */

12
arch/arm/src/imxrt/imxrt_flexspi.c
View file

@ -39,7 +39,7 @@
#include <nuttx/wdog.h>
#include <nuttx/clock.h>
#include <nuttx/kmalloc.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include "arm_internal.h"
#include "barriers.h"
@ -71,7 +71,7 @@ struct imxrt_flexspidev_s
bool initialized; /* TRUE: Controller has been initialized */
sem_t exclsem; /* Assures mutually exclusive access to
mutex_t lock; /* Assures mutually exclusive access to
* FlexSPI */
};
@ -1104,11 +1104,11 @@ static int imxrt_flexspi_lock(struct flexspi_dev_s *dev, bool lock)
spiinfo("lock=%d\n", lock);
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -1268,11 +1268,11 @@ struct flexspi_dev_s *imxrt_flexspi_initialize(int intf)
{
/* No perform one time initialization */
/* Initialize the FlexSPI semaphore that enforces mutually exclusive
/* Initialize the FlexSPI mutex that enforces mutually exclusive
* access to the FlexSPI registers.
*/
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
/* Perform hardware initialization. Puts the FlexSPI into an active
* state.

125
arch/arm/src/imxrt/imxrt_lpi2c.c
View file

@ -37,6 +37,7 @@
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include <nuttx/clock.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/i2c/i2c_master.h>
@ -192,7 +193,7 @@ struct imxrt_lpi2c_priv_s
const struct imxrt_lpi2c_config_s *config;
int refs; /* Reference count */
sem_t sem_excl; /* Mutual exclusion semaphore */
mutex_t lock; /* Mutual exclusion mutex */
#ifndef CONFIG_I2C_POLLED
sem_t sem_isr; /* Interrupt wait semaphore */
#endif
@ -235,11 +236,6 @@ static inline void imxrt_lpi2c_putreg(struct imxrt_lpi2c_priv_s *priv,
static inline void imxrt_lpi2c_modifyreg(struct imxrt_lpi2c_priv_s *priv,
uint16_t offset, uint32_t clearbits,
uint32_t setbits);
static inline int imxrt_lpi2c_sem_wait(struct imxrt_lpi2c_priv_s *priv);
#ifdef CONFIG_I2C_RESET
static int
imxrt_lpi2c_sem_wait_noncancelable(struct imxrt_lpi2c_priv_s *priv);
#endif
#ifdef CONFIG_IMXRT_LPI2C_DYNTIMEO
static uint32_t imxrt_lpi2c_toticks(int msgc, struct i2c_msg_s *msgs);
@ -249,12 +245,6 @@ static inline int
imxrt_lpi2c_sem_waitdone(struct imxrt_lpi2c_priv_s *priv);
static inline void
imxrt_lpi2c_sem_waitstop(struct imxrt_lpi2c_priv_s *priv);
static inline void
imxrt_lpi2c_sem_post(struct imxrt_lpi2c_priv_s *priv);
static inline void
imxrt_lpi2c_sem_init(struct imxrt_lpi2c_priv_s *priv);
static inline void
imxrt_lpi2c_sem_destroy(struct imxrt_lpi2c_priv_s *priv);
#ifdef CONFIG_I2C_TRACE
static void imxrt_lpi2c_tracereset(struct imxrt_lpi2c_priv_s *priv);
@ -363,6 +353,10 @@ static struct imxrt_lpi2c_priv_s imxrt_lpi2c1_priv =
.ops = &imxrt_lpi2c_ops,
.config = &imxrt_lpi2c1_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
#endif
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
@ -404,6 +398,10 @@ static struct imxrt_lpi2c_priv_s imxrt_lpi2c2_priv =
.ops = &imxrt_lpi2c_ops,
.config = &imxrt_lpi2c2_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
#endif
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
@ -445,6 +443,10 @@ static struct imxrt_lpi2c_priv_s imxrt_lpi2c3_priv =
.ops = &imxrt_lpi2c_ops,
.config = &imxrt_lpi2c3_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
#endif
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
@ -486,6 +488,10 @@ static struct imxrt_lpi2c_priv_s imxrt_lpi2c4_priv =
.ops = &imxrt_lpi2c_ops,
.config = &imxrt_lpi2c4_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
#endif
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
@ -543,36 +549,6 @@ static inline void imxrt_lpi2c_modifyreg(struct imxrt_lpi2c_priv_s *priv,
modifyreg32(priv->config->base + offset, clearbits, setbits);
}
/****************************************************************************
* Name: imxrt_lpi2c_sem_wait
*
* Description:
* Take the exclusive access, waiting as necessary. May be interrupted by
* a signal.
*
****************************************************************************/
static inline int imxrt_lpi2c_sem_wait(struct imxrt_lpi2c_priv_s *priv)
{
return nxsem_wait(&priv->sem_excl);
}
/****************************************************************************
* Name: imxrt_lpi2c_sem_wait_noncancelable
*
* Description:
* Take the exclusive access, waiting as necessary.
*
****************************************************************************/
#ifdef CONFIG_I2C_RESET
static int
imxrt_lpi2c_sem_wait_noncancelable(struct imxrt_lpi2c_priv_s *priv)
{
return nxsem_wait_uninterruptible(&priv->sem_excl);
}
#endif
/****************************************************************************
* Name: imxrt_lpi2c_toticks
*
@ -856,58 +832,6 @@ imxrt_lpi2c_sem_waitstop(struct imxrt_lpi2c_priv_s *priv)
i2cinfo("Timeout with Status Register: %" PRIx32 "\n", regval);
}
/****************************************************************************
* Name: imxrt_lpi2c_sem_post
*
* Description:
* Release the mutual exclusion semaphore
*
****************************************************************************/
static inline void imxrt_lpi2c_sem_post(struct imxrt_lpi2c_priv_s *priv)
{
nxsem_post(&priv->sem_excl);
}
/****************************************************************************
* Name: imxrt_lpi2c_sem_init
*
* Description:
* Initialize semaphores
*
****************************************************************************/
static inline void imxrt_lpi2c_sem_init(struct imxrt_lpi2c_priv_s *priv)
{
nxsem_init(&priv->sem_excl, 0, 1);
#ifndef CONFIG_I2C_POLLED
/* This semaphore is used for signaling and, hence, should not have
* priority inheritance enabled.
*/
nxsem_init(&priv->sem_isr, 0, 0);
nxsem_set_protocol(&priv->sem_isr, SEM_PRIO_NONE);
#endif
}
/****************************************************************************
* Name: imxrt_lpi2c_sem_destroy
*
* Description:
* Destroy semaphores.
*
****************************************************************************/
static inline void
imxrt_lpi2c_sem_destroy(struct imxrt_lpi2c_priv_s *priv)
{
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
nxsem_destroy(&priv->sem_isr);
#endif
}
/****************************************************************************
* Name: imxrt_dma_callback
*
@ -915,6 +839,7 @@ imxrt_lpi2c_sem_destroy(struct imxrt_lpi2c_priv_s *priv)
* This function performs the next I2C operation
*
****************************************************************************/
#ifdef CONFIG_IMXRT_LPI2C_DMA
static void imxrt_dma_callback(DMACH_HANDLE handle, void *arg, bool done,
int result)
@ -2077,7 +2002,7 @@ static int imxrt_lpi2c_transfer(struct i2c_master_s *dev,
/* Ensure that address or flags don't change meanwhile */
ret = imxrt_lpi2c_sem_wait(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2178,7 +2103,7 @@ static int imxrt_lpi2c_transfer(struct i2c_master_s *dev,
priv->dcnt = 0;
priv->ptr = NULL;
imxrt_lpi2c_sem_post(priv);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -2215,7 +2140,7 @@ static int imxrt_lpi2c_reset(struct i2c_master_s *dev)
/* Lock out other clients */
ret = imxrt_lpi2c_sem_wait_noncancelable(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2313,7 +2238,7 @@ out:
/* Release the port for re-use by other clients */
imxrt_lpi2c_sem_post(priv);
nxmutex_unlock(&priv->lock);
return ret;
}
#endif /* CONFIG_I2C_RESET */
@ -2371,7 +2296,6 @@ struct i2c_master_s *imxrt_i2cbus_initialize(int port)
if ((volatile int)priv->refs++ == 0)
{
imxrt_lpi2c_sem_init(priv);
imxrt_lpi2c_init(priv);
#ifdef CONFIG_IMXRT_LPI2C_DMA
@ -2434,9 +2358,6 @@ int imxrt_i2cbus_uninitialize(struct i2c_master_s *dev)
imxrt_lpi2c_deinit(priv);
/* Release unused resources */
imxrt_lpi2c_sem_destroy(priv);
return OK;
}

12
arch/arm/src/imxrt/imxrt_lpspi.c
View file

@ -59,7 +59,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
@ -112,7 +112,7 @@ struct imxrt_lpspidev_s
#ifdef CONFIG_IMXRT_LPSPI_INTERRUPTS
uint8_t spiirq; /* SPI IRQ number */
#endif
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
int8_t nbits; /* Width of word in bits */
@ -883,11 +883,11 @@ static int imxrt_lpspi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -1711,9 +1711,9 @@ static void imxrt_lpspi_bus_initialize(struct imxrt_lpspidev_s *priv)
imxrt_lpspi_setmode((struct spi_dev_s *)priv, SPIDEV_MODE0);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
/* Enable LPSPI */

18
arch/arm/src/imxrt/imxrt_rtc_lowerhalf.c
View file

@ -32,6 +32,7 @@
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include <nuttx/timers/rtc.h>
#include "arm_internal.h"
@ -61,7 +62,7 @@ struct imxrt_lowerhalf_s
* this file.
*/
sem_t devsem; /* Threads can only exclusively access the RTC */
mutex_t devlock; /* Threads can only exclusively access the RTC */
#ifdef CONFIG_RTC_ALARM
/* Alarm callback information */
@ -297,10 +298,10 @@ static int imxrt_setalarm(struct rtc_lowerhalf_s *lower,
/* Get exclusive access to the alarm */
ret = nxsem_wait(&rtc->devsem);
ret = nxmutex_lock(&rtc->devlock);
if (ret < 0)
{
rtcerr("ERROR: nxsem_wait failed: %d\n", ret);
rtcerr("ERROR: nxmutex_lock failed: %d\n", ret);
return ret;
}
@ -329,7 +330,7 @@ static int imxrt_setalarm(struct rtc_lowerhalf_s *lower,
}
}
nxsem_post(&rtc->devsem);
nxmutex_unlock(&rtc->devlock);
return ret;
}
#endif
@ -364,10 +365,10 @@ static int imxrt_setrelative(struct rtc_lowerhalf_s *lower,
/* Get exclusive access to the alarm */
ret = nxsem_wait(&rtc->devsem);
ret = nxmutex_lock(&rtc->devlock);
if (ret < 0)
{
rtcerr("ERROR: nxsem_wait failed: %d\n", ret);
rtcerr("ERROR: nxmutex_lock failed: %d\n", ret);
return ret;
}
@ -402,7 +403,7 @@ static int imxrt_setrelative(struct rtc_lowerhalf_s *lower,
}
}
nxsem_post(&rtc->devsem);
nxmutex_unlock(&rtc->devlock);
return ret;
}
#endif
@ -513,8 +514,7 @@ static int imxrt_rdalarm(struct rtc_lowerhalf_s *lower,
struct rtc_lowerhalf_s *imxrt_rtc_lowerhalf(void)
{
nxsem_init(&g_rtc_lowerhalf.devsem, 0, 1);
nxmutex_init(&g_rtc_lowerhalf.devlock);
return (struct rtc_lowerhalf_s *)&g_rtc_lowerhalf;
}

27
arch/arm/src/imxrt/imxrt_usdhc.c
View file

@ -246,8 +246,6 @@ struct imxrt_sdhcregs_s
/* Low-level helpers ********************************************************/
static int imxrt_takesem(struct imxrt_dev_s *priv);
#define imxrt_givesem(priv) (nxsem_post(&priv->waitsem))
static void imxrt_configwaitints(struct imxrt_dev_s *priv, uint32_t waitints,
sdio_eventset_t waitevents, sdio_eventset_t wkupevents);
static void imxrt_configxfrints(struct imxrt_dev_s *priv, uint32_t xfrints);
@ -497,27 +495,6 @@ static struct imxrt_sdhcregs_s g_sampleregs[DEBUG_NSAMPLES];
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: imxrt_takesem
*
* Description:
* Take the wait semaphore (handling false alarm wakeups due to the receipt
* of signals).
*
* Input Parameters:
* dev - Instance of the SDIO device driver state structure.
*
* Returned Value:
* Normally OK, but may return -ECANCELED in the rare event that the task
* has been canceled.
*
****************************************************************************/
static int imxrt_takesem(struct imxrt_dev_s *priv)
{
return nxsem_wait_uninterruptible(&priv->waitsem);
}
/****************************************************************************
* Name: imxrt_configwaitints
*
@ -1150,7 +1127,7 @@ static void imxrt_endwait(struct imxrt_dev_s *priv,
/* Wake up the waiting thread */
imxrt_givesem(priv);
nxsem_post(&priv->waitsem);
}
/****************************************************************************
@ -2818,7 +2795,7 @@ static sdio_eventset_t imxrt_eventwait(struct sdio_dev_s *dev)
* incremented and there will be no wait.
*/
ret = imxrt_takesem(priv);
ret = nxsem_wait_uninterruptible(&priv->waitsem);
if (ret < 0)
{
/* Task canceled. Cancel the wdog (assuming it was started) and

32
arch/arm/src/kinetis/kinetis_edma.c
View file

@ -59,6 +59,7 @@
#include <nuttx/arch.h>
#include <nuttx/queue.h>
#include <nuttx/spinlock.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include "arm_internal.h"
@ -138,9 +139,9 @@ struct kinetis_dmach_s
struct kinetis_edma_s
{
/* These semaphores protect the DMA channel and descriptor tables */
/* These mutex protect the DMA channel and descriptor tables */
sem_t chsem; /* Protects channel table */
mutex_t chlock; /* Protects channel table */
#if CONFIG_KINETIS_EDMA_NTCD > 0
sem_t dsem; /* Supports wait for free descriptors */
#endif
@ -173,25 +174,6 @@ static struct kinetis_edmatcd_s g_tcd_pool[CONFIG_KINETIS_EDMA_NTCD]
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: kinetis_takechsem() and kinetis_givechsem()
*
* Description:
* Used to get exclusive access to the DMA channel table for channel
* allocation.
*
****************************************************************************/
static int kinetis_takechsem(void)
{
return nxsem_wait_uninterruptible(&g_edma.chsem);
}
static inline void kinetis_givechsem(void)
{
nxsem_post(&g_edma.chsem);
}
/****************************************************************************
* Name: kinetis_takedsem() and kinetis_givedsem()
*
@ -745,9 +727,9 @@ void weak_function arm_dma_initialize(void)
g_edma.dmach[i].chan = i;
}
/* Initialize semaphores */
/* Initialize mutex & semaphore */
nxsem_init(&g_edma.chsem, 0, 1);
nxmutex_init(&g_edma.chlock);
#if CONFIG_KINETIS_EDMA_NTCD > 0
nxsem_init(&g_edma.dsem, 0, CONFIG_KINETIS_EDMA_NTCD);
@ -857,7 +839,7 @@ DMACH_HANDLE kinetis_dmach_alloc(uint8_t dmamux, uint8_t dchpri)
/* Search for an available DMA channel */
dmach = NULL;
ret = kinetis_takechsem();
ret = nxmutex_lock(&g_edma.chlock);
if (ret < 0)
{
return NULL;
@ -894,7 +876,7 @@ DMACH_HANDLE kinetis_dmach_alloc(uint8_t dmamux, uint8_t dchpri)
}
}
kinetis_givechsem();
nxmutex_unlock(&g_edma.chlock);
/* Show the result of the allocation */

121
arch/arm/src/kinetis/kinetis_i2c.c
View file

@ -35,6 +35,7 @@
#include <nuttx/arch.h>
#include <nuttx/wdog.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/i2c/i2c_master.h>
@ -112,7 +113,7 @@ struct kinetis_i2cdev_s
int refs; /* Reference count */
volatile uint8_t state; /* State of state machine */
bool restart; /* Should next transfer restart or not */
sem_t mutex; /* Only one thread can access at a time */
mutex_t lock; /* Only one thread can access at a time */
sem_t wait; /* Place to wait for state machine completion */
struct wdog_s timeout; /* watchdog to timeout when bus hung */
struct i2c_msg_s *msgs; /* Remaining transfers - first one is in
@ -130,20 +131,6 @@ static uint8_t kinetis_i2c_getreg(struct kinetis_i2cdev_s *priv,
static void kinetis_i2c_putreg(struct kinetis_i2cdev_s *priv,
uint8_t value, uint8_t offset);
/* Exclusion Helpers */
static inline void kinetis_i2c_sem_init(struct kinetis_i2cdev_s *priv);
static inline void
kinetis_i2c_sem_destroy(struct kinetis_i2cdev_s *priv);
static inline int kinetis_i2c_sem_wait(struct kinetis_i2cdev_s *priv);
#ifdef CONFIG_I2C_RESET
static int
kinetis_i2c_sem_wait_noncancelable(struct kinetis_i2cdev_s *priv);
#endif
static inline void kinetis_i2c_sem_post(struct kinetis_i2cdev_s *priv);
/* Signal Helper */
static inline void kinetis_i2c_endwait(struct kinetis_i2cdev_s *priv);
@ -203,6 +190,8 @@ static struct kinetis_i2cdev_s g_i2c0_dev =
.dev.ops = &kinetis_i2c_ops,
.config = &kinetis_i2c0_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
.wait = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
.state = STATE_OK,
.msgs = NULL,
};
@ -224,6 +213,8 @@ static struct kinetis_i2cdev_s g_i2c1_dev =
.dev.ops = &kinetis_i2c_ops,
.config = &kinetis_i2c1_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
.wait = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
.state = STATE_OK,
.msgs = NULL,
};
@ -245,6 +236,8 @@ static struct kinetis_i2cdev_s g_i2c2_dev =
.dev.ops = &kinetis_i2c_ops,
.config = &kinetis_i2c2_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
.wait = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
.state = STATE_OK,
.msgs = NULL,
};
@ -266,6 +259,8 @@ static struct kinetis_i2cdev_s g_i2c3_dev =
.dev.ops = &kinetis_i2c_ops,
.config = &kinetis_i2c3_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
.wait = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
.state = STATE_OK,
.msgs = NULL,
};
@ -303,83 +298,6 @@ static void kinetis_i2c_putreg(struct kinetis_i2cdev_s *priv, uint8_t value,
putreg8(value, priv->config->base + offset);
}
/****************************************************************************
* Name: kinetis_i2c_sem_init
*
* Description:
* Initialize semaphores
*
****************************************************************************/
static inline void kinetis_i2c_sem_init(struct kinetis_i2cdev_s *priv)
{
nxsem_init(&priv->mutex, 0, 1);
/* This semaphore is used for signaling and, hence, should not have
* priority inheritance enabled.
*/
nxsem_init(&priv->wait, 0, 0);
nxsem_set_protocol(&priv->wait, SEM_PRIO_NONE);
}
/****************************************************************************
* Name: kinetis_i2c_sem_destroy
*
* Description:
* Destroy semaphores.
*
****************************************************************************/
static inline void kinetis_i2c_sem_destroy(struct kinetis_i2cdev_s *priv)
{
nxsem_destroy(&priv->mutex);
nxsem_destroy(&priv->wait);
}
/****************************************************************************
* Name: kinetis_i2c_sem_wait
*
* Description:
* Take the exclusive access, waiting as necessary. May be interrupted by
* a signal.
*
****************************************************************************/
static inline int kinetis_i2c_sem_wait(struct kinetis_i2cdev_s *priv)
{
return nxsem_wait(&priv->mutex);
}
#ifdef CONFIG_I2C_RESET
/****************************************************************************
* Name: kinetis_i2c_sem_wait_noncancelable
*
* Description:
* Take the exclusive access, waiting as necessary
*
****************************************************************************/
static int
kinetis_i2c_sem_wait_noncancelable(struct kinetis_i2cdev_s *priv)
{
return nxsem_wait_uninterruptible(&priv->mutex);
}
#endif
/****************************************************************************
* Name: kinetis_i2c_sem_post
*
* Description:
* Release the mutual exclusion semaphore
*
****************************************************************************/
static inline void kinetis_i2c_sem_post(struct kinetis_i2cdev_s *priv)
{
nxsem_post(&priv->mutex);
}
/****************************************************************************
* Name: kinetis_i2c_wait
*
@ -1142,7 +1060,7 @@ static int kinetis_i2c_transfer(struct i2c_master_s *dev,
/* Get exclusive access to the I2C bus */
ret = kinetis_i2c_sem_wait(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -1232,8 +1150,7 @@ timeout:
/* Release access to I2C bus */
kinetis_i2c_sem_post(priv);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -1270,7 +1187,7 @@ static int kinetis_i2c_reset(struct i2c_master_s *dev)
/* Lock out other clients */
ret = kinetis_i2c_sem_wait_noncancelable(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -1369,7 +1286,7 @@ out:
/* Release the port for re-use by other clients */
kinetis_i2c_sem_post(priv);
nxmutex_unlock(&priv->lock);
return ret;
}
#endif /* CONFIG_I2C_RESET */
@ -1397,25 +1314,25 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port)
{
#ifdef CONFIG_KINETIS_I2C0
case 0:
priv = &g_i2c0_dev;
priv = &g_i2c0_dev;
break;
#endif
#ifdef CONFIG_KINETIS_I2C1
case 1:
priv = &g_i2c1_dev;
priv = &g_i2c1_dev;
break;
#endif
#ifdef CONFIG_KINETIS_I2C2
case 2:
priv = &g_i2c2_dev;
priv = &g_i2c2_dev;
break;
#endif
#ifdef CONFIG_KINETIS_I2C3
case 3:
priv = &g_i2c3_dev;
priv = &g_i2c3_dev;
break;
#endif
@ -1427,7 +1344,6 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port)
flags = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
{
kinetis_i2c_sem_init(priv);
kinetis_i2c_init(priv);
}
@ -1471,7 +1387,6 @@ int kinetis_i2cbus_uninitialize(struct i2c_master_s *dev)
/* Disable power and other HW resource (GPIO's) */
kinetis_i2c_deinit(priv);
kinetis_i2c_sem_destroy(priv);
wd_cancel(&priv->timeout);
return OK;
}

27
arch/arm/src/kinetis/kinetis_sdhc.c
View file

@ -229,8 +229,6 @@ struct kinetis_sdhcregs_s
/* Low-level helpers ********************************************************/
static int kinetis_takesem(struct kinetis_dev_s *priv);
#define kinetis_givesem(priv) (nxsem_post(&priv->waitsem))
static void kinetis_configwaitints(struct kinetis_dev_s *priv,
uint32_t waitints, sdio_eventset_t waitevents,
sdio_eventset_t wkupevents);
@ -411,27 +409,6 @@ static struct kinetis_sdhcregs_s g_sampleregs[DEBUG_NSAMPLES];
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: kinetis_takesem
*
* Description:
* Take the wait semaphore (handling false alarm wakeups due to the receipt
* of signals).
*
* Input Parameters:
* dev - Instance of the SDIO device driver state structure.
*
* Returned Value:
* Normally OK, but may return -ECANCELED in the rare event that the task
* has been canceled.
*
****************************************************************************/
static int kinetis_takesem(struct kinetis_dev_s *priv)
{
return nxsem_wait_uninterruptible(&priv->waitsem);
}
/****************************************************************************
* Name: kinetis_configwaitints
*
@ -985,7 +962,7 @@ static void kinetis_endwait(struct kinetis_dev_s *priv,
/* Wake up the waiting thread */
kinetis_givesem(priv);
nxsem_post(&priv->waitsem);
}
/****************************************************************************
@ -2534,7 +2511,7 @@ static sdio_eventset_t kinetis_eventwait(struct sdio_dev_s *dev)
* incremented and there will be no wait.
*/
ret = kinetis_takesem(priv);
ret = nxsem_wait_uninterruptible(&priv->waitsem);
if (ret < 0)
{
/* Task canceled. Cancel the wdog (assuming it was started) and

12
arch/arm/src/kinetis/kinetis_spi.c
View file

@ -58,7 +58,7 @@
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include <arch/irq.h>
@ -96,7 +96,7 @@ struct kinetis_spidev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
uint32_t spibase; /* Base address of SPI registers */
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (8 to 16) */
@ -672,11 +672,11 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -1666,9 +1666,9 @@ struct spi_dev_s *kinetis_spibus_initialize(int port)
priv->frequency = 0;
spi_setfrequency(&priv->spidev, KINETIS_SPI_CLK_INIT);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
#ifdef CONFIG_KINETIS_SPI_DMA
/* Initialize the SPI semaphores that is used to wait for DMA completion.
* This semaphore is used for signaling and, hence, should not have

165
arch/arm/src/kinetis/kinetis_usbhshost.c
View file

@ -36,6 +36,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/wqueue.h>
#include <nuttx/signal.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/usb/usb.h>
#include <nuttx/usb/usbhost.h>
@ -284,7 +285,7 @@ struct kinetis_ehci_s
{
volatile bool pscwait; /* TRUE: Thread is waiting for port status change event */
sem_t exclsem; /* Support mutually exclusive access */
mutex_t lock; /* Support mutually exclusive access */
sem_t pscsem; /* Semaphore to wait for port status change events */
struct kinetis_epinfo_s ep0; /* Endpoint 0 */
@ -427,12 +428,6 @@ static inline void kinetis_putreg(uint32_t regval,
static int ehci_wait_usbsts(uint32_t maskbits, uint32_t donebits,
unsigned int delay);
/* Semaphores ***************************************************************/
static int kinetis_takesem(sem_t *sem);
static int kinetis_takesem_noncancelable(sem_t *sem);
#define kinetis_givesem(s) nxsem_post(s);
/* Allocators ***************************************************************/
static struct kinetis_qh_s *kinetis_qh_alloc(void);
@ -1075,61 +1070,13 @@ static int ehci_wait_usbsts(uint32_t maskbits, uint32_t donebits,
return (regval == donebits) ? OK : -ETIMEDOUT;
}
/****************************************************************************
* Name: kinetis_takesem
*
* Description:
* This is just a wrapper to handle the annoying behavior of semaphore
* waits that return due to the receipt of a signal.
*
****************************************************************************/
static int kinetis_takesem(sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
/****************************************************************************
* Name: kinetis_takesem_noncancelable
*
* Description:
* This is just a wrapper to handle the annoying behavior of semaphore
* waits that return due to the receipt of a signal. This version also
* ignores attempts to cancel the thread.
*
****************************************************************************/
static int kinetis_takesem_noncancelable(sem_t *sem)
{
int result;
int ret = OK;
do
{
result = nxsem_wait_uninterruptible(sem);
/* The only expected error is ECANCELED which would occur if the
* calling thread were canceled.
*/
DEBUGASSERT(result == OK || result == -ECANCELED);
if (ret == OK && result < 0)
{
ret = result;
}
}
while (result < 0);
return ret;
}
/****************************************************************************
* Name: kinetis_qh_alloc
*
* Description:
* Allocate a Queue Head (QH) structure by removing it from the free list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1156,7 +1103,7 @@ static struct kinetis_qh_s *kinetis_qh_alloc(void)
* Let a Queue Head (QH) structure wait for free by adding it to the
* aawait list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1179,7 +1126,7 @@ static void kinetis_qh_aawait(struct kinetis_qh_s *qh)
* Description:
* Free a Queue Head (QH) structure by returning it to the free list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1198,7 +1145,7 @@ static void kinetis_qh_free(struct kinetis_qh_s *qh)
* Allocate a Queue Element Transfer Descriptor (qTD) by removing it from
* the free list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1226,7 +1173,7 @@ static struct kinetis_qtd_s *kinetis_qtd_alloc(void)
* free list
*
* Assumption:
* Caller holds the exclsem
* Caller holds the lock
*
****************************************************************************/
@ -1677,7 +1624,7 @@ static inline uint8_t kinetis_ehci_speed(uint8_t usbspeed)
* this to minimize race conditions. This logic would have to be expanded
* if we want to have more than one packet in flight at a time!
*
* Assumption: The caller holds the EHCI exclsem
* Assumption: The caller holds the EHCI lock
*
****************************************************************************/
@ -1723,7 +1670,7 @@ static int kinetis_ioc_setup(struct kinetis_rhport_s *rhport,
* Description:
* Wait for the IOC event.
*
* Assumption: The caller does *NOT* hold the EHCI exclsem. That would
* Assumption: The caller does *NOT* hold the EHCI lock. That would
* cause a deadlock when the bottom-half, worker thread needs to take the
* semaphore.
*
@ -1739,7 +1686,7 @@ static int kinetis_ioc_wait(struct kinetis_epinfo_s *epinfo)
while (epinfo->iocwait)
{
ret = kinetis_takesem(&epinfo->iocsem);
ret = nxsem_wait_uninterruptible(&epinfo->iocsem);
if (ret < 0)
{
break;
@ -1755,7 +1702,7 @@ static int kinetis_ioc_wait(struct kinetis_epinfo_s *epinfo)
* Description:
* Add a new, ready-to-go QH w/attached qTDs to the asynchronous queue.
*
* Assumptions: The caller holds the EHCI exclsem
* Assumptions: The caller holds the EHCI lock
*
****************************************************************************/
@ -2205,7 +2152,7 @@ static struct kinetis_qtd_s *kinetis_qtd_statusphase(uint32_t tokenbits)
* This is a blocking function; it will not return until the control
* transfer has completed.
*
* Assumption: The caller holds the EHCI exclsem.
* Assumption: The caller holds the EHCI lock.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is return on
@ -2488,7 +2435,7 @@ errout_with_qh:
* frame list), followed by shorter poll rates, with queue heads with a
* poll rate of one, on the very end."
*
* Assumption: The caller holds the EHCI exclsem.
* Assumption: The caller holds the EHCI lock.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is return on
@ -2592,8 +2539,8 @@ errout_with_qh:
* Description:
* Wait for an IN or OUT transfer to complete.
*
* Assumption: The caller holds the EHCI exclsem. The caller must be aware
* that the EHCI exclsem will released while waiting for the transfer to
* Assumption: The caller holds the EHCI lock. The caller must be aware
* that the EHCI lock will released while waiting for the transfer to
* complete, but will be re-acquired when before returning. The state of
* EHCI resources could be very different upon return.
*
@ -2611,29 +2558,29 @@ static ssize_t kinetis_transfer_wait(struct kinetis_epinfo_s *epinfo)
int ret;
int ret2;
/* Release the EHCI semaphore while we wait. Other threads need the
/* Release the EHCI mutex while we wait. Other threads need the
* opportunity to access the EHCI resources while we wait.
*
* REVISIT: Is this safe? NO. This is a bug and needs rethinking.
* We need to lock all of the port-resources (not EHCI common) until
* the transfer is complete. But we can't use the common EHCI exclsem
* the transfer is complete. But we can't use the common EHCI lock
* or we will deadlock while waiting (because the working thread that
* wakes this thread up needs the exclsem).
* wakes this thread up needs the lock).
*/
/* REVISIT */
kinetis_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
/* Wait for the IOC completion event */
ret = kinetis_ioc_wait(epinfo);
/* Re-acquire the EHCI semaphore. The caller expects to be holding
/* Re-acquire the EHCI mutex. The caller expects to be holding
* this upon return.
*/
ret2 = kinetis_takesem_noncancelable(&g_ehci.exclsem);
ret2 = nxmutex_lock(&g_ehci.lock);
if (ret >= 0 && ret2 < 0)
{
ret = ret2;
@ -2657,9 +2604,7 @@ static ssize_t kinetis_transfer_wait(struct kinetis_epinfo_s *epinfo)
}
#endif
/* Did kinetis_ioc_wait() or kinetis_takesem_noncancelable() report an
* error?
*/
/* Did kinetis_ioc_wait() or nxmutex_lock() report an error? */
if (ret < 0)
{
@ -2968,7 +2913,7 @@ static int kinetis_qh_ioccheck(struct kinetis_qh_s *qh,
/* Yes... wake it up */
epinfo->iocwait = false;
kinetis_givesem(&epinfo->iocsem);
nxsem_post(&epinfo->iocsem);
}
#ifdef CONFIG_USBHOST_ASYNCH
@ -3129,7 +3074,7 @@ static int kinetis_qh_cancel(struct kinetis_qh_s *qh,
* detected (actual number of bytes received was less than the expected
* number of bytes)."
*
* Assumptions: The caller holds the EHCI exclsem
* Assumptions: The caller holds the EHCI lock
*
****************************************************************************/
@ -3266,7 +3211,7 @@ static inline void kinetis_portsc_bottomhalf(void)
if (g_ehci.pscwait)
{
kinetis_givesem(&g_ehci.pscsem);
nxsem_post(&g_ehci.pscsem);
g_ehci.pscwait = false;
}
}
@ -3318,7 +3263,7 @@ static inline void kinetis_portsc_bottomhalf(void)
if (g_ehci.pscwait)
{
kinetis_givesem(&g_ehci.pscsem);
nxsem_post(&g_ehci.pscsem);
g_ehci.pscwait = false;
}
}
@ -3401,7 +3346,7 @@ static void kinetis_ehci_bottomhalf(void *arg)
* real option (other than to reschedule and delay).
*/
kinetis_takesem_noncancelable(&g_ehci.exclsem);
nxmutex_lock(&g_ehci.lock);
/* Handle all unmasked interrupt sources
* Interrupt on Async Advance
@ -3518,7 +3463,7 @@ static void kinetis_ehci_bottomhalf(void *arg)
/* We are done with the EHCI structures */
kinetis_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
/* Re-enable relevant EHCI interrupts. Interrupts should still be enabled
* at the level of the interrupt controller.
@ -3671,7 +3616,7 @@ static int kinetis_wait(struct usbhost_connection_s *conn,
*/
g_ehci.pscwait = true;
ret = kinetis_takesem(&g_ehci.pscsem);
ret = nxsem_wait_uninterruptible(&g_ehci.pscsem);
if (ret < 0)
{
return ret;
@ -4004,7 +3949,7 @@ static int kinetis_ep0configure(struct usbhost_driver_s *drvr,
/* We must have exclusive access to the EHCI data structures. */
ret = kinetis_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret >= 0)
{
/* Remember the new device address and max packet size */
@ -4013,7 +3958,7 @@ static int kinetis_ep0configure(struct usbhost_driver_s *drvr,
epinfo->speed = speed;
epinfo->maxpacket = maxpacketsize;
kinetis_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
}
return ret;
@ -4378,7 +4323,7 @@ static int kinetis_ctrlin(struct usbhost_driver_s *drvr,
* structures.
*/
ret = kinetis_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return ret;
@ -4390,7 +4335,7 @@ static int kinetis_ctrlin(struct usbhost_driver_s *drvr,
if (ret != OK)
{
usbhost_trace1(EHCI_TRACE1_DEVDISCONNECTED, -ret);
goto errout_with_sem;
goto errout_with_lock;
}
/* Now initiate the transfer */
@ -4405,13 +4350,13 @@ static int kinetis_ctrlin(struct usbhost_driver_s *drvr,
/* And wait for the transfer to complete */
nbytes = kinetis_transfer_wait(ep0info);
kinetis_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
return nbytes >= 0 ? OK : (int)nbytes;
errout_with_iocwait:
ep0info->iocwait = false;
errout_with_sem:
kinetis_givesem(&g_ehci.exclsem);
errout_with_lock:
nxmutex_unlock(&g_ehci.lock);
return ret;
}
@ -4481,7 +4426,7 @@ static ssize_t kinetis_transfer(struct usbhost_driver_s *drvr,
* structures.
*/
ret = kinetis_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return (ssize_t)ret;
@ -4493,7 +4438,7 @@ static ssize_t kinetis_transfer(struct usbhost_driver_s *drvr,
if (ret != OK)
{
usbhost_trace1(EHCI_TRACE1_DEVDISCONNECTED, -ret);
goto errout_with_sem;
goto errout_with_lock;
}
/* Initiate the transfer */
@ -4531,14 +4476,14 @@ static ssize_t kinetis_transfer(struct usbhost_driver_s *drvr,
/* Then wait for the transfer to complete */
nbytes = kinetis_transfer_wait(epinfo);
kinetis_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
return nbytes;
errout_with_iocwait:
epinfo->iocwait = false;
errout_with_sem:
errout_with_lock:
uerr("!!!\n");
kinetis_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
return (ssize_t)ret;
}
@ -4593,7 +4538,7 @@ static int kinetis_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
* structures.
*/
ret = kinetis_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return ret;
@ -4605,7 +4550,7 @@ static int kinetis_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
if (ret != OK)
{
usbhost_trace1(EHCI_TRACE1_DEVDISCONNECTED, -ret);
goto errout_with_sem;
goto errout_with_lock;
}
/* Initiate the transfer */
@ -4642,14 +4587,14 @@ static int kinetis_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
/* The transfer is in progress */
kinetis_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
return OK;
errout_with_callback:
epinfo->callback = NULL;
epinfo->arg = NULL;
errout_with_sem:
kinetis_givesem(&g_ehci.exclsem);
errout_with_lock:
nxmutex_unlock(&g_ehci.lock);
return ret;
}
#endif /* CONFIG_USBHOST_ASYNCH */
@ -4697,7 +4642,7 @@ static int kinetis_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
* interrupt level.
*/
ret = kinetis_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return ret;
@ -4740,7 +4685,7 @@ static int kinetis_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
#endif
{
ret = OK;
goto errout_with_sem;
goto errout_with_lock;
}
/* Handle the cancellation according to the type of the transfer */
@ -4803,7 +4748,7 @@ static int kinetis_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
default:
usbhost_trace1(EHCI_TRACE1_BADXFRTYPE, epinfo->xfrtype);
ret = -ENOSYS;
goto errout_with_sem;
goto errout_with_lock;
}
/* Find and remove the QH. There are four possibilities:
@ -4833,7 +4778,7 @@ exit_terminate:
/* Yes... wake it up */
DEBUGASSERT(callback == NULL);
kinetis_givesem(&epinfo->iocsem);
nxsem_post(&epinfo->iocsem);
}
/* No.. Is there a pending asynchronous transfer? */
@ -4848,11 +4793,11 @@ exit_terminate:
#else
/* Wake up the waiting thread */
kinetis_givesem(&epinfo->iocsem);
nxsem_post(&epinfo->iocsem);
#endif
errout_with_sem:
kinetis_givesem(&g_ehci.exclsem);
errout_with_lock:
nxmutex_unlock(&g_ehci.lock);
return ret;
}
@ -4899,7 +4844,7 @@ static int kinetis_connect(struct usbhost_driver_s *drvr,
if (g_ehci.pscwait)
{
g_ehci.pscwait = false;
kinetis_givesem(&g_ehci.pscsem);
nxsem_post(&g_ehci.pscsem);
}
leave_critical_section(flags);
@ -5125,7 +5070,7 @@ struct usbhost_connection_s *kinetis_ehci_initialize(int controller)
/* Initialize the EHCI state data structure */
nxsem_init(&g_ehci.exclsem, 0, 1);
nxmutex_init(&g_ehci.lock);
nxsem_init(&g_ehci.pscsem, 0, 0);
/* The pscsem semaphore is used for signaling and, hence, should not have

12
arch/arm/src/kl/kl_spi.c
View file

@ -30,7 +30,7 @@
#include <assert.h>
#include <debug.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include <arch/irq.h>
@ -54,7 +54,7 @@ struct kl_spidev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
uint32_t spibase; /* Base address of SPI registers */
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (8 to 16) */
@ -236,11 +236,11 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -689,9 +689,9 @@ struct spi_dev_s *kl_spibus_initialize(int port)
spi_setfrequency((struct spi_dev_s *)priv, 400000);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
return &priv->spidev;
}

56
arch/arm/src/lc823450/lc823450_adc.c
View file

@ -44,6 +44,7 @@
#include <nuttx/fs/ioctl.h>
#include <nuttx/analog/adc.h>
#include <nuttx/analog/ioctl.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include "arm_internal.h"
@ -80,7 +81,7 @@ struct lc823450_adc_inst_s
const struct adc_callback_s *cb;
struct adc_dev_s dev;
sem_t sem_excl; /* Mutual exclusion semaphore */
mutex_t lock; /* Mutual exclusion mutex */
#ifndef CONFIG_ADC_POLLED
sem_t sem_isr; /* Interrupt wait semaphore */
#endif
@ -93,10 +94,6 @@ struct lc823450_adc_inst_s
****************************************************************************/
static inline void lc823450_adc_clearirq(void);
static inline int lc823450_adc_sem_wait(
struct lc823450_adc_inst_s *inst);
static inline void lc823450_adc_sem_post(
struct lc823450_adc_inst_s *inst);
static int lc823450_adc_bind(struct adc_dev_s *dev,
const struct adc_callback_s *callback);
@ -256,33 +253,6 @@ static void lc823450_adc_start(struct lc823450_adc_inst_s *inst)
#endif
}
/****************************************************************************
* Name: lc823450_adc_sem_wait
*
* Description:
* Take the exclusive access, waiting as necessary
*
****************************************************************************/
static inline int lc823450_adc_sem_wait(struct lc823450_adc_inst_s *inst)
{
return nxsem_wait_uninterruptible(&inst->sem_excl);
}
/****************************************************************************
* Name: lc823450_adc_sem_post
*
* Description:
* Release the mutual exclusion semaphore
*
****************************************************************************/
static inline void lc823450_adc_sem_post(
struct lc823450_adc_inst_s *inst)
{
nxsem_post(&inst->sem_excl);
}
/****************************************************************************
* Name: lc823450_adc_isr
*
@ -399,7 +369,7 @@ static void lc823450_adc_rxint(struct adc_dev_s *dev, bool enable)
ainfo("enable: %d\n", enable);
ret = lc823450_adc_sem_wait(inst);
ret = nxmutex_lock(&inst->lock);
if (ret < 0)
{
return;
@ -416,7 +386,7 @@ static void lc823450_adc_rxint(struct adc_dev_s *dev, bool enable)
}
#endif
lc823450_adc_sem_post(inst);
nxmutex_unlock(&inst->lock);
}
/****************************************************************************
@ -442,7 +412,7 @@ static int lc823450_adc_ioctl(struct adc_dev_s *dev, int cmd,
ainfo("cmd=%xh\n", cmd);
ret = lc823450_adc_sem_wait(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -493,8 +463,7 @@ static int lc823450_adc_ioctl(struct adc_dev_s *dev, int cmd,
break;
}
lc823450_adc_sem_post(priv);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -538,12 +507,12 @@ struct adc_dev_s *lc823450_adcinitialize(void)
inst->nchannels = CONFIG_LC823450_ADC_NCHANNELS;
inst->chanlist = lc823450_chanlist;
nxsem_init(&inst->sem_excl, 0, 1);
nxmutex_init(&inst->lock);
#ifndef CONFIG_ADC_POLLED
nxsem_init(&inst->sem_isr, 0, 0);
#endif
ret = lc823450_adc_sem_wait(inst);
ret = nxmutex_lock(&inst->lock);
if (ret < 0)
{
aerr("adc_register failed: %d\n", ret);
@ -578,7 +547,7 @@ struct adc_dev_s *lc823450_adcinitialize(void)
if (ret < 0)
{
aerr("adc_register failed: %d\n", ret);
lc823450_adc_sem_post(inst);
nxmutex_unlock(&inst->lock);
kmm_free(g_inst);
return NULL;
}
@ -590,8 +559,7 @@ struct adc_dev_s *lc823450_adcinitialize(void)
/* Now we are initialized */
g_inst = inst;
lc823450_adc_sem_post(inst);
nxmutex_unlock(&inst->lock);
}
return &g_inst->dev;
@ -619,7 +587,7 @@ int lc823450_adc_receive(struct adc_dev_s *dev,
return -EINVAL;
}
ret = lc823450_adc_sem_wait(inst);
ret = nxmutex_lock(&inst->lock);
if (ret < 0)
{
return ret;
@ -635,7 +603,7 @@ int lc823450_adc_receive(struct adc_dev_s *dev,
}
lc823450_adc_standby(1);
lc823450_adc_sem_post(inst);
nxmutex_unlock(&inst->lock);
return OK;
}

5
arch/arm/src/lc823450/lc823450_dma.c
View file

@ -36,6 +36,7 @@
#include <nuttx/arch.h>
#include <nuttx/spinlock.h>
#include <nuttx/mutex.h>
#include "arm_internal.h"
#include "lc823450_dma.h"
@ -106,7 +107,7 @@ struct lc823450_dmach_s
struct lc823450_dma_s
{
sem_t exclsem; /* For exclusive access to the DMA channel list */
mutex_t lock; /* For exclusive access to the DMA channel list */
/* This is the state of each DMA channel */
@ -341,7 +342,7 @@ void arm_dma_initialize(void)
sq_init(&g_dma.phydmach[i].req_q);
}
nxsem_init(&g_dma.exclsem, 0, 1);
nxmutex_init(&g_dma.lock);
if (irq_attach(LC823450_IRQ_DMAC, dma_interrupt, NULL) != 0)
{

59
arch/arm/src/lc823450/lc823450_i2c.c
View file

@ -39,6 +39,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/clock.h>
#include <nuttx/signal.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/i2c/i2c_master.h>
@ -117,7 +118,7 @@ struct lc823450_i2c_priv_s
const struct lc823450_i2c_config_s *config;
int refs; /* Reference count */
sem_t sem_excl; /* Mutual exclusion semaphore */
mutex_t lock; /* Mutual exclusion mutex */
#ifndef CONFIG_I2C_POLLED
sem_t sem_isr; /* Interrupt wait semaphore */
#endif
@ -137,10 +138,6 @@ struct lc823450_i2c_priv_s
* Private Function Prototypes
****************************************************************************/
static inline int
lc823450_i2c_sem_wait(struct lc823450_i2c_priv_s *priv);
static inline void
lc823450_i2c_sem_post(struct lc823450_i2c_priv_s *priv);
static inline int
lc823450_i2c_sem_waitdone(struct lc823450_i2c_priv_s *priv);
@ -209,6 +206,10 @@ static struct lc823450_i2c_priv_s lc823450_i2c0_priv =
.ops = &lc823450_i2c_ops,
.config = &lc823450_i2c0_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
#endif
.irqstate = IRQSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
@ -235,6 +236,10 @@ static struct lc823450_i2c_priv_s lc823450_i2c1_priv =
.ops = &lc823450_i2c_ops,
.config = &lc823450_i2c1_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
#endif
.irqstate = IRQSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
@ -250,34 +255,6 @@ static struct lc823450_i2c_priv_s lc823450_i2c1_priv =
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: lc823450_i2c_sem_wait
*
* Description:
* Take the exclusive access, waiting as necessary. May be interrupted by
* a signal.
*
****************************************************************************/
static inline int lc823450_i2c_sem_wait(struct lc823450_i2c_priv_s *priv)
{
return nxsem_wait(&priv->sem_excl);
}
/****************************************************************************
* Name: lc823450_i2c_sem_post
*
* Description:
* Release the mutual exclusion semaphore
*
****************************************************************************/
static inline void
lc823450_i2c_sem_post(struct lc823450_i2c_priv_s *priv)
{
nxsem_post(&priv->sem_excl);
}
/****************************************************************************
* Name: lc823450_i2c_sem_waitdone
*
@ -978,7 +955,7 @@ static int lc823450_i2c_transfer(struct i2c_master_s *dev,
/* Ensure that address or flags don't change meanwhile */
ret = lc823450_i2c_sem_wait(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -1073,8 +1050,7 @@ static int lc823450_i2c_transfer(struct i2c_master_s *dev,
#endif
exit:
lc823450_i2c_sem_post(priv);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -1120,10 +1096,6 @@ struct i2c_master_s *lc823450_i2cbus_initialize(int port)
if ((volatile int)priv->refs++ == 0)
{
nxsem_init(&priv->sem_excl, 0, 1);
#ifndef CONFIG_I2C_POLLED
nxsem_init(&priv->sem_isr, 0, 0);
#endif
lc823450_i2c_init(priv, port);
}
@ -1188,13 +1160,6 @@ int lc823450_i2cbus_uninitialize(struct i2c_master_s *dev)
lc823450_i2c_deinit(priv, port);
/* Release unused resources */
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
nxsem_destroy(&priv->sem_isr);
#endif
return OK;
}

21
arch/arm/src/lc823450/lc823450_i2s.c
View file

@ -306,15 +306,6 @@ static void _setup_audio_pll(uint32_t freq)
);
}
/****************************************************************************
* Name: _i2s_semtake
****************************************************************************/
static int _i2s_semtake(sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
/****************************************************************************
* Name: lc823450_i2s_rxsamplerate
****************************************************************************/
@ -521,7 +512,7 @@ static int lc823450_i2s_receive(struct i2s_dev_s *dev,
/* Wait for Audio Buffer */
ret = _i2s_semtake(&_sem_buf_over);
ret = nxsem_wait_uninterruptible(&_sem_buf_over);
if (ret < 0)
{
/* Disable J Buffer Over Level IRQ */
@ -550,10 +541,10 @@ static int lc823450_i2s_receive(struct i2s_dev_s *dev,
_i2s_rxdma_callback,
&_sem_rxdma);
ret = _i2s_semtake(&_sem_rxdma);
ret = nxsem_wait_uninterruptible(&_sem_rxdma);
if (ret < 0)
{
/* Stop DMA because semtake failed */
/* Stop DMA because semwait failed */
lc823450_dmastop(_hrxdma);
@ -686,7 +677,7 @@ static int lc823450_i2s_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
/* Wait for Audio Buffer */
ret = _i2s_semtake(&_sem_buf_under);
ret = nxsem_wait_uninterruptible(&_sem_buf_under);
if (ret < 0)
{
/* Disable C Buffer Under Level IRQ */
@ -734,10 +725,10 @@ static int lc823450_i2s_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
_i2s_txdma_callback,
&_sem_txdma);
ret = _i2s_semtake(&_sem_txdma);
ret = nxsem_wait_uninterruptible(&_sem_txdma);
if (ret < 0)
{
/* Stop DMA because semtake failed */
/* Stop DMA because semwait failed */
lc823450_dmastop(_htxdma);

82
arch/arm/src/lc823450/lc823450_mtd.c
View file

@ -36,7 +36,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/fs/ioctl.h>
#include <nuttx/mtd/mtd.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <arch/board/board.h>
#include "lc823450_mtd.h"
@ -74,7 +74,7 @@ struct lc823450_mtd_dev_s
/* Other implementation specific data may follow here */
sem_t sem; /* Assures mutually exclusive access to the slot */
mutex_t lock; /* Assures mutually exclusive access to the slot */
uint32_t nblocks; /* Number of blocks */
uint32_t blocksize; /* Size of one read/write blocks */
uint32_t channel; /* 0: eMMC, 1: SDC */
@ -90,7 +90,7 @@ struct lc823450_partinfo_s
* Private Data
****************************************************************************/
static sem_t g_sem = SEM_INITIALIZER(1);
static mutex_t g_lock = NXMUTEX_INITIALIZER;
static struct mtd_dev_s *g_mtdpart[LC823450_NPARTS];
static struct mtd_dev_s *g_mtdmaster[CONFIG_MTD_DEV_MAX]; /* 0: eMMC, 1: SDC */
@ -118,24 +118,6 @@ static struct lc823450_partinfo_s partinfo[LC823450_NPARTS] =
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: mtd_semtake
****************************************************************************/
static int mtd_semtake(sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
/****************************************************************************
* Name: mtd_semgive
****************************************************************************/
static void mtd_semgive(sem_t *sem)
{
nxsem_post(sem);
}
/****************************************************************************
* Name: lc823450_erase
*
@ -191,7 +173,7 @@ static ssize_t lc823450_bread(struct mtd_dev_s *dev, off_t startblock,
return -EINVAL;
}
ret = mtd_semtake(&priv->sem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -200,7 +182,7 @@ static ssize_t lc823450_bread(struct mtd_dev_s *dev, off_t startblock,
if (!g_mtdmaster[priv->channel])
{
finfo("device removed\n");
mtd_semgive(&priv->sem);
nxmutex_unlock(&priv->lock);
return -ENODEV;
}
@ -211,8 +193,7 @@ static ssize_t lc823450_bread(struct mtd_dev_s *dev, off_t startblock,
ret = lc823450_sdc_readsector(priv->channel, (unsigned long)(startblock),
(unsigned short)nblocks, buf, type);
mtd_semgive(&priv->sem);
nxmutex_unlock(&priv->lock);
if (ret != OK)
{
@ -264,7 +245,7 @@ static ssize_t lc823450_bwrite(struct mtd_dev_s *dev, off_t startblock,
return -EINVAL;
}
ret = mtd_semtake(&priv->sem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -273,7 +254,7 @@ static ssize_t lc823450_bwrite(struct mtd_dev_s *dev, off_t startblock,
if (!g_mtdmaster[priv->channel])
{
finfo("device removed\n");
mtd_semgive(&priv->sem);
nxmutex_unlock(&priv->lock);
return -ENODEV;
}
@ -284,8 +265,7 @@ static ssize_t lc823450_bwrite(struct mtd_dev_s *dev, off_t startblock,
ret = lc823450_sdc_writesector(priv->channel, (unsigned long)(startblock),
(unsigned short)nblocks, (void *)buf, type);
mtd_semgive(&priv->sem);
nxmutex_unlock(&priv->lock);
if (ret != OK)
{
@ -312,7 +292,7 @@ static int lc823450_ioctl(struct mtd_dev_s *dev, int cmd,
finfo("cmd=%xh, arg=%lxh\n", cmd, arg);
ret = mtd_semtake(&priv->sem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -323,7 +303,7 @@ static int lc823450_ioctl(struct mtd_dev_s *dev, int cmd,
if (!g_mtdmaster[priv->channel])
{
finfo("device removed\n");
mtd_semgive(&priv->sem);
nxmutex_unlock(&priv->lock);
return -ENODEV;
}
@ -399,7 +379,7 @@ static int lc823450_ioctl(struct mtd_dev_s *dev, int cmd,
break;
}
mtd_semgive(&priv->sem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -422,7 +402,7 @@ static int mtd_mediainitialize(struct lc823450_mtd_dev_s *dev)
finfo("enter\n");
ret = mtd_semtake(&dev->sem);
ret = nxmutex_lock(&dev->lock);
if (ret < 0)
{
return ret;
@ -508,7 +488,7 @@ get_card_size:
dev->channel, (uint64_t)blocksize * (uint64_t)nblocks);
exit_with_error:
mtd_semgive(&dev->sem);
nxmutex_unlock(&dev->lock);
return ret;
}
@ -538,7 +518,7 @@ static struct mtd_dev_s *lc823450_mtd_allocdev(uint32_t channel)
return NULL;
}
nxsem_init(&priv->sem, 0, 1);
nxmutex_init(&priv->lock);
priv->mtd.erase = lc823450_erase;
priv->mtd.bread = lc823450_bread;
@ -558,7 +538,7 @@ static struct mtd_dev_s *lc823450_mtd_allocdev(uint32_t channel)
if (ret != OK)
{
finfo("ERROR: Failed to initialize media\n");
nxsem_destroy(&priv->sem);
nxmutex_destroy(&priv->lock);
kmm_free(priv);
return NULL;
}
@ -608,7 +588,7 @@ int lc823450_mtd_initialize(uint32_t devno)
* /dev/mtdblock0pN : Nth child partition
*/
ret = mtd_semtake(&g_sem);
ret = nxmutex_lock(&g_lock);
if (ret < 0)
{
return ret;
@ -617,7 +597,7 @@ int lc823450_mtd_initialize(uint32_t devno)
if (g_mtdmaster[ch])
{
finfo("Device already registered\n");
mtd_semgive(&g_sem);
nxmutex_unlock(&g_lock);
return -EBUSY;
}
@ -627,7 +607,7 @@ int lc823450_mtd_initialize(uint32_t devno)
if (!g_mtdmaster[ch])
{
finfo("Failed to create master partition: ch=%" PRId32 "\n", ch);
mtd_semgive(&g_sem);
nxmutex_unlock(&g_lock);
return -ENODEV;
}
@ -639,7 +619,7 @@ int lc823450_mtd_initialize(uint32_t devno)
ch);
kmm_free(g_mtdmaster[ch]);
g_mtdmaster[ch] = NULL;
mtd_semgive(&g_sem);
nxmutex_unlock(&g_lock);
return -ENODEV;
}
@ -655,7 +635,7 @@ int lc823450_mtd_initialize(uint32_t devno)
if (devno == CONFIG_MTD_DEVNO_SDC)
{
finfo("SDC has no child partitions.\n");
mtd_semgive(&g_sem);
nxmutex_unlock(&g_lock);
return OK;
}
#endif
@ -696,7 +676,7 @@ int lc823450_mtd_initialize(uint32_t devno)
finfo("%s(): mtd_partition failed. startblock=%"
PRIuOFF " nblocks=%" PRIuOFF "\n", __func__,
partinfo[i].startblock, partinfo[i].nblocks);
mtd_semgive(&g_sem);
nxmutex_unlock(&g_lock);
DEBUGPANIC();
return -EIO;
}
@ -706,13 +686,13 @@ int lc823450_mtd_initialize(uint32_t devno)
{
finfo("%s(): mmcl_initialize part%d failed: %d\n",
__func__, partno, ret);
mtd_semgive(&g_sem);
nxmutex_unlock(&g_lock);
DEBUGPANIC();
return ret;
}
}
mtd_semgive(&g_sem);
nxmutex_unlock(&g_lock);
return OK;
}
@ -793,7 +773,7 @@ int lc823450_mtd_uninitialize(uint32_t devno)
DEBUGASSERT(devno == CONFIG_MTD_DEVNO_SDC);
ret = mtd_semtake(&g_sem);
ret = nxmutex_lock(&g_lock);
if (ret < 0)
{
return ret;
@ -803,7 +783,7 @@ int lc823450_mtd_uninitialize(uint32_t devno)
if (!priv)
{
finfo("SD card is not identified yet\n");
mtd_semgive(&g_sem);
nxmutex_unlock(&g_lock);
return -ENODEV;
}
@ -813,17 +793,17 @@ int lc823450_mtd_uninitialize(uint32_t devno)
mtd_unregister(g_mtdmaster[ch]);
#endif
ret = mtd_semtake(&priv->sem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
mtd_semgive(&g_sem);
nxmutex_unlock(&g_lock);
return ret;
}
ret = lc823450_sdc_clearcardinfo(ch);
DEBUGASSERT(ret == OK);
mtd_semgive(&priv->sem);
nxmutex_unlock(&priv->lock);
ret = mmcl_uninitialize(devname);
if (ret != OK)
@ -834,13 +814,13 @@ int lc823450_mtd_uninitialize(uint32_t devno)
ret = lc823450_sdc_finalize(ch);
DEBUGASSERT(ret == OK);
nxsem_destroy(&priv->sem);
nxmutex_destroy(&priv->lock);
kmm_free(g_mtdmaster[ch]);
g_mtdmaster[ch] = NULL;
mtd_semgive(&g_sem);
nxmutex_unlock(&g_lock);
#ifdef CONFIG_DEBUG
finfo("/dev/mtdblock%d deleted\n", devno);

85
arch/arm/src/lc823450/lc823450_sdc.c
View file

@ -47,6 +47,7 @@
#include <debug.h>
#include <nuttx/clock.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include <nuttx/kthread.h>
#include <arch/board/board.h>
@ -78,10 +79,10 @@
* Private Data
****************************************************************************/
static sem_t _sdc_sem[2] =
static mutex_t _sdc_lock[2] =
{
SEM_INITIALIZER(1),
SEM_INITIALIZER(1)
NXMUTEX_INITIALIZER,
NXMUTEX_INITIALIZER
};
static struct sddrcfg_s _sdch0;
@ -133,24 +134,6 @@ extern SINT_T sddep_write(void *src, void *dst, UI_32 size, SINT_T type,
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: _sdc_semtake
****************************************************************************/
static int _sdc_semtake(sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
/****************************************************************************
* Name: _sdc_semgive
****************************************************************************/
static void _sdc_semgive(sem_t *sem)
{
nxsem_post(sem);
}
/****************************************************************************
* Name: _lc823450_sdc_support_trim
****************************************************************************/
@ -202,7 +185,7 @@ int lc823450_sdc_clearcardinfo(uint32_t ch)
mcinfo("++++ start\n");
ret = _sdc_semtake(&_sdc_sem[ch]);
ret = nxmutex_lock(&_sdc_lock[ch]);
if (ret < 0)
{
return ret;
@ -218,7 +201,7 @@ int lc823450_sdc_clearcardinfo(uint32_t ch)
}
#endif
_sdc_semgive(&_sdc_sem[ch]);
nxmutex_unlock(&_sdc_lock[ch]);
mcinfo("---- end ret=%d\n", ret);
return ret;
}
@ -277,11 +260,11 @@ int lc823450_sdc_initialize(uint32_t ch)
mcinfo("++++ start\n");
ret = _sdc_semtake(&_sdc_sem[ch]);
ret = nxmutex_lock(&_sdc_lock[ch]);
if (ret >= 0)
{
ret = sddr_initialize(_cfg[ch]);
_sdc_semgive(&_sdc_sem[ch]);
nxmutex_unlock(&_sdc_lock[ch]);
mcinfo("---- end ret=%d\n", ret);
}
@ -298,11 +281,11 @@ int lc823450_sdc_finalize(uint32_t ch)
mcinfo("++++ start ch=%ld\n", ch);
ret = _sdc_semtake(&_sdc_sem[ch]);
ret = nxmutex_lock(&_sdc_lock[ch]);
if (ret >= 0)
{
ret = sddr_finalize(_cfg[ch]);
_sdc_semgive(&_sdc_sem[ch]);
nxmutex_unlock(&_sdc_lock[ch]);
mcinfo("---- end ret=%d\n", ret);
}
@ -319,7 +302,7 @@ int lc823450_sdc_identifycard(uint32_t ch)
mcinfo("++++ start\n");
ret = _sdc_semtake(&_sdc_sem[ch]);
ret = nxmutex_lock(&_sdc_lock[ch]);
if (ret < 0)
{
return ret;
@ -335,7 +318,7 @@ int lc823450_sdc_identifycard(uint32_t ch)
}
#endif
_sdc_semgive(&_sdc_sem[ch]);
nxmutex_unlock(&_sdc_lock[ch]);
mcinfo("---- end ret=%d\n", ret);
return ret;
}
@ -351,11 +334,11 @@ int lc823450_sdc_setclock(uint32_t ch, uint32_t limitclk, uint32_t sysclk)
mcinfo("++++ start ch=%ld limitClk=%ld sysClk=%ld\n",
ch, limitclk, sysclk);
ret = _sdc_semtake(&_sdc_sem[ch]);
ret = nxmutex_lock(&_sdc_lock[ch]);
if (ret >= 0)
{
ret = sddr_setclock(limitclk, sysclk, _cfg[ch]);
_sdc_semgive(&_sdc_sem[ch]);
nxmutex_unlock(&_sdc_lock[ch]);
mcinfo("---- end ret=%d\n", ret);
}
@ -376,11 +359,11 @@ int lc823450_sdc_refmediatype(uint32_t ch)
mcinfo("++++ start\n");
ret = _sdc_semtake(&_sdc_sem[ch]);
ret = nxmutex_lock(&_sdc_lock[ch]);
if (ret >= 0)
{
ret = sddr_refmediatype(_cfg[ch]);
_sdc_semgive(&_sdc_sem[ch]);
nxmutex_unlock(&_sdc_lock[ch]);
mcinfo("---- end ret=%d\n", ret);
}
@ -398,12 +381,12 @@ int lc823450_sdc_getcardsize(uint32_t ch,
mcinfo("++++ start\n");
ret = _sdc_semtake(&_sdc_sem[ch]);
ret = nxmutex_lock(&_sdc_lock[ch]);
if (ret >= 0)
{
ret = sddr_getcardsize(psecnum, psecsize, _cfg[ch]);
_sdc_semgive(&_sdc_sem[ch]);
nxmutex_unlock(&_sdc_lock[ch]);
mcinfo("---- end ret=%d\n", ret);
}
@ -421,7 +404,7 @@ int lc823450_sdc_readsector(uint32_t ch,
int ret;
int i = 0;
ret = _sdc_semtake(&_sdc_sem[ch]);
ret = nxmutex_lock(&_sdc_lock[ch]);
if (ret < 0)
{
return ret;
@ -435,7 +418,7 @@ int lc823450_sdc_readsector(uint32_t ch,
if (ch && _sec_cache_enabled && 1 == cnt && addr == _sec_cache_add)
{
memcpy(pbuf, _sec_cache, sizeof(_sec_cache));
goto errout_with_semaphore;
goto errout_with_lock;
}
#endif
@ -488,9 +471,9 @@ int lc823450_sdc_readsector(uint32_t ch,
}
}
errout_with_semaphore:
errout_with_lock:
#endif
_sdc_semgive(&_sdc_sem[ch]);
nxmutex_unlock(&_sdc_lock[ch]);
mcinfo("---- end ret=%d\n", ret);
return ret;
@ -506,7 +489,7 @@ int lc823450_sdc_writesector(uint32_t ch,
{
int ret;
ret = _sdc_semtake(&_sdc_sem[ch]);
ret = nxmutex_lock(&_sdc_lock[ch]);
if (ret < 0)
{
return ret;
@ -536,7 +519,7 @@ int lc823450_sdc_writesector(uint32_t ch,
mcinfo("ret=%d ch=%" PRId32 " add=%ld cnt=%d\n", ret, ch, addr, cnt);
}
_sdc_semgive(&_sdc_sem[ch]);
nxmutex_unlock(&_sdc_lock[ch]);
mcinfo("---- end ret=%d\n", ret);
return ret;
@ -560,7 +543,7 @@ int lc823450_sdc_trimsector(uint32_t ch, unsigned long addr,
{
int ret;
ret = _sdc_semtake(&_sdc_sem[ch]);
ret = nxmutex_lock(&_sdc_lock[ch]);
if (ret < 0)
{
return ret;
@ -582,7 +565,7 @@ int lc823450_sdc_trimsector(uint32_t ch, unsigned long addr,
mcinfo("ret=%d ch=%" PRId32 " add=%ld cnt=%d\n", ret, ch, addr, cnt);
}
_sdc_semgive(&_sdc_sem[ch]);
nxmutex_unlock(&_sdc_lock[ch]);
mcinfo("---- end ret=%d\n", ret);
return ret;
@ -598,12 +581,12 @@ int lc823450_sdc_cachectl(uint32_t ch, int ctrl)
mcinfo("++++ ch=%" PRId32 ", ctrl=%d\n", ch, ctrl);
ret = _sdc_semtake(&_sdc_sem[ch]);
ret = nxmutex_lock(&_sdc_lock[ch]);
if (ret >= 0)
{
ret = sddr_cachectrl(ctrl, _cfg[ch]);
_sdc_semgive(&_sdc_sem[ch]);
nxmutex_unlock(&_sdc_lock[ch]);
mcinfo("---- end ret=%d\n", ret);
}
@ -620,7 +603,7 @@ int lc823450_sdc_changespeedmode(uint32_t ch, int mode)
mcinfo("++++ ch=%" PRId32 ", mode=%d\n", ch, mode);
ret = _sdc_semtake(&_sdc_sem[ch]);
ret = nxmutex_lock(&_sdc_lock[ch]);
if (ret < 0)
{
return ret;
@ -646,7 +629,7 @@ int lc823450_sdc_changespeedmode(uint32_t ch, int mode)
}
}
_sdc_semgive(&_sdc_sem[ch]);
nxmutex_unlock(&_sdc_lock[ch]);
mcinfo("---- end ret=%d\n", ret);
return ret;
}
@ -662,7 +645,7 @@ int lc823450_sdc_getcid(uint32_t ch, char *cidstr, int length)
mcinfo("++++ ch=%" PRId32 "\n", ch);
ret = _sdc_semtake(&_sdc_sem[ch]);
ret = nxmutex_lock(&_sdc_lock[ch]);
if (ret < 0)
{
return ret;
@ -683,7 +666,7 @@ int lc823450_sdc_getcid(uint32_t ch, char *cidstr, int length)
*cidstr = '\0';
}
_sdc_semgive(&_sdc_sem[ch]);
nxmutex_unlock(&_sdc_lock[ch]);
mcinfo("---- end ret=%d\n", ret);
return ret;
}
@ -694,7 +677,6 @@ int lc823450_sdc_getcid(uint32_t ch, char *cidstr, int length)
int lc823450_sdc_locked(void)
{
int val;
int ret;
int i;
@ -702,8 +684,7 @@ int lc823450_sdc_locked(void)
for (i = 0; i < 2; i++)
{
nxsem_get_value(&_sdc_sem[i], &val);
if (1 != val)
if (nxmutex_is_locked(&_sdc_lock[i]))
{
ret = 1;
break;

13
arch/arm/src/lc823450/lc823450_sddrv_dep.c
View file

@ -128,15 +128,6 @@ static void dma_callback(DMA_HANDLE hdma, void *arg, int result)
}
#endif /* CONFIG_LC823450_SDC_DMA */
/****************************************************************************
* Name: _sddep_semtake
****************************************************************************/
static int _sddep_semtake(sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
/****************************************************************************
* Public Functions
****************************************************************************/
@ -427,7 +418,7 @@ SINT_T sddep_read(void *src, void *dst, UI_32 size, SINT_T type,
}
lc823450_dmastart(_hrdma[ch], dma_callback, &_sem_rwait[ch]);
return _sddep_semtake(&_sem_rwait[ch]);
return nxsem_wait_uninterruptible(&_sem_rwait[ch]);
#else
SINT_T i;
UI_32 *p = (UI_32 *)src;
@ -518,7 +509,7 @@ SINT_T sddep_write(void *src, void *dst, UI_32 size, SINT_T type,
}
lc823450_dmastart(_hwdma[ch], dma_callback, &_sem_wwait[ch]);
return _sddep_semtake(&_sem_wwait[ch]);
return nxsem_wait_uninterruptible(&_sem_wwait[ch]);
#else
SINT_T i;

10
arch/arm/src/lc823450/lc823450_spi.c
View file

@ -34,7 +34,7 @@
#include <arch/board/board.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include "arm_internal.h"
@ -65,7 +65,7 @@ struct lc823450_spidev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (8 to 16) */
@ -144,11 +144,11 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -524,7 +524,7 @@ struct spi_dev_s *lc823450_spibus_initialize(int port)
modifyreg32(MRSTCNTAPB, 0, MRSTCNTAPB_PORT5_RSTB);
#ifndef CONFIG_SPI_OWNBUS
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
#endif
/* Initialize SPI mode. It must be done before starting SPI transfer */

10
arch/arm/src/lpc17xx_40xx/lpc17_40_gpdma.c
View file

@ -33,7 +33,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include "arm_internal.h"
#include "chip.h"
@ -67,7 +67,7 @@ struct lpc17_40_dmach_s
struct lpc17_40_gpdma_s
{
sem_t exclsem; /* For exclusive access to the DMA channel list */
mutex_t lock; /* For exclusive access to the DMA channel list */
/* This is the state of each DMA channel */
@ -291,7 +291,7 @@ void weak_function arm_dma_initialize(void)
/* Initialize the DMA state structure */
nxsem_init(&g_gpdma.exclsem, 0, 1);
nxmutex_init(&g_gpdma.lock);
for (i = 0; i < LPC17_40_NDMACH; i++)
{
@ -379,7 +379,7 @@ DMA_HANDLE lpc17_40_dmachannel(void)
/* Get exclusive access to the GPDMA state structure */
ret = nxsem_wait_uninterruptible(&g_gpdma.exclsem);
ret = nxmutex_lock(&g_gpdma.lock);
if (ret < 0)
{
return NULL;
@ -401,7 +401,7 @@ DMA_HANDLE lpc17_40_dmachannel(void)
/* Return what we found (or not) */
nxsem_post(&g_gpdma.exclsem);
nxmutex_unlock(&g_gpdma.lock);
return (DMA_HANDLE)dmach;
}

13
arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c
View file

@ -60,6 +60,7 @@
#include <nuttx/arch.h>
#include <nuttx/wdog.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/i2c/i2c_master.h>
@ -108,7 +109,7 @@ struct lpc17_40_i2cdev_s
unsigned int base; /* Base address of registers */
uint16_t irqid; /* IRQ for this device */
sem_t mutex; /* Only one thread can access at a time */
mutex_t lock; /* Only one thread can access at a time */
sem_t wait; /* Place to wait for state machine completion */
volatile uint8_t state; /* State of state machine */
struct wdog_s timeout; /* Watchdog to timeout when bus hung */
@ -302,7 +303,7 @@ static int lpc17_40_i2c_transfer(struct i2c_master_s *dev,
/* Get exclusive access to the I2C bus */
nxsem_wait(&priv->mutex);
nxmutex_lock(&priv->lock);
/* Set up for the transfer */
@ -323,7 +324,7 @@ static int lpc17_40_i2c_transfer(struct i2c_master_s *dev,
ret = lpc17_40_i2c_start(priv);
nxsem_post(&priv->mutex);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -616,9 +617,9 @@ struct i2c_master_s *lpc17_40_i2cbus_initialize(int port)
putreg32(I2C_CONSET_I2EN, priv->base + LPC17_40_I2C_CONSET_OFFSET);
/* Initialize semaphores */
/* Initialize mutex & semaphores */
nxsem_init(&priv->mutex, 0, 1);
nxmutex_init(&priv->lock);
nxsem_init(&priv->wait, 0, 0);
/* The wait semaphore is used for signaling and, hence, should not have
@ -659,7 +660,7 @@ int lpc17_40_i2cbus_uninitialize(struct i2c_master_s * dev)
/* Reset data structures */
nxsem_destroy(&priv->mutex);
nxmutex_destroy(&priv->lock);
nxsem_destroy(&priv->wait);
/* Cancel the watchdog timer */

27
arch/arm/src/lpc17xx_40xx/lpc17_40_sdcard.c
View file

@ -292,8 +292,6 @@ struct lpc17_40_sampleregs_s
/* Low-level helpers ********************************************************/
static int lpc17_40_takesem(struct lpc17_40_dev_s *priv);
#define lpc17_40_givesem(priv) (nxsem_post(&priv->waitsem))
static inline void lpc17_40_setclock(uint32_t clkcr);
static void lpc17_40_configwaitints(struct lpc17_40_dev_s *priv,
uint32_t waitmask, sdio_eventset_t waitevents,
@ -463,27 +461,6 @@ static struct lpc17_40_sampleregs_s g_sampleregs[DEBUG_NSAMPLES];
* Low-level Helpers
****************************************************************************/
/****************************************************************************
* Name: lpc17_40_takesem
*
* Description:
* Take the wait semaphore (handling false alarm wakeups due to the receipt
* of signals).
*
* Input Parameters:
* dev - Instance of the SD card device driver state structure.
*
* Returned Value:
* Normally OK, but may return -ECANCELED in the rare event that the task
* has been canceled.
*
****************************************************************************/
static int lpc17_40_takesem(struct lpc17_40_dev_s *priv)
{
return nxsem_wait_uninterruptible(&priv->waitsem);
}
/****************************************************************************
* Name: lpc17_40_setclock
*
@ -1122,7 +1099,7 @@ static void lpc17_40_endwait(struct lpc17_40_dev_s *priv,
/* Wake up the waiting thread */
lpc17_40_givesem(priv);
nxsem_post(&priv->waitsem);
}
/****************************************************************************
@ -2350,7 +2327,7 @@ static sdio_eventset_t lpc17_40_eventwait(struct sdio_dev_s *dev)
* incremented and there will be no wait.
*/
ret = lpc17_40_takesem(priv);
ret = nxsem_wait_uninterruptible(&priv->waitsem);
if (ret < 0)
{
/* Task canceled. Cancel the wdog (assuming it was started) and

12
arch/arm/src/lpc17xx_40xx/lpc17_40_spi.c
View file

@ -35,7 +35,7 @@
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include "arm_internal.h"
@ -84,7 +84,7 @@
struct lpc17_40_spidev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (8 to 16) */
@ -180,11 +180,11 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -564,9 +564,9 @@ struct spi_dev_s *lpc17_40_spibus_initialize(int port)
spi_setfrequency((struct spi_dev_s *)priv, 400000);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
return &priv->spidev;
}

12
arch/arm/src/lpc17xx_40xx/lpc17_40_ssp.c
View file

@ -35,7 +35,7 @@
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include "arm_internal.h"
@ -102,7 +102,7 @@ struct lpc17_40_sspdev_s
#ifdef CONFIG_LPC17_40_SSP_INTERRUPTS
uint8_t sspirq; /* SPI IRQ number */
#endif
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (4 to 16) */
@ -336,11 +336,11 @@ static int ssp_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -993,9 +993,9 @@ struct spi_dev_s *lpc17_40_sspbus_initialize(int port)
ssp_setfrequency((struct spi_dev_s *)priv, 400000);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
/* Enable the SPI */

124
arch/arm/src/lpc17xx_40xx/lpc17_40_usbhost.c
View file

@ -37,6 +37,7 @@
#include <nuttx/arch.h>
#include <nuttx/signal.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/usb/usb.h>
#include <nuttx/usb/ohci.h>
@ -163,7 +164,7 @@ struct lpc17_40_usbhost_s
uint8_t outinterval; /* Minimum periodic IN EP polling interval: 2, 4, 6, 16, or 32 */
#endif
sem_t exclsem; /* Support mutually exclusive access */
mutex_t lock; /* Support mutually exclusive access */
sem_t pscsem; /* Semaphore to wait Writeback Done Head event */
#ifdef CONFIG_USBHOST_HUB
@ -272,10 +273,6 @@ static void lpc17_40_putreg(uint32_t val, uint32_t addr);
/* Semaphores ***************************************************************/
static int lpc17_40_takesem(sem_t *sem);
static int lpc17_40_takesem_noncancelable(sem_t *sem);
#define lpc17_40_givesem(s) nxsem_post(s);
/* Byte stream access helper functions **************************************/
static inline uint16_t lpc17_40_getle16(const uint8_t *val);
@ -565,54 +562,6 @@ static void lpc17_40_putreg(uint32_t val, uint32_t addr)
}
#endif
/****************************************************************************
* Name: lpc17_40_takesem
*
* Description:
* This is just a wrapper to handle the annoying behavior of semaphore
* waits that return due to the receipt of a signal.
*
****************************************************************************/
static int lpc17_40_takesem(sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
/****************************************************************************
* Name: lpc17_40_takesem_noncancelable
*
* Description:
* This is just a wrapper to handle the annoying behavior of semaphore
* waits that return due to the receipt of a signal. This version also
* ignores attempts to cancel the thread.
*
****************************************************************************/
static int lpc17_40_takesem_noncancelable(sem_t *sem)
{
int result;
int ret = OK;
do
{
result = nxsem_wait_uninterruptible(sem);
/* The only expected error is ECANCELED which would occur if the
* calling thread were canceled.
*/
DEBUGASSERT(result == OK || result == -ECANCELED);
if (ret == OK && result < 0)
{
ret = result;
}
}
while (result < 0);
return ret;
}
/****************************************************************************
* Name: lpc17_40_getle16
*
@ -1645,7 +1594,7 @@ static int lpc17_40_ctrltd(struct lpc17_40_usbhost_s *priv,
/* Wait for the Writeback Done Head interrupt */
ret = lpc17_40_takesem(&ed->wdhsem);
ret = nxsem_wait_uninterruptible(&ed->wdhsem);
if (ret < 0)
{
/* Task has been canceled */
@ -1744,7 +1693,7 @@ static int lpc17_40_usbinterrupt(int irq, void *context, void *arg)
if (priv->pscwait)
{
lpc17_40_givesem(&priv->pscsem);
nxsem_post(&priv->pscsem);
priv->pscwait = false;
}
}
@ -1803,7 +1752,7 @@ static int lpc17_40_usbinterrupt(int irq, void *context, void *arg)
if (priv->pscwait)
{
lpc17_40_givesem(&priv->pscsem);
nxsem_post(&priv->pscsem);
priv->pscwait = false;
}
}
@ -1942,7 +1891,7 @@ static int lpc17_40_usbinterrupt(int irq, void *context, void *arg)
{
/* Wake up the thread waiting for the WDH event */
lpc17_40_givesem(&ed->wdhsem);
nxsem_post(&ed->wdhsem);
xfrinfo->wdhwait = false;
}
@ -2063,7 +2012,7 @@ static int lpc17_40_wait(struct usbhost_connection_s *conn,
/* Wait for the next connection event */
priv->pscwait = true;
ret = lpc17_40_takesem(&priv->pscsem);
ret = nxsem_wait_uninterruptible(&priv->pscsem);
if (ret < 0)
{
return ret;
@ -2219,7 +2168,7 @@ static int lpc17_40_ep0configure(struct usbhost_driver_s *drvr,
/* We must have exclusive access to EP0 and the control list */
ret = lpc17_40_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2237,8 +2186,7 @@ static int lpc17_40_ep0configure(struct usbhost_driver_s *drvr,
}
ed->hw.ctrl = hwctrl;
lpc17_40_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
uinfo("EP0 CTRL:%08" PRIx32 "\n", ed->hw.ctrl);
return OK;
@ -2285,7 +2233,7 @@ static int lpc17_40_epalloc(struct usbhost_driver_s *drvr,
* periodic list and the interrupt table.
*/
ret = lpc17_40_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2407,7 +2355,7 @@ static int lpc17_40_epalloc(struct usbhost_driver_s *drvr,
}
}
lpc17_40_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -2446,7 +2394,7 @@ static int lpc17_40_epfree(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
* periodic list and the interrupt table.
*/
ret = lpc17_40_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2484,7 +2432,7 @@ static int lpc17_40_epfree(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
/* Put the ED back into the free list */
lpc17_40_edfree(ed);
lpc17_40_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -2531,7 +2479,7 @@ static int lpc17_40_alloc(struct usbhost_driver_s *drvr,
/* We must have exclusive access to the transfer buffer pool */
ret = lpc17_40_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2546,7 +2494,7 @@ static int lpc17_40_alloc(struct usbhost_driver_s *drvr,
ret = OK;
}
lpc17_40_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -2583,9 +2531,9 @@ static int lpc17_40_free(struct usbhost_driver_s *drvr, uint8_t *buffer)
/* We must have exclusive access to the transfer buffer pool */
ret = lpc17_40_takesem_noncancelable(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
lpc17_40_tbfree(buffer);
lpc17_40_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -2730,7 +2678,7 @@ static int lpc17_40_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
/* We must have exclusive access to EP0 and the control list */
ret = lpc17_40_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2752,7 +2700,7 @@ static int lpc17_40_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
}
}
lpc17_40_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -2773,7 +2721,7 @@ static int lpc17_40_ctrlout(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
/* We must have exclusive access to EP0 and the control list */
ret = lpc17_40_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2796,7 +2744,7 @@ static int lpc17_40_ctrlout(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
}
}
lpc17_40_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -3072,7 +3020,7 @@ static ssize_t lpc17_40_transfer(struct usbhost_driver_s *drvr,
* table.
*/
ret = lpc17_40_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -3089,7 +3037,7 @@ static ssize_t lpc17_40_transfer(struct usbhost_driver_s *drvr,
{
uerr("ERROR: lpc17_40_alloc_xfrinfo failed\n");
nbytes = -ENOMEM;
goto errout_with_sem;
goto errout_with_lock;
}
/* Initialize the transfer structure */
@ -3144,7 +3092,7 @@ static ssize_t lpc17_40_transfer(struct usbhost_driver_s *drvr,
/* Wait for the Writeback Done Head interrupt */
ret = lpc17_40_takesem(&ed->wdhsem);
ret = nxsem_wait_uninterruptible(&ed->wdhsem);
if (ret < 0)
{
return ret;
@ -3203,8 +3151,8 @@ errout_with_xfrinfo:
lpc17_40_free_xfrinfo(xfrinfo);
ed->xfrinfo = NULL;
errout_with_sem:
lpc17_40_givesem(&priv->exclsem);
errout_with_lock:
nxmutex_unlock(&priv->lock);
return nbytes;
}
@ -3351,7 +3299,7 @@ static int lpc17_40_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
* buffer pool, the bulk and interrupt lists, and the HCCA interrupt table.
*/
ret = lpc17_40_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -3368,7 +3316,7 @@ static int lpc17_40_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
{
uerr("ERROR: lpc17_40_alloc_xfrinfo failed\n");
ret = -ENOMEM;
goto errout_with_sem;
goto errout_with_lock;
}
/* Initialize the transfer structure */
@ -3388,7 +3336,7 @@ static int lpc17_40_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
if (ret < 0)
{
uerr("ERROR: lpc17_40_dma_alloc failed: %d\n", ret);
goto errout_with_sem;
goto errout_with_lock;
}
/* If a buffer was allocated, then use it instead of the callers buffer */
@ -3412,7 +3360,7 @@ static int lpc17_40_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
* completes.
*/
lpc17_40_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return OK;
errout_with_asynch:
@ -3427,8 +3375,8 @@ errout_with_asynch:
lpc17_40_free_xfrinfo(xfrinfo);
ed->xfrinfo = NULL;
errout_with_sem:
lpc17_40_givesem(&priv->exclsem);
errout_with_lock:
nxmutex_unlock(&priv->lock);
return ret;
}
#endif /* CONFIG_USBHOST_ASYNCH */
@ -3551,7 +3499,7 @@ static int lpc17_40_cancel(struct usbhost_driver_s *drvr,
/* Wake up the waiting thread */
lpc17_40_givesem(&ed->wdhsem);
nxsem_post(&ed->wdhsem);
xfrinfo->wdhwait = false;
/* And free the transfer structure */
@ -3628,7 +3576,7 @@ static int lpc17_40_connect(struct usbhost_driver_s *drvr,
if (priv->pscwait)
{
priv->pscwait = false;
lpc17_40_givesem(&priv->pscsem);
nxsem_post(&priv->pscsem);
}
leave_critical_section(flags);
@ -3795,10 +3743,10 @@ struct usbhost_connection_s *lpc17_40_usbhost_initialize(int controller)
usbhost_devaddr_initialize(&priv->rhport);
/* Initialize semaphores */
/* Initialize semaphores & mutex */
nxsem_init(&priv->pscsem, 0, 0);
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
/* The pscsem semaphore is used for signaling and, hence, should not
* have priority inheritance enabled.

13
arch/arm/src/lpc2378/lpc23xx_i2c.c
View file

@ -65,6 +65,7 @@
#include <nuttx/arch.h>
#include <nuttx/wdog.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/i2c/i2c_master.h>
@ -114,7 +115,7 @@ struct lpc2378_i2cdev_s
unsigned int base; /* Base address of registers */
uint16_t irqid; /* IRQ for this device */
sem_t mutex; /* Only one thread can access at a time */
mutex_t lock; /* Only one thread can access at a time */
sem_t wait; /* Place to wait for state machine completion */
volatile uint8_t state; /* State of state machine */
struct wdog_s timeout; /* Watchdog to timeout when bus hung */
@ -404,7 +405,7 @@ static int lpc2378_i2c_transfer(struct i2c_master_s *dev,
/* Get exclusive access to the I2C bus */
nxsem_wait(&priv->mutex);
nxmutex_lock(&priv->lock);
/* Set up for the transfer */
@ -425,7 +426,7 @@ static int lpc2378_i2c_transfer(struct i2c_master_s *dev,
ret = lpc2378_i2c_start(priv);
nxsem_post(&priv->mutex);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -579,9 +580,9 @@ struct i2c_master_s *lpc2378_i2cbus_initialize(int port)
putreg32(I2C_CONSET_I2EN, priv->base + I2C_CONSET_OFFSET);
/* Initialize semaphores */
/* Initialize mutex & semaphores */
nxsem_init(&priv->mutex, 0, 1);
nxmutex_init(&priv->lock);
nxsem_init(&priv->wait, 0, 0);
/* The wait semaphore is used for signaling and, hence, should not have
@ -622,7 +623,7 @@ int lpc2378_i2cbus_uninitialize(struct i2c_master_s * dev)
/* Reset data structures */
nxsem_destroy(&priv->mutex);
nxmutex_destroy(&priv->lock);
nxsem_destroy(&priv->wait);
/* Cancel the watchdog timer */

12
arch/arm/src/lpc2378/lpc23xx_spi.c
View file

@ -54,7 +54,7 @@
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include "arm_internal.h"
@ -103,7 +103,7 @@
struct lpc23xx_spidev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (8 to 16) */
@ -199,11 +199,11 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -589,9 +589,9 @@ struct spi_dev_s *lpc23_spibus_initialize(int port)
spi_setfrequency((struct spi_dev_s *)priv, 400000);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
return &priv->spidev;
}

162
arch/arm/src/lpc31xx/lpc31_ehci.c
View file

@ -277,7 +277,7 @@ struct lpc31_ehci_s
{
volatile bool pscwait; /* TRUE: Thread is waiting for port status change event */
sem_t exclsem; /* Support mutually exclusive access */
mutex_t lock; /* Support mutually exclusive access */
sem_t pscsem; /* Semaphore to wait for port status change events */
struct lpc31_epinfo_s ep0; /* Endpoint 0 */
@ -418,12 +418,6 @@ static inline void lpc31_putreg(uint32_t regval, volatile uint32_t *regaddr);
static int ehci_wait_usbsts(uint32_t maskbits, uint32_t donebits,
unsigned int delay);
/* Semaphores ***************************************************************/
static int lpc31_takesem(sem_t *sem);
static int lpc31_takesem_noncancelable(sem_t *sem);
#define lpc31_givesem(s) nxsem_post(s);
/* Allocators ***************************************************************/
static struct lpc31_qh_s *lpc31_qh_alloc(void);
@ -1052,61 +1046,13 @@ static int ehci_wait_usbsts(uint32_t maskbits, uint32_t donebits,
return (regval == donebits) ? OK : -ETIMEDOUT;
}
/****************************************************************************
* Name: lpc31_takesem
*
* Description:
* This is just a wrapper to handle the annoying behavior of semaphore
* waits that return due to the receipt of a signal.
*
****************************************************************************/
static int lpc31_takesem(sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
/****************************************************************************
* Name: lpc31_takesem_noncancelable
*
* Description:
* This is just a wrapper to handle the annoying behavior of semaphore
* waits that return due to the receipt of a signal. This version also
* ignores attempts to cancel the thread.
*
****************************************************************************/
static int lpc31_takesem_noncancelable(sem_t *sem)
{
int result;
int ret = OK;
do
{
result = nxsem_wait_uninterruptible(sem);
/* The only expected error is ECANCELED which would occur if the
* calling thread were canceled.
*/
DEBUGASSERT(result == OK || result == -ECANCELED);
if (ret == OK && result < 0)
{
ret = result;
}
}
while (result < 0);
return ret;
}
/****************************************************************************
* Name: lpc31_qh_alloc
*
* Description:
* Allocate a Queue Head (QH) structure by removing it from the free list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1132,7 +1078,7 @@ static struct lpc31_qh_s *lpc31_qh_alloc(void)
* Description:
* Free a Queue Head (QH) structure by returning it to the free list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1153,7 +1099,7 @@ static void lpc31_qh_free(struct lpc31_qh_s *qh)
* Allocate a Queue Element Transfer Descriptor (qTD) by removing it from
* the free list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1180,7 +1126,7 @@ static struct lpc31_qtd_s *lpc31_qtd_alloc(void)
* Free a Queue Element Transfer Descriptor (qTD) by returning it to the
* free list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1629,7 +1575,7 @@ static inline uint8_t lpc31_ehci_speed(uint8_t usbspeed)
* this to minimize race conditions. This logic would have to be expanded
* if we want to have more than one packet in flight at a time!
*
* Assumption: The caller holds tex EHCI exclsem
* Assumption: The caller holds tex EHCI lock
*
****************************************************************************/
@ -1675,7 +1621,7 @@ static int lpc31_ioc_setup(struct lpc31_rhport_s *rhport,
* Description:
* Wait for the IOC event.
*
* Assumption: The caller does *NOT* hold the EHCI exclsem. That would
* Assumption: The caller does *NOT* hold the EHCI lock. That would
* cause a deadlock when the bottom-half, worker thread needs to take the
* semaphore.
*
@ -1691,7 +1637,7 @@ static int lpc31_ioc_wait(struct lpc31_epinfo_s *epinfo)
while (epinfo->iocwait)
{
ret = lpc31_takesem(&epinfo->iocsem);
ret = nxsem_wait_uninterruptible(&epinfo->iocsem);
if (ret < 0)
{
break;
@ -1707,7 +1653,7 @@ static int lpc31_ioc_wait(struct lpc31_epinfo_s *epinfo)
* Description:
* Add a new, ready-to-go QH w/attached qTDs to the asynchronous queue.
*
* Assumptions: The caller holds the EHCI exclsem
* Assumptions: The caller holds the EHCI lock
*
****************************************************************************/
@ -2153,7 +2099,7 @@ static struct lpc31_qtd_s *lpc31_qtd_statusphase(uint32_t tokenbits)
* This is a blocking function; it will not return until the control
* transfer has completed.
*
* Assumption: The caller holds the EHCI exclsem.
* Assumption: The caller holds the EHCI lock.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is return on
@ -2437,7 +2383,7 @@ errout_with_qh:
* frame list), followed by shorter poll rates, with queue heads with a
* poll rate of one, on the very end."
*
* Assumption: The caller holds the EHCI exclsem.
* Assumption: The caller holds the EHCI lock.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is return on
@ -2541,8 +2487,8 @@ errout_with_qh:
* Description:
* Wait for an IN or OUT transfer to complete.
*
* Assumption: The caller holds the EHCI exclsem. The caller must be aware
* that the EHCI exclsem will released while waiting for the transfer to
* Assumption: The caller holds the EHCI lock. The caller must be aware
* that the EHCI lock will released while waiting for the transfer to
* complete, but will be re-acquired when before returning. The state of
* EHCI resources could be very different upon return.
*
@ -2560,27 +2506,27 @@ static ssize_t lpc31_transfer_wait(struct lpc31_epinfo_s *epinfo)
int ret;
int ret2;
/* Release the EHCI semaphore while we wait. Other threads need the
/* Release the EHCI mutex while we wait. Other threads need the
* opportunity to access the EHCI resources while we wait.
*
* REVISIT: Is this safe? NO. This is a bug and needs rethinking.
* We need to lock all of the port-resources (not EHCI common) until
* the transfer is complete. But we can't use the common EHCI exclsem
* the transfer is complete. But we can't use the common EHCI lock
* or we will deadlock while waiting (because the working thread that
* wakes this thread up needs the exclsem).
* wakes this thread up needs the lock).
*/
#warning REVISIT
lpc31_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
/* Wait for the IOC completion event */
ret = lpc31_ioc_wait(epinfo);
/* Re-acquire the EHCI semaphore. The caller expects to be holding
/* Re-acquire the EHCI mutex. The caller expects to be holding
* this upon return.
*/
ret2 = lpc31_takesem_noncancelable(&g_ehci.exclsem);
ret2 = nxmutex_lock(&g_ehci.lock);
if (ret2 < 0)
{
ret = ret2;
@ -2604,9 +2550,7 @@ static ssize_t lpc31_transfer_wait(struct lpc31_epinfo_s *epinfo)
}
#endif
/* Did lpc31_ioc_wait() or lpc31_takesem_noncancelable() report an
* error?
*/
/* Did lpc31_ioc_wait() or nxmutex_lock() report an error? */
if (ret < 0)
{
@ -2913,7 +2857,7 @@ static int lpc31_qh_ioccheck(struct lpc31_qh_s *qh, uint32_t **bp, void *arg)
{
/* Yes... wake it up */
lpc31_givesem(&epinfo->iocsem);
nxsem_post(&epinfo->iocsem);
epinfo->iocwait = 0;
}
@ -3073,7 +3017,7 @@ static int lpc31_qh_cancel(struct lpc31_qh_s *qh, uint32_t **bp, void *arg)
* detected (actual number of bytes received was less than the expected
* number of bytes)."
*
* Assumptions: The caller holds the EHCI exclsem
* Assumptions: The caller holds the EHCI lock
*
****************************************************************************/
@ -3209,7 +3153,7 @@ static inline void lpc31_portsc_bottomhalf(void)
if (g_ehci.pscwait)
{
lpc31_givesem(&g_ehci.pscsem);
nxsem_post(&g_ehci.pscsem);
g_ehci.pscwait = false;
}
}
@ -3249,7 +3193,7 @@ static inline void lpc31_portsc_bottomhalf(void)
if (g_ehci.pscwait)
{
lpc31_givesem(&g_ehci.pscsem);
nxsem_post(&g_ehci.pscsem);
g_ehci.pscwait = false;
}
}
@ -3327,7 +3271,7 @@ static void lpc31_ehci_bottomhalf(void *arg)
* real option (other than to reschedule and delay).
*/
lpc31_takesem_noncancelable(&g_ehci.exclsem);
nxmutex_lock(&g_ehci.lock);
/* Handle all unmasked interrupt sources */
@ -3437,7 +3381,7 @@ static void lpc31_ehci_bottomhalf(void *arg)
/* We are done with the EHCI structures */
lpc31_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
/* Re-enable relevant EHCI interrupts. Interrupts should still be enabled
* at the level of the interrupt controller.
@ -3596,7 +3540,7 @@ static int lpc31_wait(struct usbhost_connection_s *conn,
*/
g_ehci.pscwait = true;
ret = lpc31_takesem(&g_ehci.pscsem);
ret = nxsem_wait_uninterruptible(&g_ehci.pscsem);
if (ret < 0)
{
return ret;
@ -3955,7 +3899,7 @@ static int lpc31_ep0configure(struct usbhost_driver_s *drvr,
/* We must have exclusive access to the EHCI data structures. */
ret = lpc31_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret >= 0)
{
/* Remember the new device address and max packet size */
@ -3964,7 +3908,7 @@ static int lpc31_ep0configure(struct usbhost_driver_s *drvr,
epinfo->speed = speed;
epinfo->maxpacket = maxpacketsize;
lpc31_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
}
return ret;
@ -4328,7 +4272,7 @@ static int lpc31_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
* structures.
*/
ret = lpc31_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return ret;
@ -4342,7 +4286,7 @@ static int lpc31_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
if (ret != OK)
{
usbhost_trace1(EHCI_TRACE1_DEVDISCONNECTED, -ret);
goto errout_with_sem;
goto errout_with_lock;
}
/* Now initiate the transfer */
@ -4357,13 +4301,13 @@ static int lpc31_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
/* And wait for the transfer to complete */
nbytes = lpc31_transfer_wait(ep0info);
lpc31_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
return nbytes >= 0 ? OK : (int)nbytes;
errout_with_iocwait:
ep0info->iocwait = false;
errout_with_sem:
lpc31_givesem(&g_ehci.exclsem);
errout_with_lock:
nxmutex_unlock(&g_ehci.lock);
return ret;
}
@ -4432,7 +4376,7 @@ static ssize_t lpc31_transfer(struct usbhost_driver_s *drvr,
* structures.
*/
ret = lpc31_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return (ssize_t)ret;
@ -4446,7 +4390,7 @@ static ssize_t lpc31_transfer(struct usbhost_driver_s *drvr,
if (ret != OK)
{
usbhost_trace1(EHCI_TRACE1_DEVDISCONNECTED, -ret);
goto errout_with_sem;
goto errout_with_lock;
}
/* Initiate the transfer */
@ -4484,13 +4428,13 @@ static ssize_t lpc31_transfer(struct usbhost_driver_s *drvr,
/* Then wait for the transfer to complete */
nbytes = lpc31_transfer_wait(epinfo);
lpc31_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
return nbytes;
errout_with_iocwait:
epinfo->iocwait = false;
errout_with_sem:
lpc31_givesem(&g_ehci.exclsem);
errout_with_lock:
nxmutex_unlock(&g_ehci.lock);
return (ssize_t)ret;
}
@ -4545,7 +4489,7 @@ static int lpc31_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
* structures.
*/
ret = lpc31_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return ret;
@ -4559,7 +4503,7 @@ static int lpc31_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
if (ret != OK)
{
usbhost_trace1(EHCI_TRACE1_DEVDISCONNECTED, -ret);
goto errout_with_sem;
goto errout_with_lock;
}
/* Initiate the transfer */
@ -4596,14 +4540,14 @@ static int lpc31_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
/* The transfer is in progress */
lpc31_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
return OK;
errout_with_callback:
epinfo->callback = NULL;
epinfo->arg = NULL;
errout_with_sem:
lpc31_givesem(&g_ehci.exclsem);
errout_with_lock:
nxmutex_unlock(&g_ehci.lock);
return ret;
}
#endif /* CONFIG_USBHOST_ASYNCH */
@ -4651,7 +4595,7 @@ static int lpc31_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
* interrupt level.
*/
ret = lpc31_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return ret;
@ -4694,7 +4638,7 @@ static int lpc31_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
#endif
{
ret = OK;
goto errout_with_sem;
goto errout_with_lock;
}
/* Handle the cancellation according to the type of the transfer */
@ -4757,7 +4701,7 @@ static int lpc31_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
default:
usbhost_trace1(EHCI_TRACE1_BADXFRTYPE, epinfo->xfrtype);
ret = -ENOSYS;
goto errout_with_sem;
goto errout_with_lock;
}
/* Find and remove the QH. There are four possibilities:
@ -4787,7 +4731,7 @@ exit_terminate:
/* Yes... wake it up */
DEBUGASSERT(callback == NULL);
lpc31_givesem(&epinfo->iocsem);
nxsem_post(&epinfo->iocsem);
}
/* No.. Is there a pending asynchronous transfer? */
@ -4802,11 +4746,11 @@ exit_terminate:
#else
/* Wake up the waiting thread */
sam_givesem(&epinfo->iocsem);
nxsem_post(&epinfo->iocsem);
#endif
errout_with_sem:
lpc31_givesem(&g_ehci.exclsem);
errout_with_lock:
nxmutex_unlock(&g_ehci.lock);
return ret;
}
@ -4853,7 +4797,7 @@ static int lpc31_connect(struct usbhost_driver_s *drvr,
if (g_ehci.pscwait)
{
g_ehci.pscwait = false;
lpc31_givesem(&g_ehci.pscsem);
nxsem_post(&g_ehci.pscsem);
}
leave_critical_section(flags);
@ -5079,7 +5023,7 @@ struct usbhost_connection_s *lpc31_ehci_initialize(int controller)
/* Initialize the EHCI state data structure */
nxsem_init(&g_ehci.exclsem, 0, 1);
nxmutex_init(&g_ehci.lock);
nxsem_init(&g_ehci.pscsem, 0, 0);
/* The pscsem semaphore is used for signaling and, hence, should not have

11
arch/arm/src/lpc31xx/lpc31_i2c.c
View file

@ -35,6 +35,7 @@
#include <nuttx/arch.h>
#include <nuttx/wdog.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/i2c/i2c_master.h>
@ -69,7 +70,7 @@ struct lpc31_i2cdev_s
uint16_t rstid; /* Reset for this device */
uint16_t irqid; /* IRQ for this device */
sem_t mutex; /* Only one thread can access at a time */
mutex_t lock; /* Only one thread can access at a time */
sem_t wait; /* Place to wait for state machine completion */
volatile uint8_t state; /* State of state machine */
struct wdog_s timeout; /* Watchdog to timeout when bus hung */
@ -473,7 +474,7 @@ static int i2c_transfer(struct i2c_master_s *dev,
/* Get exclusive access to the I2C bus */
nxsem_wait(&priv->mutex);
nxmutex_lock(&priv->lock);
flags = enter_critical_section();
/* Set up for the transfer */
@ -509,7 +510,7 @@ static int i2c_transfer(struct i2c_master_s *dev,
ret = count - priv->nmsg;
leave_critical_section(flags);
nxsem_post(&priv->mutex);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -555,9 +556,9 @@ struct i2c_master_s *lpc31_i2cbus_initialize(int port)
priv->rstid = (port == 0) ? RESETID_I2C0RST : RESETID_I2C1RST;
priv->irqid = (port == 0) ? LPC31_IRQ_I2C0 : LPC31_IRQ_I2C1;
/* Initialize semaphores */
/* Initialize mutex & semaphores */
nxsem_init(&priv->mutex, 0, 1);
nxmutex_init(&priv->lock);
nxsem_init(&priv->wait, 0, 0);
/* The wait semaphore is used for signaling and, hence, should not have

12
arch/arm/src/lpc31xx/lpc31_spi.c
View file

@ -32,7 +32,7 @@
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
@ -72,7 +72,7 @@
struct lpc31_spidev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of work in bits (8 or 16) */
@ -457,11 +457,11 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -964,9 +964,9 @@ struct spi_dev_s *lpc31_spibus_initialize(int port)
lpc31_softreset(RESETID_SPIRSTAPB);
lpc31_softreset(RESETID_SPIRSTIP);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
/* Reset the SPI block */

163
arch/arm/src/lpc43xx/lpc43_ehci.c
View file

@ -36,6 +36,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/wqueue.h>
#include <nuttx/signal.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/usb/usb.h>
#include <nuttx/usb/usbhost.h>
@ -278,7 +279,7 @@ struct lpc43_ehci_s
{
volatile bool pscwait; /* TRUE: Thread is waiting for port status change event */
sem_t exclsem; /* Support mutually exclusive access */
mutex_t lock; /* Support mutually exclusive access */
sem_t pscsem; /* Semaphore to wait for port status change events */
struct lpc43_epinfo_s ep0; /* Endpoint 0 */
@ -419,12 +420,6 @@ static inline void lpc43_putreg(uint32_t regval, volatile uint32_t *regaddr);
static int ehci_wait_usbsts(uint32_t maskbits, uint32_t donebits,
unsigned int delay);
/* Semaphores ***************************************************************/
static int lpc43_takesem(sem_t *sem);
static int lpc43_takesem_noncancelable(sem_t *sem);
#define lpc43_givesem(s) nxsem_post(s);
/* Allocators ***************************************************************/
static struct lpc43_qh_s *lpc43_qh_alloc(void);
@ -1041,61 +1036,13 @@ static int ehci_wait_usbsts(uint32_t maskbits, uint32_t donebits,
return (regval == donebits) ? OK : -ETIMEDOUT;
}
/****************************************************************************
* Name: lpc43_takesem
*
* Description:
* This is just a wrapper to handle the annoying behavior of semaphore
* waits that return due to the receipt of a signal.
*
****************************************************************************/
static int lpc43_takesem(sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
/****************************************************************************
* Name: lpc43_takesem_noncancelable
*
* Description:
* This is just a wrapper to handle the annoying behavior of semaphore
* waits that return due to the receipt of a signal. This version also
* ignores attempts to cancel the thread.
*
****************************************************************************/
static int lpc43_takesem_noncancelable(sem_t *sem)
{
int result;
int ret = OK;
do
{
result = nxsem_wait_uninterruptible(sem);
/* The only expected error is ECANCELED which would occur if the
* calling thread were canceled.
*/
DEBUGASSERT(result == OK || result == -ECANCELED);
if (ret == OK && result < 0)
{
ret = result;
}
}
while (result < 0);
return ret;
}
/****************************************************************************
* Name: lpc43_qh_alloc
*
* Description:
* Allocate a Queue Head (QH) structure by removing it from the free list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1121,7 +1068,7 @@ static struct lpc43_qh_s *lpc43_qh_alloc(void)
* Description:
* Free a Queue Head (QH) structure by returning it to the free list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1142,7 +1089,7 @@ static void lpc43_qh_free(struct lpc43_qh_s *qh)
* Allocate a Queue Element Transfer Descriptor (qTD) by removing it from
* the free list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1169,7 +1116,7 @@ static struct lpc43_qtd_s *lpc43_qtd_alloc(void)
* Free a Queue Element Transfer Descriptor (qTD) by returning it to the
* free list
*
* Assumption: Caller holds the exclsem
* Assumption: Caller holds the lock
*
****************************************************************************/
@ -1527,7 +1474,7 @@ static inline uint8_t lpc43_ehci_speed(uint8_t usbspeed)
* this to minimize race conditions. This logic would have to be expanded
* if we want to have more than one packet in flight at a time!
*
* Assumption: The caller holds tex EHCI exclsem
* Assumption: The caller holds tex EHCI lock
*
****************************************************************************/
@ -1573,7 +1520,7 @@ static int lpc43_ioc_setup(struct lpc43_rhport_s *rhport,
* Description:
* Wait for the IOC event.
*
* Assumption: The caller does *NOT* hold the EHCI exclsem. That would
* Assumption: The caller does *NOT* hold the EHCI lock. That would
* cause a deadlock when the bottom-half, worker thread needs to take the
* semaphore.
*
@ -1589,7 +1536,7 @@ static int lpc43_ioc_wait(struct lpc43_epinfo_s *epinfo)
while (epinfo->iocwait)
{
ret = lpc43_takesem(&epinfo->iocsem);
ret = nxsem_wait_uninterruptible(&epinfo->iocsem);
if (ret < 0)
{
break;
@ -1605,7 +1552,7 @@ static int lpc43_ioc_wait(struct lpc43_epinfo_s *epinfo)
* Description:
* Add a new, ready-to-go QH w/attached qTDs to the asynchronous queue.
*
* Assumptions: The caller holds the EHCI exclsem
* Assumptions: The caller holds the EHCI lock
*
****************************************************************************/
@ -2040,7 +1987,7 @@ static struct lpc43_qtd_s *lpc43_qtd_statusphase(uint32_t tokenbits)
* This is a blocking function; it will not return until the control
* transfer has completed.
*
* Assumption: The caller holds the EHCI exclsem.
* Assumption: The caller holds the EHCI lock.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is return on
@ -2323,7 +2270,7 @@ errout_with_qh:
* frame list), followed by shorter poll rates, with queue heads with a
* poll rate of one, on the very end."
*
* Assumption: The caller holds the EHCI exclsem.
* Assumption: The caller holds the EHCI lock.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is return on
@ -2427,8 +2374,8 @@ errout_with_qh:
* Description:
* Wait for an IN or OUT transfer to complete.
*
* Assumption: The caller holds the EHCI exclsem. The caller must be aware
* that the EHCI exclsem will released while waiting for the transfer to
* Assumption: The caller holds the EHCI lock. The caller must be aware
* that the EHCI lock will released while waiting for the transfer to
* complete, but will be re-acquired when before returning. The state of
* EHCI resources could be very different upon return.
*
@ -2446,35 +2393,33 @@ static ssize_t lpc43_transfer_wait(struct lpc43_epinfo_s *epinfo)
int ret;
int ret2;
/* Release the EHCI semaphore while we wait. Other threads need the
/* Release the EHCI mutex while we wait. Other threads need the
* opportunity to access the EHCI resources while we wait.
*
* REVISIT: Is this safe? NO. This is a bug and needs rethinking.
* We need to lock all of the port-resources (not EHCI common) until
* the transfer is complete. But we can't use the common EHCI exclsem
* the transfer is complete. But we can't use the common EHCI lock
* or we will deadlock while waiting (because the working thread that
* wakes this thread up needs the exclsem).
* wakes this thread up needs the lock).
*/
#warning REVISIT
lpc43_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
/* Wait for the IOC completion event */
ret = lpc43_ioc_wait(epinfo);
/* Re-acquire the EHCI semaphore. The caller expects to be holding
/* Re-acquire the EHCI mutex. The caller expects to be holding
* this upon return.
*/
ret2 = lpc43_takesem_noncancelable(&g_ehci.exclsem);
ret2 = nxmutex_lock(&g_ehci.lock);
if (ret2 < 0)
{
ret = ret2;
}
/* Did lpc43_ioc_wait() or lpc43_takesem_noncancelable()report an
* error?
*/
/* Did lpc43_ioc_wait() or nxmutex_lock()report an error? */
if (ret < 0)
{
@ -2772,7 +2717,7 @@ static int lpc43_qh_ioccheck(struct lpc43_qh_s *qh, uint32_t **bp, void *arg)
{
/* Yes... wake it up */
lpc43_givesem(&epinfo->iocsem);
nxsem_post(&epinfo->iocsem);
epinfo->iocwait = 0;
}
@ -2923,7 +2868,7 @@ static int lpc43_qh_cancel(struct lpc43_qh_s *qh, uint32_t **bp, void *arg)
* detected (actual number of bytes received was less than the expected
* number of bytes)."
*
* Assumptions: The caller holds the EHCI exclsem
* Assumptions: The caller holds the EHCI lock
*
****************************************************************************/
@ -3046,7 +2991,7 @@ static inline void lpc43_portsc_bottomhalf(void)
if (g_ehci.pscwait)
{
lpc43_givesem(&g_ehci.pscsem);
nxsem_post(&g_ehci.pscsem);
g_ehci.pscwait = false;
}
}
@ -3086,7 +3031,7 @@ static inline void lpc43_portsc_bottomhalf(void)
if (g_ehci.pscwait)
{
lpc43_givesem(&g_ehci.pscsem);
nxsem_post(&g_ehci.pscsem);
g_ehci.pscwait = false;
}
}
@ -3164,7 +3109,7 @@ static void lpc43_ehci_bottomhalf(void *arg)
* real option (other than to reschedule and delay).
*/
lpc43_takesem_noncancelable(&g_ehci.exclsem);
nxmutex_lock(&g_ehci.lock);
/* Handle all unmasked interrupt sources */
@ -3274,7 +3219,7 @@ static void lpc43_ehci_bottomhalf(void *arg)
/* We are done with the EHCI structures */
lpc43_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
/* Re-enable relevant EHCI interrupts. Interrupts should still be enabled
* at the level of the interrupt controller.
@ -3433,7 +3378,7 @@ static int lpc43_wait(struct usbhost_connection_s *conn,
*/
g_ehci.pscwait = true;
ret = lpc43_takesem(&g_ehci.pscsem);
ret = nxsem_wait_uninterruptible(&g_ehci.pscsem);
if (ret < 0)
{
return ret;
@ -3792,7 +3737,7 @@ static int lpc43_ep0configure(struct usbhost_driver_s *drvr,
/* We must have exclusive access to the EHCI data structures. */
ret = lpc43_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret >= 0)
{
/* Remember the new device address and max packet size */
@ -3801,7 +3746,7 @@ static int lpc43_ep0configure(struct usbhost_driver_s *drvr,
epinfo->speed = speed;
epinfo->maxpacket = maxpacketsize;
lpc43_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
}
return ret;
@ -4158,7 +4103,7 @@ static int lpc43_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
* structures.
*/
ret = lpc43_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return ret;
@ -4170,7 +4115,7 @@ static int lpc43_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
if (ret != OK)
{
usbhost_trace1(EHCI_TRACE1_DEVDISCONNECTED, -ret);
goto errout_with_sem;
goto errout_with_lock;
}
/* Now initiate the transfer */
@ -4185,13 +4130,13 @@ static int lpc43_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
/* And wait for the transfer to complete */
nbytes = lpc43_transfer_wait(ep0info);
lpc43_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
return nbytes >= 0 ? OK : (int)nbytes;
errout_with_iocwait:
ep0info->iocwait = false;
errout_with_sem:
lpc43_givesem(&g_ehci.exclsem);
errout_with_lock:
nxmutex_unlock(&g_ehci.lock);
return ret;
}
@ -4260,7 +4205,7 @@ static ssize_t lpc43_transfer(struct usbhost_driver_s *drvr,
* data structures.
*/
ret = lpc43_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return (ssize_t)ret;
@ -4272,7 +4217,7 @@ static ssize_t lpc43_transfer(struct usbhost_driver_s *drvr,
if (ret != OK)
{
usbhost_trace1(EHCI_TRACE1_DEVDISCONNECTED, -ret);
goto errout_with_sem;
goto errout_with_lock;
}
/* Initiate the transfer */
@ -4310,13 +4255,13 @@ static ssize_t lpc43_transfer(struct usbhost_driver_s *drvr,
/* Then wait for the transfer to complete */
nbytes = lpc43_transfer_wait(epinfo);
lpc43_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
return nbytes;
errout_with_iocwait:
epinfo->iocwait = false;
errout_with_sem:
lpc43_givesem(&g_ehci.exclsem);
errout_with_lock:
nxmutex_unlock(&g_ehci.lock);
return (ssize_t)ret;
}
@ -4371,7 +4316,7 @@ static int lpc43_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
* data structures.
*/
ret = lpc43_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return ret;
@ -4383,7 +4328,7 @@ static int lpc43_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
if (ret != OK)
{
usbhost_trace1(EHCI_TRACE1_DEVDISCONNECTED, -ret);
goto errout_with_sem;
goto errout_with_lock;
}
/* Initiate the transfer */
@ -4420,14 +4365,14 @@ static int lpc43_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
/* The transfer is in progress */
lpc43_givesem(&g_ehci.exclsem);
nxmutex_unlock(&g_ehci.lock);
return OK;
errout_with_callback:
epinfo->callback = NULL;
epinfo->arg = NULL;
errout_with_sem:
lpc43_givesem(&g_ehci.exclsem);
errout_with_lock:
nxmutex_unlock(&g_ehci.lock);
return ret;
}
#endif /* CONFIG_USBHOST_ASYNCH */
@ -4475,7 +4420,7 @@ static int lpc43_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
* interrupt level.
*/
ret = lpc43_takesem(&g_ehci.exclsem);
ret = nxmutex_lock(&g_ehci.lock);
if (ret < 0)
{
return ret;
@ -4518,7 +4463,7 @@ static int lpc43_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
#endif
{
ret = OK;
goto errout_with_sem;
goto errout_with_lock;
}
/* Handle the cancellation according to the type of the transfer */
@ -4581,7 +4526,7 @@ static int lpc43_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
default:
usbhost_trace1(EHCI_TRACE1_BADXFRTYPE, epinfo->xfrtype);
ret = -ENOSYS;
goto errout_with_sem;
goto errout_with_lock;
}
/* Find and remove the QH. There are four possibilities:
@ -4611,7 +4556,7 @@ exit_terminate:
/* Yes... wake it up */
DEBUGASSERT(callback == NULL);
lpc43_givesem(&epinfo->iocsem);
nxsem_post(&epinfo->iocsem);
}
/* No.. Is there a pending asynchronous transfer? */
@ -4626,11 +4571,11 @@ exit_terminate:
#else
/* Wake up the waiting thread */
lpc43_givesem(&epinfo->iocsem);
nxsem_post(&epinfo->iocsem);
#endif
errout_with_sem:
lpc43_givesem(&g_ehci.exclsem);
errout_with_lock:
nxmutex_unlock(&g_ehci.lock);
return ret;
}
@ -4677,7 +4622,7 @@ static int lpc43_connect(struct usbhost_driver_s *drvr,
if (g_ehci.pscwait)
{
g_ehci.pscwait = false;
lpc43_givesem(&g_ehci.pscsem);
nxsem_post(&g_ehci.pscsem);
}
leave_critical_section(flags);
@ -4903,7 +4848,7 @@ struct usbhost_connection_s *lpc43_ehci_initialize(int controller)
/* Initialize the EHCI state data structure */
nxsem_init(&g_ehci.exclsem, 0, 1);
nxmutex_init(&g_ehci.lock);
nxsem_init(&g_ehci.pscsem, 0, 0);
/* The pscsem semaphore is used for signaling and, hence, should not have

9
arch/arm/src/lpc43xx/lpc43_gpdma.c
View file

@ -32,6 +32,7 @@
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include "arm_internal.h"
#include "chip.h"
@ -66,7 +67,7 @@ struct lpc43_dmach_s
struct lpc43_gpdma_s
{
sem_t exclsem; /* For exclusive access to the DMA channel list */
mutex_t lock; /* For exclusive access to the DMA channel list */
/* This is the state of each DMA channel */
@ -290,7 +291,7 @@ void weak_function arm_dma_initialize(void)
/* Initialize the DMA state structure */
nxsem_init(&g_gpdma.exclsem, 0, 1);
nxmutex_init(&g_gpdma.lock);
for (i = 0; i < LPC43_NDMACH; i++)
{
@ -379,7 +380,7 @@ DMA_HANDLE lpc43_dmachannel(void)
/* Get exclusive access to the GPDMA state structure */
ret = nxsem_wait_uninterruptible(&g_gpdma.exclsem);
ret = nxmutex_lock(&g_gpdma.lock);
if (ret < 0)
{
return NULL;
@ -401,7 +402,7 @@ DMA_HANDLE lpc43_dmachannel(void)
/* Return what we found (or not) */
nxsem_post(&g_gpdma.exclsem);
nxmutex_unlock(&g_gpdma.lock);
return (DMA_HANDLE)dmach;
}

11
arch/arm/src/lpc43xx/lpc43_i2c.c
View file

@ -63,6 +63,7 @@
#include <nuttx/arch.h>
#include <nuttx/wdog.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/i2c/i2c_master.h>
@ -103,7 +104,7 @@ struct lpc43_i2cdev_s
uint16_t irqid; /* IRQ for this device */
uint32_t base_freq; /* branch frequency */
sem_t mutex; /* Only one thread can access at a time */
mutex_t lock; /* Only one thread can access at a time */
sem_t wait; /* Place to wait for state machine completion */
volatile uint8_t state; /* State of state machine */
struct wdog_s timeout; /* watchdog to timeout when bus hung */
@ -387,7 +388,7 @@ static int lpc43_i2c_transfer(struct i2c_master_s *dev,
/* Get exclusive access to the I2C bus */
nxsem_wait(&priv->mutex);
nxmutex_lock(&priv->lock);
/* Set up for the transfer */
@ -408,7 +409,7 @@ static int lpc43_i2c_transfer(struct i2c_master_s *dev,
ret = lpc43_i2c_start(priv);
nxsem_post(&priv->mutex);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -527,9 +528,9 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port)
putreg32(I2C_CONSET_I2EN, priv->base + LPC43_I2C_CONSET_OFFSET);
/* Initialize semaphores */
/* Initialize mutex & semaphores */
nxsem_init(&priv->mutex, 0, 1);
nxmutex_init(&priv->lock);
nxsem_init(&priv->wait, 0, 0);
/* The wait semaphore is used for signaling and, hence, should not have

27
arch/arm/src/lpc43xx/lpc43_sdmmc.c
View file

@ -251,8 +251,6 @@ static void lpc43_putreg(uint32_t val, uint32_t addr);
/* Low-level helpers ********************************************************/
static int lpc43_takesem(struct lpc43_dev_s *priv);
#define lpc43_givesem(priv) (nxsem_post(&priv->waitsem))
static inline void lpc43_setclock(uint32_t clkdiv);
static inline void lpc43_sdcard_clock(bool enable);
static int lpc43_ciu_sendcmd(uint32_t cmd, uint32_t arg);
@ -493,27 +491,6 @@ static void lpc43_putreg(uint32_t val, uint32_t addr)
}
#endif
/****************************************************************************
* Name: lpc43_takesem
*
* Description:
* Take the wait semaphore (handling false alarm wakeups due to the receipt
* of signals).
*
* Input Parameters:
* dev - Instance of the SD card device driver state structure.
*
* Returned Value:
* Normally OK, but may return -ECANCELED in the rare event that the task
* has been canceled.
*
****************************************************************************/
static int lpc43_takesem(struct lpc43_dev_s *priv)
{
return nxsem_wait_uninterruptible(&priv->waitsem);
}
/****************************************************************************
* Name: lpc43_setclock
*
@ -869,7 +846,7 @@ static void lpc43_endwait(struct lpc43_dev_s *priv,
/* Wake up the waiting thread */
lpc43_givesem(priv);
nxsem_post(&priv->waitsem);
}
/****************************************************************************
@ -2308,7 +2285,7 @@ static sdio_eventset_t lpc43_eventwait(struct sdio_dev_s *dev)
* incremented and there will be no wait.
*/
ret = lpc43_takesem(priv);
ret = nxsem_wait_uninterruptible(&priv->waitsem);
if (ret < 0)
{
/* Task canceled. Cancel the wdog -- assuming it was started and

12
arch/arm/src/lpc43xx/lpc43_spi.c
View file

@ -33,7 +33,7 @@
#include <arch/board/board.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include "arm_internal.h"
@ -73,7 +73,7 @@
struct lpc43_spidev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (8 to 16) */
@ -171,11 +171,11 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -533,9 +533,9 @@ static struct spi_dev_s *lpc43_spiport_initialize(int port)
spi_setfrequency((struct spi_dev_s *)priv, 400000);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
return &priv->spidev;
}
#endif /* CONFIG_LPC43_SPI */

12
arch/arm/src/lpc43xx/lpc43_ssp.c
View file

@ -35,7 +35,7 @@
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include "arm_internal.h"
@ -63,7 +63,7 @@ struct lpc43_sspdev_s
#ifdef CONFIG_LPC43_SSP_INTERRUPTS
uint8_t sspirq; /* SPI IRQ number */
#endif
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (4 to 16) */
@ -274,11 +274,11 @@ static int ssp_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -827,9 +827,9 @@ struct spi_dev_s *lpc43_sspbus_initialize(int port)
ssp_setfrequency((struct spi_dev_s *)priv, 400000);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
/* Enable the SPI */

13
arch/arm/src/lpc54xx/lpc54_dma.c
View file

@ -32,6 +32,7 @@
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include "arm_internal.h"
#include "hardware/lpc54_inputmux.h"
@ -59,7 +60,7 @@ struct lpc54_dmach_s
struct lpc54_dma_s
{
sem_t exclsem; /* For exclusive access to the DMA channel list */
mutex_t lock; /* For exclusive access to the DMA channel list */
/* This is the state of each DMA channel */
@ -233,7 +234,7 @@ void weak_function arm_dma_initialize(void)
/* Initialize the DMA state structure */
nxsem_init(&g_dma.exclsem, 0, 1);
nxmutex_init(&g_dma.lock);
/* Set the SRAMBASE to the beginning a array of DMA descriptors, one for
* each DMA channel.
@ -295,7 +296,7 @@ int lpc54_dma_setup(int ch, uint32_t cfg, uint32_t xfrcfg, uint8_t trigsrc,
/* Get exclusive access to the DMA data structures and interface */
ret = nxsem_wait(&g_dma.exclsem);
ret = nxmutex_lock(&g_dma.lock);
if (ret < 0)
{
return ret;
@ -307,7 +308,7 @@ int lpc54_dma_setup(int ch, uint32_t cfg, uint32_t xfrcfg, uint8_t trigsrc,
if (dmach->inuse)
{
ret = -EBUSY;
goto errout_with_exclsem;
goto errout_with_excllock;
}
dmach->inuse = true;
@ -437,8 +438,8 @@ int lpc54_dma_setup(int ch, uint32_t cfg, uint32_t xfrcfg, uint8_t trigsrc,
putreg32(xfrcfg, base + LPC54_DMA_XFERCFG_OFFSET);
ret = OK;
errout_with_exclsem:
nxsem_post(&g_dma.exclsem);
errout_with_excllock:
nxmutex_unlock(&g_dma.lock);
return ret;
}

11
arch/arm/src/lpc54xx/lpc54_i2c_master.c
View file

@ -58,6 +58,7 @@
#include <nuttx/arch.h>
#include <nuttx/wdog.h>
#include <nuttx/clock.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/i2c/i2c_master.h>
@ -136,7 +137,7 @@ struct lpc54_i2cdev_s
int16_t nmsgs; /* Number of transfer remaining */
int16_t result; /* The result of the transfer */
sem_t exclsem; /* Only one thread can access at a time */
mutex_t lock; /* Only one thread can access at a time */
#ifndef CONFIG_I2C_POLLED
sem_t waitsem; /* Supports wait for state machine completion */
uint16_t irq; /* Flexcomm IRQ number */
@ -756,7 +757,7 @@ static int lpc54_i2c_transfer(struct i2c_master_s *dev,
/* Get exclusive access to the I2C bus */
nxsem_wait(&priv->exclsem);
nxmutex_lock(&priv->lock);
/* Set up for the transfer */
@ -789,7 +790,7 @@ static int lpc54_i2c_transfer(struct i2c_master_s *dev,
ret = priv->result;
i2cinfo("Done, result=%d\n", ret);
nxsem_post(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -1206,9 +1207,9 @@ struct i2c_master_s *lpc54_i2cbus_initialize(int port)
lpc54_i2c_setfrequency(priv, I2C_DEFAULT_FREQUENCY);
/* Initialize semaphores */
/* Initialize mutex & semaphores */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
#ifndef CONFIG_I2C_POLLED
nxsem_init(&priv->waitsem, 0, 0);

12
arch/arm/src/lpc54xx/lpc54_rng.c
View file

@ -27,7 +27,7 @@
#include <stdint.h>
#include <nuttx/irq.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/fs/fs.h>
#include <nuttx/drivers/drivers.h>
@ -48,7 +48,7 @@ static ssize_t lpc54_read(struct file *filep, char *buffer, size_t);
struct rng_dev_s
{
sem_t rd_devsem; /* Threads can only exclusively access the RNG */
mutex_t rd_devlock; /* Threads can only exclusively access the RNG */
};
/****************************************************************************
@ -93,7 +93,7 @@ static ssize_t lpc54_read(struct file *filep, char *buffer, size_t buflen)
/* Get exclusive access to ROM random number generator API */
ret = nxsem_wait(&g_rngdev.rd_devsem);
ret = nxmutex_lock(&g_rngdev.rd_devlock);
if (ret < 0)
{
return ret;
@ -119,7 +119,7 @@ static ssize_t lpc54_read(struct file *filep, char *buffer, size_t buflen)
}
}
nxsem_post(&g_rngdev.rd_devsem);
nxmutex_unlock(&g_rngdev.rd_devlock);
return buflen;
}
@ -145,7 +145,7 @@ static ssize_t lpc54_read(struct file *filep, char *buffer, size_t buflen)
#ifdef CONFIG_DEV_RANDOM
void devrandom_register(void)
{
nxsem_init(&g_rngdev.rd_devsem, 0, 1);
nxmutex_init(&g_rngdev.rd_devlock);
register_driver("/dev/random", &g_rngops, 0444, NULL);
}
#endif
@ -168,7 +168,7 @@ void devrandom_register(void)
void devurandom_register(void)
{
#ifndef CONFIG_DEV_RANDOM
nxsem_init(&g_rngdev.rd_devsem, 0, 1);
nxmutex_init(&g_rngdev.rd_devlock);
#endif
register_driver("/dev/urandom", &g_rngops, 0444, NULL);
}

19
arch/arm/src/lpc54xx/lpc54_rtc_lowerhalf.c
View file

@ -31,6 +31,7 @@
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include <nuttx/timers/rtc.h>
#include "arm_internal.h"
@ -67,7 +68,7 @@ struct lpc54_lowerhalf_s
* this file.
*/
sem_t devsem; /* Threads can only exclusively access the RTC */
mutex_t devlock; /* Threads can only exclusively access the RTC */
#ifdef CONFIG_RTC_ALARM
/* Alarm callback information */
@ -307,7 +308,7 @@ static int lpc54_setalarm(struct rtc_lowerhalf_s *lower,
DEBUGASSERT(lower != NULL && alarminfo != NULL && alarminfo->id == 0);
priv = (struct lpc54_lowerhalf_s *)lower;
ret = nxsem_wait(&priv->devsem);
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
{
return ret;
@ -339,7 +340,7 @@ static int lpc54_setalarm(struct rtc_lowerhalf_s *lower,
}
}
nxsem_post(&priv->devsem);
nxmutex_unlock(&priv->devlock);
return ret;
}
#endif
@ -556,17 +557,16 @@ static int lpc54_setperiodic(struct rtc_lowerhalf_s *lower,
DEBUGASSERT(lower != NULL && alarminfo != NULL);
priv = (struct lpc54_lowerhalf_s *)lower;
ret = nxsem_wait(&priv->devsem);
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
{
return ret;
}
memcpy(&priv->periodic, alarminfo, sizeof(struct lower_setperiodic_s));
ret = lpc54_rtc_setperiodic(&alarminfo->period, lpc54_periodic_callback);
nxsem_post(&priv->devsem);
nxmutex_unlock(&priv->devlock);
return ret;
}
#endif
@ -598,7 +598,7 @@ static int lpc54_cancelperiodic(struct rtc_lowerhalf_s *lower, int id)
DEBUGASSERT(id == 0);
ret = nxsem_wait(&priv->devsem);
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
{
return ret;
@ -606,7 +606,7 @@ static int lpc54_cancelperiodic(struct rtc_lowerhalf_s *lower, int id)
ret = lpc54_rtc_cancelperiodic();
nxsem_post(&priv->devsem);
nxmutex_unlock(&priv->devlock);
return ret;
}
#endif
@ -639,8 +639,7 @@ static int lpc54_cancelperiodic(struct rtc_lowerhalf_s *lower, int id)
struct rtc_lowerhalf_s *lpc54_rtc_lowerhalf(void)
{
nxsem_init(&g_rtc_lowerhalf.devsem, 0, 1);
nxmutex_init(&g_rtc_lowerhalf.devlock);
return (struct rtc_lowerhalf_s *)&g_rtc_lowerhalf;
}

27
arch/arm/src/lpc54xx/lpc54_sdmmc.c
View file

@ -251,8 +251,6 @@ static void lpc54_putreg(uint32_t val, uint32_t addr);
/* Low-level helpers ********************************************************/
static int lpc54_takesem(struct lpc54_dev_s *priv);
#define lpc54_givesem(priv) (nxsem_post(&priv->waitsem))
static inline void lpc54_setclock(uint32_t clkdiv);
static inline void lpc54_sdcard_clock(bool enable);
static int lpc54_ciu_sendcmd(uint32_t cmd, uint32_t arg);
@ -493,27 +491,6 @@ static void lpc54_putreg(uint32_t val, uint32_t addr)
}
#endif
/****************************************************************************
* Name: lpc54_takesem
*
* Description:
* Take the wait semaphore (handling false alarm wakeups due to the receipt
* of signals).
*
* Input Parameters:
* dev - Instance of the SD card device driver state structure.
*
* Returned Value:
* Normally OK, but may return -ECANCELED in the rare event that the task
* has been canceled.
*
****************************************************************************/
static int lpc54_takesem(struct lpc54_dev_s *priv)
{
return nxsem_wait_uninterruptible(&priv->waitsem);
}
/****************************************************************************
* Name: lpc54_setclock
*
@ -865,7 +842,7 @@ static void lpc54_endwait(struct lpc54_dev_s *priv,
/* Wake up the waiting thread */
lpc54_givesem(priv);
nxsem_post(&priv->waitsem);
}
/****************************************************************************
@ -2304,7 +2281,7 @@ static sdio_eventset_t lpc54_eventwait(struct sdio_dev_s *dev)
* incremented and there will be no wait.
*/
ret = lpc54_takesem(priv);
ret = nxsem_wait_uninterruptible(&priv->waitsem);
if (ret < 0)
{
/* Task canceled. Cancel the wdog (assuming it was started) and

12
arch/arm/src/lpc54xx/lpc54_spi_master.c
View file

@ -43,7 +43,7 @@
#include <arch/board/board.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include "arm_internal.h"
@ -82,7 +82,7 @@ struct lpc54_spidev_s
{
struct spi_dev_s dev; /* Externally visible part of the SPI interface */
uintptr_t base; /* Base address of Flexcomm registers */
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint32_t fclock; /* Flexcomm function clock frequency */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
@ -1254,11 +1254,11 @@ static int lpc54_spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -2016,9 +2016,9 @@ struct spi_dev_s *lpc54_spibus_initialize(int port)
priv->nbits = 8;
priv->mode = SPIDEV_MODE0;
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
/* Configure master mode in mode 0:
*

127
arch/arm/src/lpc54xx/lpc54_usb0_ohci.c
View file

@ -36,7 +36,7 @@
#include <nuttx/arch.h>
#include <nuttx/signal.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/usb/usb.h>
#include <nuttx/usb/ohci.h>
#include <nuttx/usb/usbhost.h>
@ -260,7 +260,7 @@ struct lpc54_usbhost_s
uint8_t outinterval; /* Minimum periodic IN EP polling interval: 2, 4, 6, 16, or 32 */
#endif
sem_t exclsem; /* Support mutually exclusive access */
mutex_t lock; /* Support mutually exclusive access */
sem_t pscsem; /* Semaphore to wait Writeback Done Head event */
#ifdef CONFIG_OHCI_HUB
@ -366,12 +366,6 @@ static void lpc54_putreg(uint32_t val, uint32_t addr);
# define lpc54_putreg(val,addr) putreg32(val,addr)
#endif
/* Semaphores ***************************************************************/
static int lpc54_takesem(sem_t *sem);
static int lpc54_takesem_noncancelable(sem_t *sem);
#define lpc54_givesem(s) nxsem_post(s);
/* Byte stream access helper functions **************************************/
static inline uint16_t lpc54_getle16(const uint8_t *val);
@ -676,54 +670,6 @@ static void lpc54_putreg(uint32_t val, uint32_t addr)
}
#endif
/****************************************************************************
* Name: lpc54_takesem
*
* Description:
* This is just a wrapper to handle the annoying behavior of semaphore
* waits that return due to the receipt of a signal.
*
****************************************************************************/
static int lpc54_takesem(sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
/****************************************************************************
* Name: lpc54_takesem_noncancelable
*
* Description:
* This is just a wrapper to handle the annoying behavior of semaphore
* waits that return due to the receipt of a signal. This version also
* ignores attempts to cancel the thread.
*
****************************************************************************/
static int lpc54_takesem_noncancelable(sem_t *sem)
{
int result;
int ret = OK;
do
{
result = nxsem_wait_uninterruptible(sem);
/* The only expected error is ECANCELED which would occur if the
* calling thread were canceled.
*/
DEBUGASSERT(result == OK || result == -ECANCELED);
if (ret == OK && result < 0)
{
ret = result;
}
}
while (result < 0);
return ret;
}
/****************************************************************************
* Name: lpc54_getle16
*
@ -1746,7 +1692,7 @@ static int lpc54_ctrltd(struct lpc54_usbhost_s *priv, struct lpc54_ed_s *ed,
/* Wait for the Writeback Done Head interrupt */
ret = lpc54_takesem(&ed->wdhsem);
ret = nxsem_wait_uninterruptible(&ed->wdhsem);
if (ret < 0)
{
/* Task has been canceled */
@ -1843,7 +1789,7 @@ static int lpc54_usbinterrupt(int irq, void *context, void *arg)
if (priv->pscwait)
{
lpc54_givesem(&priv->pscsem);
nxsem_post(&priv->pscsem);
priv->pscwait = false;
}
}
@ -1902,7 +1848,7 @@ static int lpc54_usbinterrupt(int irq, void *context, void *arg)
if (priv->pscwait)
{
lpc54_givesem(&priv->pscsem);
nxsem_post(&priv->pscsem);
priv->pscwait = false;
}
}
@ -2037,7 +1983,7 @@ static int lpc54_usbinterrupt(int irq, void *context, void *arg)
{
/* Wake up the thread waiting for the WDH event */
lpc54_givesem(&ed->wdhsem);
nxsem_post(&ed->wdhsem);
xfrinfo->wdhwait = false;
}
@ -2162,7 +2108,7 @@ static int lpc54_wait(struct usbhost_connection_s *conn,
/* Wait for the next connection event */
priv->pscwait = true;
ret = lpc54_takesem(&priv->pscsem);
ret = nxsem_wait_uninterruptible(&priv->pscsem);
if (ret < 0)
{
return ret;
@ -2315,7 +2261,7 @@ static int lpc54_ep0configure(struct usbhost_driver_s *drvr,
/* We must have exclusive access to EP0 and the control list */
ret = lpc54_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2333,8 +2279,7 @@ static int lpc54_ep0configure(struct usbhost_driver_s *drvr,
}
ed->hw.ctrl = hwctrl;
lpc54_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
uinfo("EP0 CTRL:%08x\n", ed->hw.ctrl);
return OK;
@ -2381,7 +2326,7 @@ static int lpc54_epalloc(struct usbhost_driver_s *drvr,
* periodic list, and the interrupt table.
*/
ret = lpc54_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2504,7 +2449,7 @@ static int lpc54_epalloc(struct usbhost_driver_s *drvr,
}
}
lpc54_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -2543,7 +2488,7 @@ static int lpc54_epfree(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
* periodic list and the interrupt table.
*/
ret = lpc54_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2581,7 +2526,7 @@ static int lpc54_epfree(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
/* Put the ED back into the free list */
lpc54_edfree(ed);
lpc54_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -2627,7 +2572,7 @@ static int lpc54_alloc(struct usbhost_driver_s *drvr,
/* We must have exclusive access to the transfer buffer pool */
ret = lpc54_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2642,7 +2587,7 @@ static int lpc54_alloc(struct usbhost_driver_s *drvr,
ret = OK;
}
lpc54_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -2679,9 +2624,9 @@ static int lpc54_free(struct usbhost_driver_s *drvr, uint8_t *buffer)
/* We must have exclusive access to the transfer buffer pool */
ret = lpc54_takesem_noncancelable(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
lpc54_tbfree(buffer);
lpc54_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -2824,7 +2769,7 @@ static int lpc54_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
/* We must have exclusive access to EP0 and the control list */
ret = lpc54_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2846,7 +2791,7 @@ static int lpc54_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
}
}
lpc54_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -2867,7 +2812,7 @@ static int lpc54_ctrlout(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
/* We must have exclusive access to EP0 and the control list */
ret = lpc54_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2890,7 +2835,7 @@ static int lpc54_ctrlout(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
}
}
lpc54_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -3162,7 +3107,7 @@ static ssize_t lpc54_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
* table.
*/
ret = lpc54_takesem(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return (ssize_t)ret;
@ -3179,7 +3124,7 @@ static ssize_t lpc54_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
{
uerr("ERROR: lpc54_alloc_xfrinfo failed\n");
nbytes = -ENOMEM;
goto errout_with_sem;
goto errout_with_lock;
}
/* Initialize the transfer structure */
@ -3234,7 +3179,7 @@ static ssize_t lpc54_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
/* Wait for the Writeback Done Head interrupt */
ret = lpc54_takesem(&ed->wdhsem);
ret = nxsem_wait_uninterruptible(&ed->wdhsem);
if (ret < 0)
{
nbytes = (ssize_t)ret;
@ -3294,8 +3239,8 @@ errout_with_xfrinfo:
lpc54_free_xfrinfo(xfrinfo);
ed->xfrinfo = NULL;
errout_with_sem:
lpc54_givesem(&priv->exclsem);
errout_with_lock:
nxmutex_unlock(&priv->lock);
return nbytes;
}
@ -3442,7 +3387,7 @@ static int lpc54_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
* table.
*/
ret lpc54_takesem(&priv->exclsem);
ret nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -3459,7 +3404,7 @@ static int lpc54_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
{
uerr("ERROR: lpc54_alloc_xfrinfo failed\n");
ret = -ENOMEM;
goto errout_with_sem;
goto errout_with_lock;
}
/* Initialize the transfer structure */
@ -3479,7 +3424,7 @@ static int lpc54_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
if (ret < 0)
{
uerr("ERROR: lpc54_dma_alloc failed: %d\n", ret);
goto errout_with_sem;
goto errout_with_lock;
}
/* If a buffer was allocated, then use it instead of the callers buffer */
@ -3503,7 +3448,7 @@ static int lpc54_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
* completes.
*/
lpc54_givesem(&priv->exclsem);
nxmutex_unlock(&priv->lock);
return OK;
errout_with_asynch:
@ -3518,8 +3463,8 @@ errout_with_asynch:
lpc54_free_xfrinfo(xfrinfo);
ed->xfrinfo = NULL;
errout_with_sem:
lpc54_givesem(&priv->exclsem);
errout_with_lock:
nxmutex_unlock(&priv->lock);
return ret;
}
#endif /* CONFIG_OHCI_ASYNCH */
@ -3641,7 +3586,7 @@ static int lpc54_cancel(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
/* Wake up the waiting thread */
lpc54_givesem(&ed->wdhsem);
nxsem_post(&ed->wdhsem);
xfrinfo->wdhwait = false;
/* And free the transfer structure */
@ -3718,7 +3663,7 @@ static int lpc54_connect(struct usbhost_driver_s *drvr,
if (priv->pscwait)
{
priv->pscwait = false;
lpc54_givesem(&priv->pscsem);
nxsem_post(&priv->pscsem);
}
leave_critical_section(flags);
@ -3884,10 +3829,10 @@ struct usbhost_connection_s *lpc54_usbhost_initialize(int controller)
usbhost_devaddr_initialize(&priv->rhport);
/* Initialize semaphores */
/* Initialize semaphores & mutex */
nxsem_init(&priv->pscsem, 0, 0);
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
/* The pscsem semaphore is used for signaling and, hence, should not have
* priority inheritance enabled.

22
arch/arm/src/max326xx/common/max326_rtc_lowerhalf.c
View file

@ -31,6 +31,7 @@
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include <nuttx/timers/rtc.h>
#include "arm_internal.h"
@ -73,7 +74,7 @@ struct max326_lowerhalf_s
* this file.
*/
sem_t devsem; /* Threads can only exclusively access the RTC */
mutex_t devlock; /* Threads can only exclusively access the RTC */
#ifdef CONFIG_RTC_ALARM
/* Alarm callback information */
@ -369,7 +370,7 @@ static int max326_setalarm(struct rtc_lowerhalf_s *lower,
DEBUGASSERT(lower != NULL && alarminfo != NULL && alarminfo->id == 0);
priv = (struct max326_lowerhalf_s *)lower;
ret = nxsem_wait(&priv->devsem);
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
{
return ret;
@ -401,8 +402,7 @@ static int max326_setalarm(struct rtc_lowerhalf_s *lower,
}
}
nxsem_post(&priv->devsem);
nxmutex_unlock(&priv->devlock);
return ret;
}
#endif
@ -665,18 +665,16 @@ static int max326_setperiodic(struct rtc_lowerhalf_s *lower,
DEBUGASSERT(lower != NULL && alarminfo != NULL);
priv = (struct max326_lowerhalf_s *)lower;
ret = nxsem_wait(&priv->devsem);
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
{
return ret;
}
memcpy(&priv->periodic, alarminfo, sizeof(struct lower_setperiodic_s));
ret = max326_rtc_setperiodic(&alarminfo->period, max326_periodic_callback);
nxsem_post(&priv->devsem);
nxmutex_unlock(&priv->devlock);
return ret;
}
#endif
@ -708,7 +706,7 @@ static int max326_cancelperiodic(struct rtc_lowerhalf_s *lower, int id)
DEBUGASSERT(id == 0);
ret = nxsem_wait(&priv->devsem);
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
{
return ret;
@ -716,8 +714,7 @@ static int max326_cancelperiodic(struct rtc_lowerhalf_s *lower, int id)
ret = max326_rtc_cancelperiodic();
nxsem_post(&priv->devsem);
nxmutex_unlock(&priv->devlock);
return ret;
}
#endif
@ -750,8 +747,7 @@ static int max326_cancelperiodic(struct rtc_lowerhalf_s *lower, int id)
struct rtc_lowerhalf_s *max326_rtc_lowerhalf(void)
{
nxsem_init(&g_rtc_lowerhalf.devsem, 0, 1);
nxmutex_init(&g_rtc_lowerhalf.devlock);
return (struct rtc_lowerhalf_s *)&g_rtc_lowerhalf;
}

12
arch/arm/src/max326xx/max32660/max32660_spim.c
View file

@ -57,7 +57,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include "arm_internal.h"
@ -97,7 +97,7 @@ struct max326_spidev_s
uint32_t base; /* SPI base address */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint16_t rxbytes; /* Number of bytes received into rxbuffer */
uint16_t txbytes; /* Number of bytes sent from txbuffer */
uint16_t xfrlen; /* Transfer length */
@ -820,11 +820,11 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -1433,9 +1433,9 @@ static void spi_bus_initialize(struct max326_spidev_s *priv)
regval = priv->wire3 ? SPI_CTRL2_DATWIDTH_SINGLE : SPI_CTRL2_DATWIDTH_DUAL;
spi_modify_ctrl2(priv, regval, SPI_CTRL2_DATWIDTH_MASK);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
/* Disable all interrupts at the peripheral */

77
arch/arm/src/nrf52/nrf52_i2c.c
View file

@ -30,7 +30,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/kmalloc.h>
#include <arch/board/board.h>
@ -73,13 +73,13 @@ struct nrf52_i2c_priv_s
uint8_t copy_buf[CONFIG_NRF52_I2C_MASTER_COPY_BUF_SIZE];
#endif
uint32_t freq; /* Current I2C frequency */
int dcnt; /* Current message length */
uint16_t flags; /* Current message flags */
uint16_t addr; /* Current I2C address */
sem_t sem_excl; /* Mutual exclusion semaphore */
uint32_t freq; /* Current I2C frequency */
int dcnt; /* Current message length */
uint16_t flags; /* Current message flags */
uint16_t addr; /* Current I2C address */
mutex_t lock; /* Mutual exclusion mutex */
#ifndef CONFIG_I2C_POLLED
sem_t sem_isr; /* Interrupt wait semaphore */
sem_t sem_isr; /* Interrupt wait semaphore */
#endif
};
@ -129,7 +129,9 @@ static struct nrf52_i2c_priv_s g_nrf52_i2c0_priv =
.scl_pin = BOARD_I2C0_SCL_PIN,
.sda_pin = BOARD_I2C0_SDA_PIN,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
.irq = NRF52_IRQ_SPI_TWI_0,
#endif
.msgc = 0,
@ -152,7 +154,9 @@ static struct nrf52_i2c_priv_s g_nrf52_i2c1_priv =
.scl_pin = BOARD_I2C1_SCL_PIN,
.sda_pin = BOARD_I2C1_SDA_PIN,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
.irq = NRF52_IRQ_SPI_TWI_1,
#endif
.msgc = 0,
@ -217,7 +221,7 @@ static int nrf52_i2c_transfer(struct i2c_master_s *dev,
uint8_t *pack_buf = NULL;
#endif
ret = nxsem_wait(&priv->sem_excl);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -516,7 +520,7 @@ errout:
}
#endif
nxsem_post(&priv->sem_excl);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -694,52 +698,6 @@ static int nrf52_i2c_init(struct nrf52_i2c_priv_s *priv)
return OK;
}
/****************************************************************************
* Name: nrf52_i2c_sem_init
*
* Description:
* Initialize semaphores
*
****************************************************************************/
static int nrf52_i2c_sem_init(struct nrf52_i2c_priv_s *priv)
{
/* Initialize semaphores */
nxsem_init(&priv->sem_excl, 0, 1);
#ifndef CONFIG_I2C_POLLED
/* This semaphore is used for signaling and, hence, should not have
* priority inheritance enabled.
*/
nxsem_init(&priv->sem_isr, 0, 0);
nxsem_set_protocol(&priv->sem_isr, SEM_PRIO_NONE);
#endif
return OK;
}
/****************************************************************************
* Name: nrf52_i2c_sem_destroy
*
* Description:
* Destroy semaphores.
*
****************************************************************************/
static int nrf52_i2c_sem_destroy(struct nrf52_i2c_priv_s *priv)
{
/* Release unused resources */
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
nxsem_destroy(&priv->sem_isr);
#endif
return OK;
}
/****************************************************************************
* Name: nrf52_i2c_deinit
*
@ -789,7 +747,6 @@ static int nrf52_i2c_deinit(struct nrf52_i2c_priv_s *priv)
struct i2c_master_s *nrf52_i2cbus_initialize(int port)
{
struct nrf52_i2c_priv_s *priv = NULL;
irqstate_t flags;
i2cinfo("I2C INITIALIZE port=%d\n", port);
@ -827,10 +784,6 @@ struct i2c_master_s *nrf52_i2cbus_initialize(int port)
if (priv->refs++ == 0)
{
/* Initialize sempaphores */
nrf52_i2c_sem_init(priv);
/* Initialize I2C */
nrf52_i2c_init(priv);
@ -877,9 +830,5 @@ int nrf52_i2cbus_uninitialize(struct i2c_master_s *dev)
nrf52_i2c_deinit(priv);
/* Release semaphores */
nrf52_i2c_sem_destroy(priv);
return OK;
}

14
arch/arm/src/nrf52/nrf52_radio.c
View file

@ -726,7 +726,7 @@ static int nrf52_radio_write(struct nrf52_radio_dev_s *dev,
/* Lock device */
ret = nxsem_wait(&dev->sem_excl);
ret = nxmutex_lock(&dev->lock);
if (ret < 0)
{
return ret;
@ -766,8 +766,7 @@ errout:
/* Unlock device */
nxsem_post(&dev->sem_excl);
nxmutex_unlock(&dev->lock);
return ret;
}
@ -786,7 +785,7 @@ static int nrf52_radio_read(struct nrf52_radio_dev_s *dev,
/* Lock radio */
ret = nxsem_wait(&dev->sem_excl);
ret = nxmutex_lock(&dev->lock);
if (ret < 0)
{
return ret;
@ -826,8 +825,7 @@ errout:
/* Unlock radio */
nxsem_post(&dev->sem_excl);
nxmutex_unlock(&dev->lock);
return ret;
}
@ -1162,9 +1160,9 @@ nrf52_radio_initialize(int intf, struct nrf52_radio_board_s *board)
irq_attach(dev->irq, nrf52_radio_isr, dev);
up_enable_irq(dev->irq);
/* Initialize semaphores */
/* Initialize mutex */
nxsem_init(&dev->sem_excl, 0, 1);
nxmutex_init(&dev->lock);
/* This semaphore is used for signaling and, hence, should not have
* priority inheritance enabled.

3
arch/arm/src/nrf52/nrf52_radio.h
View file

@ -29,6 +29,7 @@
#include <stdint.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include "chip.h"
@ -252,7 +253,7 @@ struct nrf52_radio_dev_s
uint16_t txbuf_len; /* TX buffer length */
uint8_t *rxbuf; /* RX buffer */
uint8_t *txbuf; /* TX buffer */
sem_t sem_excl; /* Mutual exclusion semaphore */
mutex_t lock; /* Mutual exclusion mutex */
sem_t sem_isr; /* Interrupt wait semaphore */
uint16_t tifs; /* Interframe spacing time */
uint8_t txpower; /* TX power */

11
arch/arm/src/nrf52/nrf52_rng.c
View file

@ -32,6 +32,7 @@
#include <nuttx/fs/fs.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/fs/ioctl.h>
#include <nuttx/drivers/drivers.h>
@ -64,7 +65,7 @@ struct rng_dev_s
size_t rd_count;
size_t buflen;
sem_t rd_sem; /* semaphore for read RNG data */
sem_t excl_sem; /* semaphore for access RNG dev */
mutex_t lock; /* mutex for access RNG dev */
};
/****************************************************************************
@ -130,8 +131,7 @@ static int nrf52_rng_initialize(void)
nxsem_init(&g_rngdev.rd_sem, 0, 0);
nxsem_set_protocol(&g_rngdev.rd_sem, SEM_PRIO_NONE);
nxsem_init(&g_rngdev.excl_sem, 0, 1);
nxsem_set_protocol(&g_rngdev.excl_sem, SEM_PRIO_NONE);
nxmutex_init(&g_rngdev.lock);
_info("Ready to stop\n");
nrf52_rng_stop();
@ -200,7 +200,7 @@ static ssize_t nrf52_rng_read(struct file *filep, char *buffer,
struct rng_dev_s *priv = (struct rng_dev_s *)&g_rngdev;
ssize_t read_len;
if (nxsem_wait(&priv->excl_sem) != OK)
if (nxmutex_lock(&priv->lock) != OK)
{
return -EBUSY;
}
@ -224,8 +224,7 @@ static ssize_t nrf52_rng_read(struct file *filep, char *buffer,
/* Now , got data, and release rd_sem for next read */
nxsem_post(&priv->excl_sem);
nxmutex_unlock(&priv->lock);
return read_len;
}

18
arch/arm/src/nrf52/nrf52_sdc.c
View file

@ -32,6 +32,7 @@
#include <nuttx/wireless/bluetooth/bt_driver.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include <arch/armv7-m/nvicpri.h>
#include <arch/nrf52/nrf52_irq.h>
#include <nuttx/wqueue.h>
@ -102,7 +103,7 @@ struct nrf52_sdc_dev_s
uint8_t mempool[MEMPOOL_SIZE];
uint8_t msg_buffer[HCI_MSG_BUFFER_MAX_SIZE];
sem_t exclsem;
mutex_t lock;
struct work_s work;
};
@ -204,7 +205,7 @@ static int bt_hci_send(struct bt_driver_s *btdev,
/* Ensure non-concurrent access to SDC operations */
nxsem_wait_uninterruptible(&g_sdc_dev.exclsem);
nxmutex_lock(&g_sdc_dev.lock);
if (type == BT_CMD)
{
@ -215,8 +216,7 @@ static int bt_hci_send(struct bt_driver_s *btdev,
ret = sdc_hci_data_put(data);
}
nxsem_post(&g_sdc_dev.exclsem);
nxmutex_unlock(&g_sdc_dev.lock);
if (ret >= 0)
{
ret = len;
@ -258,9 +258,9 @@ static void low_prio_worker(void *arg)
* internally when required.
*/
nxsem_wait_uninterruptible(&g_sdc_dev.exclsem);
nxmutex_lock(&g_sdc_dev.lock);
mpsl_low_priority_process();
nxsem_post(&g_sdc_dev.exclsem);
nxmutex_unlock(&g_sdc_dev.lock);
}
/****************************************************************************
@ -274,9 +274,9 @@ static void on_hci_worker(void *arg)
* worker
*/
nxsem_wait_uninterruptible(&g_sdc_dev.exclsem);
nxmutex_lock(&g_sdc_dev.lock);
on_hci();
nxsem_post(&g_sdc_dev.exclsem);
nxmutex_unlock(&g_sdc_dev.lock);
}
/****************************************************************************
@ -502,7 +502,7 @@ int nrf52_sdc_initialize(void)
/* Initialize device data */
memset(&g_sdc_dev, 0, sizeof(g_sdc_dev));
nxsem_init(&g_sdc_dev.exclsem, 0, 1);
nxmutex_init(&g_sdc_dev.lock);
/* Register interrupt handler for normal-priority events. SWI5 will be
* used by MPSL to delegate low-priority work

12
arch/arm/src/nrf52/nrf52_spi.c
View file

@ -31,7 +31,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <arch/board/board.h>
#include <nuttx/power/pm.h>
@ -83,7 +83,7 @@ struct nrf52_spidev_s
uint32_t frequency; /* Requested clock frequency */
uint8_t mode; /* Mode 0,1,2,3 */
sem_t exclsem; /* Held while chip is selected for mutual
mutex_t lock; /* Held while chip is selected for mutual
* exclusion
*/
#ifdef CONFIG_NRF52_SPI_MASTER_INTERRUPTS
@ -687,11 +687,11 @@ static int nrf52_spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -1470,9 +1470,9 @@ struct spi_dev_s *nrf52_spibus_initialize(int port)
priv->initialized = true;
/* Initialize the SPI semaphore */
/* Initialize the SPI mutex */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
#ifdef CONFIG_NRF52_SPI_MASTER_INTERRUPTS
/* This semaphore is used for signaling and, hence, should not have

12
arch/arm/src/rp2040/rp2040_cyw43439.c
View file

@ -400,7 +400,7 @@ static int my_write(struct gspi_dev_s *gspi,
/* Claim the exclusive lock */
nxsem_wait(&gspi->exclsem);
nxmutex_lock(&gspi->lock);
/* Reset the PIO state machine just to be sure. */
@ -541,8 +541,7 @@ static int my_write(struct gspi_dev_s *gspi,
/* Release the exclusive lock */
nxsem_post(&gspi->exclsem);
nxmutex_unlock(&gspi->lock);
return dma_info.status;
}
@ -616,7 +615,7 @@ static int my_read(struct gspi_dev_s *gspi,
/* Claim the exclusive lock */
nxsem_wait(&gspi->exclsem);
nxmutex_lock(&gspi->lock);
/* Reset the PIO state machine just to be sure. */
@ -761,8 +760,7 @@ static int my_read(struct gspi_dev_s *gspi,
/* Release the exclusive lock */
nxsem_post(&gspi->exclsem);
nxmutex_unlock(&gspi->lock);
return dma_info.status;
}
@ -820,7 +818,7 @@ gspi_dev_t *rp2040_cyw_setup(uint8_t gpio_on,
rp_io->gpio_clock = gpio_clock;
rp_io->gpio_intr = gpio_intr;
nxsem_init(&gspi->exclsem, 0, 1);
nxmutex_init(&gspi->lock);
/* Initialize the cyw43439 power-on and chip select lines. */

11
arch/arm/src/rp2040/rp2040_dmac.c
View file

@ -33,6 +33,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include "arm_internal.h"
@ -61,8 +62,8 @@ struct dma_channel_s
struct dma_controller_s
{
sem_t exclsem; /* Protects channel table */
sem_t chansem; /* Count of free channels */
mutex_t lock; /* Protects channel table */
sem_t chansem; /* Count of free channels */
};
/****************************************************************************
@ -160,7 +161,7 @@ void weak_function arm_dma_initialize(void)
/* Initialize the channel list */
nxsem_init(&g_dmac.exclsem, 0, 1);
nxmutex_init(&g_dmac.lock);
nxsem_init(&g_dmac.chansem, 0, RP2040_DMA_NCHANNELS);
for (i = 0; i < RP2040_DMA_NCHANNELS; i++)
@ -222,7 +223,7 @@ DMA_HANDLE rp2040_dmachannel(void)
/* Get exclusive access to the DMA channel list */
ret = nxsem_wait_uninterruptible(&g_dmac.exclsem);
ret = nxmutex_lock(&g_dmac.lock);
if (ret < 0)
{
nxsem_post(&g_dmac.chansem);
@ -244,7 +245,7 @@ DMA_HANDLE rp2040_dmachannel(void)
}
}
nxsem_post(&g_dmac.exclsem);
nxmutex_unlock(&g_dmac.lock);
setbits_reg32(bit, RP2040_DMA_INTS0);
setbits_reg32(bit, RP2040_DMA_INTE0);

42
arch/arm/src/rp2040/rp2040_flash_mtd.c
View file

@ -46,7 +46,7 @@
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include "rp2040_flash_mtd.h"
#include "rp2040_rom.h"
@ -103,7 +103,7 @@
typedef struct rp2040_flash_dev_s
{
struct mtd_dev_s mtd_dev; /* Embedded mdt_dev structure */
sem_t sem; /* file access serialization */
mutex_t lock; /* file access serialization */
uint32_t boot_2[BOOT_2_SIZE / 4]; /* RAM copy of boot_2 */
} rp2040_flash_dev_t;
@ -256,8 +256,7 @@ static int rp2040_flash_erase(struct mtd_dev_s *dev,
nblocks,
FLASH_BLOCK_SIZE * nblocks);
ret = nxsem_wait(&(rp_dev->sem));
ret = nxmutex_lock(&rp_dev->lock);
if (ret < 0)
{
return ret;
@ -280,8 +279,7 @@ static int rp2040_flash_erase(struct mtd_dev_s *dev,
ret = nblocks;
nxsem_post(&(rp_dev->sem));
nxmutex_unlock(&rp_dev->lock);
return ret;
}
@ -299,8 +297,7 @@ static ssize_t rp2040_flash_block_read(struct mtd_dev_s *dev,
int length;
int ret = OK;
ret = nxsem_wait(&(rp_dev->sem));
ret = nxmutex_lock(&rp_dev->lock);
if (ret < 0)
{
return ret;
@ -325,8 +322,7 @@ static ssize_t rp2040_flash_block_read(struct mtd_dev_s *dev,
/* Update the file position */
nxsem_post(&(rp_dev->sem));
nxmutex_unlock(&rp_dev->lock);
return nblocks;
}
@ -341,10 +337,9 @@ static ssize_t rp2040_flash_block_write(struct mtd_dev_s *dev,
{
rp2040_flash_dev_t *rp_dev = (rp2040_flash_dev_t *) dev;
irqstate_t flags;
int ret = OK;
ret = nxsem_wait(&(rp_dev->sem));
int ret;
ret = nxmutex_lock(&rp_dev->lock);
if (ret < 0)
{
return ret;
@ -385,8 +380,7 @@ static ssize_t rp2040_flash_block_write(struct mtd_dev_s *dev,
ret = nblocks;
nxsem_post(&(rp_dev->sem));
nxmutex_unlock(&rp_dev->lock);
return ret;
}
@ -394,17 +388,16 @@ static ssize_t rp2040_flash_block_write(struct mtd_dev_s *dev,
* Name: rp2040_flash_byte_read
****************************************************************************/
static ssize_t rp2040_flash_byte_read (struct mtd_dev_s *dev,
off_t offset,
size_t nbytes,
uint8_t *buffer)
static ssize_t rp2040_flash_byte_read(struct mtd_dev_s *dev,
off_t offset,
size_t nbytes,
uint8_t *buffer)
{
rp2040_flash_dev_t *rp_dev = (rp2040_flash_dev_t *) dev;
rp2040_flash_dev_t *rp_dev = (rp2040_flash_dev_t *)dev;
int length;
int ret = OK;
ret = nxsem_wait(&(rp_dev->sem));
ret = nxmutex_lock(&rp_dev->lock);
if (ret < 0)
{
return ret;
@ -437,8 +430,7 @@ static ssize_t rp2040_flash_byte_read (struct mtd_dev_s *dev,
/* Update the file position */
nxsem_post(&(rp_dev->sem));
nxmutex_unlock(&rp_dev->lock);
return length;
}
@ -511,7 +503,7 @@ struct mtd_dev_s *rp2040_flash_mtd_initialize(void)
initialized = true;
nxsem_init(&(my_dev.sem), 0, 1);
nxmutex_init(&my_dev.lock);
if (FLASH_BLOCK_COUNT < 4)
{

57
arch/arm/src/rp2040/rp2040_i2c.c
View file

@ -34,6 +34,7 @@
#include <assert.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include <nuttx/i2c/i2c_master.h>
#include <nuttx/irq.h>
@ -75,7 +76,7 @@ struct rp2040_i2cdev_s
int8_t port; /* Port number */
uint32_t base_freq; /* branch frequency */
sem_t mutex; /* Only one thread can access at a time */
mutex_t lock; /* Only one thread can access at a time */
sem_t wait; /* Place to wait for transfer completion */
struct wdog_s timeout; /* watchdog to timeout when bus hung */
uint32_t frequency; /* Current I2C frequency */
@ -94,6 +95,8 @@ static struct rp2040_i2cdev_s g_i2c0dev =
.port = 0,
.base = RP2040_I2C0_BASE,
.irqid = RP2040_I2C0_IRQ,
.lock = NXMUTEX_INITIALIZER,
.wait = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
.refs = 0,
};
#endif
@ -103,6 +106,8 @@ static struct rp2040_i2cdev_s g_i2c1dev =
.port = 1,
.base = RP2040_I2C1_BASE,
.irqid = RP2040_I2C1_IRQ,
.lock = NXMUTEX_INITIALIZER,
.wait = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
.refs = 0,
};
#endif
@ -111,9 +116,6 @@ static struct rp2040_i2cdev_s g_i2c1dev =
* Private Functions
****************************************************************************/
static inline int i2c_takesem(sem_t *sem);
static inline int i2c_givesem(sem_t *sem);
static inline uint32_t i2c_reg_read(struct rp2040_i2cdev_s *priv,
uint32_t offset);
static inline void i2c_reg_write(struct rp2040_i2cdev_s *priv,
@ -137,24 +139,6 @@ static int rp2040_i2c_transfer(struct i2c_master_s *dev,
static int rp2040_i2c_reset(struct i2c_master_s *dev);
#endif
/****************************************************************************
* Name: i2c_takesem
****************************************************************************/
static inline int i2c_takesem(sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
/****************************************************************************
* Name: i2c_givesem
****************************************************************************/
static inline int i2c_givesem(sem_t *sem)
{
return nxsem_post(sem);
}
/****************************************************************************
* I2C device operations
****************************************************************************/
@ -284,7 +268,7 @@ static void rp2040_i2c_timeout(wdparm_t arg)
irqstate_t flags = enter_critical_section();
priv->error = -ENODEV;
i2c_givesem(&priv->wait);
nxsem_post(&priv->wait);
leave_critical_section(flags);
}
@ -394,7 +378,7 @@ static int rp2040_i2c_interrupt(int irq, void *context, void *arg)
ret = wd_cancel(&priv->timeout);
if (ret == OK)
{
i2c_givesem(&priv->wait);
nxsem_post(&priv->wait);
}
}
@ -462,7 +446,7 @@ static int rp2040_i2c_receive(struct rp2040_i2cdev_s *priv, int last)
RP2040_I2C_IC_INTR_STAT_R_RX_FULL,
RP2040_I2C_IC_INTR_STAT_R_RX_FULL);
leave_critical_section(flags);
i2c_takesem(&priv->wait);
nxsem_wait_uninterruptible(&priv->wait);
if (priv->error != OK)
{
@ -517,8 +501,7 @@ static int rp2040_i2c_send(struct rp2040_i2cdev_s *priv, int last)
RP2040_I2C_IC_INTR_STAT_R_TX_EMPTY);
leave_critical_section(flags);
i2c_takesem(&priv->wait);
nxsem_wait_uninterruptible(&priv->wait);
return 0;
}
@ -546,7 +529,7 @@ static int rp2040_i2c_transfer(struct i2c_master_s *dev,
/* Get exclusive access to the I2C bus */
i2c_takesem(&priv->mutex);
nxmutex_lock(&priv->lock);
/* Check wait semaphore value. If the value is not 0, the transfer can not
* be performed normally.
@ -618,8 +601,7 @@ static int rp2040_i2c_transfer(struct i2c_master_s *dev,
rp2040_i2c_disable(priv);
}
i2c_givesem(&priv->mutex);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -658,8 +640,7 @@ static int rp2040_i2c_reset(struct i2c_master_s *dev)
/* Lock out other clients */
i2c_takesem(&priv->mutex);
nxmutex_lock(&priv->lock);
ret = -EIO;
/* De-init the port */
@ -775,7 +756,7 @@ out_without_reinit:
/* Release the port for re-use by other clients */
i2c_givesem(&priv->mutex);
nxmutex_unlock(&priv->lock);
return ret;
}
#endif /* CONFIG_I2C_RESET */
@ -880,7 +861,7 @@ struct i2c_master_s *rp2040_i2cbus_initialize(int port)
#ifdef CONFIG_RP2040_I2C0
if (port == 0)
{
priv = &g_i2c0dev;
priv = &g_i2c0dev;
priv->dev.ops = &rp2040_i2c_ops;
}
else
@ -888,7 +869,7 @@ struct i2c_master_s *rp2040_i2cbus_initialize(int port)
#ifdef CONFIG_RP2040_I2C1
if (port == 1)
{
priv = &g_i2c1dev;
priv = &g_i2c1dev;
priv->dev.ops = &rp2040_i2c_ops;
}
else
@ -920,10 +901,6 @@ struct i2c_master_s *rp2040_i2cbus_initialize(int port)
leave_critical_section(flags);
nxsem_init(&priv->mutex, 0, 1);
nxsem_init(&priv->wait, 0, 0);
nxsem_set_protocol(&priv->wait, SEM_PRIO_NONE);
/* Attach Interrupt Handler */
irq_attach(priv->irqid, rp2040_i2c_interrupt, priv);
@ -965,8 +942,6 @@ int rp2040_i2cbus_uninitialize(struct i2c_master_s *dev)
irq_detach(priv->irqid);
wd_cancel(&priv->timeout);
nxsem_destroy(&priv->mutex);
nxsem_destroy(&priv->wait);
return OK;
}

2
arch/arm/src/rp2040/rp2040_i2c_slave.c
View file

@ -285,7 +285,7 @@ static int i2c_interrupt(int irq, void *context, void *arg)
ret = wd_cancel(&priv->timeout);
if (ret == OK)
{
i2c_givesem(&priv->wait);
nxsem_post(&priv->wait);
}
}
#endif

63
arch/arm/src/rp2040/rp2040_i2s.c
View file

@ -35,6 +35,7 @@
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/kmalloc.h>
#include <nuttx/queue.h>
@ -138,7 +139,7 @@ struct rp2040_transport_s
struct rp2040_i2s_s
{
struct i2s_dev_s dev; /* Externally visible I2S interface */
sem_t exclsem; /* Assures mutually exclusive access to I2S */
mutex_t lock; /* Assures mutually exclusive access to I2S */
bool initialized; /* Has I2S interface been initialized */
uint8_t datalen; /* Data width (8 or 16) */
#ifdef CONFIG_DEBUG_FEATURES
@ -168,14 +169,6 @@ struct rp2040_i2s_s
# define i2s_dump_buffer(m,b,s)
#endif
/* Semaphore helpers */
static int i2s_exclsem_take(struct rp2040_i2s_s *priv);
#define i2s_exclsem_give(priv) nxsem_post(&priv->exclsem)
static int i2s_bufsem_take(struct rp2040_i2s_s *priv);
#define i2s_bufsem_give(priv) nxsem_post(&priv->bufsem)
/* Buffer container helpers */
static struct rp2040_buffer_s *
@ -235,46 +228,6 @@ static const struct i2s_ops_s g_i2sops =
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: i2s_exclsem_take
*
* Description:
* Take the exclusive access semaphore handling any exceptional conditions
*
* Input Parameters:
* priv - A reference to the i2s peripheral state
*
* Returned Value:
* Normally OK, but may return -ECANCELED in the rare event that the task
* has been canceled.
*
****************************************************************************/
static int i2s_exclsem_take(struct rp2040_i2s_s *priv)
{
return nxsem_wait_uninterruptible(&priv->exclsem);
}
/****************************************************************************
* Name: i2s_bufsem_take
*
* Description:
* Take the buffer semaphore handling any exceptional conditions
*
* Input Parameters:
* priv - A reference to the i2s peripheral state
*
* Returned Value:
* Normally OK, but may return -ECANCELED in the rare event that the task
* has been canceled.
*
****************************************************************************/
static int i2s_bufsem_take(struct rp2040_i2s_s *priv)
{
return nxsem_wait_uninterruptible(&priv->bufsem);
}
/****************************************************************************
* Name: i2s_buf_allocate
*
@ -305,7 +258,7 @@ static struct rp2040_buffer_s *i2s_buf_allocate(struct rp2040_i2s_s *priv)
* have at least one free buffer container.
*/
ret = i2s_bufsem_take(priv);
ret = nxsem_wait_uninterruptible(&priv->bufsem);
if (ret < 0)
{
return NULL;
@ -356,7 +309,7 @@ static void i2s_buf_free(struct rp2040_i2s_s *priv,
/* Wake up any threads waiting for a buffer container */
i2s_bufsem_give(priv);
nxsem_post(&priv->bufsem);
}
/****************************************************************************
@ -913,7 +866,7 @@ static int rp2040_i2s_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
/* Get exclusive access to the I2S driver data */
ret = i2s_exclsem_take(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
goto errout_with_buf;
@ -937,7 +890,7 @@ static int rp2040_i2s_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
sq_addlast((sq_entry_t *)bfcontainer, &priv->tx.pend);
leave_critical_section(flags);
i2s_exclsem_give(priv);
nxmutex_unlock(&priv->lock);
return OK;
errout_with_buf:
@ -1351,7 +1304,7 @@ struct i2s_dev_s *rp2040_i2sbus_initialize(int port)
/* Initialize the common parts for the I2S device structure */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
priv->dev.ops = &g_i2sops;
/* Initialize buffering */
@ -1379,7 +1332,7 @@ struct i2s_dev_s *rp2040_i2sbus_initialize(int port)
/* Failure exits */
errout_with_alloc:
nxsem_destroy(&priv->exclsem);
nxmutex_destroy(&priv->lock);
kmm_free(priv);
return NULL;
}

14
arch/arm/src/rp2040/rp2040_spi.c
View file

@ -36,7 +36,7 @@
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include "arm_internal.h"
@ -73,7 +73,7 @@ struct rp2040_spidev_s
#ifdef CONFIG_RP2040_SPI_INTERRUPTS
uint8_t spiirq; /* SPI IRQ number */
#endif
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (4 to 16) */
@ -320,13 +320,13 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
/* Take the semaphore (perhaps waiting) */
/* Take the mutex (perhaps waiting) */
return nxsem_wait_uninterruptible(&priv->exclsem);
return nxmutex_lock(&priv->lock);
}
else
{
return nxsem_post(&priv->exclsem);
return nxmutex_unlock(&priv->lock);
}
}
@ -858,9 +858,9 @@ struct spi_dev_s *rp2040_spibus_initialize(int port)
spi_setfrequency((struct spi_dev_s *)priv, 400000);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
regval = spi_getreg(priv, RP2040_SPI_SSPCR1_OFFSET);
spi_putreg(priv, RP2040_SPI_SSPCR1_OFFSET, regval | RP2040_SPI_SSPCR1_SSE);

28
arch/arm/src/rp2040/rp2040_ws2812.c
View file

@ -102,8 +102,7 @@ void dma_complete(DMA_HANDLE handle, uint8_t status, void *arg)
rp2040_dmafree(handle);
priv->last_dma = clock_systime_ticks();
nxsem_post(&dev_data->exclsem);
nxmutex_unlock(&dev_data->lock);
}
/****************************************************************************
@ -147,7 +146,7 @@ static void update_pixels(struct ws2812_dev_s *dev_data)
rp2040_dmastart(dma_handle, dma_complete, dev_data);
/* NOTE: we don't post exclsem here, the dma_complete does that */
/* NOTE: we don't post lock here, the dma_complete does that */
}
/****************************************************************************
@ -321,7 +320,6 @@ static int my_open(struct file *filep)
post_and_return:
leave_critical_section(flags);
return ret;
}
@ -344,7 +342,7 @@ static int my_close(struct file *filep)
struct ws2812_dev_s *dev_data = inode->i_private;
struct instance *priv = (struct instance *)dev_data->private;
nxsem_wait(&dev_data->exclsem);
nxmutex_lock(&dev_data->lock);
ledinfo("rp2040_ws2812 close dev: 0x%08lX\n", (uint32_t) dev_data);
@ -355,8 +353,7 @@ static int my_close(struct file *filep)
rp2040_gpio_put(priv->power_pin, false);
}
nxsem_post(&dev_data->exclsem);
nxmutex_unlock(&dev_data->lock);
return OK;
}
@ -391,7 +388,7 @@ static ssize_t my_write(struct file *filep,
return 0;
}
nxsem_wait(&dev_data->exclsem);
nxmutex_lock(&dev_data->lock);
ledinfo("rp2040_ws2812 write dev: 0x%08lX\n", (uint32_t) dev_data);
@ -435,7 +432,7 @@ static ssize_t my_write(struct file *filep,
update_pixels(dev_data);
/* NOTE: we don't post exclsem here, so update_pixels must make sure
/* NOTE: we don't post lock here, so update_pixels must make sure
* that happens.
*/
@ -473,7 +470,7 @@ static ssize_t my_read(struct file *filep,
return 0;
}
nxsem_wait(&dev_data->exclsem);
nxmutex_lock(&dev_data->lock);
/* Copy the data from the buffer swapping the
* red and green, since ws2812 use a GRB order
@ -510,8 +507,7 @@ static ssize_t my_read(struct file *filep,
filep->f_pos = position;
nxsem_wait(&dev_data->exclsem);
nxmutex_unlock(&dev_data->lock);
return xfer_index;
}
@ -577,7 +573,7 @@ void * rp2040_ws2812_setup(const char *path,
dev_data->clock = CONFIG_WS2812_FREQUENCY;
dev_data->private = priv;
nxsem_init(&dev_data->exclsem, 0, 1);
nxmutex_init(&dev_data->lock);
priv->power_pin = power_pin;
@ -617,7 +613,7 @@ int rp2040_ws2812_release(void * driver)
int ret = OK;
nxsem_wait(&dev_data->exclsem);
nxmutex_lock(&dev_data->lock);
if (priv->open_count == 0)
{
@ -626,7 +622,7 @@ int rp2040_ws2812_release(void * driver)
rp2040_pio_sm_set_enabled(priv->pio, priv->pio_sm, false);
rp2040_pio_sm_unclaim(priv->pio, priv->pio_sm);
nxsem_post(&dev_data->exclsem);
nxmutex_unlock(&dev_data->lock);
kmm_free(priv->pixels);
kmm_free(priv);
@ -634,7 +630,7 @@ int rp2040_ws2812_release(void * driver)
else
{
ret = -EBUSY;
nxsem_post(&dev_data->exclsem);
nxmutex_unlock(&dev_data->lock);
}
return ret;

10
arch/arm/src/rtl8720c/amebaz_driver.c
View file

@ -64,7 +64,7 @@ static void amebaz_state_timeout(wdparm_t arg)
}
state->status = AMEBAZ_STATUS_TIMEOUT;
nxsem_post(&state->mutex);
nxsem_post(&state->sem);
}
static int amebaz_state_run(struct amebaz_state_s *state, int32_t delay)
@ -84,7 +84,7 @@ static int amebaz_state_wait(struct amebaz_state_s *state)
int ret = 0;
while (state->status == AMEBAZ_STATUS_RUN)
{
ret = nxsem_wait_uninterruptible(&state->mutex);
ret = nxsem_wait_uninterruptible(&state->sem);
if (ret != 0)
{
break;
@ -101,7 +101,7 @@ static void amebaz_state_post(struct amebaz_state_s *state, int status)
if (_status == AMEBAZ_STATUS_RUN)
{
wd_cancel(&state->timeout);
nxsem_post(&state->mutex);
nxsem_post(&state->sem);
}
}
@ -112,7 +112,7 @@ static void amebaz_state_deinit(struct amebaz_state_s *state)
static int amebaz_state_init(struct amebaz_state_s *state)
{
if (nxsem_init(&state->mutex, 0, 0) != OK)
if (nxsem_init(&state->sem, 0, 0) != OK)
{
return -ENOMEM;
}
@ -509,7 +509,7 @@ int amebaz_wl_get_scan_results(struct amebaz_dev_s *priv, struct iwreq *iwr)
iwr->u.data.length = amebaz_wl_format_scan_results(priv, iwr);
exit_sem_post:
nxsem_post(&state->mutex);
nxsem_post(&state->sem);
exit_failed:
if (ret < 0)
{

4
arch/arm/src/rtl8720c/amebaz_driver.h
View file

@ -26,7 +26,7 @@
****************************************************************************/
#include <nuttx/config.h>
#include <semaphore.h>
#include <nuttx/semaphore.h>
#include <nuttx/wdog.h>
#include <nuttx/wqueue.h>
#include <nuttx/net/netdev.h>
@ -56,7 +56,7 @@ enum
struct amebaz_state_s
{
sem_t mutex;
sem_t sem;
struct wdog_s timeout;
int status;
};

32
arch/arm/src/s32k1xx/s32k1xx_edma.c
View file

@ -58,6 +58,7 @@
#include <nuttx/arch.h>
#include <nuttx/queue.h>
#include <nuttx/spinlock.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include "arm_internal.h"
@ -136,9 +137,9 @@ struct s32k1xx_dmach_s
struct s32k1xx_edma_s
{
/* These semaphores protect the DMA channel and descriptor tables */
/* These mutex protect the DMA channel and descriptor tables */
sem_t chsem; /* Protects channel table */
mutex_t chlock; /* Protects channel table */
#if CONFIG_S32K1XX_EDMA_NTCD > 0
sem_t dsem; /* Supports wait for free descriptors */
#endif
@ -171,25 +172,6 @@ static struct s32k1xx_edmatcd_s g_tcd_pool[CONFIG_S32K1XX_EDMA_NTCD]
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: s32k1xx_takechsem() and s32k1xx_givechsem()
*
* Description:
* Used to get exclusive access to the DMA channel table for channel
* allocation.
*
****************************************************************************/
static int s32k1xx_takechsem(void)
{
return nxsem_wait_uninterruptible(&g_edma.chsem);
}
static inline void s32k1xx_givechsem(void)
{
nxsem_post(&g_edma.chsem);
}
/****************************************************************************
* Name: s32k1xx_takedsem() and s32k1xx_givedsem()
*
@ -730,9 +712,9 @@ void weak_function arm_dma_initialize(void)
g_edma.dmach[i].chan = i;
}
/* Initialize semaphores */
/* Initialize mutex & semaphores */
nxsem_init(&g_edma.chsem, 0, 1);
nxmutex_init(&g_edma.chlock);
#if CONFIG_S32K1XX_EDMA_NTCD > 0
nxsem_init(&g_edma.dsem, 0, CONFIG_S32K1XX_EDMA_NTCD);
@ -842,7 +824,7 @@ DMACH_HANDLE s32k1xx_dmach_alloc(uint8_t dmamux, uint8_t dchpri)
/* Search for an available DMA channel */
dmach = NULL;
ret = s32k1xx_takechsem();
ret = nxmutex_lock(&g_edma.chlock);
if (ret < 0)
{
return NULL;
@ -879,7 +861,7 @@ DMACH_HANDLE s32k1xx_dmach_alloc(uint8_t dmamux, uint8_t dchpri)
}
}
s32k1xx_givechsem();
nxmutex_unlock(&g_edma.chlock);
/* Show the result of the allocation */

99
arch/arm/src/s32k1xx/s32k1xx_lpi2c.c
View file

@ -37,6 +37,7 @@
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include <nuttx/clock.h>
#include <nuttx/mutex.h>
#include <nuttx/semaphore.h>
#include <nuttx/i2c/i2c_master.h>
@ -184,7 +185,7 @@ struct s32k1xx_lpi2c_priv_s
const struct s32k1xx_lpi2c_config_s *config;
int refs; /* Reference count */
sem_t sem_excl; /* Mutual exclusion semaphore */
mutex_t lock; /* Mutual exclusion mutex */
#ifndef CONFIG_I2C_POLLED
sem_t sem_isr; /* Interrupt wait semaphore */
#endif
@ -230,8 +231,6 @@ static inline void
s32k1xx_lpi2c_modifyreg(struct s32k1xx_lpi2c_priv_s *priv,
uint16_t offset, uint32_t clearbits,
uint32_t setbits);
static inline int
s32k1xx_lpi2c_sem_wait(struct s32k1xx_lpi2c_priv_s *priv);
#ifdef CONFIG_S32K1XX_I2C_DYNTIMEO
static uint32_t
@ -242,12 +241,6 @@ static inline int
s32k1xx_lpi2c_sem_waitdone(struct s32k1xx_lpi2c_priv_s *priv);
static inline void
s32k1xx_lpi2c_sem_waitstop(struct s32k1xx_lpi2c_priv_s *priv);
static inline void
s32k1xx_lpi2c_sem_post(struct s32k1xx_lpi2c_priv_s *priv);
static inline void
s32k1xx_lpi2c_sem_init(struct s32k1xx_lpi2c_priv_s *priv);
static inline void
s32k1xx_lpi2c_sem_destroy(struct s32k1xx_lpi2c_priv_s *priv);
#ifdef CONFIG_I2C_TRACE
static void s32k1xx_lpi2c_tracereset(struct s32k1xx_lpi2c_priv_s *priv);
@ -347,6 +340,10 @@ static struct s32k1xx_lpi2c_priv_s s32k1xx_lpi2c0_priv =
.ops = &s32k1xx_lpi2c_ops,
.config = &s32k1xx_lpi2c0_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
#endif
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
@ -381,6 +378,10 @@ static struct s32k1xx_lpi2c_priv_s s32k1xx_lpi2c1_priv =
.ops = &s32k1xx_lpi2c_ops,
.config = &s32k1xx_lpi2c1_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
#ifndef CONFIG_I2C_POLLED
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
#endif
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
@ -441,21 +442,6 @@ s32k1xx_lpi2c_modifyreg(struct s32k1xx_lpi2c_priv_s *priv,
modifyreg32(priv->config->base + offset, clearbits, setbits);
}
/****************************************************************************
* Name: s32k1xx_lpi2c_sem_wait
*
* Description:
* Take the exclusive access, waiting as necessary. May be interrupted by
* a signal.
*
****************************************************************************/
static inline int
s32k1xx_lpi2c_sem_wait(struct s32k1xx_lpi2c_priv_s *priv)
{
return nxsem_wait(&priv->sem_excl);
}
/****************************************************************************
* Name: s32k1xx_lpi2c_toticks
*
@ -735,59 +721,6 @@ s32k1xx_lpi2c_sem_waitstop(struct s32k1xx_lpi2c_priv_s *priv)
i2cinfo("Timeout with Status Register: %" PRIx32 "\n", regval);
}
/****************************************************************************
* Name: s32k1xx_lpi2c_sem_post
*
* Description:
* Release the mutual exclusion semaphore
*
****************************************************************************/
static inline void s32k1xx_lpi2c_sem_post(struct s32k1xx_lpi2c_priv_s *priv)
{
nxsem_post(&priv->sem_excl);
}
/****************************************************************************
* Name: s32k1xx_lpi2c_sem_init
*
* Description:
* Initialize semaphores
*
****************************************************************************/
static inline void
s32k1xx_lpi2c_sem_init(struct s32k1xx_lpi2c_priv_s *priv)
{
nxsem_init(&priv->sem_excl, 0, 1);
#ifndef CONFIG_I2C_POLLED
/* This semaphore is used for signaling and, hence, should not have
* priority inheritance enabled.
*/
nxsem_init(&priv->sem_isr, 0, 0);
nxsem_set_protocol(&priv->sem_isr, SEM_PRIO_NONE);
#endif
}
/****************************************************************************
* Name: s32k1xx_lpi2c_sem_destroy
*
* Description:
* Destroy semaphores.
*
****************************************************************************/
static inline void
s32k1xx_lpi2c_sem_destroy(struct s32k1xx_lpi2c_priv_s *priv)
{
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
nxsem_destroy(&priv->sem_isr);
#endif
}
/****************************************************************************
* Name: s32k1xx_rxdma_callback
*
@ -1959,7 +1892,7 @@ static int s32k1xx_lpi2c_transfer(struct i2c_master_s *dev,
/* Ensure that address or flags don't change meanwhile */
ret = s32k1xx_lpi2c_sem_wait(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2064,7 +1997,7 @@ static int s32k1xx_lpi2c_transfer(struct i2c_master_s *dev,
priv->dcnt = 0;
priv->ptr = NULL;
s32k1xx_lpi2c_sem_post(priv);
nxmutex_unlock(&priv->lock);
return ret;
}
@ -2101,7 +2034,7 @@ static int s32k1xx_lpi2c_reset(struct i2c_master_s *dev)
/* Lock out other clients */
ret = s32k1xx_lpi2c_sem_wait(priv);
ret = nxmutex_lock(&priv->lock);
if (ret < 0)
{
return ret;
@ -2204,7 +2137,7 @@ out:
/* Release the port for re-use by other clients */
s32k1xx_lpi2c_sem_post(priv);
nxmutex_unlock(&priv->lock);
return ret;
}
#endif /* CONFIG_I2C_RESET */
@ -2254,7 +2187,6 @@ struct i2c_master_s *s32k1xx_i2cbus_initialize(int port)
if ((volatile int)priv->refs++ == 0)
{
s32k1xx_lpi2c_sem_init(priv);
s32k1xx_lpi2c_init(priv);
#ifdef CONFIG_S32K1XX_LPI2C_DMA
@ -2331,9 +2263,6 @@ int s32k1xx_i2cbus_uninitialize(struct i2c_master_s *dev)
s32k1xx_lpi2c_deinit(priv);
/* Release unused resources */
s32k1xx_lpi2c_sem_destroy(priv);
return OK;
}

12
arch/arm/src/s32k1xx/s32k1xx_lpspi.c
View file

@ -64,7 +64,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/mutex.h>
#include <nuttx/spi/spi.h>
#include <nuttx/power/pm.h>
@ -128,7 +128,7 @@ struct s32k1xx_lpspidev_s
#ifdef CONFIG_S32K1XX_LPSPI_INTERRUPTS
uint8_t spiirq; /* SPI IRQ number */
#endif
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
mutex_t lock; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
int8_t nbits; /* Width of word in bits */
@ -951,11 +951,11 @@ static int s32k1xx_lpspi_lock(struct spi_dev_s *dev, bool lock)
if (lock)
{
ret = nxsem_wait_uninterruptible(&priv->exclsem);
ret = nxmutex_lock(&priv->lock);
}
else
{
ret = nxsem_post(&priv->exclsem);
ret = nxmutex_unlock(&priv->lock);
}
return ret;
@ -1834,9 +1834,9 @@ static void s32k1xx_lpspi_bus_initialize(struct s32k1xx_lpspidev_s *priv)
s32k1xx_lpspi_setmode((struct spi_dev_s *)priv, SPIDEV_MODE0);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
/* Initialize the SPI mutex that enforces mutually exclusive access */
nxsem_init(&priv->exclsem, 0, 1);
nxmutex_init(&priv->lock);
/* Enable LPSPI */

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