forked from nuttx/nuttx-update
arch/arm64: Modify the method for obtaining the CPU frequency
Summary: 1、cntfrq_el0 is used to store the timer frequency, which may be different from the CPU frequency. 2、Do not use up_perf interface for SMP. Signed-off-by: wangming9 <wangming9@xiaomi.com>
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parent
e9b77833e3
commit
fa96350574
7 changed files with 28 additions and 8 deletions
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@ -202,6 +202,5 @@ void arm64_boot_el1_init(void)
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void arm64_boot_primary_c_routine(void)
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{
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arm64_chip_boot();
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up_perf_init(NULL);
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nx_start();
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}
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@ -232,7 +232,5 @@ void arm64_boot_secondary_c_routine(void)
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arm64_gic_secondary_init();
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up_perf_init(NULL);
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arm64_smp_init_top();
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}
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@ -28,12 +28,20 @@
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#ifdef CONFIG_ARCH_PERF_EVENTS
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static unsigned long g_cpu_freq = ULONG_MAX;
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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void up_perf_init(void *arg)
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{
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g_cpu_freq = (unsigned long)(uintptr_t)arg;
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pmu_ccntr_ccfiltr_config(PMCCFILTR_EL0_NSH);
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pmu_cntr_control_config(PMCR_EL0_C | PMCR_EL0_E);
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pmu_cntr_trap_control(PMUSERENR_EL0_EN);
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@ -43,7 +51,7 @@ void up_perf_init(void *arg)
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unsigned long up_perf_getfreq(void)
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{
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return read_sysreg(cntfrq_el0);
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return g_cpu_freq;
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}
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unsigned long up_perf_gettime(void)
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@ -54,10 +62,9 @@ unsigned long up_perf_gettime(void)
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void up_perf_convert(unsigned long elapsed, struct timespec *ts)
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{
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unsigned long left;
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unsigned long cpu_freq = read_sysreg(cntfrq_el0);
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ts->tv_sec = elapsed / cpu_freq;
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left = elapsed - ts->tv_sec * cpu_freq;
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ts->tv_nsec = NSEC_PER_SEC * left / cpu_freq;
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ts->tv_sec = elapsed / g_cpu_freq;
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left = elapsed - ts->tv_sec * g_cpu_freq;
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ts->tv_nsec = NSEC_PER_SEC * left / g_cpu_freq;
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}
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#endif
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@ -182,4 +182,8 @@ void arm64_chip_boot(void)
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arm64_earlyserialinit();
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#endif
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#ifdef CONFIG_ARCH_PERF_EVENTS
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up_perf_init((void *)CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
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#endif
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}
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@ -170,6 +170,10 @@ void arm64_chip_boot(void)
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arm64_earlyserialinit();
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#endif
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#ifdef CONFIG_ARCH_PERF_EVENTS
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up_perf_init((void *)CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
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#endif
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}
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#if defined(CONFIG_NET) && !defined(CONFIG_NETDEV_LATEINIT)
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@ -112,4 +112,8 @@ void arm64_chip_boot(void)
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arm64_earlyserialinit();
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#endif
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#ifdef CONFIG_ARCH_PERF_EVENTS
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up_perf_init((void *)CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
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#endif
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}
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@ -195,6 +195,10 @@ void arm64_chip_boot(void)
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arm64_earlyserialinit();
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#endif
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#ifdef CONFIG_ARCH_PERF_EVENTS
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up_perf_init((void *)CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
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#endif
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}
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#if defined(CONFIG_NET) && !defined(CONFIG_NETDEV_LATEINIT)
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