Includes a Mini-UART NSH console for the 4B, tested on the 4GB RAM
model. Part of an I2C driver which can only read, boiler-plate for a SPI
driver, and a GPIO driver with limited pins. Some tools are present for
automatically fetching the boot files and creating the `config.txt` file
based on selected Kconfig options.
- Add support for the IMX95LPD5EVK-19 evaluation kit (M7 core only)
- Firmware can be executed from ITCM, DDR or NOR flash
- configurations:
'nsh' A minimal configuration that only enables nsh shell
on a UART
'rpmsg' This configuration is similar to nsh but in addition
it offers the Remote Processing Messaging (RPMsg) service to
enable heterogeneous inter-core communication.
Convenient for qemu debugging and adding ci check
We can learn to use the following command to mount 9pfs on qemu64:
qemu-system-aarch64 -cpu max -nographic \
-machine virt,virtualization=on,gic-version=3,mte=on \
-fsdev local,security_model=none,id=fsdev0,path=/xxxx -device virtio-9p-device,id=fs0,fsdev=fsdev0,mount_tag=host \
-chardev stdio,id=con,mux=on, -serial chardev:con \
-mon chardev=con,mode=readline -kernel ./nuttx/nutt
mkdir mnt
mount -t v9fs -o trans=virtio,tag=host mnt
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
Split nucleo-f4x1re into nucleo-f401re and nucleo-f411re.
These are separate boards and should be in separate directories as it's
done for all other nucleo boards in NuttX
version of the Pico SDK in their install instructions. All information
in the board README.txt files are now moved into the RST files to help
with the removal of the old READMEs.
nucleo-144 combines 3 different ST boards. This approach is inconsistent with
the support for the rest of the nucleo boards, where each board is in separate folders.
Also nucleo-144 is no longer reserved for STM32F7 chips but other families also use this format.
After this commit nucleo-144 is divided into 3 boards:
- nucleo-f746zg
- nucleo-f767zi
- nucleo-f722ze
Implement PIC loading in armv8-m qemu,
for example: load address-independent AP ELF in the bootloader,
and the text segment in AP ELF is XIP,
no need to apply for memory and modify it.
Two config:
bootloader abbreviation bl:
use romfs to load ap elf, use the boot command to parse and jump to ap
application abbreviation ap:
run os test
We need to compile ap first, then compile bl.
compile step:
./tools/configure.sh mps3-an547:ap
make -j20
mkdir -p pic
cp boot pic/.
genromfs -a 128 -f ../romfs.img -d pic
make distclean -j20
./tools/configure.sh mps3-an547:bl
make -j20
run qemu:
qemu-system-arm -M mps3-an547 -m 2G -nographic -kernel nuttx.bin \
-gdb tcp::1127 -device loader,file=../romfs.img,addr=0x60000000
nsh> boot /etc/boot
ap> ostest
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
* Information on how to flash NuttX firmware to STM32F4 target was missing
in the documentation and asked by new users on the dev@ list.
* Example on how to Flash, Reset, Debug with OpenOCD is now added to docs.
Signed-off-by: Tomasz 'CeDeROM' CEDRO <tomek@cedro.info>
* Information on how to flash NuttX firmware to STM32F7 target was missing
in the documentation and asked by new users on the dev@ list.
* Example on how to Flash, Reset, Debug with OpenOCD is now added to docs.
Signed-off-by: Tomasz 'CeDeROM' CEDRO <tomek@cedro.info>
* Information on how to flash NuttX firmware to STM32F3 target was missing
in the documentation and asked by new users on the dev@ list.
* Example on how to Flash, Reset, Debug with OpenOCD is now added to docs.
Signed-off-by: Tomasz 'CeDeROM' CEDRO <tomek@cedro.info>
Stack and backtrace dump for Espressif's SoCs (ESP32, ESP32-S2,
ESP32-S3, ESP32-C3, ESP32-C6 and ESP32-H2) is now documented in a
new section for each chip entry page.
