forked from nuttx/nuttx-update
cd2fcf5252
Most tools used for compliance and SBOM generation use SPDX identifiers This change brings us a step closer to an easy SBOM generation. Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
438 lines
14 KiB
C
438 lines
14 KiB
C
/****************************************************************************
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* include/nuttx/sensors/lis2dh.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __INCLUDE_NUTTX_SENSORS_LIS2DH_H
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#define __INCLUDE_NUTTX_SENSORS_LIS2DH_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/sensors/ioctl.h>
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/****************************************************************************
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* Pre-Processor Declarations
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****************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#define ST_LIS2DH_WHOAMI_VALUE 0x33 /* Valid WHOAMI register value */
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/* LIS2DH Internal Registers ************************************************/
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#define ST_LIS2DH_WHOAMI_REG 0x0f /* WHOAMI register */
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#define ST_LIS2DH_STATUS_AUX_REG 0x07 /* Temperature status */
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#define ST_LIS2DH_OUT_TEMP_L_REG 0x0c /* Temperature data */
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#define ST_LIS2DH_OUT_TEMP_H_REG 0x0d /* Temperature data */
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#define ST_LIS2DH_TEMP_CFG_REG 0x1f
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#define ST_LIS2DH_CTRL_REG1 0x20
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/* CR1 ODR 4 MSBs (XXXX---) */
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#define ST_LIS2DH_CR1_ODR_PWR_DWN 0x00
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#define ST_LIS2DH_CR1_ODR_1HZ 0x10 /* HR / Normal / Low Power */
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#define ST_LIS2DH_CR1_ODR_10HZ 0x20 /* HR / Normal / Low Power */
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#define ST_LIS2DH_CR1_ODR_25HZ 0x30 /* HR / Normal / Low Power */
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#define ST_LIS2DH_CR1_ODR_50HZ 0x40 /* HR / Normal / Low Power */
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#define ST_LIS2DH_CR1_ODR_100HZ 0x50 /* HR / Normal / Low Power */
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#define ST_LIS2DH_CR1_ODR_200HZ 0x60 /* HR / Normal / Low Power */
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#define ST_LIS2DH_CR1_ODR_400HZ 0x70 /* HR / Normal / Low Power */
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#define ST_LIS2DH_CR1_ODR_1620HZ 0x80 /* Low Power */
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#define ST_LIS2DH_CR1_ODR_1344_5376HZ 0x90 /* HR / Normal: 1344Hz, Low power: 5376Hz*/
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#define ST_LIS2DH_CR1_LOWP_ENABLE 0x08 /* Low power mode enable */
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#define ST_LIS2DH_CR1_ZEN 0x04 /* Z-Axis Enable */
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#define ST_LIS2DH_CR1_YEN 0x02 /* Y-Axis Enable */
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#define ST_LIS2DH_CR1_XEN 0x01 /* X-Axis Enable */
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#define ST_LIS2DH_CTRL_REG2 0x21
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/* HPM1 .... HP FILT_MODE (XX------) */
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#define ST_LIS2DH_CR2_HPFILT_M_NORM 0x00 /* Normal mode (reset reading REFERENCE/DATACAPTURE (26h) register) */
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#define ST_LIS2DH_CR2_HPFILT_M_REFSIG 0x40 /* Reference signal for filtering */
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#define ST_LIS2DH_CR2_HPFILT_M_NORM2 0x80 /* Normal mode */
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#define ST_LIS2DH_CR2_HPFILT_M_AUTOR 0xc0 /* Autoreset on interrupt event */
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#define ST_LIS2DH_CR2_FDS 0x08
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/* HPIS1 HPFILT ENABLE for INT1 (-------X) */
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#define ST_LIS2DH_CR2_HPENABLED_INT1 0x01 /* HP filter enabled for INT1 */
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/* HPIS2 HPFILT ENABLE for INT2 (------X-) */
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#define ST_LIS2DH_CR2_HPENABLED_INT2 0x02 /* HP filter enabled for INT2 */
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#define ST_LIS2DH_CTRL_REG3 0x22
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/* I1_AOI1 ENABLE for INT2 (-X------) */
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#define ST_LIS2DH_CR3_I1_AOI1_ENABLED 0x40 /* AOI1 interrupt on INT1 pin. */
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#define ST_LIS2DH_CR3_I1_AOI2_ENABLED 0x20 /* AOI2 interrupt on INT1 pin. */
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#define ST_LIS2DH_CR3_I1_DRDY1 0x10 /* DRDY1 interrupt on INT1 pin. */
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#define ST_LIS2DH_CR3_I1_DRDY2 0x08 /* DRDY2 interrupt on INT1 pin. */
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#define ST_LIS2DH_CR3_I1_WTM 0x04 /* FIFO Watermark interrupt on INT1 pin. */
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#define ST_LIS2DH_CR3_I1_OVERRUN 0x02 /* FIFO Overrun interrupt on INT1 pin. */
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#define ST_LIS2DH_CTRL_REG4 0x23
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/* BDU ... Block Data Update (X-------) */
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#define ST_LIS2DH_CR4_BDU_CONT 0x00 /* Continuous update (Default) */
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#define ST_LIS2DH_CR4_BDU_UPD_ON_READ 0x80 /* Output registers not updated until MSB and LSB have been read */
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#define ST_LIS2DH_CR4_FULL_SCALE_2G 0x0
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#define ST_LIS2DH_CR4_FULL_SCALE_4G 0x10
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#define ST_LIS2DH_CR4_FULL_SCALE_8G 0x20
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#define ST_LIS2DH_CR4_FULL_SCALE_16G 0x30
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/* HR .. Operation mode selector (----X---) */
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#define ST_LIS2DH_CR4_HR_ENABLED 0x08 /* See section 2.6.3 in datasheet */
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#define ST_LIS2DH_CTRL_REG5 0x24
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#define ST_LIS2DH_CR5_BOOT 0x80
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#define ST_LIS2DH_CR5_FIFO_EN 0x40
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#define ST_LIS2DH_CR5_LIR_INT1 0x08
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#define ST_LIS2DH_CR5_D4D_INT1 0x04
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#define ST_LIS2DH_CR5_LIR_INT2 0x02
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#define ST_LIS2DH_CR5_D4D_INT2 0x01
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#define ST_LIS2DH_CTRL_REG6 0x25
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#define ST_LIS2DH_REFERENCE_REG 0x26
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#define ST_LIS2DH_STATUS_REG 0x27 /* Status Register */
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#define ST_LIS2DH_SR_ZYXOR 0x80 /* OR'ed X,Y and Z data over-run */
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#define ST_LIS2DH_SR_ZOR 0x40 /* individual data over-run ... */
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#define ST_LIS2DH_SR_YOR 0x20
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#define ST_LIS2DH_SR_XOR 0x10
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#define ST_LIS2DH_SR_ZYXDA 0x08 /* OR'ed X,Y and Z data available */
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#define ST_LIS2DH_SR_ZDA 0x04 /* individual data available ... */
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#define ST_LIS2DH_SR_YDA 0x02
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#define ST_LIS2DH_SR_XDA 0x01
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#define ST_LIS2DH_OUT_X_L_REG 0x28
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#define ST_LIS2DH_OUT_X_H_REG 0x29
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#define ST_LIS2DH_OUT_Y_L_REG 0x2a
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#define ST_LIS2DH_OUT_Y_H_REG 0x2b
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#define ST_LIS2DH_OUT_Z_L_REG 0x2c
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#define ST_LIS2DH_OUT_Z_H_REG 0x2d
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#define ST_LIS2DH_FIFO_CTRL_REG 0x2e
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#define ST_LIS2DH_FIFOCR_THRESHOLD_MASK 0x1f
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#define ST_LIS2DH_FIFOCR_THRESHOLD(x) ((x) & ST_LIS2DH_FIFOCR_THRESHOLD_MASK)
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#define ST_LIS2DH_FIFOCR_INT1 0x00
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#define ST_LIS2DH_FIFOCR_INT2 0x20
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#define ST_LIS2DH_FIFOCR_MODE_MASK 0xc0
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#define ST_LIS2DH_FIFO_SRC_REG 0x2f
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#define ST_LIS2DH_FIFOSR_NUM_SAMP_MASK 0x1f
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#define ST_LIS2DH_FIFOSR_EMPTY 0x20
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#define ST_LIS2DH_FIFOSR_OVRN_FIFO 0x40
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#define ST_LIS2DH_FIFOSR_WTM 0x80
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#define ST_LIS2DH_INT1_CFG_REG 0x30
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#define ST_LIS2DH_INT_CFG_AOI 0x80
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#define ST_LIS2DH_INT_CFG_6D 0x40
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#define ST_LIS2DH_INT_CFG_ZHIE 0x20
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#define ST_LIS2DH_INT_CFG_ZLIE 0x10
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#define ST_LIS2DH_INT_CFG_YHIE 0x08
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#define ST_LIS2DH_INT_CFG_YLIE 0x04
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#define ST_LIS2DH_INT_CFG_XHIE 0x02
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#define ST_LIS2DH_INT_CFG_XLIE 0x01
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#define ST_LIS2DH_INT1_SRC_REG 0x31
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#define ST_LIS2DH_INT_SR_XLOW 0x01
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#define ST_LIS2DH_INT_SR_XHIGH 0x02
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#define ST_LIS2DH_INT_SR_YLOW 0x04
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#define ST_LIS2DH_INT_SR_YHIGH 0x08
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#define ST_LIS2DH_INT_SR_ZLOW 0x10
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#define ST_LIS2DH_INT_SR_ZHIGH 0x20
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#define ST_LIS2DH_INT_SR_ACTIVE 0x40
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#define ST_LIS2DH_INT1_THS_REG 0x32 /* 7-bit value for threshold */
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#define ST_LIS2DH_INT1_DUR_REG 0x33 /* 7-bit value for duration */
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#define ST_LIS2DH_INT2_CFG_REG 0x34
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#define ST_LIS2DH_INT2_SRC_REG 0x35
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#define ST_LIS2DH_INT2_THS_REG 0x36 /* 7-bit value for threshold */
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#define ST_LIS2DH_INT2_DUR_REG 0x37 /* 7-bit value for duration */
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#define ST_LIS2DH_CLICK_CFG_REG 0x38
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#define ST_LIS2DH_CLICK_SRC_REG 0x39
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#define ST_LIS2DH_CLICK_THS_REG 0x3a
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#define ST_LIS2DH_TIME_LIMIT_REG 0x3b
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#define ST_LIS2DH_TIME_LATENCY_REG 0x3c
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#define ST_LIS2DH_TIME_WINDOW_REG 0x3d
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#define ST_LIS2DH_ACT_DUR_REG 0x3f
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/****************************************************************************
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* Public Types
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****************************************************************************/
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enum lis2dh_ouput_data_rate
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{
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LIS2DH_ODR_POWER_DOWN = 0x00,
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LIS2DH_ODR_1HZ = 0x10,
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LIS2DH_ODR_10HZ = 0x20,
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LIS2DH_ODR_25HZ = 0x30,
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LIS2DH_ODR_50HZ = 0x40,
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LIS2DH_ODR_100HZ = 0x50,
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LIS2DH_ODR_200HZ = 0x60,
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LIS2DH_ODR_400HZ = 0x70,
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LIS2DH_ODR_1620HZ = 0x80,
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LIS2DH_ODR_5376HZ = 0x90,
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};
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enum lis2dh_high_pass_filter_mode
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{
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LIS2DH_REFERENCE_SIGNAL = 0x40,
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LIS2DH_NORMAL_MODE = 0x80,
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LIS2DH_AUTORESET_ON_INTERRUPT = 0xc0,
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};
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enum lis2dh_scale_range
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{
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LIS2DH_RANGE_2G = 0x00,
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LIS2DH_RANGE_4G = 0x10,
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LIS2DH_RANGE_8G = 0x20,
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LIS2DH_RANGE_16G = 0x30,
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};
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enum lis2dh_self_test
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{
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LIS2DH_NORMAL = 0x00,
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LIS2DH_SELF_TEST0 = 0x02,
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LIS2DH_SELF_TEST1 = 0x04,
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};
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enum lis2dh_fifo_mode
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{
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LIS2DH_BYPASS_MODE = 0x00,
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LIS2DH_FIFO_MODE = 0x40,
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LIS2DH_STREAM_MODE = 0x80,
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LIS2DH_TRIGGER_MODE = 0xc0,
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};
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enum lis2dh_interrupt_mode
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{
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LIS2DH_OR_COMBINATION = 0x00,
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LIS2DH_6D_MOVEMENT = 0x40,
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LIS2DH_AND_COMBINATION = 0x80,
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LIS2DH_6D_POSITION = 0xc0,
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};
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begin_packed_struct struct lis2dh_vector_s
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{
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int16_t x;
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int16_t y;
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int16_t z;
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} end_packed_struct;
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begin_packed_struct struct lis2dh_res_header
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{
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uint8_t meas_count;
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bool int1_occurred;
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uint8_t int1_source;
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bool int2_occurred;
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uint8_t int2_source;
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} end_packed_struct;
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begin_packed_struct struct lis2dh_result
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{
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struct lis2dh_res_header header;
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struct lis2dh_vector_s measurements[0];
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} end_packed_struct;
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struct lis2dh_setup
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{
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bool temp_enable:1;
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bool xy_axis_fixup:1;
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uint8_t data_rate;
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uint8_t low_power_mode_enable;
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uint8_t zen;
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uint8_t yen;
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uint8_t xen;
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uint8_t hpmode;
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uint8_t hpcf;
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uint8_t fds;
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uint8_t hpclick;
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uint8_t hpis2;
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uint8_t hpis1;
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uint8_t int1_click_enable;
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uint8_t int1_aoi_enable;
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uint8_t int2_aoi_enable;
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uint8_t int1_drdy_enable;
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uint8_t int2_drdy_enable;
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uint8_t int_wtm_enable;
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uint8_t int_overrun_enable;
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uint8_t bdu;
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uint8_t endian;
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uint8_t fullscale;
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uint8_t high_resolution_enable;
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uint8_t selftest;
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uint8_t spi_mode;
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uint8_t reboot;
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uint8_t fifo_enable;
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uint8_t int1_latch;
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uint8_t int1_4d_enable;
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uint8_t int2_latch;
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uint8_t int2_4d_enable;
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uint8_t int2_click_enable;
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uint8_t int_enable;
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uint8_t boot_int1_enable;
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uint8_t high_low_active;
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uint8_t reference;
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uint8_t fifo_mode;
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uint8_t trigger_selection;
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uint8_t fifo_trigger_threshold;
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uint8_t int1_interrupt_mode;
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uint8_t int1_enable_6d;
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uint8_t int1_int_z_high_enable;
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uint8_t int1_int_z_low_enable;
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uint8_t int1_int_y_high_enable;
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uint8_t int1_int_y_low_enable;
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uint8_t int1_int_x_high_enable;
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uint8_t int1_int_x_low_enable;
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uint8_t int1_int_threshold;
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uint8_t int1_int_duration;
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uint8_t int2_interrupt_mode;
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uint8_t int2_enable_6d;
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uint8_t int2_int_z_high_enable;
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uint8_t int2_int_z_low_enable;
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uint8_t int2_int_y_high_enable;
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uint8_t int2_int_y_low_enable;
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uint8_t int2_int_x_high_enable;
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uint8_t int2_int_x_low_enable;
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uint8_t int2_int_threshold;
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uint8_t int2_int_duration;
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uint8_t z_double_click_enable;
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uint8_t z_single_click_enable;
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uint8_t y_double_click_enable;
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uint8_t y_single_click_enable;
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uint8_t x_double_click_enable;
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uint8_t x_single_click_enable;
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uint8_t click_threshold;
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uint8_t click_time_limit;
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uint8_t click_time_latency;
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uint8_t click_time_window;
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};
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struct lis2dh_config_s
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{
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/* Device characterization */
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int irq; /* IRQ number received by interrupt handler. */
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/* IRQ/GPIO access callbacks. These operations all hidden behind
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* callbacks to isolate the lis2dh driver from differences in GPIO
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* interrupt handling by varying boards and MCUs.
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*
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* irq_attach - Attach the lis2dh interrupt handler to the GPIO interrupt
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* irq_enable - Enable or disable the GPIO interrupt
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* clear_irq - Acknowledge/clear any pending GPIO interrupt
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*
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*/
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CODE int (*irq_attach)(FAR struct lis2dh_config_s *state,
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xcpt_t isr,
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FAR void *arg);
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CODE void (*irq_enable)(FAR const struct lis2dh_config_s *state,
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bool enable);
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CODE void (*irq_clear)(FAR const struct lis2dh_config_s *state);
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CODE bool (*read_int1_pin)(void);
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CODE bool (*read_int2_pin)(void);
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};
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begin_packed_struct struct lis2dh_raw_data_s
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{
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uint16_t out_x;
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uint16_t out_y;
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uint16_t out_z;
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} end_packed_struct;
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typedef struct lis2dh_raw_data_s lis2dh_raw_data_t;
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: lis2dh_register
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*
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* Description:
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* Register the LIS2DH character device as 'devpath'
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*
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* Input Parameters:
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* devpath - The full path to the driver to register. E.g., "/dev/acc0"
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* i2c - An instance of the I2C interface to use to communicate with
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* LIS2DH
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* addr - The I2C address of the LIS2DH. The base I2C address of the
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* LIS2DH is 0x18.
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* Bit 0 can be controlled via SA0 pad - when connected to
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* voltage supply the address is 0x19.
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* config - Pointer to LIS2DH configuration
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno value on failure.
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*
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****************************************************************************/
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int lis2dh_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
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uint8_t addr, FAR struct lis2dh_config_s *config);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __INCLUDE_NUTTX_SENSORS_LIS2DH_H */
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