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Update doc
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README.md
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README.md
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@ -2998,7 +2998,7 @@ There's plenty happening inside [__Execute Module: exec_module__](https://github
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# UART Interrupt for Ox64 BL808
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TODO: UART Interrupts not triggered
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Let's fix the UART Interrupts for NuttX on Ox64 BL808!
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We fix the PLIC Offsets according to [C906 User Manual (Page 77)](https://occ-intl-prod.oss-ap-southeast-1.aliyuncs.com/resource/XuanTie-OpenC906-UserManual.pdf)
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@ -3229,6 +3229,36 @@ After Claim (0xe0001000):
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TODO: Fix Interrupt Pending
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_Something special about T-Head C906 PLIC?_
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From this [Linux Patch](https://lore.kernel.org/lkml/CAJF2gTS8Z+6Ewy0D5+0X_h2Jz4BqsJp7wEC5F0iNaDsSpiE2aw@mail.gmail.com/)
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> "The T-HEAD C9xx SoC implements a modified/custom T-HEAD PLIC
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specification which will mask current IRQ upon read to CLAIM register
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and will unmask the IRQ upon write to CLAIM register. The
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thead,c900-plic compatible string represents the custom T-HEAD PLIC
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specification."
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"thead,c900-plic" is implemented in Linux here: [irq-sifive-plic.c](https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-sifive-plic.c#L574-L582)
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Which sets [PLIC_QUIRK_EDGE_INTERRUPT](https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-sifive-plic.c#L64), which is used by...
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- [plic_irq_set_type](https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-sifive-plic.c#L212-L235)
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- [plic_irq_domain_translate](https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-sifive-plic.c#L312-L325)
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TODO: What does it do?
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_Doesn't NuttX already implement C906 PLIC?_
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Yep but for Machine Mode only...
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- [c906_irq.c](https://github.com/apache/nuttx/blob/master/arch/risc-v/src/c906/c906_irq.c)
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- [c906_irq_dispatch.c](https://github.com/apache/nuttx/blob/master/arch/risc-v/src/c906/c906_irq_dispatch.c)
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TODO: Copy this code into BL808 PLIC
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TODO: Why is up_irqinitialize not setting Interrupt Priority properly? Signed arithmetic? Or delay?
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TODO: Why is Interrupt Priority set for 4 Interrupts, when we only set 1 (for UART)?
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