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README.md
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README.md
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@ -1104,8 +1104,97 @@ And the offending Data Address 0xc002104. (Which looks very familiar!)
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![NuttX prints our very first Stack Dump on Ox64 yay!](https://lupyuen.github.io/images/ox64-stack.png)
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![NuttX prints our very first Stack Dump on Ox64 yay!](https://lupyuen.github.io/images/ox64-stack.png)
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# Platform-Level Interrupt Controller for Ox64 BL808
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TODO
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TODO
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```text
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000000005020807a <modifyreg32>:
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up_irq_save():
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/Users/Luppy/ox64/nuttx/include/arch/irq.h:689
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5020807a: 4789 li a5,2
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5020807c: 1007b7f3 csrrc a5,sstatus,a5
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modifyreg32():
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/Users/Luppy/ox64/nuttx/arch/risc-v/src/common/riscv_modifyreg32.c:52
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{
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irqstate_t flags;
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uint32_t regval;
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flags = spin_lock_irqsave(NULL);
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regval = getreg32(addr);
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50208080: 4118 lw a4,0(a0)
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/Users/Luppy/ox64/nuttx/arch/risc-v/src/common/riscv_modifyreg32.c:53
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regval &= ~clearbits;
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50208082: fff5c593 not a1,a1
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/Users/Luppy/ox64/nuttx/arch/risc-v/src/common/riscv_modifyreg32.c:52
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regval = getreg32(addr);
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50208086: 2701 sext.w a4,a4
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```
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https://github.com/lupyuen2/wip-pinephone-nuttx/blob/ox64/arch/risc-v/src/common/riscv_modifyreg32.c#L38-L57
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```c
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/****************************************************************************
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* Name: modifyreg32
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*
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* Description:
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* Atomically modify the specified bits in a memory mapped register
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*
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****************************************************************************/
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void modifyreg32(uintptr_t addr, uint32_t clearbits, uint32_t setbits)
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{
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irqstate_t flags;
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uint32_t regval;
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flags = spin_lock_irqsave(NULL);
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// Crashes here because `addr` is invalid...
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regval = getreg32(addr);
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regval &= ~clearbits;
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regval |= setbits;
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putreg32(regval, addr);
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spin_unlock_irqrestore(NULL, flags);
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}
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```
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TODO
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```c
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// From https://github.com/lupyuen2/wip-pinephone-nuttx/blob/ox64/arch/risc-v/src/jh7110/hardware/jh7110_memorymap.h#L30
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#define JH7110_PLIC_BASE 0x0c000000
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// From https://github.com/lupyuen2/wip-pinephone-nuttx/blob/ox64/arch/risc-v/src/jh7110/hardware/jh7110_plic.h#L34-L49
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/* Interrupt Priority */
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#define JH7110_PLIC_PRIORITY (JH7110_PLIC_BASE + 0x000000)
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/* Hart 1 S-Mode Interrupt Enable */
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#define JH7110_PLIC_ENABLE1 (JH7110_PLIC_BASE + 0x002100)
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#define JH7110_PLIC_ENABLE2 (JH7110_PLIC_BASE + 0x002104)
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/* Hart 1 S-Mode Priority Threshold */
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#define JH7110_PLIC_THRESHOLD (JH7110_PLIC_BASE + 0x202000)
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/* Hart 1 S-Mode Claim / Complete */
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#define JH7110_PLIC_CLAIM (JH7110_PLIC_BASE + 0x202004)
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```
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https://github.com/lupyuen/nuttx-ox64/blob/main/bl808-pine64-ox64.dts#L129-L138
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```text
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interrupt-controller@e0000000 {
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compatible = "thead,c900-plic";
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reg = <0xe0000000 0x4000000>;
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interrupts-extended = <0x06 0xffffffff 0x06 0x09>;
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interrupt-controller;
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#address-cells = <0x00>;
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#interrupt-cells = <0x02>;
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riscv,ndev = <0x40>;
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phandle = <0x01>;
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};
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```
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[XuanTie OpenC906 User Manual](https://occ-intl-prod.oss-ap-southeast-1.aliyuncs.com/resource/XuanTie-OpenC906-UserManual.pdf)
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# Documentation for Ox64 BL808
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# Documentation for Ox64 BL808
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- ["Ox64 BL808 RISC-V SBC: Booting Linux and (maybe) Apache NuttX RTOS"](https://lupyuen.github.io/articles/ox64)
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- ["Ox64 BL808 RISC-V SBC: Booting Linux and (maybe) Apache NuttX RTOS"](https://lupyuen.github.io/articles/ox64)
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