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Log MMU PTE
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125
README.md
125
README.md
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@ -2158,6 +2158,46 @@ nx_start: CPU0: Beginning Idle Loop
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TODO: Who maps the User Memory for `lnvaddr=0x50600000`?
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__Compute Level 1 PTE:__
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Based the [Updated MMU Log with PTE](https://gist.github.com/lupyuen/22712d6a2c3a7eb2da1f3cd5c2f4f6cf)...
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```text
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connect the L1 and Interrupt L2 page tables for PLIC
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mmu_ln_setentry:
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ptlevel=1, lnvaddr=0x50407000, paddr=0x50403000, vaddr=0xe0000000, mmuflags=0x20
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mmu_ln_setentry:
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index=0x3,
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paddr=0x50403000,
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mmuflags=0x21,
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pte_addr=0x50407018,
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pte_val=0x14100c21
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```
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To compute the Address of Level 1 PTE:
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- pte_addr = lnvaddr + (index * 8) = 0x50407018
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(8 bytes per PTE)
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- index = vpn >> 18 = 3
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(Extract Bits 18 to 26 to get Level 1 Index)
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- vpn = vaddr >> 12 = 0xe0000
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(4096 bytes per Memory Page)
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To compute the Value of Level 1 PTE:
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- pte_val = (ppn << 10) | mmuflags = 0x14100c21
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(Shift 10 bits to accommodate MMU Flags)
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- ppn = paddr >> 12 = 0x50403
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(1<<12 bits per Memory Page)
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__Compute Level 2 PTE:__
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Based the [Updated MMU Log with PTE](https://gist.github.com/lupyuen/22712d6a2c3a7eb2da1f3cd5c2f4f6cf)...
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@ -2176,16 +2216,6 @@ mmu_ln_setentry:
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pte_val=0x380000e7
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```
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To compute the Value of Level 2 PTE:
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- pte_val = (ppn << 10) | mmuflags = 0x380000e7
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(Shift 10 bits to accommodate MMU Flags)
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- ppn = paddr >> 12 = 0xe0000
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(4096 bytes per Memory Page)
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To compute the Address of Level 2 PTE:
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- pte_addr = lnvaddr + (index * 8) = 0x50403800
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@ -2200,65 +2230,60 @@ To compute the Address of Level 2 PTE:
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(4096 bytes per Memory Page)
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__Compute Level 1 PTE:__
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To compute the Value of Level 2 PTE:
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Based the [Updated MMU Log with PTE](https://gist.github.com/lupyuen/22712d6a2c3a7eb2da1f3cd5c2f4f6cf)...
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```text
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connect the L1 and Interrupt L2 page tables for PLIC
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mmu_ln_setentry:
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ptlevel=1, lnvaddr=0x50407000, paddr=0x50403000, vaddr=0xe0000000, mmuflags=0x20
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mmu_ln_setentry:
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index=0x3,
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paddr=0x50403000,
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mmuflags=0x21,
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pte_addr=0x50407018,
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pte_val=0x14100c21
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```
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To compute the Value of Level 1 PTE:
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- pte_val = (ppn << 10) | mmuflags = 0x14100c21
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- pte_val = (ppn << 10) | mmuflags = 0x380000e7
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(Shift 10 bits to accommodate MMU Flags)
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- ppn = paddr >> 12 = 0x50403
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(1<<12 bits per Memory Page)
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To compute the Address of Level 1 PTE:
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- pte_addr = lnvaddr + (index * 8) = 0x50407018
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(8 bytes per PTE)
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- index = vpn >> 18 = 3
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(Extract Bits 18 to 26 to get Level 1 Index)
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- vpn = vaddr >> 12 = 0xe0000
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- ppn = paddr >> 12 = 0xe0000
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(4096 bytes per Memory Page)
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__Compute Level 3 PTE:__
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Based the [Updated MMU Log with PTE](https://gist.github.com/lupyuen/22712d6a2c3a7eb2da1f3cd5c2f4f6cf)...
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```text
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map kernel text
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mmu_ln_setentry:
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ptlevel=2, lnvaddr=0x50406000, paddr=0x50404000, vaddr=0x50200000, mmuflags=0x0
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mmu_ln_setentry:
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index=0x81, paddr=0x50404000, mmuflags=0x1, pte_addr=0x50406408, pte_val=0x14101001
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...
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mmu_ln_setentry: ptlevel=3, lnvaddr=0x50404000, paddr=0x5020100, vaddr=0x50201000, mmuflags=0x2a
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mmu_ln_setentry:
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ptlevel=3, lnvaddr=0x50404000, paddr=0x50200000, vaddr=0x50200000, mmuflags=0x2a
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mmu_ln_setentry:
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index=0,
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paddr=0x50200000,
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index=0x1,
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paddr=0x50201000,
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mmuflags=0xeb,
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pte_addr=0x50404000,
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pte_val=0x140800eb
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pte_addr=0x50404008,
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pte_val=0x140804eb
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```
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To compute the Address of Level 3 PTE:
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- pte_addr = lnvaddr + (index * 8) = 0x50404008
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(8 bytes per PTE)
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- index = vpn & 0b111111111 = 0x1
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(Extract Bits 0 to 18 to get Level 3 Index)
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- vpn = vaddr >> 12 = 0x50201
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(4096 bytes per Memory Page)
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To compute the Value of Level 3 PTE:
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- pte_val = (ppn << 10) | mmuflags = 0x140804eb
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(Shift 10 bits to accommodate MMU Flags)
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- ppn = paddr >> 12 = 0x50201
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(4096 bytes per Memory Page)
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TODO
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# Documentation for Ox64 BL808
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