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Lee Lup Yuen 2023-07-01 13:51:26 +08:00
parent 659e8035ea
commit 17714921d3
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README.md
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@ -849,6 +849,8 @@ nsh>
Which is correct because QEMU is running with 8 CPUs. Yay!
![NuttX prints to QEMU Console](https://lupyuen.github.io/images/riscv-print.png)
[Cody AI Assistant](https://about.sourcegraph.com/cody) explains our RISC-V Assembly Code...
![Cody AI Assistant explains our RISC-V Assembly Code](https://lupyuen.github.io/images/riscv-cody1.png)
@ -958,7 +960,7 @@ Check that the lengths and offsets match the RISC-V Linux Header Format.
Tested OK with QEMU.
# NuttX Kernel Start Address
# Set Start Address of NuttX Kernel
TODO: Set Kernel Start Address
@ -1003,6 +1005,16 @@ SECTIONS
.text :
```
RISC-V Disassembly of NuttX Kernel shows that the Start Address is correct...
```text
0000000044000000 <__start>:
li s4, -0xd /* Magic Signature "MZ" (2 bytes) */
44000000: 5a4d li s4,-13
j real_start /* Jump to Kernel Start (2 bytes) */
44000002: a83d j 44000040 <real_start>
```
# NuttX on Star64
TODO: Set UART Base Address