UART not ready

This commit is contained in:
Lee Lup Yuen 2023-07-28 12:32:13 +08:00
parent 6da42c0f63
commit aad30cd48f

View file

@ -3402,37 +3402,25 @@ AAADEF[FKnx_start: CPU0: Beginning Idle Loop
`F`: [`u16550_send`](https://github.com/lupyuen2/wip-pinephone-nuttx/blob/star64d/drivers/serial/uart_16550.c#L1542-L1556)
From Star64: [`uart_txready`](https://github.com/lupyuen2/wip-pinephone-nuttx/blob/star64d/drivers/serial/serial_io.c#L63-L68) is NOT Ready
From Star64: [`uart_txready`](https://github.com/lupyuen2/wip-pinephone-nuttx/blob/star64d/drivers/serial/serial_io.c#L63-L68) is NOT Ready, that's why it doesn't call [`u16550_send`](https://github.com/lupyuen2/wip-pinephone-nuttx/blob/star64d/drivers/serial/uart_16550.c#L1542-L1556)
```text
clk u5_dw_i2c_clk_core already disabled
clk u5_dw_i2c_clk_apb already disabled
123067DFHBCInx_start: Entry
uart_register: Registering /dev/console
uart_register: Registering /dev/ttyS0
work_start_lowpri: Starting low-priority kernel worker thread(arting init task: /system/bin/init
elf_symname: Symbol has no name
elf_symvalue: SHN_UNDEF: Failed to get symbol name: -3
elf_relocateadd: Section 2 reloc 2: Undefined symbol[0] has no name: -3
nx_start_application: ret=3
up_exit: TCB=0x404088d0 exiting
uart_write (0xc0200428):
0000 2a 2a 2a 6d 61 69 6e 0a ***main.
AAAAAAAAADuart_write (0xc000a610):
0000 0a 4e 75 74 74 53 68 65 6c 6c 20 28 4e 53 48 29 .Nut33 0a NuttX-12.0.3.
0000 0a 4e 75 74 74 53 68 65 6c 6c 20 28 4e 53 48 29 .NuttShell (NSH)
0010 20 4e 75 74 74 58 2d 31 32 2e 30 2e 33 0a NuttX-12.0.3.
AAAAAAAAAAAAAAAuart_write (0xc0015340):
0000 6e 73 68 3e 20 nsh>
AAAAADuart_write (0xc0015318):
0000 1b 5b 4b .[K
AAADnx_start: CPU0: Beginning Idle Loo
AAADnx_start: CPU0: Beginning Idle Loop
```
- Is our [__Interrupt Controller__](https://github.com/lupyuen2/wip-pinephone-nuttx/blob/star64c/arch/risc-v/src/qemu-rv/hardware/qemu_rv_memorymap.h#L27-L33) OK?
[(See the __JH7110 U74 Memory Map__)](https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/u74_memory_map.html)
# RAM Disk Address for RISC-V QEMU
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