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Print to UART OK yay!
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@ -262,6 +262,10 @@ u32 magic2 = 0x05435352; /* Magic number 2, little endian, "RSC\x05" */
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u32 res3; /* Reserved for PE COFF offset */
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```
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This is how we decode the RISC-V Linux Header...
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- [__"Decode the RISC-V Linux Header"__](https://lupyuen.github.io/articles/star64#appendix-decode-the-risc-v-linux-header)
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Let's decompile the Kernel Image...
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TODO: Explain MZ and the funny RISC-V instruction at the top
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@ -833,6 +837,10 @@ Which is correct because QEMU is running with 8 CPUs.
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TODO: Embed Linux Kernel Header in QEMU
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This is how we decode the RISC-V Linux Header...
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- [__"Decode the RISC-V Linux Header"__](https://lupyuen.github.io/articles/star64#appendix-decode-the-risc-v-linux-header)
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TODO: Set Kernel Start Address
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From [nsh64/defconfig](https://github.com/lupyuen2/wip-pinephone-nuttx/blob/star64/boards/risc-v/qemu-rv/rv-virt/configs/nsh64/defconfig#L56-L57):
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