From c5810f55a86c142b9dad2ae65b6d8e388f3c53dd Mon Sep 17 00:00:00 2001 From: Lee Lup Yuen Date: Sat, 3 Sep 2022 19:33:58 +0800 Subject: [PATCH] Add device tree --- README.md | 307 +---- sun50i-a64-pinephone-1.2.dts | 2053 ++++++++++++++++++++++++++++++++++ 2 files changed, 2084 insertions(+), 276 deletions(-) create mode 100644 sun50i-a64-pinephone-1.2.dts diff --git a/README.md b/README.md index 339f306..68b0885 100644 --- a/README.md +++ b/README.md @@ -22,7 +22,17 @@ PinePhone is based on [Allwinner A64 SoC](https://linux-sunxi.org/A64) with 4 Co - [PinePhone Wiki](https://wiki.pine64.org/index.php/PinePhone) -Will NuttX run on PinePhone? Let's find out! +_Will NuttX run on PinePhone?_ + +Yep it does! PinePhone (with a Serial Debug Cable) boots to the NuttX Shell... + +- [Watch the Demo on YouTube](https://youtube.com/shorts/WmRzfCiWV6o?feature=share) + +Here's the NuttX Source Code for PinePhone... + +- NuttX OS: [lupyuen/incubator-nuttx/tree/pinephone](https://github.com/lupyuen/incubator-nuttx/tree/pinephone) + +- NuttX Apps: [lupyuen/incubator-nuttx-apps/tree/pinephone](https://github.com/lupyuen/incubator-nuttx-apps/tree/pinephone) _Why NuttX?_ @@ -32,8 +42,12 @@ Someday we might have a cheap, fast, responsive and tweakable phone running on N Many thanks to [qinwei2004](https://github.com/qinwei2004) and the NuttX Team for implementing [Cortex-A53 support](https://github.com/apache/incubator-nuttx/pull/6478)! +The following is a journal that documents the porting of NuttX to PinePhone. It looks super messy and unstructured, please read the articles (at the top of this page) instead. + # Download NuttX +We start with NuttX Mainline, run it on QEMU, then mod it for PinePhone. + Download the Source Code for NuttX Mainline, which supports Arm Cortex-A53... ```bash @@ -2274,7 +2288,7 @@ Previously we noticed that NuttX Shell wasn't generating output on the Serial Co We discovered that `sinfo` (`syslog`) works, but `printf` (`puts`) doesn't! -https://github.com/lupyuen/incubator-nuttx-apps/blob/pinephone/system/nsh/nsh_main.c#L88-L102 +Here's what we tested with NuttX Shell: [system/nsh/nsh_main.c](https://github.com/lupyuen/incubator-nuttx-apps/blob/pinephone/system/nsh/nsh_main.c#L88-L102) ```c /**************************************************************************** @@ -2326,285 +2340,26 @@ We need to implement UART Transmit and Receive Interrupts to support NuttX Shell Here's our implementation... -TODO: Constants +- ["NuttX RTOS on PinePhone: UART Driver"](https://lupyuen.github.io/articles/serial) -https://github.com/lupyuen/incubator-nuttx/blob/pinephone/arch/arm64/src/qemu/qemu_serial.c#L60-L64 +# PinePhone Device Tree -```c -// UART0 IRQ Number for PinePhone Allwinner A64 UART -#define UART_IRQ 32 +Below is the Device Tree for PinePhone's Linux Kernel. We'll use this to figure out how Allwinner A64's Display Timing Controller (TCON0) talks to PinePhone's MIPI DSI Display... -// UART0 Base Address for PinePhone Allwinner A64 UART -#define UART_BASE_ADDRESS 0x01C28000 +- [PinePhone Device Tree: sun50i-a64-pinephone-1.2.dts](sun50i-a64-pinephone-1.2.dts) + +We converted the Device Tree with this command... + +``` +## Convert Device Tree to text format +dtc \ + -o sun50i-a64-pinephone-1.2.dts \ + -O dts \ + -I dtb \ + sun50i-a64-pinephone-1.2.dtb ``` -TODO: `qemu_pl011_txready` - -https://github.com/lupyuen/incubator-nuttx/blob/pinephone/arch/arm64/src/qemu/qemu_serial.c#L405-L414 - -```c -// Return true if PinePhone Allwinner A64 UART Transmit FIFO is not full -static bool qemu_pl011_txready(struct uart_dev_s *dev) -{ - //up_putc('C');//// - // LSR is at Offset 0x14 - const uint8_t *uart_lsr = (const uint8_t *) (UART_BASE_ADDRESS + 0x14); - - // Transmit FIFO is ready if THRE=1 (bit 5 of LSR) - return (*uart_lsr & 0x20) != 0; -} -``` - -TODO: `qemu_pl011_txempty` - -https://github.com/lupyuen/incubator-nuttx/blob/pinephone/arch/arm64/src/qemu/qemu_serial.c#L434-L439 - -```c -// Return true if PinePhone Allwinner A64 UART Transmit FIFO is empty -static bool qemu_pl011_txempty(struct uart_dev_s *dev) -{ - //up_putc('D');//// - return qemu_pl011_txready(dev); -} -``` - -TODO: `qemu_pl011_send` - -https://github.com/lupyuen/incubator-nuttx/blob/pinephone/arch/arm64/src/qemu/qemu_serial.c#L460-L466 - -```c -// Send one byte to PinePhone Allwinner A64 UART -static void qemu_pl011_send(struct uart_dev_s *dev, int ch) -{ - //up_putc('E');//// - uint8_t *uart0_base_address = (uint8_t *) UART_BASE_ADDRESS; - *uart0_base_address = ch; -} -``` - -TODO: `qemu_pl011_rxavailable` - -https://github.com/lupyuen/incubator-nuttx/blob/pinephone/arch/arm64/src/qemu/qemu_serial.c#L495-L512 - -```c -// TODO: Return true if PinePhone Allwinner A64 UART Receive FIFO is not empty -static bool qemu_pl011_rxavailable(struct uart_dev_s *dev) -{ - //up_putc('F');//// - - // UART Line Status Register (UART_LSR) - // Offset: 0x0014 - const uint8_t *uart_lsr = (const uint8_t *) (UART_BASE_ADDRESS + 0x14); - - // Bit 0: Data Ready (DR) - // This is used to indicate that the receiver contains at least one character in - // the RBR or the receiver FIFO. - // 0: no data ready - // 1: data ready - // This bit is cleared when the RBR is read in non-FIFO mode, or when the - // receiver FIFO is empty, in FIFO mode. - return (*uart_lsr) & 1; // DR=1 if data is ready -} -``` - -TODO: `qemu_pl011_rxint` - -https://github.com/lupyuen/incubator-nuttx/blob/pinephone/arch/arm64/src/qemu/qemu_serial.c#L539-L554 - -```c -// TODO: Enable or disable PinePhone Allwinner A64 UART interrupts -static void qemu_pl011_rxint(struct uart_dev_s *dev, bool enable) -{ - //up_putc('G');//// - - // Write to UART Interrupt Enable Register (UART_IER) - // Offset: 0x0004 - uint8_t *uart_ier = (uint8_t *) (UART_BASE_ADDRESS + 0x04); - - // Bit 0: Enable Received Data Available Interrupt (ERBFI) - // This is used to enable/disable the generation of Received Data Available Interrupt and the Character Timeout Interrupt (if in FIFO mode and FIFOs enabled). These are the second highest priority interrupts. - // 0: Disable - // 1: Enable - if (enable) { *uart_ier |= 0b00000001; } - else { *uart_ier &= 0b11111110; } -} -``` - -TODO: `qemu_pl011_txint` - -https://github.com/lupyuen/incubator-nuttx/blob/pinephone/arch/arm64/src/qemu/qemu_serial.c#L581-L596 - -```c -// TODO: Enable or disable PinePhone Allwinner A64 UART TX interrupts -static void qemu_pl011_txint(struct uart_dev_s *dev, bool enable) -{ - //up_putc('H');//// - - // Write to UART Interrupt Enable Register (UART_IER) - // Offset: 0x0004 - uint8_t *uart_ier = (uint8_t *) (UART_BASE_ADDRESS + 0x04); - - // Bit 1: Enable Transmit Holding Register Empty Interrupt (ETBEI) - // This is used to enable/disable the generation of Transmitter Holding Register Empty Interrupt. This is the third highest priority interrupt. - // 0: Disable - // 1: Enable - if (enable) { *uart_ier |= 0b00000010; } - else { *uart_ier &= 0b11111101; } -} -``` - -TODO: `qemu_pl011_receive` - -https://github.com/lupyuen/incubator-nuttx/blob/pinephone/arch/arm64/src/qemu/qemu_serial.c#L624-L643 - -```c -// TODO: Receive data from PinePhone Allwinner A64 UART -static int qemu_pl011_receive(struct uart_dev_s *dev, unsigned int *status) -{ - //up_putc('I');//// - - // Read UART Receiver Buffer Register (UART_RBR) - // Offset: 0x0000 - const uint8_t *uart_rbr = (const uint8_t *) (UART_BASE_ADDRESS + 0x00); - - // Data byte received on the serial input port . The data in this register is - // valid only if the Data Ready (DR) bit in the UART Line Status Register - // (UART_LCR) is set. - // - // If in FIFO mode and FIFOs are enabled (UART_FCR[0] set to one), this - // register accesses the head of the receive FIFO. If the receive FIFO is full - // and this register is not read before the next data character arrives, then - // the data already in the FIFO is preserved, but any incoming data are lost - // and an overrun error occurs. - return *uart_rbr; -} -``` - -TODO: `qemu_pl011_irq_handler` - -https://github.com/lupyuen/incubator-nuttx/blob/pinephone/arch/arm64/src/qemu/qemu_serial.c#L710-L747 - -```c -// Interrupt Handler for PinePhone Allwinner A64 UART -static int qemu_pl011_irq_handler(int irq, void *context, void *arg) -{ - //up_putc('M');//// - struct uart_dev_s *dev = (struct uart_dev_s *)arg; - UNUSED(irq); - UNUSED(context); - DEBUGASSERT(dev != NULL && dev->priv != NULL); - - // Read UART Interrupt Identity Register (UART_IIR) - // Offset: 0x0008 - const uint8_t *uart_iir = (const uint8_t *) (UART_BASE_ADDRESS + 0x08); - - // Bits 3:0: Interrupt ID - // This indicates the highest priority pending interrupt which can be one of the following types: - // 0000: modem status - // 0001: no interrupt pending - // 0010: THR empty - // 0100: received data available - // 0110: receiver line status - // 0111: busy detect - // 1100: character timeout - // Bit 3 indicates an interrupt can only occur when the FIFOs are enabled and used to distinguish a Character Timeout condition interrupt. - uint8_t int_id = (*uart_iir) & 0b1111; - - // 0100: If received data is available... - if (int_id == 0b0100) { - // Receive the data - uart_recvchars(dev); - - // 0010: If THR is empty (Transmit Holding Register)... - } else if (int_id == 0b0010) { - // Transmit the data - uart_xmitchars(dev); - - } - return OK; -} -``` - -TODO: `qemu_pl011_detach` - -https://github.com/lupyuen/incubator-nuttx/blob/pinephone/arch/arm64/src/qemu/qemu_serial.c#L770-L776 - -```c -// TODO: Detach PinePhone Allwinner A64 UART -static void qemu_pl011_detach(struct uart_dev_s *dev) -{ - //up_putc('J');//// - up_disable_irq(UART_IRQ); - irq_detach(UART_IRQ); -} -``` - -TODO: `qemu_pl011_attach` - -https://github.com/lupyuen/incubator-nuttx/blob/pinephone/arch/arm64/src/qemu/qemu_serial.c#L827-L852 - -```c -// TODO: Attach PinePhone Allwinner A64 UART -static int qemu_pl011_attach(struct uart_dev_s *dev) -{ - //up_putc('K');//// - int ret; - ret = irq_attach(UART_IRQ, qemu_pl011_irq_handler, dev); - arm64_gic_irq_set_priority(UART_IRQ, IRQ_TYPE_LEVEL, 0); - - if (ret == OK) - { - up_enable_irq(UART_IRQ); - } - else - { - sinfo("error ret=%d\n", ret); - } - -#ifdef TODO - if (!data->sbsa) - { - pl011_enable(sport); - } -#endif // TODO - - return ret; -} -``` - -TODO: Interrupt Priority: - -```text -Interrupt ID -Priority Level -Interrupt Type -Interrupt Source -Interrupt Reset - -0110 Highest -Receiver line status -Overrun/parity/framing errors or break interrupt - -Reading UART Line Status Register - -0100 Second -Received data available -Receiver data available (non-FIFO mode or FIFOs disabled) or RCVR FIFO trigger level reached (FIFO mode and FIFOs enabled) - -Reading UART Receiver Buffer Register (non-FIFO mode or FIFOs disabled) or the FIFO drops below the trigger level (FIFO mode and FIFOs enabled) - -1100 Second -Character timeout indication -No characters in or out of the RCVR FIFO during the last 4 character times and there is at least 1character in it during This time - -Reading UART Receiver Buffer Register - -0010 Third -Transmit holding register empty -Transmitter holding register empty (Program THRE Mode disabled) or XMIT FIFO at or below threshold (Program THRE Mode enabled) - -Reading UART Interrupt Identity Register (if source of interrupt); or, writing into THR (FIFOs or THRE Mode not selected or disabled) or XMIT FIFO above threshold (FIFOs and THRE Mode selected and enabled). -``` +We got `sun50i-a64-pinephone-1.2.dtb` from the [Jumpdrive microSD](https://lupyuen.github.io/articles/uboot#pinephone-jumpdrive). # GIC Register Dump diff --git a/sun50i-a64-pinephone-1.2.dts b/sun50i-a64-pinephone-1.2.dts new file mode 100644 index 0000000..68dff2d --- /dev/null +++ b/sun50i-a64-pinephone-1.2.dts @@ -0,0 +1,2053 @@ +/dts-v1/; + +/ { + interrupt-parent = <0x01>; + #address-cells = <0x01>; + #size-cells = <0x01>; + model = "Pine64 PinePhone (1.2)"; + compatible = "pine64,pinephone-1.2\0allwinner,sun50i-a64"; + + chosen { + #address-cells = <0x01>; + #size-cells = <0x01>; + ranges; + stdout-path = "serial0:115200n8"; + + framebuffer-lcd { + compatible = "allwinner,simple-framebuffer\0simple-framebuffer"; + allwinner,pipeline = "mixer0-lcd0"; + clocks = <0x02 0x64 0x03 0x06>; + status = "disabled"; + }; + + framebuffer-hdmi { + compatible = "allwinner,simple-framebuffer\0simple-framebuffer"; + allwinner,pipeline = "mixer1-lcd1-hdmi"; + clocks = <0x03 0x07 0x02 0x65 0x02 0x6e>; + status = "disabled"; + }; + }; + + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; + + cpu@0 { + compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <0x00>; + enable-method = "psci"; + next-level-cache = <0x04>; + clocks = <0x02 0x15>; + clock-names = "cpu"; + #cooling-cells = <0x02>; + operating-points-v2 = <0x05>; + cpu-supply = <0x06>; + phandle = <0x0b>; + }; + + cpu@1 { + compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <0x01>; + enable-method = "psci"; + next-level-cache = <0x04>; + clocks = <0x02 0x15>; + clock-names = "cpu"; + #cooling-cells = <0x02>; + operating-points-v2 = <0x05>; + cpu-supply = <0x06>; + phandle = <0x0c>; + }; + + cpu@2 { + compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <0x02>; + enable-method = "psci"; + next-level-cache = <0x04>; + clocks = <0x02 0x15>; + clock-names = "cpu"; + #cooling-cells = <0x02>; + operating-points-v2 = <0x05>; + cpu-supply = <0x06>; + phandle = <0x0d>; + }; + + cpu@3 { + compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <0x03>; + enable-method = "psci"; + next-level-cache = <0x04>; + clocks = <0x02 0x15>; + clock-names = "cpu"; + #cooling-cells = <0x02>; + operating-points-v2 = <0x05>; + cpu-supply = <0x06>; + phandle = <0x0e>; + }; + + l2-cache { + compatible = "cache"; + cache-level = <0x02>; + phandle = <0x04>; + }; + }; + + display-engine { + compatible = "allwinner,sun50i-a64-display-engine"; + allwinner,pipelines = <0x07 0x08>; + status = "okay"; + }; + + hdmi-sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "sun50i-a64-hdmi"; + simple-audio-card,mclk-fs = <0x80>; + simple-audio-card,frame-inversion; + status = "okay"; + + simple-audio-card,codec { + sound-dai = <0x09>; + }; + + simple-audio-card,cpu { + sound-dai = <0x0a>; + dai-tdm-slot-num = <0x02>; + dai-tdm-slot-width = <0x20>; + }; + }; + + osc24M_clk { + #clock-cells = <0x00>; + compatible = "fixed-clock"; + clock-frequency = <0x16e3600>; + clock-output-names = "osc24M"; + phandle = <0x33>; + }; + + osc32k_clk { + #clock-cells = <0x00>; + compatible = "fixed-clock"; + clock-frequency = <0x8000>; + clock-output-names = "ext-osc32k"; + phandle = <0x5c>; + }; + + pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <0x00 0x74 0x04 0x00 0x75 0x04 0x00 0x76 0x04 0x00 0x77 0x04>; + interrupt-affinity = <0x0b 0x0c 0x0d 0x0e>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + scpi { + compatible = "arm,scpi"; + mboxes = <0x0f 0x02 0x0f 0x03>; + mbox-names = "tx\0rx"; + shmem = <0x10>; + }; + + sound { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "simple-audio-card"; + simple-audio-card,name = "PinePhone"; + simple-audio-card,aux-devs = <0x11 0x12>; + simple-audio-card,routing = "Headphone Jack\0HP\0Internal Earpiece\0EARPIECE\0Internal Speaker\0Speaker Amp OUTL\0Internal Speaker\0Speaker Amp OUTR\0Speaker Amp INL\0LINEOUT\0Speaker Amp INR\0LINEOUT\0Left DAC\0DACL\0Right DAC\0DACR\0ADCL\0Left ADC\0ADCR\0Right ADC\0Internal Microphone\0MBIAS\0MIC1\0Internal Microphone\0Headset Microphone\0HBIAS\0MIC2\0Headset Microphone"; + status = "okay"; + simple-audio-card,widgets = "Microphone\0Headset Microphone\0Microphone\0Internal Microphone\0Headphone\0Headphone Jack\0Speaker\0Internal Earpiece\0Speaker\0Internal Speaker"; + + simple-audio-card,dai-link@0 { + format = "i2s"; + frame-master = <0x13>; + bitclock-master = <0x13>; + mclk-fs = <0x80>; + + cpu { + sound-dai = <0x14>; + phandle = <0x13>; + }; + + codec { + sound-dai = <0x15 0x00>; + }; + }; + + simple-audio-card,dai-link@1 { + format = "dsp_a"; + frame-master = <0x16>; + bitclock-master = <0x16>; + bitclock-inversion; + + cpu { + sound-dai = <0x17 0x00>; + }; + + codec { + sound-dai = <0x15 0x01>; + dai-tdm-slot-num = <0x01>; + dai-tdm-slot-width = <0x20>; + phandle = <0x16>; + }; + }; + + simple-audio-card,dai-link@2 { + format = "dsp_a"; + frame-master = <0x18>; + bitclock-master = <0x18>; + bitclock-inversion; + + cpu { + sound-dai = <0x19 0x00>; + }; + + codec { + sound-dai = <0x15 0x02>; + dai-tdm-slot-num = <0x02>; + dai-tdm-slot-width = <0x10>; + phandle = <0x18>; + }; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + allwinner,erratum-unknown1; + arm,no-tick-in-suspend; + interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; + }; + + thermal-zones { + + cpu0-thermal { + polling-delay-passive = <0x00>; + polling-delay = <0x00>; + thermal-sensors = <0x1a 0x00>; + + cooling-maps { + + map0 { + trip = <0x1b>; + cooling-device = <0x0b 0xffffffff 0xffffffff 0x0c 0xffffffff 0xffffffff 0x0d 0xffffffff 0xffffffff 0x0e 0xffffffff 0xffffffff>; + }; + + map1 { + trip = <0x1c>; + cooling-device = <0x0b 0xffffffff 0xffffffff 0x0c 0xffffffff 0xffffffff 0x0d 0xffffffff 0xffffffff 0x0e 0xffffffff 0xffffffff>; + }; + }; + + trips { + + cpu_alert0 { + temperature = <0x124f8>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x1b>; + }; + + cpu_alert1 { + temperature = <0x15f90>; + hysteresis = <0x7d0>; + type = "hot"; + phandle = <0x1c>; + }; + + cpu_crit { + temperature = <0x1adb0>; + hysteresis = <0x7d0>; + type = "critical"; + }; + }; + }; + + gpu0-thermal { + polling-delay-passive = <0x00>; + polling-delay = <0x00>; + thermal-sensors = <0x1a 0x01>; + }; + + gpu1-thermal { + polling-delay-passive = <0x00>; + polling-delay = <0x00>; + thermal-sensors = <0x1a 0x02>; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <0x01>; + #size-cells = <0x01>; + ranges; + + bus@1000000 { + compatible = "allwinner,sun50i-a64-de2"; + reg = <0x1000000 0x400000>; + allwinner,sram = <0x1d 0x01>; + #address-cells = <0x01>; + #size-cells = <0x01>; + ranges = <0x00 0x1000000 0x400000>; + + clock@0 { + compatible = "allwinner,sun50i-a64-de2-clk"; + reg = <0x00 0x10000>; + clocks = <0x02 0x34 0x02 0x63>; + clock-names = "bus\0mod"; + resets = <0x02 0x1e>; + #clock-cells = <0x01>; + #reset-cells = <0x01>; + phandle = <0x03>; + }; + + rotate@20000 { + compatible = "allwinner,sun50i-a64-de2-rotate\0allwinner,sun8i-a83t-de2-rotate"; + reg = <0x20000 0x10000>; + interrupts = <0x00 0x60 0x04>; + clocks = <0x03 0x09 0x03 0x0a>; + clock-names = "bus\0mod"; + resets = <0x03 0x03>; + }; + + mixer@100000 { + compatible = "allwinner,sun50i-a64-de2-mixer-0"; + reg = <0x100000 0x100000>; + clocks = <0x03 0x00 0x03 0x06>; + clock-names = "bus\0mod"; + resets = <0x03 0x00>; + phandle = <0x07>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x1e>; + phandle = <0x22>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x1f>; + phandle = <0x25>; + }; + }; + }; + }; + + mixer@200000 { + compatible = "allwinner,sun50i-a64-de2-mixer-1"; + reg = <0x200000 0x100000>; + clocks = <0x03 0x01 0x03 0x07>; + clock-names = "bus\0mod"; + resets = <0x03 0x01>; + phandle = <0x08>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x20>; + phandle = <0x23>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x21>; + phandle = <0x26>; + }; + }; + }; + }; + }; + + syscon@1c00000 { + compatible = "allwinner,sun50i-a64-system-control"; + reg = <0x1c00000 0x1000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + ranges; + phandle = <0x4d>; + + sram@40000 { + compatible = "mmio-sram"; + reg = <0x40000 0x14000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + ranges = <0x00 0x40000 0x14000>; + + scpi-sram@13c00 { + compatible = "arm,scp-shmem"; + reg = <0x13c00 0x200>; + phandle = <0x10>; + }; + }; + + sram@18000 { + compatible = "mmio-sram"; + reg = <0x18000 0x28000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + ranges = <0x00 0x18000 0x28000>; + + sram-section@0 { + compatible = "allwinner,sun50i-a64-sram-c"; + reg = <0x00 0x28000>; + phandle = <0x1d>; + }; + }; + + sram@1d00000 { + compatible = "mmio-sram"; + reg = <0x1d00000 0x40000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + ranges = <0x00 0x1d00000 0x40000>; + + sram-section@0 { + compatible = "allwinner,sun50i-a64-sram-c1\0allwinner,sun4i-a10-sram-c1"; + reg = <0x00 0x40000>; + phandle = <0x28>; + }; + }; + }; + + dma-controller@1c02000 { + compatible = "allwinner,sun50i-a64-dma"; + reg = <0x1c02000 0x1000>; + interrupts = <0x00 0x32 0x04>; + clocks = <0x02 0x1e>; + dma-channels = <0x08>; + dma-requests = <0x1b>; + resets = <0x02 0x07>; + #dma-cells = <0x01>; + phandle = <0x36>; + }; + + lcd-controller@1c0c000 { + compatible = "allwinner,sun50i-a64-tcon-lcd\0allwinner,sun8i-a83t-tcon-lcd"; + reg = <0x1c0c000 0x1000>; + interrupts = <0x00 0x56 0x04>; + clocks = <0x02 0x2f 0x02 0x64>; + clock-names = "ahb\0tcon-ch0"; + clock-output-names = "tcon-pixel-clock"; + #clock-cells = <0x00>; + resets = <0x02 0x18 0x02 0x23>; + reset-names = "lcd\0lvds"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x22>; + phandle = <0x1e>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x23>; + phandle = <0x20>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x24>; + allwinner,tcon-channel = <0x01>; + phandle = <0x54>; + }; + }; + }; + }; + + lcd-controller@1c0d000 { + compatible = "allwinner,sun50i-a64-tcon-tv\0allwinner,sun8i-a83t-tcon-tv"; + reg = <0x1c0d000 0x1000>; + interrupts = <0x00 0x57 0x04>; + clocks = <0x02 0x30 0x02 0x65>; + clock-names = "ahb\0tcon-ch1"; + resets = <0x02 0x19>; + reset-names = "lcd"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x25>; + phandle = <0x1f>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x26>; + phandle = <0x21>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x27>; + phandle = <0x59>; + }; + }; + }; + }; + + video-codec@1c0e000 { + compatible = "allwinner,sun50i-a64-video-engine"; + reg = <0x1c0e000 0x1000>; + clocks = <0x02 0x2e 0x02 0x6a 0x02 0x5f>; + clock-names = "ahb\0mod\0ram"; + resets = <0x02 0x17>; + interrupts = <0x00 0x3a 0x04>; + allwinner,sram = <0x28 0x01>; + }; + + mmc@1c0f000 { + compatible = "allwinner,sun50i-a64-mmc"; + reg = <0x1c0f000 0x1000>; + clocks = <0x02 0x1f 0x02 0x4b>; + clock-names = "ahb\0mmc"; + resets = <0x02 0x08>; + reset-names = "ahb"; + interrupts = <0x00 0x3c 0x04>; + max-frequency = <0x8f0d180>; + status = "okay"; + #address-cells = <0x01>; + #size-cells = <0x00>; + pinctrl-names = "default"; + pinctrl-0 = <0x29>; + vmmc-supply = <0x2a>; + vqmmc-supply = <0x2a>; + cd-gpios = <0x2b 0x05 0x06 0x01>; + disable-wp; + bus-width = <0x04>; + }; + + mmc@1c10000 { + compatible = "allwinner,sun50i-a64-mmc"; + reg = <0x1c10000 0x1000>; + clocks = <0x02 0x20 0x02 0x4c>; + clock-names = "ahb\0mmc"; + resets = <0x02 0x09>; + reset-names = "ahb"; + interrupts = <0x00 0x3d 0x04>; + max-frequency = <0x8f0d180>; + status = "okay"; + #address-cells = <0x01>; + #size-cells = <0x00>; + pinctrl-names = "default"; + pinctrl-0 = <0x2c>; + vmmc-supply = <0x2d>; + vqmmc-supply = <0x2e>; + bus-width = <0x04>; + non-removable; + mmc-pwrseq = <0x2f>; + + wifi@1 { + reg = <0x01>; + }; + }; + + mmc@1c11000 { + compatible = "allwinner,sun50i-a64-emmc"; + reg = <0x1c11000 0x1000>; + clocks = <0x02 0x21 0x02 0x4d>; + clock-names = "ahb\0mmc"; + resets = <0x02 0x0a>; + reset-names = "ahb"; + interrupts = <0x00 0x3e 0x04>; + max-frequency = <0xbebc200>; + status = "okay"; + #address-cells = <0x01>; + #size-cells = <0x00>; + pinctrl-names = "default"; + pinctrl-0 = <0x30>; + vmmc-supply = <0x2a>; + vqmmc-supply = <0x2a>; + bus-width = <0x08>; + non-removable; + cap-mmc-hw-reset; + }; + + eeprom@1c14000 { + compatible = "allwinner,sun50i-a64-sid"; + reg = <0x1c14000 0x400>; + #address-cells = <0x01>; + #size-cells = <0x01>; + + thermal-sensor-calibration@34 { + reg = <0x34 0x08>; + phandle = <0x3b>; + }; + }; + + crypto@1c15000 { + compatible = "allwinner,sun50i-a64-crypto"; + reg = <0x1c15000 0x1000>; + interrupts = <0x00 0x5e 0x04>; + clocks = <0x02 0x1d 0x02 0x4f>; + clock-names = "bus\0mod"; + resets = <0x02 0x06>; + }; + + mailbox@1c17000 { + compatible = "allwinner,sun50i-a64-msgbox\0allwinner,sun6i-a31-msgbox"; + reg = <0x1c17000 0x1000>; + clocks = <0x02 0x36>; + resets = <0x02 0x20>; + interrupts = <0x00 0x31 0x04>; + #mbox-cells = <0x01>; + phandle = <0x0f>; + }; + + usb@1c19000 { + compatible = "allwinner,sun8i-a33-musb"; + reg = <0x1c19000 0x400>; + clocks = <0x02 0x29>; + resets = <0x02 0x12>; + interrupts = <0x00 0x47 0x04>; + interrupt-names = "mc"; + phys = <0x31 0x00>; + phy-names = "usb"; + extcon = <0x31 0x00>; + dr_mode = "otg"; + status = "okay"; + }; + + phy@1c19400 { + compatible = "allwinner,sun50i-a64-usb-phy"; + reg = <0x1c19400 0x14 0x1c1a800 0x04 0x1c1b800 0x04>; + reg-names = "phy_ctrl\0pmu0\0pmu1"; + clocks = <0x02 0x56 0x02 0x57>; + clock-names = "usb0_phy\0usb1_phy"; + resets = <0x02 0x00 0x02 0x01>; + reset-names = "usb0_reset\0usb1_reset"; + status = "okay"; + #phy-cells = <0x01>; + usb-role-switch; + phandle = <0x31>; + + port { + + endpoint { + remote-endpoint = <0x32>; + phandle = <0x47>; + }; + }; + }; + + usb@1c1a000 { + compatible = "allwinner,sun50i-a64-ehci\0generic-ehci"; + reg = <0x1c1a000 0x100>; + interrupts = <0x00 0x48 0x04>; + clocks = <0x02 0x2c 0x02 0x2a 0x02 0x5b>; + resets = <0x02 0x15 0x02 0x13>; + status = "okay"; + }; + + usb@1c1a400 { + compatible = "allwinner,sun50i-a64-ohci\0generic-ohci"; + reg = <0x1c1a400 0x100>; + interrupts = <0x00 0x49 0x04>; + clocks = <0x02 0x2c 0x02 0x5b>; + resets = <0x02 0x15>; + status = "okay"; + }; + + usb@1c1b000 { + compatible = "allwinner,sun50i-a64-ehci\0generic-ehci"; + reg = <0x1c1b000 0x100>; + interrupts = <0x00 0x4a 0x04>; + clocks = <0x02 0x2d 0x02 0x2b 0x02 0x5d>; + resets = <0x02 0x16 0x02 0x14>; + phys = <0x31 0x01>; + phy-names = "usb"; + status = "okay"; + }; + + usb@1c1b400 { + compatible = "allwinner,sun50i-a64-ohci\0generic-ohci"; + reg = <0x1c1b400 0x100>; + interrupts = <0x00 0x4b 0x04>; + clocks = <0x02 0x2d 0x02 0x5d>; + resets = <0x02 0x16>; + phys = <0x31 0x01>; + phy-names = "usb"; + status = "okay"; + }; + + clock@1c20000 { + compatible = "allwinner,sun50i-a64-ccu"; + reg = <0x1c20000 0x400>; + clocks = <0x33 0x34 0x00>; + clock-names = "hosc\0losc"; + protected-clocks = <0x36>; + #clock-cells = <0x01>; + #reset-cells = <0x01>; + phandle = <0x02>; + }; + + pinctrl@1c20800 { + compatible = "allwinner,sun50i-a64-pinctrl"; + reg = <0x1c20800 0x400>; + interrupts = <0x00 0x0b 0x04 0x00 0x11 0x04 0x00 0x15 0x04>; + clocks = <0x02 0x3a 0x33 0x34 0x00>; + clock-names = "apb\0hosc\0losc"; + gpio-controller; + #gpio-cells = <0x03>; + interrupt-controller; + #interrupt-cells = <0x03>; + vcc-pb-supply = <0x2a>; + vcc-pc-supply = <0x2a>; + vcc-pd-supply = <0x2a>; + vcc-pe-supply = <0x35>; + vcc-pf-supply = <0x2a>; + vcc-pg-supply = <0x2e>; + vcc-ph-supply = <0x2a>; + phandle = <0x2b>; + + aif2-pins { + pins = "PB4\0PB5\0PB6\0PB7"; + function = "aif2"; + phandle = <0x39>; + }; + + aif3-pins { + pins = "PG10\0PG11\0PG12\0PG13"; + function = "aif3"; + phandle = <0x3a>; + }; + + csi-pins { + pins = "PE0\0PE2\0PE3\0PE4\0PE5\0PE6\0PE7\0PE8\0PE9\0PE10\0PE11"; + function = "csi"; + phandle = <0x4f>; + }; + + csi-mclk-pin { + pins = "PE1"; + function = "csi"; + phandle = <0x50>; + }; + + i2c0-pins { + pins = "PH0\0PH1"; + function = "i2c0"; + phandle = <0x41>; + }; + + i2c1-pins { + pins = "PH2\0PH3"; + function = "i2c1"; + phandle = <0x49>; + }; + + i2c2-pins { + pins = "PE14\0PE15"; + function = "i2c2"; + phandle = <0x4a>; + }; + + mmc0-pins { + pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5"; + function = "mmc0"; + drive-strength = <0x1e>; + bias-pull-up; + phandle = <0x29>; + }; + + mmc1-pins { + pins = "PG0\0PG1\0PG2\0PG3\0PG4\0PG5"; + function = "mmc1"; + drive-strength = <0x1e>; + bias-pull-up; + phandle = <0x2c>; + }; + + mmc2-pins { + pins = "PC5\0PC6\0PC8\0PC9\0PC10\0PC11\0PC12\0PC13\0PC14\0PC15\0PC16"; + function = "mmc2"; + drive-strength = <0x1e>; + bias-pull-up; + phandle = <0x30>; + }; + + mmc2-ds-pin { + pins = "PC1"; + function = "mmc2"; + drive-strength = <0x1e>; + bias-pull-up; + }; + + pwm-pin { + pins = "PD22"; + function = "pwm"; + phandle = <0x4e>; + }; + + rmii-pins { + pins = "PD10\0PD11\0PD13\0PD14\0PD17\0PD18\0PD19\0PD20\0PD22\0PD23"; + function = "emac"; + drive-strength = <0x28>; + }; + + rgmii-pins { + pins = "PD8\0PD9\0PD10\0PD11\0PD12\0PD13\0PD15\0PD16\0PD17\0PD18\0PD19\0PD20\0PD21\0PD22\0PD23"; + function = "emac"; + drive-strength = <0x28>; + }; + + spdif-tx-pin { + pins = "PH8"; + function = "spdif"; + phandle = <0x37>; + }; + + spi0-pins { + pins = "PC0\0PC1\0PC2\0PC3"; + function = "spi0"; + phandle = <0x4b>; + }; + + spi1-pins { + pins = "PD0\0PD1\0PD2\0PD3"; + function = "spi1"; + phandle = <0x4c>; + }; + + uart0-pb-pins { + pins = "PB8\0PB9"; + function = "uart0"; + phandle = <0x3c>; + }; + + uart1-pins { + pins = "PG6\0PG7"; + function = "uart1"; + phandle = <0x3d>; + }; + + uart1-rts-cts-pins { + pins = "PG8\0PG9"; + function = "uart1"; + phandle = <0x3e>; + }; + + uart2-pins { + pins = "PB0\0PB1"; + function = "uart2"; + }; + + uart3-pins { + pins = "PD0\0PD1"; + function = "uart3"; + phandle = <0x40>; + }; + + uart4-pins { + pins = "PD2\0PD3"; + function = "uart4"; + }; + + uart4-rts-cts-pins { + pins = "PD4\0PD5"; + function = "uart4"; + }; + }; + + spdif@1c21000 { + #sound-dai-cells = <0x00>; + compatible = "allwinner,sun50i-a64-spdif\0allwinner,sun8i-h3-spdif"; + reg = <0x1c21000 0x400>; + interrupts = <0x00 0x0c 0x04>; + clocks = <0x02 0x39 0x02 0x55>; + resets = <0x02 0x25>; + clock-names = "apb\0spdif"; + dmas = <0x36 0x02>; + dma-names = "tx"; + pinctrl-names = "default"; + pinctrl-0 = <0x37>; + status = "disabled"; + }; + + lradc@1c21800 { + compatible = "allwinner,sun50i-a64-lradc\0allwinner,sun4i-a10-lradc-keys"; + reg = <0x1c21800 0x400>; + interrupts = <0x00 0x1e 0x04>; + status = "okay"; + vref-supply = <0x38>; + + button-200 { + label = "Volume Up"; + linux,code = <0x73>; + channel = <0x00>; + voltage = <0x30d40>; + }; + + button-400 { + label = "Volume Down"; + linux,code = <0x72>; + channel = <0x00>; + voltage = <0x61a80>; + }; + }; + + i2s@1c22000 { + #sound-dai-cells = <0x00>; + compatible = "allwinner,sun50i-a64-i2s\0allwinner,sun8i-h3-i2s"; + reg = <0x1c22000 0x400>; + interrupts = <0x00 0x0d 0x04>; + clocks = <0x02 0x3c 0x02 0x52>; + clock-names = "apb\0mod"; + resets = <0x02 0x27>; + dma-names = "rx\0tx"; + dmas = <0x36 0x03 0x36 0x03>; + status = "disabled"; + }; + + i2s@1c22400 { + #sound-dai-cells = <0x00>; + compatible = "allwinner,sun50i-a64-i2s\0allwinner,sun8i-h3-i2s"; + reg = <0x1c22400 0x400>; + interrupts = <0x00 0x0e 0x04>; + clocks = <0x02 0x3d 0x02 0x53>; + clock-names = "apb\0mod"; + resets = <0x02 0x28>; + dma-names = "rx\0tx"; + dmas = <0x36 0x04 0x36 0x04>; + status = "disabled"; + }; + + i2s@1c22800 { + #sound-dai-cells = <0x00>; + compatible = "allwinner,sun50i-a64-i2s\0allwinner,sun8i-h3-i2s"; + reg = <0x1c22800 0x400>; + interrupts = <0x00 0x0f 0x04>; + clocks = <0x02 0x3e 0x02 0x54>; + clock-names = "apb\0mod"; + resets = <0x02 0x29>; + dma-names = "rx\0tx"; + dmas = <0x36 0x1b 0x36 0x1b>; + status = "okay"; + phandle = <0x0a>; + }; + + dai@1c22c00 { + #sound-dai-cells = <0x00>; + compatible = "allwinner,sun50i-a64-codec-i2s"; + reg = <0x1c22c00 0x200>; + interrupts = <0x00 0x1d 0x04>; + clocks = <0x02 0x38 0x02 0x6b>; + clock-names = "apb\0mod"; + resets = <0x02 0x24>; + dmas = <0x36 0x0f 0x36 0x0f>; + dma-names = "rx\0tx"; + status = "okay"; + phandle = <0x14>; + }; + + codec@1c22e00 { + #sound-dai-cells = <0x01>; + compatible = "allwinner,sun50i-a64-codec\0allwinner,sun8i-a33-codec"; + reg = <0x1c22e00 0x600>; + interrupts = <0x00 0x1c 0x04>; + clocks = <0x02 0x38 0x02 0x6b>; + clock-names = "bus\0mod"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x39 0x3a>; + phandle = <0x15>; + }; + + thermal-sensor@1c25000 { + compatible = "allwinner,sun50i-a64-ths"; + reg = <0x1c25000 0x100>; + clocks = <0x02 0x3b 0x02 0x49>; + clock-names = "bus\0mod"; + interrupts = <0x00 0x1f 0x04>; + resets = <0x02 0x26>; + nvmem-cells = <0x3b>; + nvmem-cell-names = "calibration"; + #thermal-sensor-cells = <0x01>; + phandle = <0x1a>; + }; + + serial@1c28000 { + compatible = "snps,dw-apb-uart"; + reg = <0x1c28000 0x400>; + interrupts = <0x00 0x00 0x04>; + reg-shift = <0x02>; + reg-io-width = <0x04>; + clocks = <0x02 0x43>; + resets = <0x02 0x2e>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x3c>; + }; + + serial@1c28400 { + compatible = "snps,dw-apb-uart"; + reg = <0x1c28400 0x400>; + interrupts = <0x00 0x01 0x04>; + reg-shift = <0x02>; + reg-io-width = <0x04>; + clocks = <0x02 0x44>; + resets = <0x02 0x2f>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x3d 0x3e>; + + bluetooth { + compatible = "realtek,rtl8723cs-bt"; + device-wake-gpios = <0x2b 0x07 0x06 0x01>; + enable-gpios = <0x3f 0x00 0x04 0x00>; + host-wake-gpios = <0x3f 0x00 0x05 0x00>; + }; + }; + + serial@1c28800 { + compatible = "snps,dw-apb-uart"; + reg = <0x1c28800 0x400>; + interrupts = <0x00 0x02 0x04>; + reg-shift = <0x02>; + reg-io-width = <0x04>; + clocks = <0x02 0x45>; + resets = <0x02 0x30>; + status = "disabled"; + }; + + serial@1c28c00 { + compatible = "snps,dw-apb-uart"; + reg = <0x1c28c00 0x400>; + interrupts = <0x00 0x03 0x04>; + reg-shift = <0x02>; + reg-io-width = <0x04>; + clocks = <0x02 0x46>; + resets = <0x02 0x31>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x40>; + }; + + serial@1c29000 { + compatible = "snps,dw-apb-uart"; + reg = <0x1c29000 0x400>; + interrupts = <0x00 0x04 0x04>; + reg-shift = <0x02>; + reg-io-width = <0x04>; + clocks = <0x02 0x47>; + resets = <0x02 0x32>; + status = "disabled"; + }; + + i2c@1c2ac00 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x1c2ac00 0x400>; + interrupts = <0x00 0x06 0x04>; + clocks = <0x02 0x3f>; + resets = <0x02 0x2a>; + pinctrl-names = "default"; + pinctrl-0 = <0x41>; + status = "okay"; + #address-cells = <0x01>; + #size-cells = <0x00>; + + hdmi-bridge@28 { + compatible = "analogix,anx7688"; + reg = <0x28>; + interrupt-parent = <0x3f>; + interrupts = <0x00 0x0b 0x02>; + enable-gpios = <0x2b 0x03 0x0a 0x01>; + cabledet-gpios = <0x3f 0x00 0x08 0x00>; + avdd10-supply = <0x42>; + dvdd10-supply = <0x42>; + avdd18-supply = <0x43>; + dvdd18-supply = <0x43>; + vconn-supply = <0x44>; + hdmi_vt-supply = <0x45>; + vbus-supply = <0x46>; + reset-gpios = <0x2b 0x03 0x06 0x00>; + avdd33-supply = <0x2a>; + + port { + + endpoint { + remote-endpoint = <0x47>; + phandle = <0x32>; + }; + }; + }; + + touchscreen@5d { + compatible = "goodix,gt917s"; + reg = <0x5d>; + interrupt-parent = <0x2b>; + interrupts = <0x07 0x04 0x04>; + irq-gpios = <0x2b 0x07 0x04 0x00>; + reset-gpios = <0x2b 0x07 0x0b 0x00>; + AVDD28-supply = <0x48>; + VDDIO-supply = <0x48>; + touchscreen-size-x = <0x2d0>; + touchscreen-size-y = <0x5a0>; + }; + }; + + i2c@1c2b000 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x1c2b000 0x400>; + interrupts = <0x00 0x07 0x04>; + clocks = <0x02 0x40>; + resets = <0x02 0x2b>; + pinctrl-names = "default"; + pinctrl-0 = <0x49>; + status = "okay"; + #address-cells = <0x01>; + #size-cells = <0x00>; + + lis3mdl@1e { + compatible = "st,lis3mdl-magn"; + reg = <0x1e>; + vdd-supply = <0x45>; + vddio-supply = <0x45>; + interrupt-parent = <0x2b>; + interrupts = <0x01 0x01 0x01>; + }; + + stk3311@48 { + compatible = "sensortek,stk3311"; + reg = <0x48>; + interrupt-parent = <0x2b>; + interrupts = <0x01 0x00 0x02>; + vdd-supply = <0x48>; + leda-supply = <0x45>; + }; + + mpu6050@68 { + compatible = "invensense,mpu6050"; + reg = <0x68>; + interrupt-parent = <0x2b>; + interrupts = <0x07 0x05 0x01>; + vdd-supply = <0x45>; + vddio-supply = <0x45>; + mount-matrix = "0\01\00\0-1\00\00\00\00\0-1"; + }; + }; + + i2c@1c2b400 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x1c2b400 0x400>; + interrupts = <0x00 0x08 0x04>; + clocks = <0x02 0x41>; + resets = <0x02 0x2c>; + pinctrl-names = "default"; + pinctrl-0 = <0x4a>; + status = "okay"; + #address-cells = <0x01>; + #size-cells = <0x00>; + }; + + spi@1c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x1c68000 0x1000>; + interrupts = <0x00 0x41 0x04>; + clocks = <0x02 0x27 0x02 0x50>; + clock-names = "ahb\0mod"; + dmas = <0x36 0x17 0x36 0x17>; + dma-names = "rx\0tx"; + pinctrl-names = "default"; + pinctrl-0 = <0x4b>; + resets = <0x02 0x10>; + status = "disabled"; + num-cs = <0x01>; + #address-cells = <0x01>; + #size-cells = <0x00>; + }; + + spi@1c69000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x1c69000 0x1000>; + interrupts = <0x00 0x42 0x04>; + clocks = <0x02 0x28 0x02 0x51>; + clock-names = "ahb\0mod"; + dmas = <0x36 0x18 0x36 0x18>; + dma-names = "rx\0tx"; + pinctrl-names = "default"; + pinctrl-0 = <0x4c>; + resets = <0x02 0x11>; + status = "disabled"; + num-cs = <0x01>; + #address-cells = <0x01>; + #size-cells = <0x00>; + }; + + ethernet@1c30000 { + compatible = "allwinner,sun50i-a64-emac"; + syscon = <0x4d>; + reg = <0x1c30000 0x10000>; + interrupts = <0x00 0x52 0x04>; + interrupt-names = "macirq"; + resets = <0x02 0x0d>; + reset-names = "stmmaceth"; + clocks = <0x02 0x24>; + clock-names = "stmmaceth"; + status = "disabled"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <0x01>; + #size-cells = <0x00>; + }; + }; + + gpu@1c40000 { + compatible = "allwinner,sun50i-a64-mali\0arm,mali-400"; + reg = <0x1c40000 0x10000>; + interrupts = <0x00 0x61 0x04 0x00 0x62 0x04 0x00 0x63 0x04 0x00 0x64 0x04 0x00 0x66 0x04 0x00 0x67 0x04 0x00 0x65 0x04>; + interrupt-names = "gp\0gpmmu\0pp0\0ppmmu0\0pp1\0ppmmu1\0pmu"; + clocks = <0x02 0x35 0x02 0x72>; + clock-names = "bus\0core"; + resets = <0x02 0x1f>; + assigned-clocks = <0x02 0x72>; + assigned-clock-rates = <0x1dcd6500>; + }; + + interrupt-controller@1c81000 { + compatible = "arm,gic-400"; + reg = <0x1c81000 0x1000 0x1c82000 0x2000 0x1c84000 0x2000 0x1c86000 0x2000>; + interrupts = <0x01 0x09 0xf04>; + interrupt-controller; + #interrupt-cells = <0x03>; + phandle = <0x01>; + }; + + pwm@1c21400 { + compatible = "allwinner,sun50i-a64-pwm\0allwinner,sun5i-a13-pwm"; + reg = <0x1c21400 0x400>; + clocks = <0x33>; + pinctrl-names = "default"; + pinctrl-0 = <0x4e>; + #pwm-cells = <0x03>; + status = "disabled"; + }; + + dram-controller@1c62000 { + compatible = "allwinner,sun50i-a64-mbus"; + reg = <0x1c62000 0x1000>; + clocks = <0x02 0x70>; + #address-cells = <0x01>; + #size-cells = <0x01>; + dma-ranges = <0x00 0x40000000 0xc0000000>; + #interconnect-cells = <0x01>; + phandle = <0x57>; + }; + + csi@1cb0000 { + compatible = "allwinner,sun50i-a64-csi"; + reg = <0x1cb0000 0x1000>; + interrupts = <0x00 0x54 0x04>; + clocks = <0x02 0x32 0x02 0x68 0x02 0x60>; + clock-names = "bus\0mod\0ram"; + resets = <0x02 0x1b>; + pinctrl-names = "default"; + pinctrl-0 = <0x4f 0x50>; + status = "okay"; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x51>; + bus-width = <0x08>; + hsync-active = <0x01>; + vsync-active = <0x00>; + data-active = <0x01>; + pclk-sample = <0x01>; + phandle = <0x67>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x52>; + bus-width = <0x08>; + hsync-active = <0x01>; + vsync-active = <0x01>; + data-active = <0x01>; + pclk-sample = <0x01>; + phandle = <0x66>; + }; + }; + }; + + dsi@1ca0000 { + compatible = "allwinner,sun50i-a64-mipi-dsi"; + reg = <0x1ca0000 0x1000>; + interrupts = <0x00 0x59 0x04>; + clocks = <0x02 0x1c>; + resets = <0x02 0x05>; + phys = <0x53>; + phy-names = "dphy"; + status = "okay"; + #address-cells = <0x01>; + #size-cells = <0x00>; + vcc-dsi-supply = <0x45>; + + port { + + endpoint { + remote-endpoint = <0x54>; + phandle = <0x24>; + }; + }; + + panel@0 { + compatible = "xingbangda,xbd599"; + reg = <0x00>; + reset-gpios = <0x2b 0x03 0x17 0x01>; + iovcc-supply = <0x55>; + vcc-supply = <0x48>; + backlight = <0x56>; + }; + }; + + d-phy@1ca1000 { + compatible = "allwinner,sun50i-a64-mipi-dphy\0allwinner,sun6i-a31-mipi-dphy"; + reg = <0x1ca1000 0x1000>; + clocks = <0x02 0x1c 0x02 0x71>; + clock-names = "bus\0mod"; + resets = <0x02 0x05>; + status = "okay"; + #phy-cells = <0x00>; + phandle = <0x53>; + }; + + deinterlace@1e00000 { + compatible = "allwinner,sun50i-a64-deinterlace\0allwinner,sun8i-h3-deinterlace"; + reg = <0x1e00000 0x20000>; + clocks = <0x02 0x31 0x02 0x66 0x02 0x61>; + clock-names = "bus\0mod\0ram"; + resets = <0x02 0x1a>; + interrupts = <0x00 0x5d 0x04>; + interconnects = <0x57 0x09>; + interconnect-names = "dma-mem"; + }; + + hdmi@1ee0000 { + #sound-dai-cells = <0x00>; + compatible = "allwinner,sun50i-a64-dw-hdmi\0allwinner,sun8i-a83t-dw-hdmi"; + reg = <0x1ee0000 0x10000>; + reg-io-width = <0x01>; + interrupts = <0x00 0x58 0x04>; + clocks = <0x02 0x33 0x02 0x6f 0x02 0x6e>; + clock-names = "iahb\0isfr\0tmds"; + resets = <0x02 0x1d>; + reset-names = "ctrl"; + phys = <0x58>; + phy-names = "phy"; + status = "okay"; + hvcc-supply = <0x45>; + phandle = <0x09>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint { + remote-endpoint = <0x59>; + phandle = <0x27>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + remote-endpoint = <0x5a>; + phandle = <0x63>; + }; + }; + }; + }; + + hdmi-phy@1ef0000 { + compatible = "allwinner,sun50i-a64-hdmi-phy"; + reg = <0x1ef0000 0x10000>; + clocks = <0x02 0x33 0x02 0x6f 0x02 0x07>; + clock-names = "bus\0mod\0pll-0"; + resets = <0x02 0x1c>; + reset-names = "phy"; + #phy-cells = <0x00>; + phandle = <0x58>; + }; + + rtc@1f00000 { + compatible = "allwinner,sun50i-a64-rtc\0allwinner,sun8i-h3-rtc"; + reg = <0x1f00000 0x400>; + interrupt-parent = <0x5b>; + interrupts = <0x08 0x04 0x09 0x04>; + clock-output-names = "osc32k\0osc32k-out\0iosc"; + clocks = <0x5c>; + #clock-cells = <0x01>; + phandle = <0x34>; + }; + + interrupt-controller@1f00c00 { + compatible = "allwinner,sun50i-a64-r-intc\0allwinner,sun6i-a31-r-intc"; + interrupt-controller; + #interrupt-cells = <0x02>; + reg = <0x1f00c00 0x400>; + interrupts = <0x00 0x20 0x04>; + phandle = <0x5b>; + }; + + clock@1f01400 { + compatible = "allwinner,sun50i-a64-r-ccu"; + reg = <0x1f01400 0x100>; + clocks = <0x33 0x34 0x00 0x34 0x02 0x02 0x0b>; + clock-names = "hosc\0losc\0iosc\0pll-periph"; + protected-clocks = <0x0a>; + #clock-cells = <0x01>; + #reset-cells = <0x01>; + phandle = <0x5e>; + }; + + codec-analog@1f015c0 { + compatible = "allwinner,sun50i-a64-codec-analog"; + reg = <0x1f015c0 0x04>; + status = "okay"; + cpvdd-supply = <0x5d>; + phandle = <0x11>; + }; + + i2c@1f02400 { + compatible = "allwinner,sun50i-a64-i2c\0allwinner,sun6i-a31-i2c"; + reg = <0x1f02400 0x400>; + interrupts = <0x00 0x2c 0x04>; + clocks = <0x5e 0x09>; + resets = <0x5e 0x05>; + status = "disabled"; + #address-cells = <0x01>; + #size-cells = <0x00>; + }; + + ir@1f02000 { + compatible = "allwinner,sun50i-a64-ir\0allwinner,sun6i-a31-ir"; + reg = <0x1f02000 0x400>; + clocks = <0x5e 0x04 0x5e 0x0b>; + clock-names = "apb\0ir"; + resets = <0x5e 0x00>; + interrupt-parent = <0x5b>; + interrupts = <0x05 0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x5f>; + status = "disabled"; + }; + + pwm@1f03800 { + compatible = "allwinner,sun50i-a64-pwm\0allwinner,sun5i-a13-pwm"; + reg = <0x1f03800 0x400>; + clocks = <0x33>; + pinctrl-names = "default"; + pinctrl-0 = <0x60>; + #pwm-cells = <0x03>; + status = "okay"; + phandle = <0x62>; + }; + + pinctrl@1f02c00 { + compatible = "allwinner,sun50i-a64-r-pinctrl"; + reg = <0x1f02c00 0x400>; + interrupt-parent = <0x5b>; + interrupts = <0x0d 0x04>; + clocks = <0x5e 0x03 0x33 0x5c>; + clock-names = "apb\0hosc\0losc"; + gpio-controller; + #gpio-cells = <0x03>; + interrupt-controller; + #interrupt-cells = <0x03>; + phandle = <0x3f>; + + r-i2c-pl89-pins { + pins = "PL8\0PL9"; + function = "s_i2c"; + }; + + r-ir-rx-pin { + pins = "PL11"; + function = "s_cir_rx"; + phandle = <0x5f>; + }; + + r-pwm-pin { + pins = "PL10"; + function = "s_pwm"; + phandle = <0x60>; + }; + + r-rsb-pins { + pins = "PL0\0PL1"; + function = "s_rsb"; + phandle = <0x61>; + }; + }; + + rsb@1f03400 { + compatible = "allwinner,sun8i-a23-rsb"; + reg = <0x1f03400 0x400>; + interrupts = <0x00 0x27 0x04>; + clocks = <0x5e 0x06>; + clock-frequency = <0x2dc6c0>; + resets = <0x5e 0x02>; + pinctrl-names = "default"; + pinctrl-0 = <0x61>; + status = "okay"; + #address-cells = <0x01>; + #size-cells = <0x00>; + + pmic@3a3 { + compatible = "x-powers,axp803"; + reg = <0x3a3>; + interrupt-parent = <0x5b>; + interrupts = <0x00 0x08>; + interrupt-controller; + #interrupt-cells = <0x01>; + x-powers,sense-vbus-en; + + ac-power-supply { + compatible = "x-powers,axp803-ac-power-supply\0x-powers,axp813-ac-power-supply"; + status = "disabled"; + }; + + adc { + compatible = "x-powers,axp803-adc\0x-powers,axp813-adc"; + #io-channel-cells = <0x01>; + x-powers,ts-as-gpadc; + }; + + gpio { + compatible = "x-powers,axp803-gpio\0x-powers,axp813-gpio"; + gpio-controller; + #gpio-cells = <0x02>; + + gpio0-ldo { + pins = "GPIO0"; + function = "ldo"; + }; + + gpio1-ldo { + pins = "GPIO1"; + function = "ldo"; + }; + }; + + battery-power-supply { + compatible = "x-powers,axp803-battery-power-supply\0x-powers,axp813-battery-power-supply"; + status = "okay"; + }; + + regulators { + x-powers,dcdc-freq = <0xbb8>; + + aldo1 { + regulator-name = "dovdd-csi"; + regulator-min-microvolt = <0x1b7740>; + regulator-max-microvolt = <0x1b7740>; + phandle = <0x35>; + }; + + aldo2 { + regulator-name = "vcc-pl"; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-max-microvolt = <0x1b7740>; + }; + + aldo3 { + regulator-name = "vcc-pll-avcc"; + regulator-always-on; + regulator-min-microvolt = <0x2dc6c0>; + regulator-max-microvolt = <0x2dc6c0>; + phandle = <0x38>; + }; + + dc1sw { + regulator-name = "dc1sw"; + }; + + dcdc1 { + regulator-name = "vcc-3v3"; + regulator-always-on; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + phandle = <0x2a>; + }; + + dcdc2 { + regulator-name = "vdd-cpux"; + regulator-always-on; + regulator-min-microvolt = <0xf4240>; + regulator-max-microvolt = <0x13d620>; + phandle = <0x06>; + }; + + dcdc3 { + regulator-name = "dcdc3"; + }; + + dcdc4 { + regulator-name = "dcdc4"; + }; + + dcdc5 { + regulator-name = "vcc-dram"; + regulator-always-on; + regulator-min-microvolt = <0x124f80>; + regulator-max-microvolt = <0x124f80>; + }; + + dcdc6 { + regulator-name = "vdd-sys"; + regulator-always-on; + regulator-min-microvolt = <0x10c8e0>; + regulator-max-microvolt = <0x10c8e0>; + }; + + dldo1 { + regulator-name = "vcc-dsi-sensor"; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + phandle = <0x45>; + }; + + dldo2 { + regulator-name = "vcc-mipi-io"; + regulator-min-microvolt = <0x1b7740>; + regulator-max-microvolt = <0x1b7740>; + phandle = <0x55>; + }; + + dldo3 { + regulator-name = "avdd-csi"; + regulator-min-microvolt = <0x2ab980>; + regulator-max-microvolt = <0x2ab980>; + phandle = <0x64>; + }; + + dldo4 { + regulator-name = "vcc-wifi-io"; + regulator-min-microvolt = <0x1b7740>; + regulator-max-microvolt = <0x1b7740>; + phandle = <0x2e>; + }; + + eldo1 { + regulator-name = "vcc-lpddr"; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-max-microvolt = <0x1b7740>; + phandle = <0x5d>; + }; + + eldo2 { + regulator-name = "eldo2"; + }; + + eldo3 { + regulator-name = "dvdd-1v8-csi"; + regulator-min-microvolt = <0x1b7740>; + regulator-max-microvolt = <0x1b7740>; + phandle = <0x65>; + }; + + fldo1 { + regulator-name = "vcc-1v2-hsic"; + regulator-min-microvolt = <0x124f80>; + regulator-max-microvolt = <0x124f80>; + }; + + fldo2 { + regulator-name = "vdd-cpus"; + regulator-always-on; + regulator-min-microvolt = <0x10c8e0>; + regulator-max-microvolt = <0x10c8e0>; + }; + + ldo-io0 { + regulator-name = "vcc-lcd-ctp-stk"; + status = "okay"; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + phandle = <0x48>; + }; + + ldo-io1 { + regulator-name = "vcc-1v8-typec"; + status = "okay"; + regulator-min-microvolt = <0x1b7740>; + regulator-max-microvolt = <0x1b7740>; + phandle = <0x43>; + }; + + rtc-ldo { + regulator-always-on; + regulator-min-microvolt = <0x2dc6c0>; + regulator-max-microvolt = <0x2dc6c0>; + regulator-name = "vcc-rtc"; + }; + + drivevbus { + regulator-name = "drivevbus"; + status = "disabled"; + }; + }; + + usb-power-supply { + compatible = "x-powers,axp803-usb-power-supply\0x-powers,axp813-usb-power-supply"; + status = "okay"; + }; + }; + }; + + watchdog@1c20ca0 { + compatible = "allwinner,sun50i-a64-wdt\0allwinner,sun6i-a31-wdt"; + reg = <0x1c20ca0 0x20>; + interrupts = <0x00 0x19 0x04>; + clocks = <0x33>; + }; + }; + + opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + phandle = <0x05>; + + opp-480000000 { + opp-hz = <0x00 0x1c9c3800>; + opp-microvolt = <0xfde80>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-648000000 { + opp-hz = <0x00 0x269fb200>; + opp-microvolt = <0xfde80>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-816000000 { + opp-hz = <0x00 0x30a32c00>; + opp-microvolt = <0x10c8e0>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-912000000 { + opp-hz = <0x00 0x365c0400>; + opp-microvolt = <0x111700>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-960000000 { + opp-hz = <0x00 0x39387000>; + opp-microvolt = <0x11b340>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-1008000000 { + opp-hz = <0x00 0x3c14dc00>; + opp-microvolt = <0x124f80>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-1056000000 { + opp-hz = <0x00 0x3ef14800>; + opp-microvolt = <0x12ebc0>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-1104000000 { + opp-hz = <0x00 0x41cdb400>; + opp-microvolt = <0x1339e0>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-1152000000 { + opp-hz = <0x00 0x44aa2000>; + opp-microvolt = <0x13d620>; + clock-latency-ns = <0x3b9b0>; + }; + }; + + aliases { + ethernet0 = "/soc/mmc@1c10000/wifi@1"; + serial0 = "/soc/serial@1c28000"; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <0x62 0x00 0xc350 0x01>; + enable-gpios = <0x2b 0x07 0x0a 0x00>; + power-supply = <0x48>; + brightness-levels = <0x1388 0x1480 0x1582 0x16e2 0x18c9 0x1b4b 0x1e7d 0x2277 0x274e 0x2d17 0x33e7 0x3bd5 0x44f6 0x4f5f 0x5b28 0x6864 0x7729 0x878e 0x99a7 0xad8b 0xc350>; + num-interpolated-steps = <0x32>; + default-brightness-level = <0x1f4>; + phandle = <0x56>; + }; + + bt-sco-codec { + #sound-dai-cells = <0x01>; + compatible = "linux,bt-sco"; + phandle = <0x19>; + }; + + ec25-codec { + #sound-dai-cells = <0x01>; + compatible = "quectel,ec25"; + phandle = <0x17>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + ring-indicator { + label = "Ring Indicator"; + linux,can-disable; + linux,code = <0x8f>; + wakeup-event-action = <0x01>; + wakeup-source; + gpios = <0x3f 0x00 0x06 0x01>; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + + endpoint { + remote-endpoint = <0x63>; + phandle = <0x5a>; + }; + }; + }; + + i2c-csi { + compatible = "i2c-gpio"; + sda-gpios = <0x2b 0x04 0x0d 0x06>; + scl-gpios = <0x2b 0x04 0x0c 0x06>; + i2c-gpio,delay-us = <0x03>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + front-camera@3c { + compatible = "galaxycore,gc2145"; + reg = <0x3c>; + clocks = <0x02 0x69>; + clock-names = "xclk"; + AVDD-supply = <0x64>; + DVDD-supply = <0x35>; + IOVDD-supply = <0x65>; + reset-gpios = <0x2b 0x04 0x10 0x07>; + enable-gpios = <0x2b 0x04 0x11 0x07>; + + port { + + endpoint { + remote-endpoint = <0x66>; + bus-width = <0x08>; + hsync-active = <0x01>; + vsync-active = <0x01>; + data-active = <0x01>; + pclk-sample = <0x01>; + phandle = <0x52>; + }; + }; + }; + + rear-camera@4c { + compatible = "ovti,ov5640"; + reg = <0x4c>; + clocks = <0x02 0x69>; + clock-names = "xclk"; + AVDD-supply = <0x64>; + DOVDD-supply = <0x35>; + DVDD-supply = <0x65>; + reset-gpios = <0x2b 0x03 0x03 0x07>; + powerdown-gpios = <0x2b 0x02 0x00 0x06>; + + port { + + endpoint { + remote-endpoint = <0x67>; + bus-width = <0x08>; + hsync-active = <0x01>; + vsync-active = <0x00>; + data-active = <0x01>; + pclk-sample = <0x01>; + phandle = <0x51>; + }; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + blue { + function = "indicator"; + color = <0x03>; + gpios = <0x2b 0x03 0x14 0x00>; + retain-state-suspended; + }; + + green { + function = "indicator"; + color = <0x02>; + gpios = <0x2b 0x03 0x12 0x00>; + retain-state-suspended; + }; + + red { + function = "indicator"; + color = <0x01>; + gpios = <0x2b 0x03 0x13 0x00>; + retain-state-suspended; + }; + }; + + anx-vdd1v0 { + compatible = "regulator-fixed"; + regulator-name = "anx-vdd1v0"; + regulator-min-microvolt = <0xf4240>; + regulator-max-microvolt = <0xf4240>; + gpio = <0x2b 0x03 0x0b 0x00>; + enable-active-high; + phandle = <0x42>; + }; + + usb0-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb0-vbus"; + regulator-min-microvolt = <0x4c4b40>; + regulator-max-microvolt = <0x4c4b40>; + vin-supply = <0x68>; + phandle = <0x46>; + }; + + vbat-bb { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-name = "vbat-bb"; + regulator-min-microvolt = <0x3567e0>; + regulator-max-microvolt = <0x3567e0>; + gpio = <0x3f 0x00 0x07 0x00>; + enable-active-high; + }; + + vbat-wifi { + compatible = "regulator-fixed"; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + regulator-name = "vbat-wifi"; + phandle = <0x2d>; + }; + + vcc5v0 { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0"; + regulator-min-microvolt = <0x4c4b40>; + regulator-max-microvolt = <0x4c4b40>; + gpio = <0x2b 0x03 0x08 0x00>; + enable-active-high; + phandle = <0x68>; + }; + + vconn5v0 { + compatible = "regulator-fixed"; + regulator-name = "vconn5v0"; + regulator-min-microvolt = <0x4c4b40>; + regulator-max-microvolt = <0x4c4b40>; + gpio = <0x2b 0x03 0x09 0x00>; + enable-active-high; + phandle = <0x44>; + }; + + led-controller { + compatible = "sgmicro,sgm3140"; + vin-supply = <0x2a>; + enable-gpios = <0x2b 0x03 0x18 0x00>; + flash-gpios = <0x2b 0x02 0x03 0x00>; + + led { + function = "flash"; + color = <0x00>; + flash-max-timeout-us = <0x3d090>; + }; + }; + + audio-amplifier { + compatible = "simple-audio-amplifier"; + enable-gpios = <0x2b 0x02 0x07 0x00>; + sound-name-prefix = "Speaker Amp"; + phandle = <0x12>; + }; + + vibrator { + compatible = "gpio-vibrator"; + enable-gpios = <0x2b 0x03 0x02 0x00>; + vcc-supply = <0x2a>; + }; + + wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <0x3f 0x00 0x02 0x01>; + phandle = <0x2f>; + }; +};