mirror of
https://github.com/lupyuen/pinephone-nuttx.git
synced 2025-01-13 05:08:32 +08:00
444 lines
16 KiB
Zig
444 lines
16 KiB
Zig
//***************************************************************************
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//
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// Licensed to the Apache Software Foundation (ASF) under one or more
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// contributor license agreements. See the NOTICE file distributed with
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// this work for additional information regarding copyright ownership. The
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// ASF licenses this file to you under the Apache License, Version 2.0 (the
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// "License"); you may not use this file except in compliance with the
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// License. You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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// License for the specific language governing permissions and limitations
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// under the License.
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//
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//***************************************************************************
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//! PinePhone Power Management IC Driver for Apache NuttX RTOS
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//! See https://lupyuen.github.io/articles/de#appendix-power-management-integrated-circuit
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//! "A64 Page ???" refers to Allwinner A64 User Manual: https://github.com/lupyuen/pinephone-nuttx/releases/download/doc/Allwinner_A64_User_Manual_V1.1.pdf
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//! "A80 Page ???" refers to Allwinner A80 User Manual: https://github.com/lupyuen/pinephone-nuttx/releases/download/doc/A80_User_Manual_v1.3.1_20150513.pdf
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//! "AXP803 Page ???" refers to X-Powers AXP803 PMIC Datasheet: https://files.pine64.org/doc/datasheet/pine64/AXP803_Datasheet_V1.0.pdf
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/// Import the Zig Standard Library
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const std = @import("std");
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/// Import NuttX Functions from C
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const c = @cImport({
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// NuttX Defines
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@cDefine("__NuttX__", "");
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@cDefine("NDEBUG", "");
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@cDefine("FAR", "");
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// NuttX Header Files
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@cInclude("arch/types.h");
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@cInclude("../../nuttx/include/limits.h");
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@cInclude("nuttx/config.h");
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@cInclude("inttypes.h");
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@cInclude("unistd.h");
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@cInclude("stdlib.h");
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@cInclude("stdio.h");
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});
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/// PIO Base Address (CPUx-PORT) (A64 Page 376)
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const PIO_BASE_ADDRESS = 0x01C2_0800;
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/// Address of AXP803 PMIC on Reduced Serial Bus
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const AXP803_RT_ADDR = 0x2d;
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/// Reduced Serial Bus Base Address (R_RSB) (A64 Page 75)
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const R_RSB_BASE_ADDRESS = 0x01f03400;
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/// Reduced Serial Bus Offsets (A80 Page 922)
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const RSB_CTRL = 0x00; // RSB Control Register
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const RSB_STAT = 0x0c; // RSB Status Register
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const RSB_AR = 0x10; // RSB Address Register
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const RSB_DATA = 0x1c; // RSB Data Buffer Register
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const RSB_CMD = 0x2c; // RSB Command Register
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const RSB_DAR = 0x30; // RSB Device Address Register
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/// Read a byte from Reduced Serial Bus (A80 Page 918)
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const RSBCMD_RD8 = 0x8B;
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/// Write a byte to Reduced Serial Bus (A80 Page 918)
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const RSBCMD_WR8 = 0x4E;
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/// Init Display Board.
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/// Based on https://lupyuen.github.io/articles/de#appendix-power-management-integrated-circuit
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pub export fn display_board_init() void {
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debug("display_board_init: start", .{});
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defer { debug("display_board_init: end", .{}); }
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// Reset LCD Panel at PD23 (Active Low)
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// assert reset: GPD(23), 0 // PD23 - LCD-RST (active low)
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// Configure PD23 for Output
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// Register PD_CFG2_REG (PD Configure Register 2)
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// At PIO Offset 0x74 (A64 Page 387)
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// Set PD23_SELECT (Bits 28 to 30) to 1 (Output)
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// sunxi_gpio_set_cfgpin: pin=0x77, val=1
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// sunxi_gpio_set_cfgbank: bank_offset=119, val=1
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// clrsetbits 0x1c20874, 0xf0000000, 0x10000000
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// TODO: Should 0xf0000000 be 0x70000000 instead?
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debug("Configure PD23 for Output", .{});
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const PD_CFG2_REG = PIO_BASE_ADDRESS + 0x74;
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comptime { assert(PD_CFG2_REG == 0x1c20874); }
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const PD23_SELECT: u31 = 0b001 << 28;
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const PD23_MASK: u31 = 0b111 << 28;
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comptime { assert(PD23_SELECT == 0x10000000); }
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comptime { assert(PD23_MASK == 0x70000000); }
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modreg32(PD23_SELECT, PD23_MASK, PD_CFG2_REG); // TODO: DMB
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// Set PD23 to Low
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// Register PD_DATA_REG (PD Data Register)
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// At PIO Offset 0x7C (A64 Page 388)
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// Set PD23 (Bit 23) to 0 (Low)
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// sunxi_gpio_output: pin=0x77, val=0
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// before: 0x1c2087c = 0x1c0000
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// after: 0x1c2087c = 0x1c0000 (DMB)
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debug("Set PD23 to Low", .{});
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const PD_DATA_REG = PIO_BASE_ADDRESS + 0x7C;
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comptime { assert(PD_DATA_REG == 0x1c2087c); }
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const PD23: u24 = 1 << 23;
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modreg32(0, PD23, PD_DATA_REG); // TODO: DMB
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// Set DLDO1 Voltage to 3.3V
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// DLDO1 powers the Front Camera / USB HSIC / I2C Sensors
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// Register 0x15: DLDO1 Voltage Control (AXP803 Page 52)
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// Set Voltage (Bits 0 to 4) to 26 (2.6V + 0.7V = 3.3V)
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debug("Set DLDO1 Voltage to 3.3V", .{});
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const DLDO1_Voltage_Control = 0x15;
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const DLDO1_Voltage: u5 = 26 << 0;
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const ret1 = pmic_write(DLDO1_Voltage_Control, DLDO1_Voltage);
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assert(ret1 == 0);
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// Power on DLDO1
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// Register 0x12: Output Power On-Off Control 2 (AXP803 Page 51)
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// Set DLDO1 On-Off Control (Bit 3) to 1 (Power On)
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const Output_Power_On_Off_Control2 = 0x12;
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const DLDO1_On_Off_Control: u4 = 1 << 3;
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const ret2 = pmic_clrsetbits(Output_Power_On_Off_Control2, 0, DLDO1_On_Off_Control);
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assert(ret2 == 0);
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// Set LDO Voltage to 3.3V
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// GPIO0LDO powers the Capacitive Touch Panel
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// Register 0x91: GPIO0LDO and GPIO0 High Level Voltage Setting (AXP803 Page 77)
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// Set GPIO0LDO and GPIO0 High Level Voltage (Bits 0 to 4) to 26 (2.6V + 0.7V = 3.3V)
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debug("Set LDO Voltage to 3.3V", .{});
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const GPIO0LDO_High_Level_Voltage_Setting = 0x91;
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const GPIO0LDO_High_Level_Voltage: u5 = 26 << 0;
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const ret3 = pmic_write(GPIO0LDO_High_Level_Voltage_Setting, GPIO0LDO_High_Level_Voltage);
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assert(ret3 == 0);
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// Enable LDO Mode on GPIO0
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// Register 0x90: GPIO0 (GPADC) Control (AXP803 Page 76)
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// Set GPIO0 Pin Function Control (Bits 0 to 2) to 0b11 (Low Noise LDO on)
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debug("Enable LDO mode on GPIO0", .{});
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const GPIO0_Control = 0x90;
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const GPIO0_Pin_Function: u3 = 0b11 << 0;
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const ret4 = pmic_write(GPIO0_Control, GPIO0_Pin_Function);
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assert(ret4 == 0);
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// Set DLDO2 Voltage to 1.8V
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// DLDO2 powers the MIPI DSI Connector
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// Register 0x16: DLDO2 Voltage Control (AXP803 Page 52)
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// Set Voltage (Bits 0 to 4) to 11 (1.1V + 0.7V = 1.8V)
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debug("Set DLDO2 Voltage to 1.8V", .{});
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const DLDO2_Voltage_Control = 0x16;
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const DLDO2_Voltage: u5 = 11 << 0;
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const ret5 = pmic_write(DLDO2_Voltage_Control, DLDO2_Voltage);
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assert(ret5 == 0);
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// Power on DLDO2
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// Register 0x12: Output Power On-Off Control 2 (AXP803 Page 51)
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// Set DLDO2 On-Off Control (Bit 4) to 1 (Power On)
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comptime { assert(Output_Power_On_Off_Control2 == 0x12); }
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const DLDO2: u5 = 1 << 4;
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const ret6 = pmic_clrsetbits(Output_Power_On_Off_Control2, 0x0, DLDO2);
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assert(ret6 == 0);
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// Wait for power supply and power-on init
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debug("Wait for power supply and power-on init", .{});
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_ = c.usleep(15000);
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}
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/// Write value to PMIC Register
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fn pmic_write(
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reg: u8,
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val: u8
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) i32 {
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// Write to AXP803 PMIC on Reduced Serial Bus
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debug(" pmic_write: reg=0x{x}, val=0x{x}", .{ reg, val });
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const ret = rsb_write(AXP803_RT_ADDR, reg, val);
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if (ret != 0) { debug(" pmic_write Error: ret={}", .{ ret }); }
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return ret;
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}
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/// Read value from PMIC Register
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fn pmic_read(
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reg_addr: u8
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) i32 {
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// Read from AXP803 PMIC on Reduced Serial Bus
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debug(" pmic_read: reg_addr=0x{x}", .{ reg_addr });
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const ret = rsb_read(AXP803_RT_ADDR, reg_addr);
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if (ret < 0) { debug(" pmic_read Error: ret={}", .{ ret }); }
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return ret;
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}
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/// Clear and Set the PMIC Register Bits
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fn pmic_clrsetbits(
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reg: u8,
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clr_mask: u8,
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set_mask: u8
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) i32 {
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// Read from AXP803 PMIC on Reduced Serial Bus
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debug(" pmic_clrsetbits: reg=0x{x}, clr_mask=0x{x}, set_mask=0x{x}", .{ reg, clr_mask, set_mask });
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const ret = rsb_read(AXP803_RT_ADDR, reg);
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if (ret < 0) { return ret; }
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// Write to AXP803 PMIC on Reduced Serial Bus
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const regval = (@intCast(u8, ret) & ~clr_mask) | set_mask;
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return rsb_write(AXP803_RT_ADDR, reg, regval);
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}
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/// Read a byte from Reduced Serial Bus.
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/// Returns -1 on error.
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fn rsb_read(
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rt_addr: u8,
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reg_addr: u8
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) i32 {
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// RSB Command Register (RSB_CMD) (A80 Page 928)
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// At RSB Offset 0x002C
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// Set to 0x8B (RD8) to read one byte
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debug(" rsb_read: rt_addr=0x{x}, reg_addr=0x{x}", .{ rt_addr, reg_addr });
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putreg32(RSBCMD_RD8, R_RSB_BASE_ADDRESS + RSB_CMD); // TODO: DMB
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// RSB Device Address Register (RSB_DAR) (A80 Page 928)
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// At RSB Offset 0x0030
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// Set RTA (Bits 16 to 23) to the Run-Time Address (0x2D for AXP803 PMIC)
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const rt_addr_shift: u32 = @intCast(u32, rt_addr) << 16;
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putreg32(rt_addr_shift, R_RSB_BASE_ADDRESS + RSB_DAR); // TODO: DMB
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// RSB Address Register (RSB_AR) (A80 Page 926)
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// At RSB Offset 0x0010
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// Set to the Register Address that we’ll read from AXP803 PMIC
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putreg32(reg_addr, R_RSB_BASE_ADDRESS + RSB_AR); // TODO: DMB
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// RSB Control Register (RSB_CTRL) (A80 Page 923)
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// At RSB Offset 0x0000
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// Set START_TRANS (Bit 7) to 1 (Start Transaction)
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putreg32(0x80, R_RSB_BASE_ADDRESS + RSB_CTRL); // TODO: DMB
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// Wait for RSB Status
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const ret = rsb_wait_stat("Read RSB");
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if (ret != 0) { return ret; }
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// RSB Data Buffer Register (RSB_DATA) (A80 Page 926)
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// At RSB Offset 0x001c
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// Contains the Register Value read from AXP803 PMIC
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return getreg8(R_RSB_BASE_ADDRESS + RSB_DATA);
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}
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/// Write a byte to Reduced Serial Bus.
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/// Returns -1 on error.
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fn rsb_write(
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rt_addr: u8,
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reg_addr: u8,
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value: u8
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) i32 {
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// RSB Command Register (RSB_CMD) (A80 Page 928)
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// At RSB Offset 0x002C
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// Set to 0x4E (WR8) to write one byte
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debug(" rsb_write: rt_addr=0x{x}, reg_addr=0x{x}, value=0x{x}", .{ rt_addr, reg_addr, value });
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putreg32(RSBCMD_WR8, R_RSB_BASE_ADDRESS + RSB_CMD); // TODO: DMB
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// RSB Device Address Register (RSB_DAR) (A80 Page 928)
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// At RSB Offset 0x0030
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// Set RTA (Bits 16 to 23) to the Run-Time Address (0x2D for AXP803 PMIC)
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const rt_addr_shift: u32 = @intCast(u32, rt_addr) << 16;
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putreg32(rt_addr_shift, R_RSB_BASE_ADDRESS + RSB_DAR); // TODO: DMB
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// RSB Address Register (RSB_AR) (A80 Page 926)
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// At RSB Offset 0x0010
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// Set to the Register Address that we’ll write to AXP803 PMIC
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putreg32(reg_addr, R_RSB_BASE_ADDRESS + RSB_AR); // TODO: DMB
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// RSB Data Buffer Register (RSB_DATA) (A80 Page 926)
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// At RSB Offset 0x001c
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// Set to the Register Value that will be written to AXP803 PMIC
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putreg32(value, R_RSB_BASE_ADDRESS + RSB_DATA); // TODO: DMB
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// RSB Control Register (RSB_CTRL) (A80 Page 923)
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// At RSB Offset 0x0000
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// Set START_TRANS (Bit 7) to 1 (Start Transaction)
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putreg32(0x80, R_RSB_BASE_ADDRESS + RSB_CTRL); // TODO: DMB
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// Wait for RSB Status
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return rsb_wait_stat("Write RSB");
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}
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/// Wait for Reduced Serial Bus and read Status.
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/// Returns -1 on error.
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fn rsb_wait_stat(
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desc: []const u8
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) i32 {
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// RSB Control Register (RSB_CTRL) (A80 Page 923)
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// At RSB Offset 0x0000
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// Wait for START_TRANS (Bit 7) to be 0 (Transaction Completed or Error)
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const ret = rsb_wait_bit(desc, RSB_CTRL, 1 << 7);
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if (ret != 0) {
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debug("rsb_wait_stat Timeout ({s})", .{ desc });
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return ret;
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}
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// RSB Status Register (RSB_STAT) (A80 Page 924)
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// At RSB Offset 0x000c
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// If TRANS_OVER (Bit 0) is 1, then RSB Transfer has completed without error
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const reg = getreg32(R_RSB_BASE_ADDRESS + RSB_STAT);
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if (reg == 0x01) { return 0; }
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debug("rsb_wait_stat Error ({s}): 0x{x}", .{ desc, reg });
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return -1;
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}
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/// Wait for Reduced Serial Bus Transaction to complete.
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/// Returns -1 on error.
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/// `offset` is RSB_CTRL
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/// `mask` is 1 << 7
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fn rsb_wait_bit(
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desc: []const u8,
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offset: u32,
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mask: u32
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) i32 {
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// Wait for transaction to complete
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var tries: u32 = 100000;
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while (true) {
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// RSB Control Register (RSB_CTRL) (A80 Page 923)
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// At RSB Offset 0x0000
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// Wait for START_TRANS (Bit 7) to be 0 (Transaction Completed or Error)
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// `offset` is RSB_CTRL
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// `mask` is 1 << 7
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const reg = getreg32(R_RSB_BASE_ADDRESS + offset);
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if (reg & mask == 0) { break; }
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// Check for transaction timeout
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tries -= 1;
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if (tries == 0) {
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debug("rsb_wait_bit Timeout ({s})", .{ desc });
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return -1;
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}
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}
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return 0;
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}
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/// Modify the specified bits in a memory mapped register.
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/// Note: Parameters are different from modifyreg32
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/// Based on https://github.com/apache/nuttx/blob/master/arch/arm64/src/common/arm64_arch.h#L473
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fn modreg32(
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comptime val: u32, // Bits to set, like (1 << bit)
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comptime mask: u32, // Bits to clear, like (1 << bit)
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addr: u64 // Address to modify
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) void {
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comptime { assert(val & mask == val); }
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debug(" *0x{x}: clear 0x{x}, set 0x{x}", .{ addr, mask, val & mask });
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putreg32(
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(getreg32(addr) & ~(mask))
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| ((val) & (mask)),
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(addr)
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);
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}
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/// Get the 8-bit value at the address
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fn getreg8(addr: u64) u8 {
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const ptr = @intToPtr(*const volatile u8, addr);
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return ptr.*;
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}
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/// Get the 32-bit value at the address
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fn getreg32(addr: u64) u32 {
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const ptr = @intToPtr(*const volatile u32, addr);
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return ptr.*;
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}
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/// Set the 32-bit value at the address
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fn putreg32(val: u32, addr: u64) void {
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if (enableLog) { debug(" *0x{x} = 0x{x}", .{ addr, val }); }
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const ptr = @intToPtr(*volatile u32, addr);
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ptr.* = val;
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}
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/// Set to False to disable log
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var enableLog = true;
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///////////////////////////////////////////////////////////////////////////////
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// Panic Handler
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/// Called by Zig when it hits a Panic. We print the Panic Message, Stack Trace and halt. See
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/// https://andrewkelley.me/post/zig-stack-traces-kernel-panic-bare-bones-os.html
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/// https://github.com/ziglang/zig/blob/master/lib/std/builtin.zig#L763-L847
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pub fn panic(
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message: []const u8,
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_stack_trace: ?*std.builtin.StackTrace
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) noreturn {
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// Print the Panic Message
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_ = _stack_trace;
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_ = puts("\n!ZIG PANIC!");
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_ = puts(@ptrCast([*c]const u8, message));
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// Print the Stack Trace
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_ = puts("Stack Trace:");
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var it = std.debug.StackIterator.init(@returnAddress(), null);
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while (it.next()) |return_address| {
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_ = printf("%p\n", return_address);
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}
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// Halt
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c.exit(1);
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}
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///////////////////////////////////////////////////////////////////////////////
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// Logging
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/// Called by Zig for `std.log.debug`, `std.log.info`, `std.log.err`, ...
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/// https://gist.github.com/leecannon/d6f5d7e5af5881c466161270347ce84d
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pub fn log(
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comptime _message_level: std.log.Level,
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comptime _scope: @Type(.EnumLiteral),
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comptime format: []const u8,
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args: anytype,
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) void {
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_ = _message_level;
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_ = _scope;
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// Format the message
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var buf: [100]u8 = undefined; // Limit to 100 chars
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var slice = std.fmt.bufPrint(&buf, format, args)
|
||
catch { _ = puts("*** log error: buf too small"); return; };
|
||
|
||
// Terminate the formatted message with a null
|
||
var buf2: [buf.len + 1 : 0]u8 = undefined;
|
||
std.mem.copy(
|
||
u8,
|
||
buf2[0..slice.len],
|
||
slice[0..slice.len]
|
||
);
|
||
buf2[slice.len] = 0;
|
||
|
||
// Print the formatted message
|
||
_ = puts(&buf2);
|
||
}
|
||
|
||
///////////////////////////////////////////////////////////////////////////////
|
||
// Imported Functions and Variables
|
||
|
||
/// For safety, we import these functions ourselves to enforce Null-Terminated Strings.
|
||
/// We changed `[*c]const u8` to `[*:0]const u8`
|
||
extern fn printf(format: [*:0]const u8, ...) c_int;
|
||
extern fn puts(str: [*:0]const u8) c_int;
|
||
|
||
/// Aliases for Zig Standard Library
|
||
const assert = std.debug.assert;
|
||
const debug = std.log.debug;
|