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https://github.com/apache/nuttx.git
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tiva/cc13xx: Fix nxstyle errors
arch/arm/src/tiva/cc13xx/cc13x2_v2_trim.c:
* Fix nxstyle errors.
* No functional changes; however modified one function,
trim_wakeup_fromshutdown(), to avoid blocks that existed
only to declare variables mid-function; nxstyle was
complaining about the positions of the opening and
closing braces of those blocks.
This commit is contained in:
Nathan Hartman
Xiang Xiao
parent
d1f0c71d2c
commit
5c258f52bf
1 changed files with 92 additions and 95 deletions
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@ -1,4 +1,4 @@
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/******************************************************************************
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/****************************************************************************
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* arch/arm/src/tiva/cc13xx/cc13x2_v2_trim.c
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*
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* Copyright (C) 2019 Gregory Nutt. All rights reserved.
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@ -11,36 +11,37 @@
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 1) Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 2) Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3) Neither the name NuttX nor the names of its contributors may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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* 3) Neither the name NuttX nor the names of its contributors may be used
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* to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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****************************************************************************/
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/******************************************************************************
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/****************************************************************************
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* Included Files
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******************************************************************************/
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****************************************************************************/
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#include <nuttx/config.h>
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@ -58,11 +59,11 @@
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#include "cc13xx/cc13x2_cc26x2_v2_rom.h"
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#include "cc13xx/cc13x2_aux_sysif.h"
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/******************************************************************************
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/****************************************************************************
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* Private Functions
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******************************************************************************/
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****************************************************************************/
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/******************************************************************************
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/****************************************************************************
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* Name: trim_wakeup_frompowerdown
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*
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* Description:
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@ -72,14 +73,14 @@
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* Returned Value:
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* None
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*
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******************************************************************************/
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****************************************************************************/
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static void trim_wakeup_frompowerdown(void)
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{
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/* Currently no specific trim for Powerdown */
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}
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/******************************************************************************
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/****************************************************************************
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* Name: trim_wakeup_fromshutdown
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*
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* Description:
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@ -92,12 +93,16 @@ static void trim_wakeup_frompowerdown(void)
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* Returned Value:
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* None
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*
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******************************************************************************/
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****************************************************************************/
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static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
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{
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uint32_t ccfg_modeconf;
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uint32_t trimreg;
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uint32_t trimvalue;
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uint32_t trimwidth;
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uint32_t regval;
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uint16_t regval16;
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/* Check in CCFG for alternative DCDC setting */
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@ -105,21 +110,21 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
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CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING) == 0)
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{
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/* ADI3_REFSYS:DCDCCTL5[3] (=DITHER_EN) = CCFG_MODE_CONF_1[19]
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* (=ALT_DCDC_DITHER_EN) ADI3_REFSYS:DCDCCTL5[2:0](=IPEAK ) =
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* CCFG_MODE_CONF_1[18:16](=ALT_DCDC_IPEAK ) Using a single 4-bit masked
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* write since layout is equal for both source and destination
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* (=ALT_DCDC_DITHER_EN) ADI3_REFSYS:DCDCCTL5[2:0](=IPEAK) =
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* CCFG_MODE_CONF_1[18:16](=ALT_DCDC_IPEAK) Using a single 4-bit
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* masked write since layout is equal for both source and destination
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*/
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regval = getreg32(TIVA_CCFG_MODE_CONF_1);
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regval = (0xf0 | regval >> CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_SHIFT);
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putreg8((uint8_t)regval,
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TIVA_ADI3_REFSYS_MASK4B + (TIVA_ADI3_REFSYS_DCDCCTL5_OFFSET * 2));
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putreg8((uint8_t)regval, TIVA_ADI3_REFSYS_MASK4B +
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(TIVA_ADI3_REFSYS_DCDCCTL5_OFFSET * 2));
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}
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/* TBD - Temporarily removed for CC13x2 / CC26x2 */
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/* Force DCDC to use RCOSC before starting up XOSC. Clock loss detector does
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* not use XOSC until SCLK_HF actually switches and thus DCDC is not
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/* Force DCDC to use RCOSC before starting up XOSC. Clock loss detector
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* does not use XOSC until SCLK_HF actually switches and thus DCDC is not
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* protected from clock loss on XOSC in that time frame. The force must be
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* released when the switch to XOSC has happened. This is done in
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* OSCHfSourceSwitch().
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@ -127,7 +132,8 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
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regval = DDI0_OSC_CTL0_CLK_DCDC_SRC_SEL |
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(DDI0_OSC_CTL0_CLK_DCDC_SRC_SEL >> 16);
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putreg32(regval, TIVA_DDI0_OSC_MASK16B + (TIVA_DDI0_OSC_CTL0_OFFSET << 1) + 4);
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putreg32(regval,
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TIVA_DDI0_OSC_MASK16B + (TIVA_DDI0_OSC_CTL0_OFFSET << 1) + 4);
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/* Dummy read to ensure that the write has propagated */
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@ -137,8 +143,9 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
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ccfg_modeconf = getreg32(TIVA_CCFG_MODE_CONF);
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/* First part of trim done after cold reset and wakeup from shutdown: -Adjust
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* the VDDR_TRIM_SLEEP value. -Configure DCDC.
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/* First part of trim done after cold reset and wakeup from shutdown:
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* -Adjust the VDDR_TRIM_SLEEP value.
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* -Configure DCDC.
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*/
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rom_setup_coldreset_from_shutdown_cfg1(ccfg_modeconf);
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@ -150,53 +157,43 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
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rom_setup_coldreset_from_shutdown_cfg2(fcfg1_revision,
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ccfg_modeconf);
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{
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uint32_t trimreg;
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uint32_t trimvalue;
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/* Propagate the LPM_BIAS trim */
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/* Propagate the LPM_BIAS trim */
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trimreg = getreg32(TIVA_FCFG1_DAC_BIAS_CNF);
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trimvalue = ((trimreg & FCFG1_DAC_BIAS_CNF_LPM_TRIM_IOUT_MASK) >>
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FCFG1_DAC_BIAS_CNF_LPM_TRIM_IOUT_SHIFT);
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trimreg = getreg32(TIVA_FCFG1_DAC_BIAS_CNF);
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trimvalue = ((trimreg & FCFG1_DAC_BIAS_CNF_LPM_TRIM_IOUT_MASK) >>
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FCFG1_DAC_BIAS_CNF_LPM_TRIM_IOUT_SHIFT);
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regval = ((trimvalue << ADI4_AUX_LPMBIAS_LPM_TRIM_IOUT_SHIFT) &
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ADI4_AUX_LPMBIAS_LPM_TRIM_IOUT_MASK);
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putreg8((uint8_t)regval, TIVA_ADI4_AUX_LPMBIAS);
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regval = ((trimvalue << ADI4_AUX_LPMBIAS_LPM_TRIM_IOUT_SHIFT) &
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ADI4_AUX_LPMBIAS_LPM_TRIM_IOUT_MASK);
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putreg8((uint8_t)regval, TIVA_ADI4_AUX_LPMBIAS);
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/* Set LPM_BIAS_BACKUP_EN according to FCFG1 configuration */
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if (trimreg & FCFG1_DAC_BIAS_CNF_LPM_BIAS_BACKUP_EN)
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{
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putreg8(ADI3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKUP_EN,
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TIVA_ADI3_REFSYS_SET + TIVA_ADI3_REFSYS_AUX_DEBUG_OFFSET);
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}
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else
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{
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putreg8(ADI3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKUP_EN,
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TIVA_ADI3_REFSYS_CLR + TIVA_ADI3_REFSYS_AUX_DEBUG_OFFSET);
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}
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/* Set LPM_BIAS_WIDTH_TRIM according to FCFG1 configuration */
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/* Set LPM_BIAS_BACKUP_EN according to FCFG1 configuration */
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if (trimreg & FCFG1_DAC_BIAS_CNF_LPM_BIAS_BACKUP_EN)
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{
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uint32_t trimwidth;
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uint16_t regval16;
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trimwidth = ((trimreg & FCFG1_DAC_BIAS_CNF_LPM_BIAS_WIDTH_TRIM_MASK) >>
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FCFG1_DAC_BIAS_CNF_LPM_BIAS_WIDTH_TRIM_SHIFT);
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/* Set LPM_BIAS_WIDTH_TRIM = 3
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* Set mask (bits to be written) in [15:8]
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* Set value (in correct bit pos) in [7:0]
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*/
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regval16 = ((ADI4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_MASK << 8) |
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(trimwidth << ADI4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_SHIFT));
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putreg16(regval16,
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TIVA_ADI4_AUX_MASK8B + (TIVA_ADI4_AUX_COMP_OFFSET * 2));
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putreg8(ADI3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKUP_EN,
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TIVA_ADI3_REFSYS_SET + TIVA_ADI3_REFSYS_AUX_DEBUG_OFFSET);
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}
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}
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else
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{
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putreg8(ADI3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKUP_EN,
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TIVA_ADI3_REFSYS_CLR + TIVA_ADI3_REFSYS_AUX_DEBUG_OFFSET);
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}
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/* Set LPM_BIAS_WIDTH_TRIM according to FCFG1 configuration */
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trimwidth = ((trimreg & FCFG1_DAC_BIAS_CNF_LPM_BIAS_WIDTH_TRIM_MASK) >>
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FCFG1_DAC_BIAS_CNF_LPM_BIAS_WIDTH_TRIM_SHIFT);
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/* Set LPM_BIAS_WIDTH_TRIM = 3
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* Set mask (bits to be written) in [15:8]
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* Set value (in correct bit pos) in [7:0]
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*/
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regval16 = ((ADI4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_MASK << 8) |
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(trimwidth << ADI4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_SHIFT));
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putreg16(regval16,
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TIVA_ADI4_AUX_MASK8B + (TIVA_ADI4_AUX_COMP_OFFSET * 2));
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/* Third part of trim done after cold reset and wakeup from shutdown:
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* -Configure HPOSC. -Setup the LF clock.
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@ -215,7 +212,7 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
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putreg32(regval, TIVA_FLASH_CFG);
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}
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/******************************************************************************
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/****************************************************************************
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* Name: trim_coldreset
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*
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* Description:
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@ -224,7 +221,7 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
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* Returned Value:
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* None
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*
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******************************************************************************/
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****************************************************************************/
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static void trim_coldreset(void)
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{
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@ -235,17 +232,17 @@ static void trim_coldreset(void)
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* Public Functions
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****************************************************************************/
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/******************************************************************************
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/****************************************************************************
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* Name: cc13xx_trim_device
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*
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* Description:
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* Perform the necessary trim of the device which is not done in boot code
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*
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* This function should only execute coming from ROM boot. The current
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* implementation does not take soft reset into account. However, it does no
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* damage to execute it again. It only consumes time.
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* implementation does not take soft reset into account. However, it does
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* no damage to execute it again. It only consumes time.
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*
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******************************************************************************/
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****************************************************************************/
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void cc13xx_trim_device(void)
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{
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@ -279,12 +276,12 @@ void cc13xx_trim_device(void)
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rom_setup_cachemode();
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/* 1. Check for powerdown 2. Check for shutdown 3. Assume cold reset if none
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* of the above. It is always assumed that the application will freeze the
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* latches in AON_IOC when going to powerdown in order to retain the values
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* on the IOs. NB. If this bit is not cleared before proceeding to
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* powerdown, the IOs will all default to the reset configuration when
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* restarting.
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/* 1. Check for powerdown 2. Check for shutdown 3. Assume cold reset if
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* none of the above. It is always assumed that the application will
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* freeze the latches in AON_IOC when going to powerdown in order to
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* retain the values on the IOs. NB. If this bit is not cleared before
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* proceeding to powerdown, the IOs will all default to the reset
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* configuration when restarting.
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*/
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if ((getreg32(TIVA_AON_IOC_IOCLATCH) & AON_IOC_IOCLATCH_EN) == 0)
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@ -365,8 +362,8 @@ void cc13xx_trim_device(void)
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}
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/* Make sure there are no ongoing VIMS mode change when leaving
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* cc13x2_cc26x2_trim_device() (There should typically be no wait time here,
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* but need to be sure)
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* cc13x2_cc26x2_trim_device() (There should typically be no wait time
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* here, but need to be sure)
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*/
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while ((getreg32(TIVA_VIMS_STAT) & VIMS_STAT_MODE_CHANGING) != 0)
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