diff --git a/arch/arm/include/tiva/chip.h b/arch/arm/include/tiva/chip.h index 326c1217d9..bef035384b 100644 --- a/arch/arm/include/tiva/chip.h +++ b/arch/arm/include/tiva/chip.h @@ -224,7 +224,7 @@ # define TIVA_NAES 0 /* No AES module */ # define TIVA_NDES 0 /* No DES module */ # define TIVA_NHASH 0 /* No SHA1/MD5 hash module */ -#elif defined(CONFIG_ARCH_CHIP_TM4C123GH6PMI) +#elif defined(CONFIG_ARCH_CHIP_TM4C123GH6PM) # undef LM3S /* Not LM3S family */ # undef LM4F /* Not LM4F family */ # define TM4C 1 /* TM4C family */ diff --git a/arch/arm/include/tiva/tm4c_irq.h b/arch/arm/include/tiva/tm4c_irq.h index 3e6193342b..367bd97733 100644 --- a/arch/arm/include/tiva/tm4c_irq.h +++ b/arch/arm/include/tiva/tm4c_irq.h @@ -210,7 +210,7 @@ # define NR_IRQS (155) /* (Really fewer because of reserved vectors) */ -#elif defined(CONFIG_ARCH_CHIP_TM4C123GH6PMI) +#elif defined(CONFIG_ARCH_CHIP_TM4C123GH6PM) # define TIVA_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ # define TIVA_IRQ_GPIOB (17) /* Vector 17: GPIO Port B */ # define TIVA_IRQ_GPIOC (18) /* Vector 18: GPIO Port C */ diff --git a/arch/arm/src/tiva/Kconfig b/arch/arm/src/tiva/Kconfig index c875f8f7ee..bbbc58102b 100644 --- a/arch/arm/src/tiva/Kconfig +++ b/arch/arm/src/tiva/Kconfig @@ -92,8 +92,8 @@ config ARCH_CHIP_TM4C123GH6ZRB select TIVA_HAVE_I2C4 select TIVA_HAVE_I2C5 -config ARCH_CHIP_TM4C123GH6PMI - bool "TM4C123GH6PMI" +config ARCH_CHIP_TM4C123GH6PM + bool "TM4C123GH6PM" depends on ARCH_CHIP_TIVA select ARCH_CHIP_TM4C select ARCH_CHIP_TM4C123 diff --git a/arch/arm/src/tiva/hardware/lm/lm3s_flash.h b/arch/arm/src/tiva/hardware/lm/lm3s_flash.h index aafea070d8..4eb914b7ad 100644 --- a/arch/arm/src/tiva/hardware/lm/lm3s_flash.h +++ b/arch/arm/src/tiva/hardware/lm/lm3s_flash.h @@ -51,7 +51,7 @@ #if defined(CONFIG_ARCH_CHIP_LM3S6965) || defined(CONFIG_ARCH_CHIP_LM4F120) || \ defined(CONFIG_ARCH_CHIP_LM3S8962) || defined(CONFIG_ARCH_CHIP_LM3S9B96) || \ defined(CONFIG_ARCH_CHIP_LM3S9B92) || \ - defined(CONFIG_ARCH_CHIP_TM4C123GH6ZRB) || defined(CONFIG_ARCH_CHIP_TM4C123GH6PMI) + defined(CONFIG_ARCH_CHIP_TM4C123GH6ZRB) || defined(CONFIG_ARCH_CHIP_TM4C123GH6PM) /* These parts all support a 1KiB erase page size and a total FLASH memory size * of 256Kib or 256 pages. diff --git a/arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h b/arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h index 4e4dca5819..03ed972869 100644 --- a/arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h +++ b/arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h @@ -70,7 +70,7 @@ # define TIVA_ETM_BASE 0xe0041000 /* -0xe0041fff: Embedded Trace Macrocell */ /* -0xffffffff: Reserved */ -#elif defined(CONFIG_ARCH_CHIP_TM4C123GH6PMI) +#elif defined(CONFIG_ARCH_CHIP_TM4C123GH6PM) # define TIVA_FLASH_BASE 0x00000000 /* -0x0003ffff: On-chip FLASH */ /* -0x00ffffff: Reserved */ # define TIVA_ROM_BASE 0x01000000 /* -0x1fffffff: Reserved for ROM */ @@ -207,77 +207,6 @@ # define TIVA_SYSCON_BASE (TIVA_PERIPH_BASE + 0xfe000) /* -0xfefff: System Control */ # define TIVA_UDMA_BASE (TIVA_PERIPH_BASE + 0xff000) /* -0xfffff: Micro Direct Memory Access */ -#elif defined(CONFIG_ARCH_CHIP_TM4C123GH6PMI) - -/* Peripheral Base Addresses */ - -# define TIVA_WDOG0_BASE (TIVA_PERIPH_BASE + 0x00000) /* -0x00fff: Watchdog Timer 0 */ -# define TIVA_WDOG1_BASE (TIVA_PERIPH_BASE + 0x01000) /* -0x00fff: Watchdog Timer 1 */ - /* -0x03fff: Reserved */ -# define TIVA_GPIOA_BASE (TIVA_PERIPH_BASE + 0x04000) /* -0x04fff: GPIO Port A */ -# define TIVA_GPIOB_BASE (TIVA_PERIPH_BASE + 0x05000) /* -0x05fff: GPIO Port B */ -# define TIVA_GPIOC_BASE (TIVA_PERIPH_BASE + 0x06000) /* -0x06fff: GPIO Port C */ -# define TIVA_GPIOD_BASE (TIVA_PERIPH_BASE + 0x07000) /* -0x07fff: GPIO Port D */ -# define TIVA_SSI0_BASE (TIVA_PERIPH_BASE + 0x08000) /* -0x08fff: SSI0 */ -# define TIVA_SSI1_BASE (TIVA_PERIPH_BASE + 0x09000) /* -0x09fff: SSI1 */ -# define TIVA_SSI2_BASE (TIVA_PERIPH_BASE + 0x0a000) /* -0x0afff: SSI2 */ -# define TIVA_SSI3_BASE (TIVA_PERIPH_BASE + 0x0b000) /* -0x0bfff: SSI3 */ -# define TIVA_UART0_BASE (TIVA_PERIPH_BASE + 0x0c000) /* -0x0cfff: UART0 */ -# define TIVA_UART1_BASE (TIVA_PERIPH_BASE + 0x0d000) /* -0x0dfff: UART1 */ -# define TIVA_UART2_BASE (TIVA_PERIPH_BASE + 0x0e000) /* -0x0efff: UART2 */ -# define TIVA_UART3_BASE (TIVA_PERIPH_BASE + 0x0f000) /* -0x0ffff: UART3 */ -# define TIVA_UART4_BASE (TIVA_PERIPH_BASE + 0x10000) /* -0x10fff: UART4 */ -# define TIVA_UART5_BASE (TIVA_PERIPH_BASE + 0x11000) /* -0x11fff: UART5 */ -# define TIVA_UART6_BASE (TIVA_PERIPH_BASE + 0x12000) /* -0x12fff: UART6 */ -# define TIVA_UART7_BASE (TIVA_PERIPH_BASE + 0x13000) /* -0x13fff: UART7 */ - /* -0x1ffff: Reserved */ -# define TIVA_I2C0_BASE (TIVA_PERIPH_BASE + 0x20000) /* -0x20fff: I2C0 */ -# define TIVA_I2C1_BASE (TIVA_PERIPH_BASE + 0x21000) /* -0x21fff: I2C1 */ -# define TIVA_I2C2_BASE (TIVA_PERIPH_BASE + 0x22000) /* -0x22fff: I2C2 */ -# define TIVA_I2C3_BASE (TIVA_PERIPH_BASE + 0x23000) /* -0x23fff: I2C3 */ -# define TIVA_GPIOE_BASE (TIVA_PERIPH_BASE + 0x24000) /* -0x24fff: GPIO Port E */ -# define TIVA_GPIOF_BASE (TIVA_PERIPH_BASE + 0x25000) /* -0x25fff: GPIO Port F */ -# define TIVA_PWM0_BASE (TIVA_PERIPH_BASE + 0x28000) /* -0x28fff: PWM 0 */ -# define TIVA_PWM1_BASE (TIVA_PERIPH_BASE + 0x29000) /* -0x29fff: PWM 1 */ - /* -0x2ffff: Reserved */ -# define TIVA_TIMER0_BASE (TIVA_PERIPH_BASE + 0x30000) /* -0x30fff: 16/32 Timer 0 */ -# define TIVA_TIMER1_BASE (TIVA_PERIPH_BASE + 0x31000) /* -0x31fff: 16/32 Timer 1 */ -# define TIVA_TIMER2_BASE (TIVA_PERIPH_BASE + 0x32000) /* -0x32fff: 16/32 Timer 2 */ -# define TIVA_TIMER3_BASE (TIVA_PERIPH_BASE + 0x33000) /* -0x33fff: 16/32 Timer 3 */ -# define TIVA_TIMER4_BASE (TIVA_PERIPH_BASE + 0x34000) /* -0x34fff: 16/32 Timer 4 */ -# define TIVA_TIMER5_BASE (TIVA_PERIPH_BASE + 0x35000) /* -0x35fff: 16/32 Timer 5 */ -# define TIVA_WTIMER0_BASE (TIVA_PERIPH_BASE + 0x36000) /* -0x36fff: 32/64 Wide Timer 0 */ -# define TIVA_WTIMER1_BASE (TIVA_PERIPH_BASE + 0x37000) /* -0x37fff: 32/64 Wide Timer 1 */ -# define TIVA_ADC0_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC 0 */ -# define TIVA_ADC1_BASE (TIVA_PERIPH_BASE + 0x39000) /* -0x39fff: ADC 1 */ - /* -0x3bfff: Reserved */ -# define TIVA_CMP_BASE (TIVA_PERIPH_BASE + 0x3c000) /* -0x3cfff: Analog Comparators */ - /* -0x3ffff: Reserved */ -# define TIVA_CAN0_BASE (TIVA_PERIPH_BASE + 0x40000) /* -0x40fff: CAN Controller 0 */ -# define TIVA_CAN1_BASE (TIVA_PERIPH_BASE + 0x41000) /* -0x41fff: CAN Controller 1 */ - /* -0x4bfff: Reserved */ -# define TIVA_WTIMER2_BASE (TIVA_PERIPH_BASE + 0x4c000) /* -0x4cfff: 32/64 Wide Timer 2 */ -# define TIVA_WTIMER3_BASE (TIVA_PERIPH_BASE + 0x4d000) /* -0x4dfff: 32/64 Wide Timer 3 */ -# define TIVA_WTIMER4_BASE (TIVA_PERIPH_BASE + 0x4e000) /* -0x4efff: 32/64 Wide Timer 4 */ -# define TIVA_WTIMER5_BASE (TIVA_PERIPH_BASE + 0x4f000) /* -0x4ffff: 32/64 Wide Timer 5 */ -# define TIVA_USB_BASE (TIVA_PERIPH_BASE + 0x50000) /* -0x50fff: USB */ - /* -0x57fff: Reserved */ -# define TIVA_GPIOAAHB_BASE (TIVA_PERIPH_BASE + 0x58000) /* -0x58fff: GPIO Port A (AHB aperture) */ -# define TIVA_GPIOBAHB_BASE (TIVA_PERIPH_BASE + 0x59000) /* -0x59fff: GPIO Port B (AHB aperture) */ -# define TIVA_GPIOCAHB_BASE (TIVA_PERIPH_BASE + 0x5a000) /* -0x5afff: GPIO Port C (AHB aperture) */ -# define TIVA_GPIODAHB_BASE (TIVA_PERIPH_BASE + 0x5b000) /* -0x5bfff: GPIO Port D (AHB aperture) */ -# define TIVA_GPIOEAHB_BASE (TIVA_PERIPH_BASE + 0x5c000) /* -0x5cfff: GPIO Port E (AHB aperture) */ -# define TIVA_GPIOFAHB_BASE (TIVA_PERIPH_BASE + 0x5d000) /* -0x5dfff: GPIO Port F (AHB aperture) */ - /* -0xaefff: Reserved */ -# define TIVA_EEPROM_BASE (TIVA_PERIPH_BASE + 0xaf000) /* -0xaffff: EEPROM and Key Locker */ - /* -0xf8fff: Reserved */ -# define TIVA_SYSEXC_BASE (TIVA_PERIPH_BASE + 0xf9000) /* -0xf9fff: System Exception Control */ - /* -0xfbfff: Reserved */ -# define TIVA_HIBERNATE_BASE (TIVA_PERIPH_BASE + 0xfc000) /* -0xfcfff: Hibernation Controller */ -# define TIVA_FLASHCON_BASE (TIVA_PERIPH_BASE + 0xfd000) /* -0xfdfff: FLASH Control */ -# define TIVA_SYSCON_BASE (TIVA_PERIPH_BASE + 0xfe000) /* -0xfefff: System Control */ -# define TIVA_UDMA_BASE (TIVA_PERIPH_BASE + 0xff000) /* -0xfffff: Micro Direct Memory Access */ - #elif defined(CONFIG_ARCH_CHIP_TM4C123GH6PM) /* Peripheral Base Addresses */ diff --git a/arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h b/arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h index be1a0f802e..243d3af32f 100644 --- a/arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h +++ b/arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h @@ -451,7 +451,7 @@ # define GPIO_WTIM5_CCP1_3 (GPIO_FUNC_PFIO | GPIO_ALT_7 | GPIO_PORTQ | GPIO_PIN_7) # define GPIO_WTIM5_CCP1_4 (GPIO_FUNC_PFIO | GPIO_ALT_8 | GPIO_PORTM | GPIO_PIN_3) -#elif defined(CONFIG_ARCH_CHIP_TM4C123GH6PMI) +#elif defined(CONFIG_ARCH_CHIP_TM4C123GH6PM) # define GPIO_ADC_AIN0 (GPIO_FUNC_ANINPUT | GPIO_PORTE | GPIO_PIN_3) # define GPIO_ADC_AIN1 (GPIO_FUNC_ANINPUT | GPIO_PORTE | GPIO_PIN_2) diff --git a/configs/Kconfig b/configs/Kconfig index b88625a212..ace264694b 100644 --- a/configs/Kconfig +++ b/configs/Kconfig @@ -1618,7 +1618,7 @@ config ARCH_BOARD_TEENSY_LC config ARCH_BOARD_TM4C123G_LAUNCHPAD bool "Tiva TM4C123G LaunchPad" - depends on ARCH_CHIP_TM4C123GH6PMI + depends on ARCH_CHIP_TM4C123GH6PM select ARCH_HAVE_LEDS select ARCH_HAVE_BUTTONS select ARCH_HAVE_IRQBUTTONS diff --git a/configs/tm4c123g-launchpad/README.txt b/configs/tm4c123g-launchpad/README.txt index 58b7c4df7d..f3cf8e22aa 100644 --- a/configs/tm4c123g-launchpad/README.txt +++ b/configs/tm4c123g-launchpad/README.txt @@ -467,7 +467,7 @@ TM4C123G LaunchPad Configuration Options CONFIG_ARCH_CHIP_name - For use in C code to identify the exact chip: - CONFIG_ARCH_CHIP_TM4C123GH6PMI + CONFIG_ARCH_CHIP_TM4C123GH6PM CONFIG_ARCH_BOARD - Identifies the configs subdirectory and hence, the board that supports the particular chip or SoC. diff --git a/configs/tm4c123g-launchpad/nsh/defconfig b/configs/tm4c123g-launchpad/nsh/defconfig index c379addfc3..7562d7332b 100644 --- a/configs/tm4c123g-launchpad/nsh/defconfig +++ b/configs/tm4c123g-launchpad/nsh/defconfig @@ -13,7 +13,7 @@ CONFIG_ARCH_BOARD="tm4c123g-launchpad" CONFIG_ARCH_BOARD_TM4C123G_LAUNCHPAD=y CONFIG_ARCH_CHIP_TIVA=y CONFIG_ARCH_CHIP_TM4C123=y -CONFIG_ARCH_CHIP_TM4C123GH6PMI=y +CONFIG_ARCH_CHIP_TM4C123GH6PM=y CONFIG_ARCH_CHIP_TM4C=y CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y