From 81499fcdf208b497675d9bfedf58d09e0a25628d Mon Sep 17 00:00:00 2001 From: Gustavo Henrique Nihei Date: Fri, 17 Feb 2023 14:37:12 -0300 Subject: [PATCH] risc-v/espressif: Add support for ESP32-H2 Signed-off-by: Gustavo Henrique Nihei --- arch/risc-v/src/espressif/Kconfig | 97 +++++- arch/risc-v/src/espressif/hal_esp32h2.mk | 96 ++++++ boards/Kconfig | 10 + .../common/scripts/esp32h2_aliases.ld | 29 ++ .../common/scripts/esp32h2_flat_memory.ld | 116 ++++++++ .../common/scripts/esp32h2_legacy_sections.ld | 280 ++++++++++++++++++ .../risc-v/espressif/esp32h2-generic/Kconfig | 8 + .../esp32h2-generic/configs/nsh/defconfig | 46 +++ .../espressif/esp32h2-generic/include/board.h | 25 ++ .../esp32h2-generic/scripts/Make.defs | 60 ++++ .../espressif/esp32h2-generic/src/Make.defs | 31 ++ .../esp32h2-generic/src/esp32h2-generic.h | 72 +++++ .../esp32h2-generic/src/esp32h2_appinit.c | 81 +++++ .../esp32h2-generic/src/esp32h2_boot.c | 89 ++++++ .../esp32h2-generic/src/esp32h2_bringup.c | 98 ++++++ tools/espressif/Config.mk | 2 + 16 files changed, 1132 insertions(+), 8 deletions(-) create mode 100644 arch/risc-v/src/espressif/hal_esp32h2.mk create mode 100644 boards/risc-v/espressif/common/scripts/esp32h2_aliases.ld create mode 100644 boards/risc-v/espressif/common/scripts/esp32h2_flat_memory.ld create mode 100644 boards/risc-v/espressif/common/scripts/esp32h2_legacy_sections.ld create mode 100644 boards/risc-v/espressif/esp32h2-generic/Kconfig create mode 100644 boards/risc-v/espressif/esp32h2-generic/configs/nsh/defconfig create mode 100644 boards/risc-v/espressif/esp32h2-generic/include/board.h create mode 100644 boards/risc-v/espressif/esp32h2-generic/scripts/Make.defs create mode 100644 boards/risc-v/espressif/esp32h2-generic/src/Make.defs create mode 100644 boards/risc-v/espressif/esp32h2-generic/src/esp32h2-generic.h create mode 100644 boards/risc-v/espressif/esp32h2-generic/src/esp32h2_appinit.c create mode 100644 boards/risc-v/espressif/esp32h2-generic/src/esp32h2_boot.c create mode 100644 boards/risc-v/espressif/esp32h2-generic/src/esp32h2_bringup.c diff --git a/arch/risc-v/src/espressif/Kconfig b/arch/risc-v/src/espressif/Kconfig index 1e4d354f9d..fdff52fe95 100644 --- a/arch/risc-v/src/espressif/Kconfig +++ b/arch/risc-v/src/espressif/Kconfig @@ -59,17 +59,44 @@ config ESPRESSIF_ESP32C6 ---help--- Espressif ESP32-C6 (RV32IMAC). +config ESPRESSIF_ESP32H2 + bool "ESP32-H2" + select ARCH_RV32 + select ARCH_RV_ISA_M + select ARCH_RV_ISA_C + select ARCH_VECNOTIRQ + select ARCH_HAVE_BOOTLOADER + select ARCH_HAVE_MPU + select ARCH_HAVE_RESET + select LIBC_ARCH_ATOMIC + select LIBC_ARCH_MEMCPY + select LIBC_ARCH_MEMCHR + select LIBC_ARCH_MEMCMP + select LIBC_ARCH_MEMMOVE + select LIBC_ARCH_MEMSET + select LIBC_ARCH_STRCHR + select LIBC_ARCH_STRCMP + select LIBC_ARCH_STRCPY + select LIBC_ARCH_STRLCPY + select LIBC_ARCH_STRNCPY + select LIBC_ARCH_STRLEN + select LIBC_ARCH_STRNLEN + select ESPRESSIF_ESPTOOLPY_NO_STUB + ---help--- + Espressif ESP32-H2 (RV32IMC). + endchoice # ESPRESSIF_CHIP_SERIES config ESPRESSIF_CHIP_SERIES string default "esp32c3" if ESPRESSIF_ESP32C3 default "esp32c6" if ESPRESSIF_ESP32C6 + default "esp32h2" if ESPRESSIF_ESP32H2 default "unknown" choice ESPRESSIF_FLASH prompt "Flash Size" - default ESPRESSIF_FLASH_4M if ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 + default ESPRESSIF_FLASH_4M if ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 || ESPRESSIF_ESP32H2 config ESPRESSIF_FLASH_2M bool "2 MB" @@ -88,30 +115,55 @@ config ESPRESSIF_FLASH_DETECT choice ESPRESSIF_CPU_FREQ prompt "CPU frequency" default ESPRESSIF_CPU_FREQ_160 if ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 + default ESPRESSIF_CPU_FREQ_96 if ESPRESSIF_ESP32H2 ---help--- CPU frequency to be set on application startup. config ESPRESSIF_CPU_FREQ_40 bool "40 MHz" + depends on ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 ---help--- - Set the CPU to 40 MHz. This frequency is obtained from the XTAL. + Set the CPU frequency to 40 MHz. + +config ESPRESSIF_CPU_FREQ_48 + bool "48 MHz" + depends on ESPRESSIF_ESP32H2 + ---help--- + Set the CPU frequency to 48 MHz. + +config ESPRESSIF_CPU_FREQ_64 + bool "64 MHz" + depends on ESPRESSIF_ESP32H2 + ---help--- + Set the CPU frequency to 64 MHz. config ESPRESSIF_CPU_FREQ_80 bool "80 MHz" + depends on ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 ---help--- - Set the CPU to 80 MHz. This frequency is obtained from the 480 MHz PLL. + Set the CPU frequency to 80 MHz. + +config ESPRESSIF_CPU_FREQ_96 + bool "96 MHz" + depends on ESPRESSIF_ESP32H2 + ---help--- + Set the CPU frequency to 96 MHz. config ESPRESSIF_CPU_FREQ_160 bool "160 MHz" + depends on ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 ---help--- - Set the CPU to 160 MHz. This frequency is obtained from the 480 MHz PLL. + Set the CPU frequency to 160 MHz. endchoice # ESPRESSIF_CPU_FREQ config ESPRESSIF_CPU_FREQ_MHZ int default 40 if ESPRESSIF_CPU_FREQ_40 + default 48 if ESPRESSIF_CPU_FREQ_48 + default 64 if ESPRESSIF_CPU_FREQ_64 default 80 if ESPRESSIF_CPU_FREQ_80 + default 96 if ESPRESSIF_CPU_FREQ_96 default 160 if ESPRESSIF_CPU_FREQ_160 config ESPRESSIF_REGION_PROTECTION @@ -128,6 +180,16 @@ config ESPRESSIF_RUN_IRAM This loads all of NuttX inside IRAM. Used to test somewhat small images that can fit entirely in IRAM. +config ESPRESSIF_ESPTOOLPY_NO_STUB + bool "Disable download stub" + default n + ---help--- + The flasher tool sends a precompiled download stub first by default. + That stub allows things like compressed downloads and more. + Usually you should not need to disable that feature. + It is only required to be disabled in certain scenarios when either + Secure Boot V2 or Flash Encryption is enabled. + menu "Peripheral Support" config ESPRESSIF_UART @@ -167,31 +229,39 @@ config ESPRESSIF_UART0_TXPIN int "UART0 TX Pin" default 21 if ESPRESSIF_ESP32C3 default 16 if ESPRESSIF_ESP32C6 + default 24 if ESPRESSIF_ESP32H2 range 0 21 if ESPRESSIF_ESP32C3 range 0 30 if ESPRESSIF_ESP32C6 + range 0 27 if ESPRESSIF_ESP32H2 config ESPRESSIF_UART0_RXPIN int "UART0 RX Pin" default 20 if ESPRESSIF_ESP32C3 default 17 if ESPRESSIF_ESP32C6 + default 23 if ESPRESSIF_ESP32H2 range 0 21 if ESPRESSIF_ESP32C3 range 0 30 if ESPRESSIF_ESP32C6 + range 0 27 if ESPRESSIF_ESP32H2 config ESPRESSIF_UART0_RTSPIN int "UART0 RTS Pin" depends on SERIAL_IFLOWCONTROL default 16 if ESPRESSIF_ESP32C3 default 15 if ESPRESSIF_ESP32C6 + default 22 if ESPRESSIF_ESP32H2 range 0 21 if ESPRESSIF_ESP32C3 range 0 30 if ESPRESSIF_ESP32C6 + range 0 27 if ESPRESSIF_ESP32H2 config ESPRESSIF_UART0_CTSPIN int "UART0 CTS Pin" depends on SERIAL_OFLOWCONTROL default 15 if ESPRESSIF_ESP32C3 default 14 if ESPRESSIF_ESP32C6 + default 21 if ESPRESSIF_ESP32H2 range 0 21 if ESPRESSIF_ESP32C3 range 0 30 if ESPRESSIF_ESP32C6 + range 0 27 if ESPRESSIF_ESP32H2 endif # ESPRESSIF_UART0 @@ -199,25 +269,27 @@ if ESPRESSIF_UART1 config ESPRESSIF_UART1_TXPIN int "UART1 TX Pin" - default 8 if ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 + default 8 if ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 || ESPRESSIF_ESP32H2 config ESPRESSIF_UART1_RXPIN int "UART1 RX Pin" - default 9 if ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 + default 9 if ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 || ESPRESSIF_ESP32H2 config ESPRESSIF_UART1_RTSPIN int "UART1 RTS Pin" depends on SERIAL_IFLOWCONTROL - default 1 if ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 + default 1 if ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 || ESPRESSIF_ESP32H2 range 0 21 if ESPRESSIF_ESP32C3 range 0 30 if ESPRESSIF_ESP32C6 + range 0 27 if ESPRESSIF_ESP32H2 config ESPRESSIF_UART1_CTSPIN int "UART1 CTS Pin" depends on SERIAL_OFLOWCONTROL - default 2 if ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 + default 2 if ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 || ESPRESSIF_ESP32H2 range 0 21 if ESPRESSIF_ESP32C3 range 0 30 if ESPRESSIF_ESP32C6 + range 0 27 if ESPRESSIF_ESP32H2 endif # ESPRESSIF_UART1 @@ -249,20 +321,29 @@ endchoice # ESPRESSIF_FLASH_MODE choice ESPRESSIF_FLASH_FREQ prompt "SPI Flash frequency" default ESPRESSIF_FLASH_FREQ_80M if ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 + default ESPRESSIF_FLASH_FREQ_48M if ESPRESSIF_ESP32H2 ---help--- SPI Flash frequency. config ESPRESSIF_FLASH_FREQ_80M bool "80 MHz" + depends on ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 + +config ESPRESSIF_FLASH_FREQ_48M + bool "48 MHz" + depends on ESPRESSIF_ESP32H2 config ESPRESSIF_FLASH_FREQ_40M bool "40 MHz" + depends on ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 config ESPRESSIF_FLASH_FREQ_26M bool "26 MHz" + depends on ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 config ESPRESSIF_FLASH_FREQ_20M bool "20 MHz" + depends on ESPRESSIF_ESP32C3 || ESPRESSIF_ESP32C6 endchoice # ESPRESSIF_FLASH_FREQ diff --git a/arch/risc-v/src/espressif/hal_esp32h2.mk b/arch/risc-v/src/espressif/hal_esp32h2.mk new file mode 100644 index 0000000000..b6f1d75cad --- /dev/null +++ b/arch/risc-v/src/espressif/hal_esp32h2.mk @@ -0,0 +1,96 @@ +############################################################################ +# arch/risc-v/src/espressif/esp32h2.mk +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +# Include header paths + +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/driver/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/private_include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/$(CHIP_SERIES)/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/$(CHIP_SERIES)/private_include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_common/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/include/esp_private +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/include/soc +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/port/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/port/$(CHIP_SERIES) +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/port/$(CHIP_SERIES)/private_include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_rom/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_rom/include/$(CHIP_SERIES) +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_rom/$(CHIP_SERIES) +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_system/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_system/port/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_system/port/include/private/esp_private +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_system/port/public_compat +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/hal/$(CHIP_SERIES)/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/hal/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/hal/platform_port/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/log +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/log/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/riscv/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/soc/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/soc/$(CHIP_SERIES)/include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/nuttx/$(CHIP_SERIES)/include + +# Linker scripts + +ARCHSCRIPT += $(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_rom/$(CHIP_SERIES)/ld/$(CHIP_SERIES).rom.ld +ARCHSCRIPT += $(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_rom/$(CHIP_SERIES)/ld/$(CHIP_SERIES).rom.api.ld +ARCHSCRIPT += $(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_rom/$(CHIP_SERIES)/ld/$(CHIP_SERIES).rom.newlib.ld +ARCHSCRIPT += $(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_rom/$(CHIP_SERIES)/ld/$(CHIP_SERIES).rom.spiflash.ld +ARCHSCRIPT += $(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_rom/$(CHIP_SERIES)/ld/$(CHIP_SERIES).rom.version.ld +ARCHSCRIPT += $(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_rom/$(CHIP_SERIES)/ld/$(CHIP_SERIES).rom.wdt.ld +ARCHSCRIPT += $(ARCH_SRCDIR)/chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/soc/$(CHIP_SERIES)/ld/$(CHIP_SERIES).peripherals.ld + +# Source files + +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/src/esp_efuse_api.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/src/esp_efuse_utility.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/$(CHIP_SERIES)/esp_efuse_fields.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/$(CHIP_SERIES)/esp_efuse_table.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/$(CHIP_SERIES)/esp_efuse_utility.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/cpu.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/esp_clk.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/periph_ctrl.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/regi2c_ctrl.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/port/clk_tree_common.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/port/$(CHIP_SERIES)/cpu_region_protect.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/port/$(CHIP_SERIES)/clk_tree.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/port/$(CHIP_SERIES)/pmu_init.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/port/$(CHIP_SERIES)/pmu_param.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/port/$(CHIP_SERIES)/rtc_clk.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/port/$(CHIP_SERIES)/rtc_time.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/port/$(CHIP_SERIES)/sar_periph_ctrl.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/port/$(CHIP_SERIES)/systimer.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_rom/patches/esp_rom_regi2c_$(CHIP_SERIES).c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_rom/patches/esp_rom_systimer.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_rom/patches/esp_rom_wdt.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_system/port/brownout.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_system/port/soc/$(CHIP_SERIES)/clk.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/hal/brownout_hal.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/hal/efuse_hal.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/hal/uart_hal.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/hal/uart_hal_iram.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/hal/$(CHIP_SERIES)/clk_tree_hal.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/hal/$(CHIP_SERIES)/efuse_hal.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/log/log.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/log/log_noos.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/riscv/interrupt.c +CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/soc/$(CHIP_SERIES)/gpio_periph.c diff --git a/boards/Kconfig b/boards/Kconfig index 954568f59b..b6552534c5 100644 --- a/boards/Kconfig +++ b/boards/Kconfig @@ -417,6 +417,12 @@ config ARCH_BOARD_ESP32C6_GENERIC ---help--- The ESP32-C6 DevKit features the ESP32-C6 CPU with a RISC-V core. +config ARCH_BOARD_ESP32H2_GENERIC + bool "Espressif ESP32-H2 Generic DevKit" + depends on ESPRESSIF_ESP32H2 + ---help--- + The ESP32-H2 DevKit features the ESP32-H2 CPU with a RISC-V core. + config ARCH_BOARD_ET_STM32_STAMP bool "Futurlec: ET-STM32 Stamp" depends on ARCH_CHIP_STM32F103RE @@ -2794,6 +2800,7 @@ config ARCH_BOARD default "esp32s3-eye" if ARCH_BOARD_ESP32S3_EYE default "esp32c6-devkit" if ARCH_BOARD_ESP32C6_DEVKIT default "esp32c6-generic" if ARCH_BOARD_ESP32C6_GENERIC + default "esp32h2-generic" if ARCH_BOARD_ESP32H2_GENERIC default "et-stm32-stamp" if ARCH_BOARD_ET_STM32_STAMP default "tlsr8278adk80d" if ARCH_BOARD_TLSR8278ADK80D default "ez80f910200kitg" if ARCH_BOARD_EZ80F910200KITG @@ -3789,6 +3796,9 @@ endif if ARCH_BOARD_ESP32C6_GENERIC source "boards/risc-v/espressif/esp32c6-generic/Kconfig" endif +if ARCH_BOARD_ESP32H2_GENERIC +source "boards/risc-v/espressif/esp32h2-generic/Kconfig" +endif if ARCH_BOARD_SIM source "boards/sim/sim/sim/Kconfig" endif diff --git a/boards/risc-v/espressif/common/scripts/esp32h2_aliases.ld b/boards/risc-v/espressif/common/scripts/esp32h2_aliases.ld new file mode 100644 index 0000000000..89c145fbb1 --- /dev/null +++ b/boards/risc-v/espressif/common/scripts/esp32h2_aliases.ld @@ -0,0 +1,29 @@ +/**************************************************************************** + * boards/risc-v/espressif/common/scripts/esp32h2_aliases.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifdef CONFIG_ESPRESSIF_BLE + +/* Lower-case aliases for BLE library symbols not compliant to nxstyle */ + +api_vhci_host_check_send_available = API_vhci_host_check_send_available; +api_vhci_host_send_packet = API_vhci_host_send_packet; +api_vhci_host_register_callback = API_vhci_host_register_callback; + +#endif diff --git a/boards/risc-v/espressif/common/scripts/esp32h2_flat_memory.ld b/boards/risc-v/espressif/common/scripts/esp32h2_flat_memory.ld new file mode 100644 index 0000000000..766605a5fa --- /dev/null +++ b/boards/risc-v/espressif/common/scripts/esp32h2_flat_memory.ld @@ -0,0 +1,116 @@ +/**************************************************************************** + * boards/risc-v/espressif/common/scripts/esp32h2_flat_memory.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * ESP32-H2 Linker Script Memory Layout + * + * This file describes the memory layout (memory blocks) as virtual + * memory addresses. + * + * esp32h2__sections.ld contains output sections to link compiler + * output into these memory blocks. + * + ****************************************************************************/ + +#include + +#define SRAM_IRAM_START 0x40800000 +#define SRAM_DRAM_START 0x40800000 + +#define I_D_SRAM_OFFSET (SRAM_IRAM_START - SRAM_DRAM_START) + +/* 2nd stage bootloader iram_loader_seg start address */ + +#define SRAM_DRAM_END 0x40850000 - I_D_SRAM_OFFSET + +#define SRAM_IRAM_ORG (SRAM_IRAM_START) +#define SRAM_DRAM_ORG (SRAM_DRAM_START) + +#define I_D_SRAM_SIZE SRAM_DRAM_END - SRAM_DRAM_ORG + +/* IDRAM0_2_SEG_SIZE_DEFAULT is used when page size is 64KB */ + +#define CONFIG_MMU_PAGE_SIZE 0x10000 +#define IDRAM0_2_SEG_SIZE (CONFIG_MMU_PAGE_SIZE << 8) + +#define DRAM0_0_SEG_LEN I_D_SRAM_SIZE + +MEMORY +{ + /* Below values assume the flash cache is on, and have the blocks this + * uses subtracted from the length of the various regions. The 'data access + * port' dram/drom regions map to the same iram/irom regions but are + * connected to the data port of the CPU and e.g. allow bytewise access. + */ + + iram0_0_seg (RX) : org = SRAM_IRAM_ORG, len = I_D_SRAM_SIZE + + /* Flash mapped instruction data. + * + * The 0x20 offset is a convenience for the app binary image generation. + * Flash cache has 64KB pages. The .bin file which is flashed to the chip + * has a 0x18 byte file header, and each segment has a 0x08 byte segment + * header. Setting this offset makes it simple to meet the flash cache MMU's + * constraint that (paddr % 64KB == vaddr % 64KB). + */ + + irom_seg (RX) : org = 0x42000020, len = IDRAM0_2_SEG_SIZE - 0x20 + + /* Shared data RAM, excluding memory reserved for ROM bss/data/stack. + * Enabling Bluetooth & Trace Memory features in menuconfig will decrease + * the amount of RAM available. + */ + + dram0_0_seg (RW) : org = SRAM_DRAM_ORG, len = DRAM0_0_SEG_LEN + + /* Flash mapped constant data. + * + * The 0x20 offset is a convenience for the app binary image generation. + * Flash cache has 64KB pages. The .bin file which is flashed to the chip + * has a 0x18 byte file header, and each segment has a 0x08 byte segment + * header. Setting this offset makes it simple to meet the flash cache MMU's + * constraint that (paddr % 64KB == vaddr % 64KB). + */ + + drom_seg (R) : org = 0x42000020, len = IDRAM0_2_SEG_SIZE - 0x20 + + /* RTC fast memory (executable). Persists over deep sleep. */ + + lp_ram_seg (RWX) : org = 0x50000000, len = 0x1000 +} + +/* The lines below define location alias for .rtc.data section + * ESP32-C6 has no distinguished LP(RTC) fast and slow memory sections, + * instead, there is a unified LP_RAM section. + * Thus, the following region segments are not configurable like on other targets + */ + +REGION_ALIAS("rtc_iram_seg", lp_ram_seg); +REGION_ALIAS("rtc_data_seg", rtc_iram_seg); +REGION_ALIAS("rtc_slow_seg", rtc_iram_seg); +REGION_ALIAS("rtc_data_location", rtc_iram_seg); + +#if CONFIG_ESPRESSIF_RUN_IRAM + REGION_ALIAS("default_rodata_seg", dram0_0_seg); + REGION_ALIAS("default_code_seg", iram0_0_seg); +#else + REGION_ALIAS("default_rodata_seg", drom_seg); + REGION_ALIAS("default_code_seg", irom_seg); +#endif /* CONFIG_ESPRESSIF_RUN_IRAM */ diff --git a/boards/risc-v/espressif/common/scripts/esp32h2_legacy_sections.ld b/boards/risc-v/espressif/common/scripts/esp32h2_legacy_sections.ld new file mode 100644 index 0000000000..d4f3cd5723 --- /dev/null +++ b/boards/risc-v/espressif/common/scripts/esp32h2_legacy_sections.ld @@ -0,0 +1,280 @@ +/**************************************************************************** + * boards/risc-v/espressif/common/scripts/esp32h2_legacy_sections.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Default entry point: */ + +ENTRY(__start); + +SECTIONS +{ + .iram0.text : + { + _iram_start = ABSOLUTE(.); + + /* Vectors go to start of IRAM */ + + KEEP(*(.exception_vectors.text)); + . = ALIGN(4); + + *(.iram1) + *(.iram1.*) + + *libarch.a:brownout.*(.text .text.* .literal .literal.*) + *libarch.a:cpu.*(.text .text.* .literal .literal.*) + *libarch.a:gpio_hal.*(.text .text.* .literal .literal.*) + *libarch.a:periph_ctrl.*(.text .text.* .literal .literal.*) + *libarch.a:rtc_clk.*(.text .text.* .literal .literal.*) + *libarch.a:rtc_sleep.*(.text .text.* .literal .literal.*) + *libarch.a:rtc_time.*(.text .text.* .literal .literal.*) + *libarch.a:systimer.*(.text .text.* .literal .literal.*) + *libarch.a:systimer_hal.*(.text .text.* .literal .literal.*) + *libarch.a:uart_hal_iram.*(.text .text.* .literal .literal.*) + *libarch.a:wdt_hal_iram.*(.text .text.* .literal .literal.*) + *libsched.a:irq_dispatch.*(.text .text.* .literal .literal.*) + } >iram0_0_seg + + /* Marks the end of IRAM code segment */ + + .iram0.text_end (NOLOAD) : + { + . = ALIGN(16); + } >iram0_0_seg + + .iram0.data : + { + . = ALIGN(16); + *(.iram.data) + *(.iram.data*) + } >iram0_0_seg + + .iram0.bss (NOLOAD) : + { + . = ALIGN(16); + *(.iram.bss) + *(.iram.bss*) + + . = ALIGN(16); + _iram_end = ABSOLUTE(.); + } >iram0_0_seg + + /* This section is required to skip .iram0.text area because iram0_0_seg + * and dram0_0_seg reflect the same address space on different buses. + */ + + .dram0.dummy (NOLOAD): + { + . = ORIGIN(dram0_0_seg) + _iram_end - _iram_start; + } >dram0_0_seg + + /* Shared RAM */ + + .dram0.bss (NOLOAD) : + { + . = ALIGN(8); + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.share.mem) + *(.gnu.linkonce.b.*) + *(COMMON) + + . = ALIGN(8); + _ebss = ABSOLUTE(.); + } >dram0_0_seg + + .noinit (NOLOAD): + { + /* This section contains data that is not initialized during load, + * or during the application's initialization sequence. + */ + + . = ALIGN(4); + *(.noinit) + *(.noinit.*) + . = ALIGN(4); + } >dram0_0_seg + + .dram0.data : + { + _sdata = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + __global_pointer$ = . + 0x800; + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + *(.dram1) + *(.dram1.*) + + *libarch.a:brownout.*(.rodata .rodata.*) + *libarch.a:cpu.*(.rodata .rodata.*) + *libarch.a:gpio_hal.*(.rodata .rodata.*) + *libarch.a:interrupt.*(.rodata .rodata.*) + *libarch.a:periph_ctrl.*(.rodata .rodata.*) + *libarch.a:rtc_clk.*(.rodata .rodata.*) + *libarch.a:rtc_sleep.*(.rodata .rodata.*) + *libarch.a:rtc_time.*(.rodata .rodata.*) + *libarch.a:systimer.*(.rodata .rodata.*) + *libarch.a:systimer_hal.*(.rodata .rodata.*) + *libarch.a:uart_hal_iram.*(.rodata .rodata.*) + *libarch.a:wdt_hal_iram.*(.rodata .rodata.*) + *libsched.a:irq_dispatch.*(.rodata .rodata.*) + . = ALIGN(4); + _edata = ABSOLUTE(.); + + /* Heap starts at the end of .data */ + + _sheap = ABSOLUTE(.); + } >dram0_0_seg + + .flash.text : + { + _stext = .; + + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.fini.literal) + *(.fini) + *(.gnu.version) + _etext = .; + + /* Similar to _iram_start, this symbol goes here so it is + * resolved by addr2line in preference to the first symbol in + * the flash.text segment. + */ + + _flash_cache_start = ABSOLUTE(0); + } >default_code_seg + + .flash_rodata_dummy (NOLOAD): + { + /* Start at the same alignment constraint than .flash.text */ + + . = ALIGN(ALIGNOF(.flash.text)); + + /* Create an empty gap as big as .flash.text section */ + + . = . + SIZEOF(.flash.text); + + /* Prepare the alignment of the section above. Few bytes (0x20) must be + * added for the mapping header. + */ + + . = ALIGN(0x10000) + 0x20; + } >default_rodata_seg + + .flash.rodata : ALIGN(0x10) + { + _srodata = ABSOLUTE(.); + + *(.rodata) + *(.rodata.*) + + *(.srodata.*) + + *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table .gcc_except_table.*) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + . = (. + 3) & ~ 3; + __eh_frame = ABSOLUTE(.); + KEEP(*(.eh_frame)) + . = (. + 7) & ~ 3; + + /* C++ constructor and destructor tables: + * RISC-V GCC is configured with --enable-initfini-array so it emits an + * .init_array section instead. + */ + + _sinit = ABSOLUTE(.); + KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*)) + KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array)) + _einit = ABSOLUTE(.); + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + + /* C++ exception handlers table: */ + + __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + _erodata = ABSOLUTE(.); + + /* Literals are also RO data. */ + + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + . = ALIGN(4); + } >default_rodata_seg + + /* RTC fast memory holds RTC wake stub code !*/ + + .rtc.text : + { + . = ALIGN(4); + *(.rtc.literal .rtc.text) + } >lp_ram_seg + + /* This section is required to skip rtc.text area because the text and + * data segements reflect the same address space on different buses. + */ + + .rtc.dummy : + { + . = SIZEOF(.rtc.text); + } >lp_ram_seg + + /* RTC data section holds RTC wake stub data/rodata. */ + + .rtc.data : + { + *(.rtc.data) + *(.rtc.rodata) + } >lp_ram_seg +} + diff --git a/boards/risc-v/espressif/esp32h2-generic/Kconfig b/boards/risc-v/espressif/esp32h2-generic/Kconfig new file mode 100644 index 0000000000..91a3b3330a --- /dev/null +++ b/boards/risc-v/espressif/esp32h2-generic/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_ESP32H2_GENERIC + +endif # ARCH_BOARD_ESP32H2_GENERIC diff --git a/boards/risc-v/espressif/esp32h2-generic/configs/nsh/defconfig b/boards/risc-v/espressif/esp32h2-generic/configs/nsh/defconfig new file mode 100644 index 0000000000..ffca5ca541 --- /dev/null +++ b/boards/risc-v/espressif/esp32h2-generic/configs/nsh/defconfig @@ -0,0 +1,46 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp32h2-generic" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP32H2_GENERIC=y +CONFIG_ARCH_CHIP="espressif" +CONFIG_ARCH_CHIP_ESPRESSIF=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_DEV_ZERO=y +CONFIG_ESPRESSIF_ESP32H2=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/espressif/esp32h2-generic/include/board.h b/boards/risc-v/espressif/esp32h2-generic/include/board.h new file mode 100644 index 0000000000..4b8c207f55 --- /dev/null +++ b/boards/risc-v/espressif/esp32h2-generic/include/board.h @@ -0,0 +1,25 @@ +/**************************************************************************** + * boards/risc-v/espressif/esp32h2-generic/include/board.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESPRESSIF_ESP32H2_GENERIC_INCLUDE_BOARD_H +#define __BOARDS_RISCV_ESPRESSIF_ESP32H2_GENERIC_INCLUDE_BOARD_H + +#endif /* __BOARDS_RISCV_ESPRESSIF_ESP32H2_GENERIC_INCLUDE_BOARD_H */ + diff --git a/boards/risc-v/espressif/esp32h2-generic/scripts/Make.defs b/boards/risc-v/espressif/esp32h2-generic/scripts/Make.defs new file mode 100644 index 0000000000..250aab7d1b --- /dev/null +++ b/boards/risc-v/espressif/esp32h2-generic/scripts/Make.defs @@ -0,0 +1,60 @@ +############################################################################ +# boards/risc-v/espressif/esp32h2-generic/scripts/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +########################################################################### + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk +include $(TOPDIR)/tools/espressif/Config.mk +include $(TOPDIR)/arch/risc-v/src/common/Toolchain.defs + +# Remove quotes from CONFIG_ESPRESSIF_CHIP_SERIES configuration + +CHIP_SERIES = $(patsubst "%",%,$(CONFIG_ESPRESSIF_CHIP_SERIES)) + +# Pick the linker scripts from the board level if they exist, if not +# pick the common linker scripts. + +ARCHSCRIPT += $(BOARD_COMMON_DIR)/scripts/$(CHIP_SERIES)_aliases.ld + +ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_flat_memory.ld) +ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_legacy_sections.ld) + +ARCHPICFLAGS = -fpic + +CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe -Werror=return-type -Werror +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +AFLAGS := $(CFLAGS) -D__ASSEMBLY__ + +# Loadable module definitions + +CMODULEFLAGS = $(CFLAGS) + +LDMODULEFLAGS = -melf32lriscv -r -e module_initialize +LDMODULEFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/libs/libc/modlib/gnu-elf.ld) + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -melf32lriscv -r -e main +LDELFFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/binfmt/libelf/gnu-elf.ld) diff --git a/boards/risc-v/espressif/esp32h2-generic/src/Make.defs b/boards/risc-v/espressif/esp32h2-generic/src/Make.defs new file mode 100644 index 0000000000..57a1eeedda --- /dev/null +++ b/boards/risc-v/espressif/esp32h2-generic/src/Make.defs @@ -0,0 +1,31 @@ +############################################################################# +# boards/risc-v/espressif/esp32h2-generic/src/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################# + +include $(TOPDIR)/Make.defs + +CSRCS = esp32h2_boot.c esp32h2_bringup.c + +ifeq ($(CONFIG_BOARDCTL),y) + CSRCS += esp32h2_appinit.c +endif + +DEPPATH += --dep-path board +VPATH += :board +CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board) diff --git a/boards/risc-v/espressif/esp32h2-generic/src/esp32h2-generic.h b/boards/risc-v/espressif/esp32h2-generic/src/esp32h2-generic.h new file mode 100644 index 0000000000..ab6ff3e637 --- /dev/null +++ b/boards/risc-v/espressif/esp32h2-generic/src/esp32h2-generic.h @@ -0,0 +1,72 @@ +/**************************************************************************** + * boards/risc-v/espressif/esp32h2-generic/src/esp32h2-generic.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESPRESSIF_ESP32H2_GENERIC_SRC_ESP32H2_GENERIC_H +#define __BOARDS_RISCV_ESPRESSIF_ESP32H2_GENERIC_SRC_ESP32H2_GENERIC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_bringup + * + * Description: + * Perform architecture-specific initialization. + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_BOARDCTL=y : + * Called from the NSH library via board_app_initialize(). + * + * Input Parameters: + * None. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned on + * any failure. + * + ****************************************************************************/ + +int esp_bringup(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_RISCV_ESPRESSIF_ESP32H2_GENERIC_SRC_ESP32H2_GENERIC_H */ diff --git a/boards/risc-v/espressif/esp32h2-generic/src/esp32h2_appinit.c b/boards/risc-v/espressif/esp32h2-generic/src/esp32h2_appinit.c new file mode 100644 index 0000000000..2070289f5d --- /dev/null +++ b/boards/risc-v/espressif/esp32h2-generic/src/esp32h2_appinit.c @@ -0,0 +1,81 @@ +/**************************************************************************** + * boards/risc-v/espressif/esp32h2-generic/src/esp32h2_appinit.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "esp32h2-generic.h" + +#ifdef CONFIG_BOARDCTL + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initialization logic and the + * matching application logic. The value could be such things as a + * mode enumeration value, a set of DIP switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_app_initialize(uintptr_t arg) +{ +#ifdef CONFIG_BOARD_LATE_INITIALIZE + /* Board initialization already performed by board_late_initialize() */ + + return OK; +#else + /* Perform board-specific initialization */ + + return esp_bringup(); +#endif +} + +#endif /* CONFIG_BOARDCTL */ diff --git a/boards/risc-v/espressif/esp32h2-generic/src/esp32h2_boot.c b/boards/risc-v/espressif/esp32h2-generic/src/esp32h2_boot.c new file mode 100644 index 0000000000..76594281e5 --- /dev/null +++ b/boards/risc-v/espressif/esp32h2-generic/src/esp32h2_boot.c @@ -0,0 +1,89 @@ +/**************************************************************************** + * boards/risc-v/espressif/esp32h2-generic/src/esp32h2_boot.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "riscv_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_board_initialize + * + * Description: + * All Espressif boards must provide the following entry point. + * This entry point is called early in the initialization -- after all + * memory has been configured and mapped but before any devices have been + * initialized. + * + * Input Parameters: + * None. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void esp_board_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_late_initialize + * + * Description: + * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_late_initialize(). board_late_initialize() will + * be called immediately after up_initialize() is called and just before + * the initial application is started. This additional initialization + * phase may be used, for example, to initialize board-specific device + * drivers. + * + * Input Parameters: + * None. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_LATE_INITIALIZE +void board_late_initialize(void) +{ + /* Perform board-specific initialization */ + + esp_bringup(); +} +#endif diff --git a/boards/risc-v/espressif/esp32h2-generic/src/esp32h2_bringup.c b/boards/risc-v/espressif/esp32h2-generic/src/esp32h2_bringup.c new file mode 100644 index 0000000000..d2bfc9a7fd --- /dev/null +++ b/boards/risc-v/espressif/esp32h2-generic/src/esp32h2_bringup.c @@ -0,0 +1,98 @@ +/**************************************************************************** + * boards/risc-v/espressif/esp32h2-generic/src/esp32h2_bringup.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "esp32h2-generic.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_bringup + * + * Description: + * Perform architecture-specific initialization. + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_BOARDCTL=y : + * Called from the NSH library via board_app_initialize(). + * + * Input Parameters: + * None. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned on + * any failure. + * + ****************************************************************************/ + +int esp_bringup(void) +{ + int ret = OK; + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = nx_mount(NULL, "/proc", "procfs", 0, NULL); + if (ret < 0) + { + _err("Failed to mount procfs at /proc: %d\n", ret); + } +#endif + +#ifdef CONFIG_FS_TMPFS + /* Mount the tmpfs file system */ + + ret = nx_mount(NULL, CONFIG_LIBC_TMPDIR, "tmpfs", 0, NULL); + if (ret < 0) + { + _err("Failed to mount tmpfs at %s: %d\n", CONFIG_LIBC_TMPDIR, ret); + } +#endif + + /* If we got here then perhaps not all initialization was successful, but + * at least enough succeeded to bring-up NSH with perhaps reduced + * capabilities. + */ + + return ret; +} diff --git a/tools/espressif/Config.mk b/tools/espressif/Config.mk index 2c92c65a8c..96b0eca968 100644 --- a/tools/espressif/Config.mk +++ b/tools/espressif/Config.mk @@ -48,6 +48,8 @@ endif ifeq ($(CONFIG_ESPRESSIF_FLASH_FREQ_80M),y) FLASH_FREQ := 80m +else ifeq ($(CONFIG_ESPRESSIF_FLASH_FREQ_48M),y) + FLASH_FREQ := 48m else ifeq ($(CONFIG_ESPRESSIF_FLASH_FREQ_40M),y) FLASH_FREQ := 40m else ifeq ($(CONFIG_ESPRESSIF_FLASH_FREQ_26M),y)