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Merge 0945bc0fb8
into a2d4d74af7
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commit
a0915cdef8
2 changed files with 12 additions and 0 deletions
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@ -39,6 +39,7 @@
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#include "soc/periph_defs.h"
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#include "soc/periph_defs.h"
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#include "esp_private/periph_ctrl.h"
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#include "esp_private/periph_ctrl.h"
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#include "hardware/esp32s3_system.h"
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/****************************************************************************
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/****************************************************************************
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* Private Types
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* Private Types
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@ -937,6 +938,8 @@ struct esp32s3_tim_dev_s *esp32s3_tim_init(int timer)
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case ESP32S3_TIMER0:
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case ESP32S3_TIMER0:
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{
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{
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tim = &g_esp32s3_tim0_priv;
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tim = &g_esp32s3_tim0_priv;
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modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0, SYSTEM_TIMERGROUP_CLK_EN);
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modifyreg32(SYSTEM_PERIP_RST_EN0_REG, SYSTEM_TIMERGROUP_RST_M, 0);
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break;
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break;
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}
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}
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#endif
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#endif
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@ -945,6 +948,9 @@ struct esp32s3_tim_dev_s *esp32s3_tim_init(int timer)
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case ESP32S3_TIMER1:
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case ESP32S3_TIMER1:
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{
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{
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tim = &g_esp32s3_tim1_priv;
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tim = &g_esp32s3_tim1_priv;
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modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0,
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SYSTEM_TIMERGROUP1_CLK_EN);
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modifyreg32(SYSTEM_PERIP_RST_EN0_REG, SYSTEM_TIMERGROUP1_RST_M, 0);
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break;
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break;
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}
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}
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#endif
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#endif
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@ -33,6 +33,7 @@
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#include "hardware/esp32s3_rtccntl.h"
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#include "hardware/esp32s3_rtccntl.h"
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#include "hardware/esp32s3_tim.h"
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#include "hardware/esp32s3_tim.h"
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#include "hardware/esp32s3_efuse.h"
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#include "hardware/esp32s3_efuse.h"
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#include "hardware/esp32s3_system.h"
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#include "esp32s3_irq.h"
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#include "esp32s3_irq.h"
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#include "esp32s3_rtc_gpio.h"
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#include "esp32s3_rtc_gpio.h"
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@ -991,6 +992,8 @@ struct esp32s3_wdt_dev_s *esp32s3_wdt_init(enum esp32s3_wdt_inst_e wdt_id)
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case ESP32S3_WDT_MWDT0:
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case ESP32S3_WDT_MWDT0:
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{
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{
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wdt = &g_esp32s3_mwdt0_priv;
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wdt = &g_esp32s3_mwdt0_priv;
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modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0, SYSTEM_TIMERGROUP_CLK_EN);
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modifyreg32(SYSTEM_PERIP_RST_EN0_REG, SYSTEM_TIMERGROUP_RST_M, 0);
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break;
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break;
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}
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}
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@ -1000,6 +1003,9 @@ struct esp32s3_wdt_dev_s *esp32s3_wdt_init(enum esp32s3_wdt_inst_e wdt_id)
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case ESP32S3_WDT_MWDT1:
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case ESP32S3_WDT_MWDT1:
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{
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{
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wdt = &g_esp32s3_mwdt1_priv;
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wdt = &g_esp32s3_mwdt1_priv;
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modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0,
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SYSTEM_TIMERGROUP1_CLK_EN);
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modifyreg32(SYSTEM_PERIP_RST_EN0_REG, SYSTEM_TIMERGROUP1_RST_M, 0);
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break;
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break;
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}
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}
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#endif
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#endif
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