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board/stm32f401rc-rs485: Add support to Quadrature Encoder
Signed-off-by: Rodrigo Sim <rcsim10@gmail.com>
This commit is contained in:
Rodrigo Sim
Alan Carvalho de Assis
parent
b4407b529a
commit
a7ba822389
5 changed files with 129 additions and 0 deletions
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@ -465,3 +465,32 @@ NSH commands::
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nsh> pwm -d 50 -t 3
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pwm_main: starting output with frequency: 50 duty: 00007fff
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pwm_main: stopping output
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qencoder
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--------
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Configures the NuttShell (nsh) over USB Serial (check usbserial configuration) and enables Timer 3 on channels 1 and
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2 to handle Quadrature Encoder.
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NSH commands::
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nsh> qe -help
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Usage: qe [OPTIONS]
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OPTIONS include:
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[-p devpath] QE device path
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[-n samples] Number of samples
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[-t msec] Delay between samples (msec)
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[-r] Reset the position to zero
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[-h] Shows this message and exits
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nsh> qe -p /dev/qe0 -n 5 -t 100 -r
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nsh: qe: too many arguments
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qe_main: Hardware initialized. Opening the encoder device: /dev/qe0
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qe_main: Resetting the count...
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qe_main: Number of samples: 5
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qe_main: 1. 0
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qe_main: 2. 0
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qe_main: 3. 4
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qe_main: 4. 2
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qe_main: 5. 2
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Terminating!
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@ -0,0 +1,68 @@
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#
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# This file is autogenerated: PLEASE DO NOT EDIT IT.
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#
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# You can use "make menuconfig" to make any modifications to the installed .config file.
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# You can then do "make savedefconfig" to generate a new defconfig file that includes your
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# modifications.
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#
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# CONFIG_ARCH_FPU is not set
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# CONFIG_NSH_ARGCAT is not set
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# CONFIG_NSH_CMDOPT_HEXDUMP is not set
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# CONFIG_NSH_DISABLE_IFCONFIG is not set
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# CONFIG_NSH_DISABLE_PS is not set
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CONFIG_ARCH="arm"
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CONFIG_ARCH_BOARD="stm32f401rc-rs485"
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CONFIG_ARCH_BOARD_COMMON=y
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CONFIG_ARCH_BOARD_STM32F401RC_RS485=y
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CONFIG_ARCH_BUTTONS=y
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CONFIG_ARCH_CHIP="stm32"
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CONFIG_ARCH_CHIP_STM32=y
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CONFIG_ARCH_CHIP_STM32F401RC=y
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CONFIG_ARCH_INTERRUPTSTACK=2048
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CONFIG_ARCH_IRQBUTTONS=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_BOARDCTL_USBDEVCTRL=y
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CONFIG_BOARD_LOOPSPERMSEC=8499
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CONFIG_BUILTIN=y
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CONFIG_CDCACM=y
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CONFIG_CDCACM_CONSOLE=y
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CONFIG_EXAMPLES_BUTTONS=y
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CONFIG_EXAMPLES_BUTTONS_NAME0="SW3"
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CONFIG_EXAMPLES_BUTTONS_NAME1="SW4"
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CONFIG_EXAMPLES_BUTTONS_NAME2="SW5"
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CONFIG_EXAMPLES_BUTTONS_NAMES=y
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CONFIG_EXAMPLES_BUTTONS_QTD=3
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CONFIG_EXAMPLES_QENCODER=y
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CONFIG_HAVE_CXX=y
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CONFIG_HAVE_CXXINITIALIZE=y
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CONFIG_INIT_ENTRYPOINT="nsh_main"
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CONFIG_INPUT=y
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CONFIG_INPUT_BUTTONS=y
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CONFIG_INPUT_BUTTONS_LOWER=y
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CONFIG_INTELHEX_BINARY=y
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CONFIG_NSH_ARCHINIT=y
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CONFIG_NSH_BUILTIN_APPS=y
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CONFIG_NSH_FILEIOSIZE=512
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CONFIG_NSH_LINELEN=64
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CONFIG_NSH_READLINE=y
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CONFIG_PREALLOC_TIMERS=4
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CONFIG_RAM_SIZE=98304
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CONFIG_RAM_START=0x20000000
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CONFIG_RAW_BINARY=y
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CONFIG_RR_INTERVAL=200
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CONFIG_SCHED_WAITPID=y
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CONFIG_SENSORS=y
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CONFIG_SENSORS_QENCODER=y
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CONFIG_SPI=y
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CONFIG_START_DAY=5
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CONFIG_START_MONTH=5
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CONFIG_START_YEAR=2014
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CONFIG_STM32_JTAG_SW_ENABLE=y
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CONFIG_STM32_OTGFS=y
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CONFIG_STM32_PWR=y
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CONFIG_STM32_TIM3=y
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CONFIG_STM32_TIM3_QE=y
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CONFIG_STM32_USART6=y
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CONFIG_SYSTEM_NSH=y
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CONFIG_TASK_NAME_SIZE=0
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CONFIG_USBDEV=y
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@ -290,6 +290,14 @@ extern "C"
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#define GPIO_TIM3_CH1OUT GPIO_TIM3_CH1OUT_1
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/* Quadrature Encoder
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*
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* Use Timer 3 (TIM3) on channels 1 and 2 for QEncoder, using PB4 and PA7.
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*/
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#define GPIO_TIM3_CH1IN GPIO_TIM3_CH1IN_2
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#define GPIO_TIM3_CH2IN GPIO_TIM3_CH2IN_1
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/* I2C
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*
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* The optional _GPIO configurations allow the I2C driver to manually
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@ -51,6 +51,10 @@
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#include "stm32_lm75.h"
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#endif
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#ifdef CONFIG_SENSORS_QENCODER
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#include "board_qencoder.h"
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -201,5 +205,18 @@ int stm32_bringup(void)
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}
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#endif
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#ifdef CONFIG_SENSORS_QENCODER
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/* Initialize and register the qencoder driver */
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ret = board_qencoder_initialize(0, STM32F401RCRS485_QETIMER);
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if (ret != OK)
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{
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syslog(LOG_ERR,
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"ERROR: Failed to register the qencoder: %d\n",
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ret);
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return ret;
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}
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#endif
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return ret;
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}
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@ -122,6 +122,13 @@
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#define STM32F401RCRS485_PWMTIMER 3
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#define STM32F401RCRS485_PWMCHANNEL 1
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/* Quadrature Encoder
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*
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* Use Timer 3 (TIM3) on channels 1 and 2 for QEncoder, using PB4 and PA7.
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*/
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#define STM32F401RCRS485_QETIMER 3
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/****************************************************************************
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* Public Data
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****************************************************************************/
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