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arch/arm/stm32:add stm32g4 spi driver.

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Signed-off-by: jerryslhao <jerryslhao@gmail.com>
This commit is contained in:
jerryslhao 2025-01-09 10:46:51 +08:00 committed by Mateusz Szafoni
parent a8ba833cde
commit bb4eb12fa3
1 changed files with 17 additions and 10 deletions
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27
arch/arm/src/stm32/stm32_spi.c
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@ -101,7 +101,7 @@
# if defined(CONFIG_SPI_DMAPRIO)
# define SPI_DMA_PRIO CONFIG_SPI_DMAPRIO
# elif defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32L15XX) || \
defined(CONFIG_STM32_STM32F30XX)
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32G4XXX)
# define SPI_DMA_PRIO DMA_CCR_PRIMED
# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
# define SPI_DMA_PRIO DMA_SCR_PRIMED
@ -110,7 +110,7 @@
# endif
# if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32L15XX) || \
defined(CONFIG_STM32_STM32F30XX)
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32G4XXX)
# if (SPI_DMA_PRIO & ~DMA_CCR_PL_MASK) != 0
# error "Illegal value for CONFIG_SPI_DMAPRIO"
# endif
@ -125,7 +125,8 @@
/* DMA channel configuration */
#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32L15XX) || \
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
defined(CONFIG_STM32_STM32G4XXX)
# define SPI_RXDMA16_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC )
# define SPI_RXDMA8_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC )
# define SPI_RXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_16BITS )
@ -759,7 +760,8 @@ static inline uint16_t spi_getreg(struct stm32_spidev_s *priv,
*
****************************************************************************/
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
defined(CONFIG_STM32_STM32G4XXX)
static inline uint8_t spi_getreg8(struct stm32_spidev_s *priv,
uint8_t offset)
{
@ -806,7 +808,8 @@ static inline void spi_putreg(struct stm32_spidev_s *priv,
*
****************************************************************************/
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
defined(CONFIG_STM32_STM32G4XXX)
static inline void spi_putreg8(struct stm32_spidev_s *priv,
uint8_t offset,
uint8_t value)
@ -839,7 +842,8 @@ static inline uint16_t spi_readword(struct stm32_spidev_s *priv)
/* Then return the received byte */
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)|| \
defined(CONFIG_STM32_STM32G4XXX)
/* "When the data frame size fits into one byte
* (less than or equal to 8 bits),
* data packing is used automatically when any read or write 16-bit access
@ -890,7 +894,8 @@ static inline void spi_writeword(struct stm32_spidev_s *priv,
/* Then send the word */
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
defined(CONFIG_STM32_STM32G4XXX)
/* "When the data frame size fits into one byte (less than or equal to 8
* bits), data packing is used automatically when any read or write 16-bit
* access is performed on the SPIx_DR register. The double data frame
@ -1234,7 +1239,7 @@ static void spi_modifycr1(struct stm32_spidev_s *priv,
#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F4XXX) || \
defined(CONFIG_STM32_SPI_DMA)
defined(CONFIG_STM32_STM32G4XXX) || defined(CONFIG_STM32_SPI_DMA)
static void spi_modifycr2(struct stm32_spidev_s *priv, uint16_t setbits,
uint16_t clrbits)
{
@ -1512,7 +1517,8 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
if (nbits != priv->nbits)
{
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
defined(CONFIG_STM32_STM32G4XXX)
/* Yes... Set CR2 appropriately */
/* Set the number of bits (valid range 4-16) */
@ -2057,7 +2063,8 @@ static void spi_bus_initialize(struct stm32_spidev_s *priv)
uint16_t setbits;
uint16_t clrbits;
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
defined(CONFIG_STM32_STM32G4XXX)
/* Configure CR1 and CR2. Default configuration:
* Mode 0: CR1.CPHA=0 and CR1.CPOL=0
* Master: CR1.MSTR=1