Fix all occurrences of "the the" in documentation and comments

This commit is contained in:
Gregory Nutt 2013-08-27 09:40:19 -06:00
parent c5802dd5a0
commit bc46b447dc
148 changed files with 322 additions and 320 deletions

View file

@ -2576,7 +2576,7 @@
* arch/arm/src/stm32/stm32f*0xx_rcc.c: In order to use CAN2, both CAN1 and
CAN2 clocking must be enabled.
* arch/mips/src/pic32mx/picm32mx-usbdev.c: Several stall-related fixes so that
the USB device driver can used the the mass storage class (which does a LOT
the USB device driver can used the mass storage class (which does a LOT
of stalling as part of its normal protocol). The PIC32 USB Mass Storage
device is, however, still non-functional when debug is OFF.
* include/nuttx/fs: Move all file-system related files from include/nuttx to
@ -3288,7 +3288,7 @@
* arch/*/src/Makefile: Remove some old logic that was kicked off
when CONFIG_BOOT_RUNFROMFLASH=y. The old logic used to use
objcopy to move sections. Newer logic changes the load position
of sections in the the linker script. As far as I can tell, there
of sections in the linker script. As far as I can tell, there
is nothing in the source tree now that depends on the old way of
doing things (if I am wrong, they will need a change to the linker
script).
@ -3406,7 +3406,7 @@
touchscreen driver).
* configs/shenzhou/src/up_touchscreen.c: Add ADS7843E touchscreen
support for the Shenzhou board. The initial check-in is untested
and basically a clone of the the touchscreen support for the SAM-3U.
and basically a clone of the touchscreen support for the SAM-3U.
* tools/cfgparser.c: There are some NxWidget configuration
settings that must be de-quoted.
* arch/arm/src/stm32/Kconfig: There is no SPI4. Some platforms
@ -3567,7 +3567,7 @@
* net/netdev_ioctl.c: Add interface state flags and ioctl calls
to bring network interfaces up and down (from Darcy Gong).
* config/stm32f4discovery: Enable C++ exceptions. Now the entire
apps/examples/cxxtest works -- meaning the the uClibc++ is
apps/examples/cxxtest works -- meaning that the uClibc++ is
complete and verified for the STM32 platform.
6.24 2012-12-20 Gregory Nutt <gnutt@nuttx.org>
@ -3636,7 +3636,7 @@
CONFIG_WINDOWS_NATIVE. This will allow me to eliminate a lot of
conditional logic elsewhere.
* nuttx/graphics: One a mouse button is pressed, continue to report all
mouse button events to the first window that received the the initial
mouse button events to the first window that received the initial
button down event, even if the mouse attempts to drag outside the
window. From Petteri Aimonen.
* nuttx/graphics/nxmu/nx_block.c: One more fix to the NX block message
@ -3753,7 +3753,7 @@
Also from Petteri Aimonen.
* include/stdbool.h: Can now be disabled for C++ files if CONFIG_C99_BOOL8 is
defined. CONFIG_C99_BOOL8 indicates (1) that the sizeof(_Bool) is one in both
C and C++, and (2) the the C compiler is C99 and supports the _Bool intrinsic
C and C++, and (2) the C compiler is C99 and supports the _Bool intrinsic
type. Requested by Freddie Chopin.
* include/stdlib/lib_rand.c: Various additional changes so that the integer
value zero can be returned. Requested by Freddie Chopin.
@ -4435,7 +4435,7 @@
and simpler. However, the C code intermixed with SVC calls was
not properly preserving registers. The more complex, assembly
language version does not suffer from these issues. I believe
the the kernel build can now be called "feature complete"
the kernel build can now be called "feature complete"
(2013-03-23).
* binfmt/binfmt_execmodule.c: Here is a place where I forget
to update the call to sched_releasetcb() to pass the thread
@ -4509,7 +4509,7 @@
support for the touschscreen on the WaveShare LCD (2013-4-01).
* configs/several: There were already some functions called
lpc17_sspinitialize(). So they had to be renamed (2013-4-01).
* arch/arm/src/lpc17xx/lpc17_ssp.c: Adapted to work the the LPC178x
* arch/arm/src/lpc17xx/lpc17_ssp.c: Adapted to work with the LPC178x
family (2013-4-01).
* arch/arm/src/lpc17xx/lpc17_gpio.c/.h: Separate LPC176x and LPC178x
logic into separate files. The logic is diverging to much to
@ -4725,7 +4725,7 @@
* nuttx/syscall/syscall.csv: Type of first parameter of on_exit() is
wrong. Reported by Ken Pettit (2013-5-17).
* configs/mikroe-stm32f4/kernel/, kostest/ and scripts/: Add kernel build
support and kernel mode OS test example for the the MikroElektronkia
support and kernel mode OS test example for the MikroElektronkia
MultiMedia STM32 M4 board. From Ken Pettit (2013-5-17).
* arch/arm/include/stm32/chip.h and arch/arm/src/stme32/chip/stm32l15xxx_pinmap.h:
Beginning of support for the STM32L15X family (2013-5-18).
@ -4982,7 +4982,7 @@
so that is it compatible with the SPI drivers of other MCUs
(2013-6-16).
* configs/sam3u-ek/src/up_touchscreen.c and configs/sam4l-xplained/src/sam_mmcsd.c:
Changed needed because of the above change the the SAM3/4 SPI
Changed needed because of the above change to the SAM3/4 SPI
interface (2013-6-16).
* drivers/input/ads7843e.c: Remove the wait for the touchscreen busy
bit. I don't see the busy bit changing on the SAM3U-EK board. But
@ -5211,7 +5211,7 @@
* The sama5d3x-ek/hello now runs correctly (2013-7-28).
* configs/sama5d3x-ek/ostest/: This configuration has been modified
to run out NOR flash. More work is still needed to reconfigure the
SMC so the the NOR flash can work with the high clock (2013-7-28).
SMC so that the NOR flash can work with the high clock (2013-7-28).
* arch/arm/src/sama5/sam_clockconfig.c/h and
configs/sama5d3x-ek/src/sam_norflash.c: Add a file structure that
will (eventually) support reconfiguration of NOR flash when NuttX
@ -5467,4 +5467,6 @@
max packetsize. High speed needs 64 bytes, low speed needs 8 bytes,
and full speed can handle almost any size (2013-8-26).
* arch/arm: Add hooks for Cortex-A8. Not much more yet (2013-8-27).
* Lots of files: Fix all occurrents of "the the" in documentation and
comments (2013-8-27).

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@ -1709,7 +1709,7 @@ void nx_getrectangle(NXWINDOW hwnd, FAR const struct nxgl_rect_s *rect,
<dt><code>dest</code>
<dd>The location to copy the memory region
<dt><code>deststride</code>
<dd>The width, in bytes, the the dest memory
<dd>The width, in bytes, of the dest memory
</dl></ul>
</p>
<p>
@ -2335,7 +2335,7 @@ void nxtk_getwindow(NXTKWINDOW hfwnd, FAR const struct nxgl_rect_s *rect,
<dt><code>dest</code>
<dd>The location to copy the memory region
<dt><code>deststride</code>
<dd>The width, in bytes, the the dest memory
<dd>The width, in bytes, of the dest memory
</dl>
</p>
<p>
@ -2689,7 +2689,7 @@ int nxtk_gettoolbar(NXTKWINDOW hfwnd, FAR const struct nxgl_rect_s *rect,
<dt><code>dest</code>
<dd>TThe location to copy the memory region.
<dt><code>deststride</code>
<dd>The width, in bytes, the the dest memory.
<dd>The width, in bytes, of the dest memory.
</dl>
</p>
<p>
@ -3522,7 +3522,7 @@ enum nx_fontid_e
<li>
<p>
<b><code>nuttx/graphics/Makefile</code></b>.
This file needs logic to auto-generate a C source file from the header file that you generated with the the <i>bdf-converter</i> program.
This file needs logic to auto-generate a C source file from the header file that you generated with the <i>bdf-converter</i> program.
Notice <code>NXFONTS_FONTID=2</code>; this must be set to the same font ID value that you defined in the <code>include/nuttx/nx/nxfonts.h</code> file.
</p>
<ul><pre>

View file

@ -249,7 +249,7 @@ nfsmount &lt;server-address&gt; &lt;mount-point&gt; &lt;remote-path&gt;
</p>
<p>
<b>Example</b>.
Suppose the the NFS server has been configured to export the directory <code>/export/shared</code>.
Suppose that the NFS server has been configured to export the directory <code>/export/shared</code>.
The the following command would mount that file system (assuming that the target also has privileges to mount the file system).
</p>
<ul><pre>

View file

@ -1043,7 +1043,7 @@ nsh> df
nsh>
</pre></ul>
<p>
If <code>CONFIG_NSH_CMDOPT_DF_H</code> is defined in the NuttX configuration, the the <code>df</code> will also support an option <code>-h</code> which may be used to show the the volume information in <i>human readable</i> format.
If <code>CONFIG_NSH_CMDOPT_DF_H</code> is defined in the NuttX configuration, then the <code>df</code> will also support an option <code>-h</code> which may be used to show the volume information in <i>human readable</i> format.
</p>
<table width ="100%">

View file

@ -2612,7 +2612,7 @@ nsh>
Configurations available include include a verified NuttShell (NSH) configuration
(see the <a href="http://www.nuttx.org/Documentation/NuttShell.html">NSH User Guide</a>).
The NSH configuration supports the Nucleus2G's microSD slot and additional configurations
are available to exercise the the USB serial and USB mass storage devices.
are available to exercise the USB serial and USB mass storage devices.
However, due to some technical reasons, neither the SPI nor the USB device drivers are fully verified.
(Although they have since been verfiied on other platforms; this needs to be revisited on the Nucleus2G).
</p>
@ -2660,7 +2660,7 @@ nsh>
for USB serial deive and USB storage devices examples, and for the USB host HID keyboard driver.
Support for the USB host mass storage device can optionally be configured for the NSH example.
A driver for the <i>Nokia 6100 LCD</i> and an NX graphics configuration for the Olimex LPC1766-STK have been added.
However, neither the LCD driver nor the NX configuration have been verified as of the the NuttX-5.17 release.
However, neither the LCD driver nor the NX configuration have been verified as of the NuttX-5.17 release.
</p>
</li>
<li>
@ -4219,7 +4219,7 @@ Other memory:
so that is it compatible with the SPI drivers of other MCUs
(2013-6-16).
* configs/sam3u-ek/src/up_touchscreen.c and configs/sam4l-xplained/src/sam_mmcsd.c:
Changed needed because of the above change the the SAM3/4 SPI
Changed needed because of the above change to the SAM3/4 SPI
interface (2013-6-16).
* drivers/input/ads7843e.c: Remove the wait for the touchscreen busy
bit. I don't see the busy bit changing on the SAM3U-EK board. But
@ -4448,7 +4448,7 @@ Other memory:
* The sama5d3x-ek/hello now runs correctly (2013-7-28).
* configs/sama5d3x-ek/ostest/: This configuration has been modified
to run out NOR flash. More work is still needed to reconfigure the
SMC so the the NOR flash can work with the high clock (2013-7-28).
SMC so that the NOR flash can work with the high clock (2013-7-28).
* arch/arm/src/sama5/sam_clockconfig.c/h and
configs/sama5d3x-ek/src/sam_norflash.c: Add a file structure that
will (eventually) support reconfiguration of NOR flash when NuttX

View file

@ -232,7 +232,7 @@
<li>
<b>Sanity checking</b>.
This function will ASSERT if the currently executing task is the page fill worker thread.
The page fill worker thread is how the the page fault is resolved and all logic associated with the page fill worker
The page fill worker thread is how the page fault is resolved and all logic associated with the page fill worker
must be &quot;<a href="#MemoryOrg">locked</a>&quot; and always present in memory.
</li>
<li>

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@ -3513,7 +3513,7 @@ extern void up_ledoff(int led);
<p>
Each USB host class driver includes an intialization entry point that is called from the
application at initialization time.
This driver calls <code>usbhost_registerclass()</code> during this initialization in order to makes itself available in the event the the device that it supports is connected.
This driver calls <code>usbhost_registerclass()</code> during this initialization in order to makes itself available in the event the device that it supports is connected.
</p>
<p>
<b>Examples</b>:
@ -3559,7 +3559,7 @@ extern void up_ledoff(int led);
<li>
<p>
<b><code>include/nuttx/usb/usbdev_trace.h</code></b>.
Declarations needed to work the the NuttX USB device driver trace capability.
Declarations needed to work with the NuttX USB device driver trace capability.
That USB trace capability is detailed in <a href="UsbTrace.html">separate document</a>.
</p>
</li>
@ -4197,13 +4197,13 @@ void pm_activity(int priority);
enum pm_state_e pm_checkstate(void);
</pre></ul>
<p><b>Description:</b>
This function is called from the MCU-specific IDLE loop to monitor the the power management conditions.
This function is called from the MCU-specific IDLE loop to monitor the power management conditions.
This function returns the &quot;recommended&quot; power management state based on the PM configuration and activity reported in the last sampling periods.
The power management state is not automatically changed, however.
The IDLE loop must call <code>pm_changestate()</code> in order to make the state change.
</p>
<p>
These two steps are separated because the plaform-specific IDLE loop may have additional situational information that is not available to the the PM sub-system.
These two steps are separated because the platform-specific IDLE loop may have additional situational information that is not available to the PM sub-system.
For example, the IDLE loop may know that the battery charge level is very low and may force lower power states even if there is activity.
</p>
<p>

View file

@ -8462,7 +8462,7 @@ struct fat_format_s
<li>
<p>
The entire mapped portion of the file must be present in memory.
Since it is assumed the the MCU does not have an MMU, on-demanding
Since it is assumed that the MCU does not have an MMU, on-demanding
paging in of file blocks cannot be supported. Since the while mapped
portion of the file must be present in memory, there are limitations
in the size of files that may be memory mapped (especially on MCUs

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@ -477,7 +477,7 @@ NuttX Configuration Tool under DOS
And of course, after you use the configuration tool you need to
restore CONFIG_WINDOWS_NATIVE=y and the correct CONFIG_APPS_DIR.
2) You can, with some effort, run the the Cygwin kconfig-mconf tool
2) You can, with some effort, run the Cygwin kconfig-mconf tool
directly in the Windows console window. In this case, you do not
have to modify the .config file, but there are other complexities:
@ -791,7 +791,7 @@ Installing GNUWin32
5. After running GetGNUWin32-0.x.x.exe, you will have a new directory
<this-directory>/GetGNUWin32
Note the the GNUWin32 installer didn't install GNUWin32. Instead, it
Note that the GNUWin32 installer didn't install GNUWin32. Instead, it
installed another, smarter downloader. That downloader is the GNUWin32
package management tool developed by the Open SSL project.

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@ -1769,7 +1769,7 @@ from the NuttX Porting Guide:
point that is called from the application at initialization
time. This driver calls usbhost_registerclass() during this
initialization in order to makes itself available in the
event the the device that it supports is connected. Examples:
event that the device that it supports is connected. Examples:
The function usbhost_storageinit() in the file
drivers/usbhost/usbhost_storage.c
2. Each application must include a waiter thread thread that

4
TODO
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@ -117,7 +117,7 @@ o Task/Scheduler (sched/)
Title: GET_ENVIRON_PTR()
Description: get_environ_ptr() (sched/sched_getenvironptr.c) is not implemented.
The representation of the the environment strings selected for
The representation of the environment strings selected for
NutX is not compatible with the operation. Some significant
re-design would be required to implement this funcion and that
effort is thought to be not worth the result.
@ -422,7 +422,7 @@ o Kernel Build
Linux, for example, has functions call up() and down(). up()
increments the semaphore count but does not call into the kernel
unless incrementing the count unblocks a task; similarly, down
decrements the count and does not call into the the kernel unless
decrements the count and does not call into the kernel unless
the count becomes negative the caller must be blocked.
Update:

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@ -275,7 +275,7 @@ __start:
* effect. First populate the L1 table for the locked and paged
* text regions.
*
* We could probably make the the pg_l1span and pg_l2map macros into
* We could probably make the pg_l1span and pg_l2map macros into
* call-able subroutines, but we would have to be carefully during
* this phase while we are operating in a physical address space.
*

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@ -265,7 +265,7 @@ __start:
* effect. First populate the L1 table for the locked and paged
* text regions.
*
* We could probably make the the pg_l1span and pg_l2map macros into
* We could probably make the pg_l1span and pg_l2map macros into
* call-able subroutines, but we would have to be carefully during
* this phase while we are operating in a physical address space.
*

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@ -75,7 +75,7 @@
* Description:
* Shouldn't happen. This exception handler is in a separate file from
* other vector handlers because some processors (e.g., Cortex-A5) do not
* support the the Address Exception vector.
* support the Address Exception vector.
*
****************************************************************************/

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@ -968,7 +968,7 @@ void cp15_clean_dcache(uintptr_t start, uintptr_t end);
*
* Description:
* Flush the data cache within the specified region by cleaning and
* invalidating the the D cache.
* invalidating the D cache.
*
* Input Parameters:
* start - virtual start address of region

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@ -76,7 +76,7 @@
*
* Description:
* Flush the data cache within the specified region by cleaning and
* invalidating the the D cache.
* invalidating the D cache.
*
* Input Parameters:
* start - virtual start address of region

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@ -77,7 +77,7 @@
/* If CONFIG_ARCH_RAMVECTORS is defined, then the ARM logic must provide
* ARM-specific implementations of irq_initialize(), irq_attach(), and
* irq_dispatch. In this case, it is also assumed that the ARM vector
* table resides in RAM, has the the name up_ram_vectors, and has been
* table resides in RAM, has the name up_ram_vectors, and has been
* properly positioned and aligned in memory by the linker script.
*/

View file

@ -65,7 +65,7 @@
/* If CONFIG_ARCH_RAMVECTORS is defined, then the ARM logic must provide
* ARM-specific implementations of up_ramvec_initialize(), irq_attach(), and
* irq_dispatch. In this case, it is also assumed that the ARM vector
* table resides in RAM, has the the name up_ram_vectors, and has been
* table resides in RAM, has the name up_ram_vectors, and has been
* properly positioned and aligned in memory by the linker script.
*/

View file

@ -742,7 +742,7 @@ static void kinetis_dataconfig(struct kinetis_dev_s *priv, bool bwrite,
* Name: kinetis_datadisable
*
* Description:
* Disable the the SDIO data path setup by kinetis_dataconfig() and
* Disable the SDIO data path setup by kinetis_dataconfig() and
* disable DMA.
*
****************************************************************************/

View file

@ -900,8 +900,8 @@ static int up_interrupts(int irq, void *context)
if (count > 0)
#else
/* Check if the receive data register is full (RDRF). NOTE: If
* FIFOS are enabled, this does not mean that the the FIFO is full,
* rather, it means that the the number of bytes in the RX FIFO has
* FIFOS are enabled, this does not mean that the FIFO is full,
* rather, it means that the number of bytes in the RX FIFO has
* exceeded the watermark setting. There may actually be RX data
* available!
*
@ -929,8 +929,8 @@ static int up_interrupts(int irq, void *context)
# error "Missing logic"
#else
/* Check if the transmit data register is "empty." NOTE: If FIFOS
* are enabled, this does not mean that the the FIFO is empty, rather,
* it means that the the number of bytes in the TX FIFO is below the
* are enabled, this does not mean that the FIFO is empty, rather,
* it means that the number of bytes in the TX FIFO is below the
* watermark setting. There could actually be space for additional TX
* data.
*
@ -1090,8 +1090,8 @@ static bool up_rxavailable(struct uart_dev_s *dev)
return count > 0;
#else
/* Return true if the receive data register is full (RDRF). NOTE: If
* FIFOS are enabled, this does not mean that the the FIFO is full,
* rather, it means that the the number of bytes in the RX FIFO has
* FIFOS are enabled, this does not mean that the FIFO is full,
* rather, it means that the number of bytes in the RX FIFO has
* exceeded the watermark setting. There may actually be RX data
* available!
*/
@ -1175,8 +1175,8 @@ static bool up_txready(struct uart_dev_s *dev)
# error "Missing logic"
#else
/* Return true if the transmit data register is "empty." NOTE: If
* FIFOS are enabled, this does not mean that the the FIFO is empty,
* rather, it means that the the number of bytes in the TX FIFO is
* FIFOS are enabled, this does not mean that the FIFO is empty,
* rather, it means that the number of bytes in the TX FIFO is
* below the watermark setting. There may actually be space for
* additional TX data.
*/

View file

@ -626,7 +626,7 @@ kinetis_common:
sub r1, #(4*SW_FPU_REGS)
#endif
/* Save the the remaining registers on the stack after the registers pushed
/* Save the remaining registers on the stack after the registers pushed
* by the exception handling logic. r2=SP and r3=primask or basepri, r4-r11,
* r14=register values.
*/

View file

@ -547,8 +547,8 @@ static int up_interrupts(int irq, void *context)
s1 = up_serialin(priv, KL_UART_S1_OFFSET);
/* Check if the receive data register is full (RDRF). NOTE: If
* FIFOS are enabled, this does not mean that the the FIFO is full,
* rather, it means that the the number of bytes in the RX FIFO has
* FIFOS are enabled, this does not mean that the FIFO is full,
* rather, it means that the number of bytes in the RX FIFO has
* exceeded the watermark setting. There may actually be RX data
* available!
*
@ -567,8 +567,8 @@ static int up_interrupts(int irq, void *context)
/* Handle outgoing, transmit bytes */
/* Check if the transmit data register is "empty." NOTE: If FIFOS
* are enabled, this does not mean that the the FIFO is empty, rather,
* it means that the the number of bytes in the TX FIFO is below the
* are enabled, this does not mean that the FIFO is empty, rather,
* it means that the number of bytes in the TX FIFO is below the
* watermark setting. There could actually be space for additional TX
* data.
*
@ -728,8 +728,8 @@ static bool up_rxavailable(struct uart_dev_s *dev)
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
/* Return true if the receive data register is full (RDRF). NOTE: If
* FIFOS are enabled, this does not mean that the the FIFO is full,
* rather, it means that the the number of bytes in the RX FIFO has
* FIFOS are enabled, this does not mean that the FIFO is full,
* rather, it means that the number of bytes in the RX FIFO has
* exceeded the watermark setting. There may actually be RX data
* available!
*/
@ -804,8 +804,8 @@ static bool up_txready(struct uart_dev_s *dev)
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
/* Return true if the transmit data register is "empty." NOTE: If
* FIFOS are enabled, this does not mean that the the FIFO is empty,
* rather, it means that the the number of bytes in the TX FIFO is
* FIFOS are enabled, this does not mean that the FIFO is empty,
* rather, it means that the number of bytes in the TX FIFO is
* below the watermark setting. There may actually be space for
* additional TX data.
*/

View file

@ -229,7 +229,7 @@ lm_irqcommon:
sub r1, #(4*SW_FPU_REGS)
#endif
/* Save the the remaining registers on the stack after the registers pushed
/* Save the remaining registers on the stack after the registers pushed
* by the exception handling logic. r2=SP and r3=primask or basepri, r4-r11,
* r14=register values.
*/

View file

@ -2495,7 +2495,7 @@ static inline int lpc17_ethinitialize(int intf)
#endif
if (ret != 0)
{
/* We could not attach the ISR to the the interrupt */
/* We could not attach the ISR to the interrupt */
return -EAGAIN;
}

View file

@ -636,7 +636,7 @@ static void lpc17_setpwrctrl(uint32_t pwrctrl)
*
* Description:
* Return the current value of the the PWRCTRL field of the SD card P
* register. This function can be used to see the the SD card is power ON
* register. This function can be used to see if the SD card is powered ON
* or OFF
*
* Input Parameters:
@ -908,7 +908,7 @@ static void lpc17_dataconfig(uint32_t timeout, uint32_t dlen, uint32_t dctrl)
* Name: lpc17_datadisable
*
* Description:
* Disable the the SD card data path setup by lpc17_dataconfig() and
* Disable the SD card data path setup by lpc17_dataconfig() and
* disable DMA.
*
****************************************************************************/

View file

@ -238,7 +238,7 @@ lpc17_common:
sub r1, #(4*SW_FPU_REGS)
#endif
/* Save the the remaining registers on the stack after the registers pushed
/* Save the remaining registers on the stack after the registers pushed
* by the exception handling logic. r2=SP and r3=primask or basepri, r4-r11,
* r14=register values.
*/

View file

@ -794,7 +794,7 @@ EXTERN uint32_t lpc31_clkfreq(enum lpc31_clockid_e clkid,
* Name: lpc31_enableexten
*
* Description:
* Enable external enabling for the the specified possible clocks.
* Enable external enabling for the specified possible clocks.
*
************************************************************************/
@ -804,7 +804,7 @@ EXTERN void lpc31_enableexten(enum lpc31_clockid_e clkid);
* Name: lpc31_disableexten
*
* Description:
* Disable external enabling for the the specified possible clocks.
* Disable external enabling for the specified possible clocks.
*
************************************************************************/

View file

@ -69,7 +69,7 @@
* Name: lpc31_enableexten
*
* Description:
* Enable external enabling for the the specified possible clocks.
* Enable external enabling for the specified possible clocks.
*
****************************************************************************/
@ -112,7 +112,7 @@ void lpc31_enableexten(enum lpc31_clockid_e clkid)
* Name: lpc31_disableexten
*
* Description:
* Disable external enabling for the the specified possible clocks.
* Disable external enabling for the specified possible clocks.
*
****************************************************************************/

View file

@ -84,7 +84,7 @@ void lpc31_softreset(enum lpc31_resetid_e resetid)
for (i = 0;i < 1000; i++);
/* Then set the the soft reset bit */
/* Then set the soft reset bit */
putreg32(CGU_SOFTRESET, address);
}

View file

@ -76,7 +76,7 @@
* Reset as many of the LPC43 peripherals as possible. This is necessary
* because the LPC43 does not provide any way of performing a full system
* reset under debugger control. So, if CONFIG_DEBUG is set (indicating
* that a debugger is being used?), the the boot logic will call this
* that a debugger is being used?), the boot logic will call this
* function on all restarts.
*
* Assumptions:
@ -93,7 +93,7 @@ void lpc43_softreset(void)
/* Disable interrupts */
flags = irqsave();
/* Reset all of the peripherals that we can (safely) */
putreg32((RGU_CTRL0_LCD_RST | RGU_CTRL0_USB0_RST |

View file

@ -76,7 +76,7 @@ extern "C" {
* Reset as many of the LPC43 peripherals as possible. This is necessary
* because the LPC43 does not provide any way of performing a full system
* reset under debugger control. So, if CONFIG_DEBUG is set (indicating
* that a debugger is being used?), the the boot logic will call this
* that a debugger is being used?), the boot logic will call this
* function on all restarts.
*
****************************************************************************/

View file

@ -114,7 +114,7 @@ static inline void lpc43_setbootrom(void)
putreg32(LPC43_ROM_BASE, LPC43_CREG_M4MEMMAP);
/* Address zero now maps to the Boot ROM. Make sure the the VTOR will
/* Address zero now maps to the Boot ROM. Make sure that the VTOR will
* use the ROM vector table at that address.
*/
@ -197,7 +197,7 @@ static inline void lpc43_fpuconfig(void)
* with the volatile FP registers stacked above the basic context.
*/
regval = getcontrol();
regval = getcontrol();
regval |= (1 << 2);
setcontrol(regval);
@ -227,7 +227,7 @@ static inline void lpc43_fpuconfig(void)
* with the volatile FP registers stacked in the saved context.
*/
regval = getcontrol();
regval = getcontrol();
regval &= ~(1 << 2);
setcontrol(regval);
@ -273,7 +273,7 @@ void __start(void)
/* Reset as many of the LPC43 peripherals as possible. This is necessary
* because the LPC43 does not provide any way of performing a full system
* reset under debugger control. So, if CONFIG_DEBUG is set (indicating
* that a debugger is being used?), the the boot logic will call this
* that a debugger is being used?), the boot logic will call this
* function on all restarts.
*/

View file

@ -101,7 +101,7 @@ int nuc_configgpio(gpio_cfgset_t cfgset)
DEBUGASSERT((unsigned)port <= NUC_GPIO_PORTE);
base = NUC_GPIO_CTRL_BASE(port);
/* Set the the GPIO PMD register */
/* Set the GPIO PMD register */
regaddr = base + NUC_GPIO_PMD_OFFSET;
regval = getreg32(regaddr);

View file

@ -86,7 +86,7 @@
#endif
/* Select either the external high speed crystal, the PLL output, or
* the internal high speed clock as the the UART clock source.
* the internal high speed clock as the UART clock source.
*/
#if defined(CONFIG_NUC_UARTCLK_XTALHI)

View file

@ -298,7 +298,7 @@ static inline uint32_t sam_fifocfg(struct sam_dma_s *dmach)
* Name: sam_txcfg
*
* Description:
* Decode the the flags to get the correct CFG register bit settings for
* Decode the flags to get the correct CFG register bit settings for
* a transmit (memory to peripheral) transfer.
*
****************************************************************************/
@ -322,7 +322,7 @@ static inline uint32_t sam_txcfg(struct sam_dma_s *dmach)
* Name: sam_rxcfg
*
* Description:
* Decode the the flags to get the correct CFG register bit settings for
* Decode the flags to get the correct CFG register bit settings for
* a receive (peripheral to memory) transfer.
*
****************************************************************************/
@ -346,7 +346,7 @@ static inline uint32_t sam_rxcfg(struct sam_dma_s *dmach)
* Name: sam_txctrlabits
*
* Description:
* Decode the the flags to get the correct CTRLA register bit settings for
* Decode the flags to get the correct CTRLA register bit settings for
* a transmit (memory to peripheral) transfer. These are only the "fixed"
* CTRLA values and need to be updated with the actual transfer size before
* being written to CTRLA sam_txctrla).
@ -492,7 +492,7 @@ static inline uint32_t sam_txctrla(struct sam_dma_s *dmach,
* Name: sam_rxctrlabits
*
* Description:
* Decode the the flags to get the correct CTRLA register bit settings for
* Decode the flags to get the correct CTRLA register bit settings for
* a read (peripheral to memory) transfer. These are only the "fixed" CTRLA
* values and need to be updated with the actual transfer size before being
* written to CTRLA sam_rxctrla).
@ -637,7 +637,7 @@ static inline uint32_t sam_rxctrla(struct sam_dma_s *dmach,
* Name: sam_txctrlb
*
* Description:
* Decode the the flags to get the correct CTRLB register bit settings for
* Decode the flags to get the correct CTRLB register bit settings for
* a transmit (memory to peripheral) transfer.
*
****************************************************************************/
@ -716,7 +716,7 @@ static inline uint32_t sam_txctrlb(struct sam_dma_s *dmach)
* Name: sam_rxctrlb
*
* Description:
* Decode the the flags to get the correct CTRLB register bit settings for
* Decode the flags to get the correct CTRLB register bit settings for
* a receive (peripheral to memory) transfer.
*
****************************************************************************/

View file

@ -244,7 +244,7 @@ sam_common:
sub r1, #(4*SW_FPU_REGS)
#endif
/* Save the the remaining registers on the stack after the registers pushed
/* Save the remaining registers on the stack after the registers pushed
* by the exception handling logic. r2=SP and r3=primask or basepri, r4-r11,
* r14=register values.
*/

View file

@ -527,7 +527,7 @@
* in the file mmu.h
*
* We must declare the page table at the bottom or at the top of internal
* SRAM. We pick the the bottom of internal SRAM *unless* there are vectors
* SRAM. We pick the bottom of internal SRAM *unless* there are vectors
* in the way at that position.
*/

View file

@ -172,7 +172,7 @@ static const struct section_mapping_s section_mapping[] =
/* SAMA5 External SDRAM Memory. The SDRAM is not usable until it has been
* initialized. If we are running out of SDRAM now, we can assume that some
* second level boot loader has properly configured SRAM for us. In that
* case, we set the the MMU flags for the final, fully cache-able state.
* case, we set the MMU flags for the final, fully cache-able state.
*
* If we are running from ISRAM or NOR flash, then we will need to configure
* the SDRAM ourselves. In this case, we set the MMU flags to the strongly

View file

@ -748,7 +748,7 @@ static uint32_t sam_sink_channel(struct sam_dmach_s *dmach, uint8_t pid,
* Name: sam_txcfg
*
* Description:
* Decode the the flags to get the correct CFG register bit settings for
* Decode the flags to get the correct CFG register bit settings for
* a transmit (memory to peripheral) transfer.
*
****************************************************************************/
@ -788,7 +788,7 @@ static inline uint32_t sam_txcfg(struct sam_dmach_s *dmach)
* Name: sam_rxcfg
*
* Description:
* Decode the the flags to get the correct CFG register bit settings for
* Decode the flags to get the correct CFG register bit settings for
* a receive (peripheral to memory) transfer.
*
****************************************************************************/
@ -828,7 +828,7 @@ static inline uint32_t sam_rxcfg(struct sam_dmach_s *dmach)
* Name: sam_txctrlabits
*
* Description:
* Decode the the flags to get the correct CTRLA register bit settings for
* Decode the flags to get the correct CTRLA register bit settings for
* a transmit (memory to peripheral) transfer. These are only the "fixed"
* CTRLA values and need to be updated with the actual transfer size before
* being written to CTRLA sam_txctrla).
@ -932,7 +932,7 @@ static uint32_t sam_ntxtransfers(struct sam_dmach_s *dmach, uint32_t dmasize)
{
unsigned int srcwidth;
/* Adjust the the source transfer size for the source chunk size (memory
/* Adjust the source transfer size for the source chunk size (memory
* chunk size). BTSIZE is "the number of transfers to be performed, that
* is, for writes it refers to the number of source width transfers
* to perform when DMAC is flow controller. For Reads, BTSIZE refers to
@ -992,7 +992,7 @@ static inline uint32_t sam_txctrla(struct sam_dmach_s *dmach,
* Name: sam_rxctrlabits
*
* Description:
* Decode the the flags to get the correct CTRLA register bit settings for
* Decode the flags to get the correct CTRLA register bit settings for
* a read (peripheral to memory) transfer. These are only the "fixed" CTRLA
* values and need to be updated with the actual transfer size before being
* written to CTRLA sam_rxctrla).
@ -1100,7 +1100,7 @@ static uint32_t sam_nrxtransfers(struct sam_dmach_s *dmach, uint32_t dmasize)
{
unsigned int srcwidth;
/* Adjust the the source transfer size for the source chunk size (peripheral
/* Adjust the source transfer size for the source chunk size (peripheral
* chunk size). BTSIZE is "the number of transfers to be performed, that
* is, for writes it refers to the number of source width transfers
* to perform when DMAC is flow controller. For Reads, BTSIZE refers to
@ -1160,7 +1160,7 @@ static inline uint32_t sam_rxctrla(struct sam_dmach_s *dmach,
* Name: sam_txctrlb
*
* Description:
* Decode the the flags to get the correct CTRLB register bit settings for
* Decode the flags to get the correct CTRLB register bit settings for
* a transmit (memory to peripheral) transfer.
*
****************************************************************************/
@ -1251,7 +1251,7 @@ static inline uint32_t sam_txctrlb(struct sam_dmach_s *dmach)
* Name: sam_rxctrlb
*
* Description:
* Decode the the flags to get the correct CTRLB register bit settings for
* Decode the flags to get the correct CTRLB register bit settings for
* a receive (peripheral to memory) transfer.
*
****************************************************************************/

View file

@ -1389,7 +1389,7 @@ static void sam_qh_enqueue(struct sam_qh_s *qh)
{
uintptr_t physaddr;
/* Set the internal fqp field. When we transverse the the QH list later,
/* Set the internal fqp field. When we transverse the QH list later,
* we need to know the correct place to start because the overlay may no
* longer point to the first qTD entry.
*/
@ -1554,7 +1554,7 @@ static int sam_qtd_addbpl(struct sam_qtd_s *qtd, const void *buffer, size_t bufl
next = (physaddr + 4096) & ~4095;
/* How many bytes were included in the last buffer? Was the the whole
/* How many bytes were included in the last buffer? Was it the whole
* thing?
*/
@ -2059,7 +2059,7 @@ static int sam_qtd_ioccheck(struct sam_qtd_s *qtd, uint32_t **bp, void *arg)
**bp = qtd->hw.nqp;
/* Subtract the number of bytes left untransferred. The epinfo->xfrd
* field is initialized to the the total number of bytes to be transferred
* field is initialized to the total number of bytes to be transferred
* (all qTDs in the list). We subtract out the number of untransferred
* bytes on each transfer and the final result will be the number of bytes
* actually transferred.
@ -3825,7 +3825,7 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller)
regval16 = sam_swap16(HCCR->hciversion);
uvdbg("HCIVERSION %x.%02x\n", regval16 >> 8, regval16 & 0xff);
/* Verify the the correct number of ports is reported */
/* Verify that the correct number of ports is reported */
regval = sam_getreg(&HCCR->hcsparams);
nports = (regval & EHCI_HCSPARAMS_NPORTS_MASK) >> EHCI_HCSPARAMS_NPORTS_SHIFT;

View file

@ -1332,7 +1332,7 @@ static int can_bittiming(struct stm32_can_s *priv)
canllvdbg("TS1: %d TS2: %d BRP: %d\n", ts1, ts2, brp);
/* Configure bit timing. This also does the the following, less obvious
/* Configure bit timing. This also does the following, less obvious
* things. Unless loopback mode is enabled, it:
*
* - Disables silent mode.

View file

@ -1219,7 +1219,7 @@ static int stm32_uiptxpoll(struct uip_driver_s *dev)
*
* Description:
* The function is called when a frame is received using the DMA receive
* interrupt. It scans the RX descriptors to the the received frame.
* interrupt. It scans the RX descriptors to the received frame.
*
* Parameters:
* priv - Reference to the driver state structure
@ -1347,7 +1347,7 @@ static void stm32_disableint(FAR struct stm32_ethmac_s *priv, uint32_t ierbit)
*
* Description:
* The function is called when a frame is received using the DMA receive
* interrupt. It scans the RX descriptors to the the received frame.
* interrupt. It scans the RX descriptors to the received frame.
*
* Parameters:
* priv - Reference to the driver state structure
@ -1506,7 +1506,7 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
dev->d_len = ((rxdesc->rdes0 & ETH_RDES0_FL_MASK) >> ETH_RDES0_FL_SHIFT) - 4;
/* Get a buffer from the free list. We don't even check if
* this is successful because we already assure the the free
* this is successful because we already assure the free
* list is not empty above.
*/
@ -2536,7 +2536,7 @@ static inline int stm32_dm9161(FAR struct stm32_ethmac_s *priv)
return ret;
}
/* Bit 8 of the DSCR register is zero, the the DM9161 has not selected RMII.
/* Bit 8 of the DSCR register is zero, then the DM9161 has not selected RMII.
* If RMII is not selected, then reset the MCU to recover.
*/

View file

@ -673,7 +673,7 @@ void stm32_iwdginitialize(FAR const char *devpath, uint32_t lsifreq)
/* Make sure that the LSI ocsillator is enabled. NOTE: The LSI oscillator
* is enabled here but is not disabled by this file (because this file does
* not know the the global usage of the oscillator. Any clock management
* not know the global usage of the oscillator. Any clock management
* logic (say, as part of a power management scheme) needs handle other
* LSI controls outside of this file.
*/

View file

@ -996,7 +996,7 @@ static int stm32_chan_wait(FAR struct stm32_usbhost_s *priv,
static void stm32_chan_wakeup(FAR struct stm32_usbhost_s *priv,
FAR struct stm32_chan_s *chan)
{
/* Is the the transfer complete? Is there a thread waiting for this transfer
/* Is the transfer complete? Is there a thread waiting for this transfer
* to complete?
*/
@ -1774,7 +1774,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv,
stm32_chan_halt(priv, chidx, CHREASON_XFRC);
/* Clear any pending NAK condition. The 'indata1' data toggle
* should have been appropriately updated by the the RxFIFO
* should have been appropriately updated by the RxFIFO
* logic as each packet was received.
*/
@ -2961,7 +2961,7 @@ static inline void stm32_hostinit_enable(void)
* Enable Tx FIFO empty interrupts. This is necessary when the entire
* transfer will not fit into Tx FIFO. The transfer will then be completed
* when the Tx FIFO is empty. NOTE: The Tx FIFO interrupt is disabled
* the the fifo empty interrupt handler when the transfer is complete.
* the fifo empty interrupt handler when the transfer is complete.
*
* Input Parameters:
* priv - Driver state structure reference

View file

@ -76,7 +76,7 @@ extern "C"
* Public Data
************************************************************************************/
/* This symbol references the Cortex-M3 vector table (as positioned by the the linker
/* This symbol references the Cortex-M3 vector table (as positioned by the linker
* script, ld.script or ld.script.dfu. The standard location for the vector table is
* at the beginning of FLASH at address 0x0800:0000. If we are using the STMicro DFU
* bootloader, then the vector table will be offset to a different location in FLASH

View file

@ -203,7 +203,7 @@
# error "Unknown STM32 DMA"
#endif
/* SDIO DMA Channel/Stream selection. For the the case of the STM32 F4, there
/* SDIO DMA Channel/Stream selection. For the case of the STM32 F4, there
* are multiple DMA stream options that must be dis-ambiguated in the board.h
* file.
*/
@ -682,7 +682,7 @@ static void stm32_setpwrctrl(uint32_t pwrctrl)
*
* Description:
* Return the current value of the the PWRCTRL field of the SDIO POWER
* register. This function can be used to see the the SDIO is power ON
* register. This function can be used to see if the SDIO is powered ON
* or OFF
*
* Input Parameters:
@ -952,7 +952,7 @@ static void stm32_dataconfig(uint32_t timeout, uint32_t dlen, uint32_t dctrl)
* Name: stm32_datadisable
*
* Description:
* Disable the the SDIO data path setup by stm32_dataconfig() and
* Disable the SDIO data path setup by stm32_dataconfig() and
* disable DMA.
*
****************************************************************************/

View file

@ -251,7 +251,7 @@ stm32_common:
sub r1, #(4*SW_FPU_REGS)
#endif
/* Save the the remaining registers on the stack after the registers pushed
/* Save the remaining registers on the stack after the registers pushed
* by the exception handling logic. r2=SP and r3=primask or basepri, r4-r11,
* r14=register values.
*/

View file

@ -623,7 +623,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
* lower - A pointer the publicly visible representation of the "lower-half"
* driver state structure.
* newhandler - The new watchdog expiration function pointer. If this
* function pointer is NULL, then the the reset-on-expiration
* function pointer is NULL, then the reset-on-expiration
* behavior is restored,
*
* Returned Values:

View file

@ -521,7 +521,7 @@ void weak_function up_dmainitialize(void)
*
* Input parameter:
* dmamap - Identifies the stream/channel resource. For the STM32 F2, this
* is a bit-encoded value as provided by the the DMAMAP_* definitions
* is a bit-encoded value as provided by the DMAMAP_* definitions
* in chip/stm32f20xxx_dma.h
*
* Returned Value:

View file

@ -520,7 +520,7 @@ void weak_function up_dmainitialize(void)
*
* Input parameter:
* dmamap - Identifies the stream/channel resource. For the STM32 F4, this
* is a bit-encoded value as provided by the the DMAMAP_* definitions
* is a bit-encoded value as provided by the DMAMAP_* definitions
* in chip/stm32f40xxx_dma.h
*
* Returned Value:

View file

@ -524,7 +524,7 @@
ld r25, x+
ld r24, x+
/* Finally, recover X [r26-r27] from the the new stack. The PC remains on the new
/* Finally, recover X [r26-r27] from the new stack. The PC remains on the new
* stack so that the user of this macro can return with ret (not reti, ret will
* preserve the restored interrupt state).
*/

View file

@ -504,7 +504,7 @@ static int emac_ifdown(struct uip_driver_s *dev)
wd_cancel(priv->d_txpoll);
wd_cancel(priv->d_txtimeout);
/* Put the the EMAC is its reset, non-operational state. This should be
/* Put the EMAC is its reset, non-operational state. This should be
* a known configuration that will guarantee the emac_ifup() always
* successfully brings the interface back up.
*/
@ -655,7 +655,7 @@ int emac_initialize(int intf)
if (irq_attach(CONFIG_HCS12_IRQ, emac_interrupt))
{
/* We could not attach the ISR to the the interrupt */
/* We could not attach the ISR to the interrupt */
return -EAGAIN;
}

View file

@ -3136,7 +3136,7 @@ static inline int pic32mx_ethinitialize(int intf)
#endif
if (ret != 0)
{
/* We could not attach the ISR to the the interrupt */
/* We could not attach the ISR to the interrupt */
return -EAGAIN;
}

View file

@ -153,7 +153,7 @@ static int up_poll(FAR struct file *filep, struct pollfd *fds, bool setup);
* Private Data
****************************************************************************/
/* This the the vtable that supports the character driver interface */
/* This the vtable that supports the character driver interface */
static const struct file_operations up_fops =
{
@ -168,7 +168,7 @@ static const struct file_operations up_fops =
#endif
};
/* Only one simulated touchscreen is supported o the the driver state
/* Only one simulated touchscreen is supported so the driver state
* structure may as well be pre-allocated.
*/
@ -324,7 +324,7 @@ static int up_waitsample(FAR struct up_dev_s *priv,
}
}
/* Re-acquire the the semaphore that manages mutually exclusive access to
/* Re-acquire the semaphore that manages mutually exclusive access to
* the device structure. We may have to wait here. But we have our sample.
* Interrupts and pre-emption will be re-enabled while we wait.
*/

View file

@ -243,7 +243,7 @@ static void unload_callback(int signo, siginfo_t *info, void *ucontext)
*
* Description:
* If CONFIG_SCHED_HAVE_PARENT is defined, this function may be called by
* the parent of the the newly created task to automatically unload the
* the parent of the newly created task to automatically unload the
* module when the task exits. This assumes that (1) the caller is the
* parent of the created task, (2) that bin was allocated with kmalloc()
* or friends. It will also automatically free the structure with kfree()

View file

@ -324,7 +324,7 @@ int elf_addrenv_alloc(FAR struct elf_loadinfo_s *loadinfo, size_t envsize);
* Description:
* Release the address environment previously created by
* elf_addrenv_alloc(). This function is called only under certain error
* conditions after the the module has been loaded but not yet started.
* conditions after the module has been loaded but not yet started.
* After the module has been started, the address environment will
* automatically be freed when the module exits.
*

View file

@ -132,7 +132,7 @@ int elf_addrenv_alloc(FAR struct elf_loadinfo_s *loadinfo, size_t envsize)
* Description:
* Release the address environment previously created by
* elf_addrenv_create(). This function is called only under certain error
* conditions after the the module has been loaded but not yet started.
* conditions after the module has been loaded but not yet started.
* After the module has been started, the address environment will
* automatically be freed when the module exits.
*

View file

@ -69,7 +69,7 @@
* Description:
* This function unloads the object from memory. This essentially undoes
* the actions of elf_load. It is called only under certain error
* conditions after the the module has been loaded but not yet started.
* conditions after the module has been loaded but not yet started.
*
* Returned Value:
* 0 (OK) is returned on success and a negated errno is returned on

View file

@ -119,7 +119,7 @@ int nxflat_addrenv_alloc(FAR struct nxflat_loadinfo_s *loadinfo, size_t envsize)
* Description:
* Release the address environment previously created by
* nxflat_addrenv_create(). This function is called only under certain
* error conditions after the the module has been loaded but not yet
* error conditions after the module has been loaded but not yet
* started. After the module has been started, the address environment
* will automatically be freed when the module exits.
*

View file

@ -183,7 +183,7 @@ errout_with_dspace:
* Description:
* Release the address environment previously created by
* nxflat_addrenv_create(). This function is called only under certain
* error conditions after the the module has been loaded but not yet
* error conditions after the module has been loaded but not yet
* started. After the module has been started, the address environment
* will automatically be freed when the module exits.
*

View file

@ -71,7 +71,7 @@
* Description:
* This function unloads the object from memory. This essentially undoes
* the actions of nxflat_load. It is called only under certain error
* conditions after the the module has been loaded but not yet started.
* conditions after the module has been loaded but not yet started.
*
* Returned Value:
* 0 (OK) is returned on success and a negated errno is returned on

View file

@ -327,7 +327,7 @@ HCS12/DEMO9S12NEC64-specific Configuration Options
CONFIG_HCS12_NONBANKED - Indicates that the target systems does not
support banking. Only short calls are made; one fixed page is
presented the the paging window. Only 48Kb of FLASH is usable
presented in the paging window. Only 48Kb of FLASH is usable
in this configuration: pages 3e, 3d, then 3f will appear as a
contiguous address space in memory.

View file

@ -198,7 +198,7 @@ struct pg_source_s
FAR struct mtd_dev_s *mtd;
/* This the the device geometry */
/* This the device geometry */
#ifdef CONFIG_DEBUG
FAR struct mtd_geometry_s geo;

View file

@ -198,7 +198,7 @@ struct pg_source_s
FAR struct mtd_dev_s *mtd;
/* This the the device geometry */
/* This the device geometry */
#ifdef CONFIG_DEBUG
FAR struct mtd_geometry_s geo;

View file

@ -84,7 +84,7 @@ CodeSourcery on Linux
If you select the CodeSourcery toolchain, the make system will assume that you
are running a Windows version of the toolchain. If you are running under Linux,
the the make will probably fail. The fix is to edit your Make.defs file and
the make will probably fail. The fix is to edit your Make.defs file and
use something like:
CROSSDEV = arm-none-eabi-

View file

@ -139,10 +139,10 @@ mbed
1. Connect the KL25Z to the host PC using the USB connector labeled
SDA.
2. A new file system will appear call MBED; open it with Windows
2. A new file system will appear called MBED; open it with Windows
Explorer (assuming that you are using Windows).
3. Drag and drop nuttx.bin into the MBED window. This will load the
nuttx.bin binary into the the KL25Z. the MBED window will close
nuttx.bin binary into the KL25Z. The MBED window will close
then re-open and the KL25Z will be running the new code.
Using the Freescale SDA debugger is essentially the same. That

View file

@ -211,7 +211,7 @@ xcpt_t up_irqbutton(int id, xcpt_t irqhandler)
}
else
{
/* Disable then then detach the the old interrupt handler */
/* Disable then detach the old interrupt handler */
up_disable_irq(irq);
(void)irq_detach(irq);

View file

@ -210,7 +210,7 @@ xcpt_t up_irqbutton(int id, xcpt_t irqhandler)
}
else
{
/* Disable then then detach the the old interrupt handler */
/* Disable then detach the old interrupt handler */
up_disable_irq(irq);
(void)irq_detach(irq);

View file

@ -772,7 +772,7 @@ Where <subdir> is one of the following:
In the normal case (just 'make'), make will attempt to build both user-
and kernel-mode blobs more or less interleaved. This actual works!
However, for me it is very confusing so I prefer the above make command:
Make the user-space binaries first (pass1), then make the the kernel-space
Make the user-space binaries first (pass1), then make the kernel-space
binaries (pass2)
NOTES:

View file

@ -266,7 +266,7 @@ static int tc_poll(FAR struct file *filep, struct pollfd *fds, bool setup);
* Private Data
****************************************************************************/
/* This the the vtable that supports the character driver interface */
/* This the vtable that supports the character driver interface */
static const struct file_operations tc_fops =
{
@ -723,7 +723,7 @@ static int tc_waitsample(FAR struct tc_dev_s *priv,
}
}
/* Re-acquire the the semaphore that manages mutually exclusive access to
/* Re-acquire the semaphore that manages mutually exclusive access to
* the device structure. We may have to wait here. But we have our sample.
* Interrupts and pre-emption will be re-enabled while we wait.
*/

View file

@ -575,7 +575,7 @@ Analog Input
19 PGED3/VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/PMD7/RA0 AIN PGA117 Vout
--- ------------------------------------------------ ----------------------------
The PGA117 driver can be enabled by setting the following the the nsh
The PGA117 driver can be enabled by setting the following the nsh
configuration:
CONFIG_ADC=y : Enable support for analog input devices

View file

@ -62,7 +62,7 @@
* 19 PGED3/VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/PMD7/RA0 AIN PGA117 Vout
--- ------------------------------------------------ ----------------------------
*
* The PGA117 driver can be enabled by setting the following the the nsh
* The PGA117 driver can be enabled by setting the following the nsh
* configuration:
*
* CONFIG_ADC=y : Enable support for analog input devices

View file

@ -146,7 +146,7 @@ static const struct led_setting_s g_ledoffvalues[LED_NVALUES] =
{LED_OFF, LED_NC, 0},
};
/* If CONFIG_ARCH_LEDS is not defined, the the user can control the LEDs in
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following array simply maps the PIC32MX_MIRTOO_LEDn
* index values to the correct LED pin configuration.
*/

View file

@ -434,7 +434,7 @@ HCS12/NE64BADGE-specific Configuration Options
CONFIG_HCS12_NONBANKED - Indicates that the target systems does not
support banking. Only short calls are made; one fixed page is
presented the the paging window. Only 48Kb of FLASH is usable
presented in the paging window. Only 48Kb of FLASH is usable
in this configuration: pages 3e, 3d, then 3f will appear as a
contiguous address space in memory.

View file

@ -214,7 +214,7 @@ xcpt_t up_irqbutton(int id, xcpt_t irqhandler)
}
else
{
/* Disable then then detach the the old interrupt handler */
/* Disable then detach the old interrupt handler */
up_disable_irq(irq);
(void)irq_detach(irq);

View file

@ -163,7 +163,7 @@ static void ssp_cdirqsetup(int irq, xcpt_t irqhandler)
}
else
{
/* Disable then then detach the the old interrupt handler */
/* Disable then detach the old interrupt handler */
up_disable_irq(irq);
(void)irq_detach(irq);

View file

@ -230,7 +230,7 @@ Using OpenOCD with the Olimex ARM-USB-OCD
Open1788 board.
/usr/local/share/openocd/scripts/target/lpc1788.cfg
This is the configuration file for the the LPC1788 target.
This is the configuration file for the LPC1788 target.
It just sets up a few parameters then sources lpc17xx.cfg
/usr/local/share/openocd/scripts/target/lpc17xx.cfg
@ -373,7 +373,7 @@ CONFIGURATION
In the normal case (just 'make'), make will attempt to build both user-
and kernel-mode blobs more or less interleaved. This actual works!
However, for me it is very confusing so I prefer the above make command:
Make the user-space binaries first (pass1), then make the the kernel-space
Make the user-space binaries first (pass1), then make the kernel-space
binaries (pass2)
NOTES:
@ -417,7 +417,7 @@ CONFIGURATION
System.map - Symbols in the kernel-space ELF file
Loading these .elf files with OpenOCD is tricky. It appears to me
that when nuttx_user.elf is loaded, it destroys the the nuttx image
that when nuttx_user.elf is loaded, it destroys the nuttx image
in FLASH. But loading the nuttx ELF does not harm the nuttx_user.elf
in FLASH. Conclusion: Always load nuttx_user.elf before nuttx.

View file

@ -238,7 +238,7 @@ xcpt_t up_irqbutton(int id, xcpt_t irqhandler)
}
else
{
/* Disable then then detach the the old interrupt handler */
/* Disable then detach the old interrupt handler */
up_disable_irq(irq);
(void)irq_detach(irq);

View file

@ -240,7 +240,7 @@ PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNE
MEB Connector
=============
The following table summarizes how the pins brought the the MEB through the
The following table summarizes how the pins brought the MEB through the
J2 on the Ethernet Starter Kit are mapped. This connect is J2 on the Ethernet
Starter Kit and J3 on the MEB.

View file

@ -153,7 +153,7 @@ static const struct led_setting_s g_ledoffvalues[LED_NVALUES] =
{LED_OFF, LED_NC, LED_NC, LED_OFF},
};
/* If CONFIG_ARCH_LEDS is not defined, the the user can control the LEDs in
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following array simply maps the PIC32MX_STARTERKIT_LEDn
* index values to the correct LED pin configuration.
*/

View file

@ -670,7 +670,7 @@ Where <subdir> is one of the following:
NOTE: The SD card should *not* be mounted under NSH *and* exported
by the mass storage device!!! That can result in corruption of the
SD card format. This is the sequence of commands that you should
used to work the the SD card safely:
use to work with the SD card safely:
mount -t vfat /dev/mmcsd0 /mnt/sdcard : Mount the SD card initially
...

View file

@ -156,7 +156,7 @@ static const struct led_setting_s g_ledoffvalues[LED_NVALUES] =
{LED_OFF, LED_NC, LED_NC, LED_OFF},
};
/* If CONFIG_ARCH_LEDS is not defined, the the user can control the LEDs in
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following array simply maps the PIC32MX_PIC32MX7MMB_LEDn
* index values to the correct LED pin configuration.
*/

View file

@ -171,7 +171,7 @@ uint8_t pic32mx_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
ret = SPI_STATUS_PRESENT;
/* A high value indicates the the card is write protected. */
/* A high value indicates that the card is write protected. */
if (pic32mx_gpioread(GPIO_SD_WP))
{

View file

@ -249,7 +249,7 @@ static int tc_poll(FAR struct file *filep, struct pollfd *fds, bool setup);
* Private Data
****************************************************************************/
/* This the the vtable that supports the character driver interface */
/* This the vtable that supports the character driver interface */
static const struct file_operations tc_fops =
{
@ -610,7 +610,7 @@ static int tc_waitsample(FAR struct tc_dev_s *priv,
}
}
/* Re-acquire the the semaphore that manages mutually exclusive access to
/* Re-acquire the semaphore that manages mutually exclusive access to
* the device structure. We may have to wait here. But we have our sample.
* Interrupts and pre-emption will be re-enabled while we wait.
*/

View file

@ -516,7 +516,7 @@ Configurations
In the normal case (just 'make'), make will attempt to build both user-
and kernel-mode blobs more or less interleaved. This actual works!
However, for me it is very confusing so I prefer the above make command:
Make the user-space binaries first (pass1), then make the the kernel-space
Make the user-space binaries first (pass1), then make the kernel-space
binaries (pass2)
NOTES:

View file

@ -401,7 +401,7 @@ Creating and Using NORBOOT
(gdb) mon go # And jump into NOR flash
The norboot program can also be configured to jump directly into
NOR FLASH with out requiring the the final halt and go, but since I
NOR FLASH without requiring the final halt and go, but since I
have been debugging the early boot sequence, the above sequence has
been most convenient for me.
@ -489,7 +489,7 @@ Serial Consoles
PB28 RXD1 PIO_USART1_RXD
PB26 CTS1 PIO_USART1_CTS
NOTE: Debug TX and RX pins also go the the ADM3312EARU, but I am
NOTE: Debug TX and RX pins also go to the ADM3312EARU, but I am
uncertain of the functionality.
-------------------------------

View file

@ -1134,7 +1134,7 @@ Where <subdir> is one of the following:
In the normal case (just 'make'), make will attempt to build both user-
and kernel-mode blobs more or less interleaved. This actual works!
However, for me it is very confusing so I prefer the above make command:
Make the user-space binaries first (pass1), then make the the kernel-space
Make the user-space binaries first (pass1), then make the kernel-space
binaries (pass2)
NOTES:

View file

@ -69,7 +69,7 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++
# toolchain.
#export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin"
# This the the Cygwin path to the location where I built genromfs. If you use
# This the Cygwin path to the location where I built genromfs. If you use
# the buildroot toolchain, then genromfs can probably be found in TOOLCHAIN_DIR
export GENROMFS_PATH="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin"

View file

@ -69,7 +69,7 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++
# toolchain.
#export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin"
# This the the Cygwin path to the location where I built genromfs. If you use
# This the Cygwin path to the location where I built genromfs. If you use
# the buildroot toolchain, then genromfs can probably be found in TOOLCHAIN_DIR
export GENROMFS_PATH="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin"

View file

@ -238,7 +238,7 @@ uint8_t pic32mx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
ret = SPI_STATUS_PRESENT;
/* It seems that a high value indicates the the card is write
/* It seems that a high value indicates the card is write
* protected.
*/

View file

@ -153,7 +153,7 @@ static const struct led_setting_s g_ledoffvalues[LED_NVALUES] =
{LED_OFF, LED_NC, LED_NC, LED_OFF},
};
/* If CONFIG_ARCH_LEDS is not defined, the the user can control the LEDs in
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following array simply maps the PIC32MX_UBW32_LEDn
* index values to the correct LED pin configuration.
*/

View file

@ -130,7 +130,7 @@ static int ads7843e_poll(FAR struct file *filep, struct pollfd *fds, bool setup)
* Private Data
****************************************************************************/
/* This the the vtable that supports the character driver interface */
/* This the vtable that supports the character driver interface */
static const struct file_operations ads7843e_fops =
{
@ -480,7 +480,7 @@ static int ads7843e_waitsample(FAR struct ads7843e_dev_s *priv,
ivdbg("Sampled\n");
/* Re-acquire the the semaphore that manages mutually exclusive access to
/* Re-acquire the semaphore that manages mutually exclusive access to
* the device structure. We may have to wait here. But we have our sample.
* Interrupts and pre-emption will be re-enabled while we wait.
*/

View file

@ -124,7 +124,7 @@ static int max11802_poll(FAR struct file *filep, struct pollfd *fds, bool setup)
* Private Data
****************************************************************************/
/* This the the vtable that supports the character driver interface */
/* This the vtable that supports the character driver interface */
static const struct file_operations max11802_fops =
{
@ -436,7 +436,7 @@ static int max11802_waitsample(FAR struct max11802_dev_s *priv,
ivdbg("Sampled\n");
/* Re-acquire the the semaphore that manages mutually exclusive access to
/* Re-acquire the semaphore that manages mutually exclusive access to
* the device structure. We may have to wait here. But we have our sample.
* Interrupts and pre-emption will be re-enabled while we wait.
*/

View file

@ -137,7 +137,7 @@ static inline void stmpe811_tscinitialize(FAR struct stmpe811_dev_s *priv);
* Private Data
****************************************************************************/
/* This the the vtable that supports the character driver interface */
/* This the vtable that supports the character driver interface */
static const struct file_operations g_stmpe811fops =
{
@ -323,7 +323,7 @@ static inline int stmpe811_waitsample(FAR struct stmpe811_dev_s *priv,
}
}
/* Re-acquire the the semaphore that manages mutually exclusive access to
/* Re-acquire the semaphore that manages mutually exclusive access to
* the device structure. We may have to wait here. But we have our sample.
* Interrupts and pre-emption will be re-enabled while we wait.
*/

View file

@ -209,7 +209,7 @@ static int tsc2007_poll(FAR struct file *filep, struct pollfd *fds, bool setup);
* Private Data
****************************************************************************/
/* This the the vtable that supports the character driver interface */
/* This the vtable that supports the character driver interface */
static const struct file_operations tsc2007_fops =
{
@ -390,7 +390,7 @@ static int tsc2007_waitsample(FAR struct tsc2007_dev_s *priv,
}
}
/* Re-acquire the the semaphore that manages mutually exclusive access to
/* Re-acquire the semaphore that manages mutually exclusive access to
* the device structure. We may have to wait here. But we have our sample.
* Interrupts and pre-emption will be re-enabled while we wait.
*/

View file

@ -446,28 +446,28 @@ config LCD_LANDSCAPE
bool "Landscape orientation"
---help---
Define for "landscape" orientation support. Landscape mode refers one
of two orientations where the the display is wider than it is tall
of two orientations where the display is wider than it is tall
(LCD_RLANDSCAPE is the other). This is the default orientation.
config LCD_PORTRAIT
bool "Portrait orientation"
---help---
Define for "portrait" orientation support. Portrait mode refers one
of two orientations where the the display is taller than it is wide
of two orientations where the display is taller than it is wide
(LCD_RPORTAIT is the other).
config LCD_RPORTRAIT
bool "Reverse portrait display"
---help---
Define for "reverse portrait" orientation support. Reverse portrait mode
refers one of two orientations where the the display is taller than it is
refers one of two orientations where the display is taller than it is
wide (LCD_PORTAIT is the other).
config LCD_RLANDSCAPE
bool "Reverse landscape orientation"
---help---
Define for "reverse landscape" orientation support. Reverse landscape mode
refers one of two orientations where the the display is wider than it is
refers one of two orientations where the display is wider than it is
tall (LCD_LANDSCAPE is the other).
endchoice

View file

@ -1108,7 +1108,7 @@ static inline int ssd1289_hwinitialize(FAR struct ssd1289_dev_s *priv)
ssd1289_putreg(lcd, SSD1289_PWRCTRL4, PWRCTRL4_SETTING);
ssd1289_putreg(lcd, SSD1289_PWRCTRL5, PWRCTRL5_SETTING);
/* One driver does an odd setting of the the driver output control.
/* One driver does an odd setting of the driver output control.
* No idea why.
*/
#if 0

View file

@ -1042,7 +1042,7 @@ static int mmcsd_verifystate(FAR struct mmcsd_state_s *priv, uint32_t state)
* Name: mmcsd_wrprotected
*
* Description:
* Return true if the the card is unlocked an not write protected. The
* Return true if the card is unlocked an not write protected. The
*
*
****************************************************************************/
@ -2763,7 +2763,7 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
* connected (This implementation supports only a single MMC card). So
* we cannot re-send CMD1 without first placing the card back into
* stand-by state (if the card is busy, it will automatically
* go back to the the standby state).
* go back to the standby state).
*/
mmcsd_sendcmdpoll(priv, MMC_CMD1, MMCSD_VDD_33_34);

View file

@ -1223,7 +1223,7 @@ FAR struct mtd_dev_s *sst25_initialize(FAR struct spi_dev_s *dev)
}
else
{
/* Make sure the the FLASH is unprotected so that we can write into it */
/* Make sure that the FLASH is unprotected so that we can write into it */
#ifndef CONFIG_SST25_READONLY
sst25_unprotect(priv->dev);

View file

@ -1152,7 +1152,7 @@ FAR struct mtd_dev_s *w25_initialize(FAR struct spi_dev_s *spi)
}
else
{
/* Make sure the the FLASH is unprotected so that we can write into it */
/* Make sure that the FLASH is unprotected so that we can write into it */
#ifndef CONFIG_W25_READONLY
w25_unprotect(priv);

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