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arm-m:let vectors address align

Browse source 
According to the ARM architecture manual,
the address of vectors need alignment

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
This commit is contained in:
anjiahao 2024-07-05 16:21:28 +08:00 committed by GUIDINGLI
parent b81b16ba97
commit c11a2fa450
9 changed files with 72 additions and 68 deletions
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17
arch/arm/src/armv6-m/arm_ramvec_initialize.c
View file

@ -43,21 +43,6 @@
* Pre-processor Definitions
****************************************************************************/
/* Vector Table Offset Register (VECTAB). This mask seems to vary among
* ARMv6-M implementations. It may need to be redefined in some
* architecture-specific header file. By default, the base address of the
* new vector table must be aligned to the size of the vector table extended
* to the next larger power of 2.
*/
#ifndef NVIC_VECTAB_TBLOFF_MASK
# define NVIC_VECTAB_TBLOFF_MASK (0xffffff00)
#endif
/* Alignment ****************************************************************/
#define RAMVEC_ALIGN ((~NVIC_VECTAB_TBLOFF_MASK & 0xffff) + 1)
/****************************************************************************
* Public Data
****************************************************************************/
@ -70,7 +55,7 @@
*/
up_vector_t g_ram_vectors[ARMV6M_VECTAB_SIZE]
locate_data(".ram_vectors") aligned_data(RAMVEC_ALIGN);
locate_data(".ram_vectors") aligned_data(VECTAB_ALIGN);
/****************************************************************************
* Public Functions

3
arch/arm/src/armv6-m/arm_vectors.c
View file

@ -98,7 +98,8 @@ extern void exception_direct(void);
* Note that the [ ... ] designated initializer is a GCC extension.
*/
const void * const _vectors[] locate_data(".vectors") =
const void * const _vectors[] locate_data(".vectors")
aligned_data(VECTAB_ALIGN) =
{
/* Initial stack */

21
arch/arm/src/armv6-m/ram_vectors.h
View file

@ -31,12 +31,27 @@
#include "arm_internal.h"
#include "chip.h"
#ifdef CONFIG_ARCH_RAMVECTORS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Vector Table Offset Register (VECTAB). This mask seems to vary among
* ARMv6-M implementations. It may need to be redefined in some
* architecture-specific header file. By default, the base address of the
* new vector table must be aligned to the size of the vector table extended
* to the next larger power of 2.
*/
#ifndef NVIC_VECTAB_TBLOFF_MASK
# define NVIC_VECTAB_TBLOFF_MASK (0xffffff00)
#endif
/* Alignment ****************************************************************/
#define VECTAB_ALIGN ((~NVIC_VECTAB_TBLOFF_MASK & 0xffff) + 1)
#ifdef CONFIG_ARCH_RAMVECTORS
/* This is the size of the vector table (in 4-byte entries). This size
* includes the (1) the peripheral interrupts, (2) space for 15 Cortex-M
* exceptions, and (3) IDLE stack pointer which lies at the beginning of the
@ -57,7 +72,7 @@
*/
extern up_vector_t g_ram_vectors[ARMV6M_VECTAB_SIZE]
locate_data(".ram_vectors") aligned_data(128);
locate_data(".ram_vectors") aligned_data(VECTAB_ALIGN);
/****************************************************************************
* Public Function Prototypes

2
arch/arm/src/armv7-m/arm_ramvec_initialize.c
View file

@ -60,7 +60,7 @@
*/
up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE]
locate_data(".ram_vectors") aligned_data(VECTOR_ALIGN);
locate_data(".ram_vectors") aligned_data(VECTAB_ALIGN);
/****************************************************************************
* Public Functions

2
arch/arm/src/armv7-m/arm_vectors.c
View file

@ -88,7 +88,7 @@ extern void exception_direct(void);
*/
const void * const _vectors[] locate_data(".vectors")
aligned_data(VECTOR_ALIGN) =
aligned_data(VECTAB_ALIGN) =
{
/* Initial stack */

4
arch/arm/src/armv7-m/ram_vectors.h
View file

@ -84,7 +84,7 @@
* appropriate mask.
*/
#define VECTOR_ALIGN ((~NVIC_VECTAB_TBLOFF_MASK & 0xffff) + 1)
#define VECTAB_ALIGN ((~NVIC_VECTAB_TBLOFF_MASK & 0xffff) + 1)
#ifdef CONFIG_ARCH_RAMVECTORS
@ -105,7 +105,7 @@
*/
extern up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE]
locate_data(".ram_vectors") aligned_data(128);
locate_data(".ram_vectors") aligned_data(VECTAB_ALIGN);
/****************************************************************************
* Public Function Prototypes

41
arch/arm/src/armv8-m/arm_ramvec_initialize.c
View file

@ -42,45 +42,6 @@
* Pre-processor Definitions
****************************************************************************/
/* Vector Table Offset Register (VECTAB). This mask seems to vary among
* ARMv8-M implementations. It may need to be redefined in some
* architecture-specific header file. By default, the base address of the
* new vector table must be aligned to the size of the vector table extended
* to the next larger power of 2.
*/
#ifndef NVIC_VECTAB_TBLOFF_MASK
# if ARMV8M_VECTAB_SIZE > 512
# define NVIC_VECTAB_TBLOFF_MASK (0xfffff000)
# elif ARMV8M_VECTAB_SIZE > 256
# define NVIC_VECTAB_TBLOFF_MASK (0xfffff800)
# elif ARMV8M_VECTAB_SIZE > 128
# define NVIC_VECTAB_TBLOFF_MASK (0xfffffc00)
# elif ARMV8M_VECTAB_SIZE > 64
# define NVIC_VECTAB_TBLOFF_MASK (0xfffffe00)
# elif ARMV8M_VECTAB_SIZE > 32
# define NVIC_VECTAB_TBLOFF_MASK (0xffffff00)
# else
# define NVIC_VECTAB_TBLOFF_MASK (0xffffff80)
# endif
#endif
/* Alignment ****************************************************************/
/* Per the ARMv8M Architecture reference manual, the NVIC vector table
* requires 7-bit address alignment (i.e, bits 0-6 of the address of the
* vector table must be zero). In this case alignment to a 128 byte address
* boundary is sufficient.
*
* Some parts, such as the LPC17xx/LPC40xx family, require alignment to a 256
* byte address boundary. Any other unusual alignment requirements for the
* vector can be specified for a given architecture be redefining
* NVIC_VECTAB_TBLOFF_MASK in the chip-specific chip.h header file for the
* appropriate mask.
*/
#define RAMVEC_ALIGN ((~NVIC_VECTAB_TBLOFF_MASK & 0xffff) + 1)
/****************************************************************************
* Public Data
****************************************************************************/
@ -98,7 +59,7 @@
*/
up_vector_t g_ram_vectors[ARMV8M_VECTAB_SIZE]
locate_data(".ram_vectors") aligned_data(RAMVEC_ALIGN);
locate_data(".ram_vectors") aligned_data(VECTAB_ALIGN);
/****************************************************************************
* Public Functions

3
arch/arm/src/armv8-m/arm_vectors.c
View file

@ -91,7 +91,8 @@ extern void exception_direct(void);
* Note that the [ ... ] designated initializer is a GCC extension.
*/
const void * const _vectors[] locate_data(".vectors") =
const void * const _vectors[] locate_data(".vectors")
aligned_data(VECTAB_ALIGN) =
{
/* Initial stack */

47
arch/arm/src/armv8-m/ram_vectors.h
View file

@ -31,12 +31,53 @@
#include "arm_internal.h"
#include "chip.h"
#ifdef CONFIG_ARCH_RAMVECTORS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define ARMV8M_VECTAB_SIZE (ARMV8M_PERIPHERAL_INTERRUPTS + 16)
/* Vector Table Offset Register (VECTAB). This mask seems to vary among
* ARMv8-M implementations. It may need to be redefined in some
* architecture-specific header file. By default, the base address of the
* new vector table must be aligned to the size of the vector table extended
* to the next larger power of 2.
*/
#ifndef NVIC_VECTAB_TBLOFF_MASK
# if ARMV8M_VECTAB_SIZE > 512
# define NVIC_VECTAB_TBLOFF_MASK (0xfffff000)
# elif ARMV8M_VECTAB_SIZE > 256
# define NVIC_VECTAB_TBLOFF_MASK (0xfffff800)
# elif ARMV8M_VECTAB_SIZE > 128
# define NVIC_VECTAB_TBLOFF_MASK (0xfffffc00)
# elif ARMV8M_VECTAB_SIZE > 64
# define NVIC_VECTAB_TBLOFF_MASK (0xfffffe00)
# elif ARMV8M_VECTAB_SIZE > 32
# define NVIC_VECTAB_TBLOFF_MASK (0xffffff00)
# else
# define NVIC_VECTAB_TBLOFF_MASK (0xffffff80)
# endif
#endif
/* Alignment ****************************************************************/
/* Per the ARMv8M Architecture reference manual, the NVIC vector table
* requires 7-bit address alignment (i.e, bits 0-6 of the address of the
* vector table must be zero). In this case alignment to a 128 byte address
* boundary is sufficient.
*
* Some parts, such as the LPC17xx/LPC40xx family, require alignment to a 256
* byte address boundary. Any other unusual alignment requirements for the
* vector can be specified for a given architecture be redefining
* NVIC_VECTAB_TBLOFF_MASK in the chip-specific chip.h header file for the
* appropriate mask.
*/
#define VECTAB_ALIGN ((~NVIC_VECTAB_TBLOFF_MASK & 0xffff) + 1)
#ifdef CONFIG_ARCH_RAMVECTORS
/* This is the size of the vector table (in 4-byte entries). This size
* includes the (1) the peripheral interrupts, (2) space for 15 Cortex-M
* exceptions, and (3) IDLE stack pointer which lies at the beginning of the
@ -62,7 +103,7 @@
*/
extern up_vector_t g_ram_vectors[ARMV8M_VECTAB_SIZE]
locate_data(".ram_vectors") aligned_data(128);
locate_data(".ram_vectors") aligned_data(VECTAB_ALIGN);
/****************************************************************************
* Public Function Prototypes