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arch/x86_64: The interrupt context flag is stored in the CPU private data
Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
This commit is contained in:
parent
f344a422e8
commit
c748047e25
2 changed files with 34 additions and 24 deletions
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@ -68,6 +68,10 @@ struct intel64_cpu_s
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uint8_t loapic_id;
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bool ready;
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/* Interrupt Context */
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bool interrupt_context;
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/* current_regs holds a references to the current interrupt level
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* register storage structure. If is non-NULL only during interrupt
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* processing. Access to current_regs must be through
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@ -143,7 +147,7 @@ static inline_function uint64_t *up_current_regs(void)
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{
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uint64_t *regs;
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__asm__ volatile("movq %%gs:(%c1), %0"
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: "=rm" (regs)
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: "=r" (regs)
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: "i" (offsetof(struct intel64_cpu_s, current_regs)));
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return regs;
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}
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@ -155,19 +159,22 @@ static inline_function void up_set_current_regs(uint64_t *regs)
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current_regs)));
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}
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/****************************************************************************
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* Name: up_interrupt_context
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*
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* Description:
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* Return true is we are currently executing in the interrupt handler
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* context.
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*
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****************************************************************************/
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noinstrument_function
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static inline_function bool up_interrupt_context(void)
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{
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return up_current_regs() != NULL;
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bool flag;
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__asm__ volatile("movb %%gs:(%c1), %0"
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: "=qm" (flag)
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: "i" (offsetof(struct intel64_cpu_s,
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interrupt_context)));
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return flag;
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}
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static inline_function void up_set_interrupt_context(bool flag)
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{
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__asm__ volatile("movb %0, %%gs:(%c1)"
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:: "r" (flag),
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"i" (offsetof(struct intel64_cpu_s,
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interrupt_context)));
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}
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/****************************************************************************
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@ -75,8 +75,11 @@ static uint64_t *common_handler(int irq, uint64_t *regs)
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* Nested interrupts are not supported.
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*/
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DEBUGASSERT(up_current_regs() == NULL);
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up_set_current_regs(regs);
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DEBUGASSERT(!up_interrupt_context());
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/* Set irq flag */
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up_set_interrupt_context(true);
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/* Deliver the IRQ */
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@ -120,11 +123,10 @@ static uint64_t *common_handler(int irq, uint64_t *regs)
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restore_critical_section(tcb, this_cpu());
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}
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/* Set g_current_regs to NULL to indicate that we are no longer in an
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* interrupt handler.
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*/
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/* Clear irq flag */
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up_set_interrupt_context(false);
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up_set_current_regs(NULL);
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return tcb->xcp.regs;
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}
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#endif
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@ -163,8 +165,11 @@ uint64_t *isr_handler(uint64_t *regs, uint64_t irq)
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return regs;
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#else
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DEBUGASSERT(up_current_regs() == NULL);
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up_set_current_regs(regs);
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DEBUGASSERT(!up_interrupt_context());
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/* Set irq flag */
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up_set_interrupt_context(true);
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switch (irq)
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{
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@ -227,11 +232,9 @@ uint64_t *isr_handler(uint64_t *regs, uint64_t irq)
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restore_critical_section(tcb, this_cpu());
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}
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/* Set g_current_regs to NULL to indicate that we are no longer in an
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* interrupt handler.
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*/
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/* Clear irq flag */
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up_set_current_regs(NULL);
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up_set_interrupt_context(false);
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return tcb->xcp.regs;
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#endif
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}
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