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Run codespell -w with the latest dictonary again

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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
Xiang Xiao 2020-02-23 16:50:23 +08:00 committed by Abdelatif Guettouche
parent 55a7dfc9a7
commit cde88cabcc
1532 changed files with 3117 additions and 3117 deletions
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2
COPYING
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@ -34,7 +34,7 @@ and 2011.
Copyright Line Continuation
---------------------------
Copy information which exceeds the usable line lengh may be broken and
Copy information which exceeds the usable line length may be broken and
continued on the following line, such as:
Copyright (C) 2007-2010, 2012, 2014-2015, 2017 Gregory Nutt. All

284
ChangeLog
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File diff suppressed because it is too large Load diff

20
Documentation/NXGraphicsSubsystem.html
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@ -304,7 +304,7 @@
NX supports any graphics device either of two device interfaces:
<ul>
<li>
Any device with random accesss video memory using the NuttX framebuffer driver interface
Any device with random access video memory using the NuttX framebuffer driver interface
(see <code>include/nuttx/video/fb.h</code>).
</li>
<li>
@ -370,7 +370,7 @@
<p>
NX is the tiny NuttX windowing system for raw windows (i.e., simple regions of
graphics memory).
NX includes a small-footprint, multi-user implentation (NXMU as described below).
NX includes a small-footprint, multi-user implementation (NXMU as described below).
NX can be used without NxWidgets and without NXTOOLKIT for raw window displays.
</p>
@ -642,7 +642,7 @@ void nxgl_rectunion(FAR struct nxgl_rect_s *dest,
</pre></ul>
<p>
<b>Description:</b>
Given two rectanges, <code>src1</code> and <code>src2</code>, return the larger rectangle that
Given two rectangles, <code>src1</code> and <code>src2</code>, return the larger rectangle that
contains both, <code>dest</code>.
</p>
@ -1023,7 +1023,7 @@ int nxmu_start(int display, int plane);
In it is especially useful for setting up board operational and test configurations.
</p>
<p>
When called with the <code>cmd</code> of <code>BOARDIOC_NX_START</code>, then the <code>boardctl()</code> will call <code>nxmu_start</code> indirectly on behalf of the appication.
When called with the <code>cmd</code> of <code>BOARDIOC_NX_START</code>, then the <code>boardctl()</code> will call <code>nxmu_start</code> indirectly on behalf of the application.
In this case the <code>arg</code> parameter is ignored.
</p>
<p>
@ -1872,7 +1872,7 @@ bool nx_ishidden(NXWINDOW hwnd);
<b>Input Parameters:</b>
<ul><dl>
<dt><code>hwnd</code>
<dd>The handle returned by <a href="#nxopenwindow"><code>nx_openwindow()</code></a> that indentifies the window to be queried.
<dd>The handle returned by <a href="#nxopenwindow"><code>nx_openwindow()</code></a> that identifies the window to be queried.
</dl></ul>
</p>
<p>
@ -2278,7 +2278,7 @@ int nx_mousein(NXHANDLE handle, nxgl_coord_t x, nxgl_coord_t y, uint8_t buttons)
as well as mouse and keyboard inputs.
The client sub-window callbacks are registered when the framed window is
created with a call to <a href="#nxtkopenwindow"><code>nxtk_openwindow()</code></a>;
Separate toolbar sub-window callbakcs are reigistered when the toolbar
Separate toolbar sub-window callbacks are reigistered when the toolbar
is added using <a href="#nxtkopentoolbar"><code>nxtk_opentoolbar()</code></a>.
(NOTES: (1) only the client sub-window receives keyboard input and,
(2) border callbacks are not currently accessible by the user).
@ -2685,7 +2685,7 @@ bool nxtk_ishidden(NXTKWINDOW hfwnd);
<b>Input Parameters:</b>
<ul><dl>
<dt><code>hfwnd</code>
<dd>The handle returned by <a href="#nxtkopenwindow"><code>nxtk_openwindow()</code></a> that indentifies the window to be queried.
<dd>The handle returned by <a href="#nxtkopenwindow"><code>nxtk_openwindow()</code></a> that identifies the window to be queried.
</dl></ul>
</p>
<p>
@ -3600,7 +3600,7 @@ int nxcursor_setimage(NXHANDLE hnd, FAR const struct nx_cursorimage_s *image);
Set the cursor image.
</p>
<p>
The image is provided a a 2-bits-per-pixel image. The two bit incoding is as followings:
The image is provided a a 2-bits-per-pixel image. The two bit incoding is as following:
</p>
<ul>
00 - The transparent background.<br>
@ -3768,7 +3768,7 @@ int nxcursor_setposition(NXHANDLE hnd, FAR const struct nxgl_point_s *pos);
<dd>Enables overall support for graphics library and NX
<dt><code>CONFIG_NX_RAMBACKED</code>
<dd>Enables RAM backed window support.
If this option is selected, then windows may be optionally created with a RAM frambuffer backing up the window content.
If this option is selected, then windows may be optionally created with a RAM framebuffer backing up the window content.
Rending into the window will result in rending into the backup framebuffer, then updating the physical display from the framebuffer.
<p>
The advantage of this option is that the application that manages window will no longer receive redraw() callbacks.
@ -4019,7 +4019,7 @@ int nxcursor_setposition(NXHANDLE hnd, FAR const struct nxgl_point_s *pos);
<p>
<b>Font Installation Steps</b>,
Below are general instructions for creating and installing a new font in the NX graphic system.
The first two steps only appy if you are using the BDF font converter program.
The first two steps only apply if you are using the BDF font converter program.
</p>
<ol start="1">
<li>

4
Documentation/NuttShell.html
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@ -178,7 +178,7 @@
<tr>
<td><br></td>
<td>
<a href="#cmddmesg">2.17 Dump Buffered SYSLOG Ouput (dmesg)</a>
<a href="#cmddmesg">2.17 Dump Buffered SYSLOG Output (dmesg)</a>
</td>
</tr>
<tr>
@ -1674,7 +1674,7 @@ dirname &lt;path&gt
<table width ="100%">
<tr bgcolor="#e4e4e4">
<td>
<a name="cmddmesg"><h2>2.17 Dump Buffered SYSLOG Ouput (dmesg)</h2></a>
<a name="cmddmesg"><h2>2.17 Dump Buffered SYSLOG Output (dmesg)</h2></a>
</td>
</tr>
</table>

22
Documentation/NuttX.html
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@ -554,7 +554,7 @@
<td><br></td>
<td>
<p>
<li>ROMFS filesystem support (XIP capabable).</li>
<li>ROMFS filesystem support (XIP capable).</li>
</p>
</td>
</tr>
@ -2143,7 +2143,7 @@
<p>
<a name="moxart"><b>MoxaRT</b></a>
A port to the Moxa NP51x0 series of 2-port advanced RS-232/422/485 serial device servers was contributed by Anton D. Kachalov in NuttX-7.11.
This port includes a NuttShell (NSH) configuraion with support for the Faraday FTMAC100 Ethernet MAC Driver.
This port includes a NuttShell (NSH) configuration with support for the Faraday FTMAC100 Ethernet MAC Driver.
</p>
</td>
</tr>
@ -2514,7 +2514,7 @@
<b>STATUS:</b>
The basic, minimal port is code complete and introduced in NuttX-7.15, but had not yet been tested at that time due to the inavailability of hardware.
This basic port was verified in the NuttX-7.16 release, however.
The port is still mininal and more device drivers are needed to make the port usable.
The port is still minimal and more device drivers are needed to make the port usable.
</p>
<p>
Basic support of NuttX running in SMP mode on the i.MX6Q was also accomplished in NuttX-7.16.
@ -2560,7 +2560,7 @@
<td>
<p>
<a name="tms570ls31x"><b>TI/Hercules TMS570LS31xx</b>.</a>
Archicture support for the TMS570LS3137ZWT part was added in NuttX 7.25 by Ivan Ucherdzhiev.
Architecture support for the TMS570LS3137ZWT part was added in NuttX 7.25 by Ivan Ucherdzhiev.
Ivan also added support for the TI Hercules TMS570LS31x USB Kit.
</p>
<ul>
@ -2918,7 +2918,7 @@ nsh>
<td>
<p>
<a name="tilms6965"><b>TI/Stellaris LM3S6965</b>.</a>
This port uses the Stellaris LM3S6965 Ethernet Evalution Kit with a GNU arm-nuttx-elf toolchain*
This port uses the Stellaris LM3S6965 Ethernet Evaluation Kit with a GNU arm-nuttx-elf toolchain*
under either Linux or Cygwin.
</p>
<ul>
@ -2953,7 +2953,7 @@ nsh>
<td>
<p>
<a name="tilms8962"><b>TI/Stellaris LM3S8962</b>.</a>
This port uses the Stellaris EKC-LM3S8962 Ethernet+CAN Evalution Kit with a GNU arm-nuttx-elf toolchain*
This port uses the Stellaris EKC-LM3S8962 Ethernet+CAN Evaluation Kit with a GNU arm-nuttx-elf toolchain*
under either Linux or Cygwin.
Contributed by Larry Arnold.
</p>
@ -4674,7 +4674,7 @@ nsh>
Other software that supports the OmnibusF4 family include Betaflight, iNAV, and many others.
PX4 recently added support as well, also based on NuttX.
No code from those resources is included in this port.
The OmnibusF4 specifcation mandates the InvenSense MPU6000 which is included in NuttX-7.29 along with a driver for the MAX7546 OSD.
The OmnibusF4 specification mandates the InvenSense MPU6000 which is included in NuttX-7.29 along with a driver for the MAX7546 OSD.
</p>
</td>
</tr>
@ -6100,7 +6100,7 @@ Mem: 29232 5920 23312 23312
<li>
<p><b>NuttX-7.29</b>.
XBAR and OCOTP support was added in NuttX-7.28 by David Sidrane.
LCD Framebuffer suport was added by Johannes.
LCD Framebuffer support was added by Johannes.
</p>
</li>
<li>
@ -6417,7 +6417,7 @@ Mem: 29232 5920 23312 23312
<p>
<b>QEMU/Bifferboard i486</b>.
This port uses the <a href="http://wiki.qemu.org/Main_Page">QEMU</a> i486 and the native
Linux, Cywgin, MinGW the GCC toolchain under Linux or Cygwin.
Linux, Cygwin, MinGW the GCC toolchain under Linux or Cygwin.
</p>
<ul>
<p>
@ -7229,7 +7229,7 @@ avr, m68k, m68hc11, m68hc12, m9s12, blackfin, m32c, h8, and SuperH ports.</block
</li>
<li>
<b>MinGW-GCC</b>.
MinGW-GCC is used to compiler the C tools in the <code>nuttx/tools</code> directory that are neede by the build.
MinGW-GCC is used to compiler the C tools in the <code>nuttx/tools</code> directory that are needed by the build.
MinGW-GCC can be downloaded from http://www.mingw.org/.
If you are using GNUWin32, then it is recommended that you not install the optional MSYS components as there may be conflicts.
</li>
@ -7304,7 +7304,7 @@ if [ -x "$WINELOADER" ]; then exec "$WINELOADER" "$appname" "$@"; fi
</p>
<p>
MSYS, however, cannot be used with the native Windows NuttX build because it will invoke the MSYS bash shell instead of the <code>CMD.exe</code> shell.
Use GNUWin32 in the native Windows build envionment.
Use GNUWin32 in the native Windows build environment.
</p>
</td>
</tr>

2
Documentation/NuttXBinfmt.html
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@ -484,7 +484,7 @@ struct symtab_s
</li>
<li>
Fixed size arrays.
There is no explicit provisional for dyanamically adding or removing entries from the symbol table (realloc might be used for that purpose if needed).
There is no explicit provisional for dynamically adding or removing entries from the symbol table (realloc might be used for that purpose if needed).
The intention is to support only fixed size arrays completely defined at compilation or link time.
</li>
</ol>

10
Documentation/NuttXCCodingStandard.html
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@ -506,7 +506,7 @@
<p>
<b>Indentation</b>
Comments should, typically, be placed before the code section to which they apply.
The comment identation should be the same as the follow identation rules as the following code (if applicable).
The comment indentation should be the same as the follow indentation rules as the following code (if applicable).
</p>
<p>
@ -803,7 +803,7 @@ void some_function(void)
</li>
<li>
<b>Compound Statements</b>.
Within this document, an opening left brace followed by a sequence of statments, and ending with a closing right brace is referred to as a <i>compound statement</i>.
Within this document, an opening left brace followed by a sequence of statements, and ending with a closing right brace is referred to as a <i>compound statement</i>.
</li>
<li>
<b>Nested Compound Statements</b>.
@ -984,7 +984,7 @@ int animals(int animal)
<p>
<b>Indentation Unit</b>.
Indentation is in units of two spaces; Each indentation level is twos spaces further to the right than the preceding identation levels.
Indentation is in units of two spaces; Each indentation level is twos spaces further to the right than the preceding indentation levels.
TAB characters may not be used for indentation.
</p>
<center><table width="60%" border=1>
@ -1791,7 +1791,7 @@ enum xyz_state_e
</li>
<li>
<b>Prefix</b>.
Each related macro value should begin with an upper-case prefix that identifies the value as part of a set of values (and also to mimimize the likelihood of naming collisions).
Each related macro value should begin with an upper-case prefix that identifies the value as part of a set of values (and also to minimize the likelihood of naming collisions).
</li>
<li>
<b>Single space after <code>#define</code></b>.
@ -2077,7 +2077,7 @@ ptr = (FAR struct somestruct_s *)value;
<li>
<b>First definition or statement in column 3</b>.
The first data definitions or statements in the function body are idented by two spaces.
Standards for statements are covered in the <a href="#statements">following paragaraph</a>
Standards for statements are covered in the <a href="#statements">following paragraph</a>
</li>
<li>
<b>Local variables first</b>.

6
Documentation/NuttXDemandPaging.html
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@ -307,7 +307,7 @@
<p>
The page fill worker thread will maintain a static variable called <code>struct tcb_s *g_pftcb</code>.
If no fill is in progress, <code>g_pftcb</code> will be NULL.
Otherwise, it will point to the TCB of the task which is receiving the fill that is in progess.
Otherwise, it will point to the TCB of the task which is receiving the fill that is in progress.
</p>
<ul><small>
<b>NOTE</b>:
@ -336,7 +336,7 @@
</li>
<li>
Call the architecture-specific function <code>up_fillpage()</code>.
Two versions of the up_fillpage function are supported -- a blocking and a non-blocking version based upon the configuratin setting <code>CONFIG_PAGING_BLOCKINGFILL</code>.
Two versions of the up_fillpage function are supported -- a blocking and a non-blocking version based upon the configuration setting <code>CONFIG_PAGING_BLOCKINGFILL</code>.
<ul>
<li>
If <code>CONFIG_PAGING_BLOCKINGFILL</code> is defined, then up_fillpage is blocking call.
@ -472,7 +472,7 @@
Chip specific logic will map the virtual and physical address spaces into three general regions:
<ol>
<li>
A .text region containing &quot;<a href="#MemoryOrg">locked-in-memory</a>&quot; code that is always avaialable and will never cause a page fault.
A .text region containing &quot;<a href="#MemoryOrg">locked-in-memory</a>&quot; code that is always available and will never cause a page fault.
This locked memory is loaded at boot time and remains resident for all time.
This memory regions must include:
<ul>

12
Documentation/NuttxPortingGuide.html
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@ -737,8 +737,8 @@
This port does not support interrupts or a real timer (and hence no
round robin scheduler) Otherwise, it is complete.
</li>
<p>NOTE: In principle, this user mode port should run in any POSIX environement.
This target will probably not run &quot;out-of-the-box&quot; in unverified POSIX environments due to the many host environemnt dependencies.
<p>NOTE: In principle, this user mode port should run in any POSIX environment.
This target will probably not run &quot;out-of-the-box&quot; in unverified POSIX environments due to the many host environment dependencies.
</p>
<li><code>arch/arm</code>:
@ -2573,7 +2573,7 @@ config ARCH_SIM
bool "Simulation"
select ARCH_HAVE_TICKLESS
---help---
Linux/Cywgin user-mode simulation.
Linux/Cygwin user-mode simulation.
</pre></ul>
<p>
When the simulation platform is selected, <code>ARCH_HAVE_TICKLESS</code> is automatically selected, informing the configuration system that <i>Tickless OS</i> options can be selected.
@ -4055,7 +4055,7 @@ void nxsched_timer_expiration(void);
</p>
<li>
<p><b>Cancellation Points</b>:
Many of the application OS interfaces are <i>cancellation points</i>, i.e., when the task is operating in <i>defferred cancellation</i> state, it cannot be deleted or cancelled until it calls an application OS interface that is a cancellation point.
Many of the application OS interfaces are <i>cancellation points</i>, i.e., when the task is operating in <i>deferred cancellation</i> state, it cannot be deleted or cancelled until it calls an application OS interface that is a cancellation point.
</p>
<p>
The POSIX specification is very specific about this, specific both in identifying which application OS interfaces are cancellation points and specific in the fact that it is prohibited for any OS operation other than those listed in the specification to generate cancellation points.
@ -6716,7 +6716,7 @@ int syslog_initialize(void);
<ol>
<li>
<p><b>Low-Level Serial Output</b>.
If you are using a SYSLOG console channel (<code>CONFIG_SYSLOG_CONSOLE</code>) and if the underlying architecture supports the low-level <code>up_putc()</code> interface(<code>CONFIG_ARCH_LOWPUTC</code>), then the SYLOG logic will direct the output to <code>up_putc()</code> which is capable of generating the serial output within the context of an interrupt handler.
If you are using a SYSLOG console channel (<code>CONFIG_SYSLOG_CONSOLE</code>) and if the underlying architecture supports the low-level <code>up_putc()</code> interface(<code>CONFIG_ARCH_LOWPUTC</code>), then the SYSLOG logic will direct the output to <code>up_putc()</code> which is capable of generating the serial output within the context of an interrupt handler.
</p>
<p>
There are a few issues in doing this however:
@ -6752,7 +6752,7 @@ int syslog_initialize(void);
</li>
<li>
<p>
Later, when the next normal syslog output is generated, it will first empty the content of the interrupt buffer to the SYSLOG device in the proper context. It will then be followed by the normal syslog output. In this case, the interrupt level SYSLOG output will interrupt the normal output stream and the interrupt level SYSLOG output will be inserted into the correct position in the SYSLOG output when the next normal SYLOG output is generated.
Later, when the next normal syslog output is generated, it will first empty the content of the interrupt buffer to the SYSLOG device in the proper context. It will then be followed by the normal syslog output. In this case, the interrupt level SYSLOG output will interrupt the normal output stream and the interrupt level SYSLOG output will be inserted into the correct position in the SYSLOG output when the next normal SYSLOG output is generated.
</p>
</li>
</ul>

56
Documentation/NuttxUserGuide.html
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@ -615,8 +615,8 @@ VxWorks provides the following similar interface:
<p>
<b>Description:</b>
The <code>task_setcancelstate()</code> function atomically
sets both the calling task's cancelability state to the indicated
state and returns the previous cancelability state at the location
sets both the calling task's cancellability state to the indicated
state and returns the previous cancellability state at the location
referenced by oldstate.
Legal values for state are TASK_CANCEL_ENABLE and TASK_CANCEL_DISABLE.
</p>
@ -625,7 +625,7 @@ Any pending thread cancellation may occur at the time that the
cancellation state is set to TASK_CANCEL_ENABLE.
</p>
<p>
The cancelability state and type of any newly created tasks are TASK_CANCEL_ENABLE and TASK_CANCEL_DEFERRED respectively.
The cancellability state and type of any newly created tasks are TASK_CANCEL_ENABLE and TASK_CANCEL_DEFERRED respectively.
<p>
<b>Input Parameters:</b>
</p>
@ -664,11 +664,11 @@ No thread could be found corresponding to that specified by the given thread ID.
</pre>
<p>
<b>Description:</b>
The <code>task_setcanceltype()</code> function atomically both sets the calling task's cancelability type to the indicated type and returns the previous cancelability type at the location referenced by <code>oldtype</code>.
The <code>task_setcanceltype()</code> function atomically both sets the calling task's cancellability type to the indicated type and returns the previous cancellability type at the location referenced by <code>oldtype</code>.
Legal values for type are <code>TASK_CANCEL_DEFERRED</code> and <code>TASK_CANCEL_ASYNCHRONOUS</code>.
</p>
<p>
The cancelability state and type of any newly created tasks are <code>TASK_CANCEL_ENABLE</code> and <code>TASK_CANCEL_DEFERRED</code> respectively.
The cancellability state and type of any newly created tasks are <code>TASK_CANCEL_ENABLE</code> and <code>TASK_CANCEL_DEFERRED</code> respectively.
</p>
<p>
<b>Input Parameters:</b>
@ -712,7 +712,7 @@ No thread could be found corresponding to that specified by the given thread ID.
</p>
<p>
The <code>task_testcancel()</code> function creates a <a href="http://www.nuttx.org/doku.php?id=wiki:nxinternal:cancellation-points">Cancellation Point</a> in the calling task.
The <code>task_testcancel()</code> function has no effect if cancelability is disabled.
The <code>task_testcancel()</code> function has no effect if cancellability is disabled.
</p>
<p>
<b>Input Parameters:</b> None
@ -902,7 +902,7 @@ int exec(FAR const char *filename, FAR char * const *argv,
</p>
<p>
<b>POSIX Compatibility:</b>
This is a non-standard inteface unique to NuttX.
This is a non-standard interface unique to NuttX.
Motivation for inclusion of this non-standard interface in certain build modes is discussed above.
</p>
@ -1005,7 +1005,7 @@ int execl(FAR const char *path, ...);
<p>
<b>Description:</b>
<code>execl()</code> is functionally equivalent to <a href="#execv">execv()</a>, differing only in the form of its input parameters.
See the decription of <a href="#execv">execv()</a> for additional information.
See the description of <a href="#execv">execv()</a> for additional information.
<p>
<p>
<b>Input Parameters:</b>
@ -1019,7 +1019,7 @@ int execl(FAR const char *path, ...);
<li>
</li>
<code>...</code>:
A list of the string arguments to be recevied by the program.
A list of the string arguments to be received by the program.
Zero indicates the end of the list.
</li>
</ul>
@ -2254,7 +2254,7 @@ priority of the calling task is returned.
<p>
<b><code>CONFIG_SCHED_CHILD_STATUS</code></b>
If this option is selected, then the exit status of the child task will be retained after the child task exits.
This option should be selected if you require knowledge of a child process' exit status.
This option should be selected if you require knowledge of a child process's exit status.
Without this setting, <code>wait()</code>, <code>waitpid()</code> or <code>waitid()</code> may fail.
For example, if you do:
</p>
@ -2752,7 +2752,7 @@ on this thread of execution.
<b>Assumptions/Limitations:</b>
<p>
<b>POSIX Compatibility:</b> Comparable to the ISO C interface of the same name.
Limitiations in the current implementation:
Limitations in the current implementation:
</p>
<ol>
<li>Only a single <code>atexit</code> function can be registered unless <code>CONFIG_SCHED_ATEXIT_MAX</code> defines a larger number.</li>
@ -3014,7 +3014,7 @@ interface of the same name.
This is because the interrupt handler does not have the option of waiting for the message queue to become non-full.
</li>
<li>
It doesn't allocate new memory (because you cannot allocate memory from an interrup handler).
It doesn't allocate new memory (because you cannot allocate memory from an interrupt handler).
Instead, there are are pool of pre-allocated message structures that may be used just for sending messages from interrupt handlers.
The number of such pre-allocated messages is a configuration parameter.
</li>
@ -5260,8 +5260,8 @@ Differences from the POSIX implementation include:
The sigset() function will modify signal dispositions.
The <code>signo</code> argument specifies the signal.
The <code>disp</code> argument specifies the signal's disposition, which may be <code>SIG_DFL</code>, <code>SIG_IGN</code>, or the address of a signal handler.
If <code>disp</code> is the address of a signal handler, the system will add <code>signo</code> to the calling process' signal mask before executing the signal handler; when the signal handler returns, the system will restore the calling process' signal mask to its state prior to the delivery of the signal.
<code>signo</code> will be removed from the calling process' signal mask.
If <code>disp</code> is the address of a signal handler, the system will add <code>signo</code> to the calling process's signal mask before executing the signal handler; when the signal handler returns, the system will restore the calling process's signal mask to its state prior to the delivery of the signal.
<code>signo</code> will be removed from the calling process's signal mask.
</p>
<p>
NOTE: The value <code>SIG_HOLD</code> for <code>disp</code> is not currently supported.
@ -5341,7 +5341,7 @@ interface of the same name.
</pre>
<p>
<b>Description:</b> The sighold() function will add <code>signo</code> to the calling process' signal mask
<b>Description:</b> The sighold() function will add <code>signo</code> to the calling process's signal mask
</p>
<p>
<b>Input Parameters:</b>
@ -5365,7 +5365,7 @@ interface of the same name.
</pre>
<p>
<b>Description:</b> The sighold() function will remove <code>signo</code> from the calling process' signal mask
<b>Description:</b> The sighold() function will remove <code>signo</code> from the calling process's signal mask
</p>
<p>
<b>Input Parameters:</b>
@ -5474,8 +5474,8 @@ is required in the present implementation (even if the signal is ignored).
</pre>
<p>
<b>Description:</b> The <code>sigpause()</code>) function will remove <code>signo</code>) from the calling process' signal mask and suspend the calling process until a signal is received.
The <code>sigpause()</code>) function will restore the process' signal mask to its original state before returning.
<b>Description:</b> The <code>sigpause()</code>) function will remove <code>signo</code>) from the calling process's signal mask and suspend the calling process until a signal is received.
The <code>sigpause()</code>) function will restore the process's signal mask to its original state before returning.
<p>
<b>Input Parameters:</b>
<ul>
@ -6329,14 +6329,14 @@ interface of the same name.
<b>Description:</b>
<p>The <code>pthread_cancel()</code> function will request that thread be canceled.
The target thread's cancelability state, enabled, or disabled, determines when the cancellation takes effect: When the cancellation is acted on, thread will be terminated.
When cancelability is disabled, all cancellations are held pending in the target thread until the thread re-enables cancelability.</p>
The target thread's cancellability state, enabled, or disabled, determines when the cancellation takes effect: When the cancellation is acted on, thread will be terminated.
When cancellability is disabled, all cancellations are held pending in the target thread until the thread re-enables cancellability.</p>
<p>The target thread's cancelability state determines how the cancellation is acted on:
<p>The target thread's cancellability state determines how the cancellation is acted on:
Either asychronrously or deferred.
Asynchronous cancellations we be acted upon immediately (when enabled), interrupting the thread with its processing in an abritray state.</p>
<p>When cancelability is deferred, all cancellations are held pending in the target thread until the thread changes the cancelability type or a <a href="http://www.nuttx.org/doku.php?id=wiki:nxinternal:cancellation-points">Cancellation Point</a> function such as <a href="#pthreadtestcancel"><code>pthread_testcancel()</code></a> is entered.</p>
<p>When cancellability is deferred, all cancellations are held pending in the target thread until the thread changes the cancellability type or a <a href="http://www.nuttx.org/doku.php?id=wiki:nxinternal:cancellation-points">Cancellation Point</a> function such as <a href="#pthreadtestcancel"><code>pthread_testcancel()</code></a> is entered.</p>
<p>
<b>Input Parameters:</b>
@ -6376,8 +6376,8 @@ These destructors are not currently supported.</li>
</p>
<p>
The <code>pthread_setcancelstate()</code> function atomically
sets both the calling thread's cancelability state to the indicated
state and returns the previous cancelability state at the location
sets both the calling thread's cancellability state to the indicated
state and returns the previous cancellability state at the location
referenced by oldstate.
Legal values for state are PTHREAD_CANCEL_ENABLE and PTHREAD_CANCEL_DISABLE.
</p>
@ -6421,11 +6421,11 @@ interface of the same name.
</pre>
<p>
<b>Description:</b>
The <code>pthread_setcanceltype()</code> function atomically both sets the calling thread's cancelability type to the indicated type and returns the previous cancelability type at the location referenced by <code>oldtype</code>.
The <code>pthread_setcanceltype()</code> function atomically both sets the calling thread's cancellability type to the indicated type and returns the previous cancellability type at the location referenced by <code>oldtype</code>.
Legal values for type are <code>PTHREAD_CANCEL_DEFERRED</code> and <code>PTHREAD_CANCEL_ASYNCHRONOUS</code>.
</p>
<p>
The cancelability state and type of any newly created threads are <code>PTHREAD_CANCEL_ENABLE</code> and <code>PTHREAD_CANCEL_DEFERRED respectively</code>.
The cancellability state and type of any newly created threads are <code>PTHREAD_CANCEL_ENABLE</code> and <code>PTHREAD_CANCEL_DEFERRED respectively</code>.
</p>
<p>
<b>Input Parameters:</b>
@ -6464,7 +6464,7 @@ returned to indicate the error.
</p>
<p>
The <code>pthread_testcancel()</code> function creates a <a href="http://www.nuttx.org/doku.php?id=wiki:nxinternal:cancellation-points">Cancellation Point</a> in the calling thread.
The <code>pthread_testcancel()</code> function has no effect if cancelability is disabled.
The <code>pthread_testcancel()</code> function has no effect if cancellability is disabled.
</p>
<p>
<b>Input Parameters:</b> None
@ -9771,7 +9771,7 @@ ssize_t recvfrom(int sockfd, void *buf, size_t len, int flags,
<b>Returned Value:</b>
On success, returns the number of characters sent.
If no data is available to be received and the peer has performed an orderly shutdown, recv() will return 0.
Othwerwise, on errors, -1 is returned, and <a href="#ErrnoAccess"><code>errno</code></a> is set appropriately:
Otherwise, on errors, -1 is returned, and <a href="#ErrnoAccess"><code>errno</code></a> is set appropriately:
</p>
<ul>
<li><code>EAGAIN</code>.

6
Kconfig
View file

@ -64,7 +64,7 @@ config WINDOWS_NATIVE
depends on EXPERIMENTAL
---help---
Build natively in a CMD.exe environment with Windows style paths
(like C:\cgywin\home)
(like C:\cygwin\home)
The Windows native build is complete and available, but not often
used or verified. As a consequence, it cannot be assured to be
@ -81,7 +81,7 @@ config WINDOWS_CYGWIN
config WINDOWS_UBUNTU
bool "Ubuntu under Windows 10"
---help---
Build natively in an Ubuntu shell under Windoes 10 environment with
Build natively in an Ubuntu shell under Windows 10 environment with
POSIX style paths (like /mnt/c/Program Files)
config WINDOWS_MSYS
@ -89,7 +89,7 @@ config WINDOWS_MSYS
select TOOLCHAIN_WINDOWS
---help---
Build natively in a Cygwin environment with POSIX style paths (like
/cygdrive/c/cgywin/home)
/cygdrive/c/cygwin/home)
config WINDOWS_OTHER
bool "Windows POSIX-like environment"

2
README.txt
View file

@ -232,7 +232,7 @@ Using MSYS
4. mklink /j programfiles86 "C:/Program\ Files\ \(x86\)"
They then show up as /programfiles and /programfiles86 with the MSYS2
sandbox. Thos paths can then be used with the PATH variable. I had
sandbox. Those paths can then be used with the PATH variable. I had
to do something similar for the path to the GNU Tools "ARM Embedded
Toolchain" which also has spaces in the path name.

206
ReleaseNotes
View file

@ -2410,7 +2410,7 @@ Bugfixes, order roughly on decreasing criticality include:
* NXFFS: Corrected critical bugs in initialization, some full FLASH handling,
and errors in certain cases where the FLASH is repacked.
* ARM EABI: Fix stack aligment required for passing floating point values.
* ARM EABI: Fix stack alignment required for passing floating point values.
* Build system: Fix build issues when g++ is used as the compiler.
* NX Graphics: Bitmap error handling, correct RGB color conversion macros,
Error when the background window is released.
@ -2531,7 +2531,7 @@ New features in this release include:
formatting (Contributed by Mikhail Bychek)
* Build. New targets apps_clean and apps_distclean to simplify working
with application diretories.
with application directories.
Bugfixes include:
@ -2812,7 +2812,7 @@ New features and extended functionality:
support for STMicro STMPE811 I/O Expander/touchscreen device.
* STM32. Add support for the STM32 IWDG and WWDG watchodog timers. DMA
now supports cicular buffer mode; serial driver now uses circular
now supports circular buffer mode; serial driver now uses circular
DMA to improve Rx performance (Contributed by Mike Smith).
* STM3240G-EVAL Board. Add support for the LCD and for the STMPE811
@ -3491,8 +3491,8 @@ Additional new features and extended functionality:
available only for ARM7/9, ARMv7-M (Cortext-M3/4), and MIPS32
(PIC32MX) platforms.
- exec() now sets the priority of the new task to the same priority as
the parent task (instead of the arbirtrary value of 50).
- New, partially complient implementations of execv() and execl().
the parent task (instead of the arbitrary value of 50).
- New, partially compliant implementations of execv() and execl().
These are only partially compliant because they do not overlay any
existing "process space" but rather create the new task and exit().
- Add a complete implementation of posix_spawn(). This standard
@ -3633,7 +3633,7 @@ Additional new features and extended functionality:
* Build System:
- Add an options to better manage toolchain prefixes.
- Redesigned how the context targer works in the apps/ directory.
- Redesigned how the context target works in the apps/ directory.
The old design caused lots of problems when changing configurations
because there is no easy way to get the system to rebuild the
context. This change should solve most the problems and eliminate
@ -3914,9 +3914,9 @@ Additional new features and extended functionality:
* Memory Management:
- Extended to support multiple heaps. This is used as part of
the kernel build in order to support separater user- and
the kernel build in order to support separator user- and
kernel-mode heaps.
- The stand-alone memory manger test had to be removed. It
- The stand-alone memory manager test had to be removed. It
was too entangled and made extension of the memory manager
nearly impossible. This is a loss.
@ -4093,7 +4093,7 @@ Additional new features and extended functionality:
- Open1788: Basic support for the WaveShare Open1788 board is complete
with working OS test, NSH, and graphics configurations.
- Open1788: Integrated the LPC178x LCD driver with the WaveShare display.
Touchscreen support is included, howerver, there appears to be an
Touchscreen support is included, however, there appears to be an
issue with the Open1788 touchscreen interrupt signal.
- Open1788: Now supports SDRAM (used to provide the LCD framebuffer).
- Open 1788: Reversed sense of the IDLE LCD. It is now off when the
@ -4117,7 +4117,7 @@ Additional new features and extended functionality:
* STM32:
- Added support for kernel mode build.
- Added architecure support for the STM32 F427/F437 chips. Contributed
- Added architecture support for the STM32 F427/F437 chips. Contributed
by Mike Smith
* STM32 Boards:
@ -4153,7 +4153,7 @@ Additional new features and extended functionality:
* Tools:
- kconfig2html is a new tool which will replace the hand-generated
documentation of the NuttX configruation variables with auto-
documentation of the NuttX configuration variables with auto-
generated documentation.
Efforts In Progress. The following are features that are partially
@ -5078,7 +5078,7 @@ Additional new features and extended functionality:
* Kinetis KL Boards
- A new configuration called minnsh was added is an experiement to
- A new configuration called minnsh was added is an experiment to
see how small we can get the NuttX footprint and still support NSH.
From Alan Carvalho de Assis..
@ -5126,7 +5126,7 @@ completed soon.
Bugfixes (see the ChangeLog for details). Some of these are very important:
* Initialzation and Scheduling:
* Initialization and Scheduling:
- IDLE thread initialization logic should not call group_setupidlefiles()
if there are no file descriptors (and, hence, no file system).
@ -5394,7 +5394,7 @@ Additional new features and extended functionality:
* NXP LPC31xx Boards:
- Board-specific USB host support for the Emedded Artists EA3131 board.
- Board-specific USB host support for the Embedded Artists EA3131 board.
(Missing PCA9532 controls).
- Add support for the Olimex LPC-H3131 board. Including USB host
support (which does not depend on the PCA8532 interface).
@ -5644,7 +5644,7 @@ Additional new features and extended functionality:
- Pattern matching logic extended to handle set of characters and
ranges of character values. From Ken Pettit.
- sleep() and usleep() moved intot the C library. These are not
- sleep() and usleep() moved into the C library. These are not
longer core OS interfaces; they are simple wrappers for the
nanosleep().
- Add an implementation of gets_s().
@ -6471,7 +6471,7 @@ Additional new features and extended functionality:
* Applications:
- prun: An NSH built-in application that can be used to run
Pascal P-Code programs either programatically or from the NSH
Pascal P-Code programs either programmatically or from the NSH
command line.
- netpkt: A "raw" socket test from Lazlo Sitzer.
- hex2bin: A library and built-in task to convert from
@ -6497,7 +6497,7 @@ Bugfixes. Only the most critical bugfixes are listed here (see the ChangeLog fo
* Networking:
- Modify TCP timout handling to provent situations where connections
- Modify TCP timeout handling to provent situations where connections
may not be freed. From Max Holtzberg.
- Improved TCP fallback allocation logic from Max Holtzberg. Also,
fallback mechanism is disabled when SO_LINGER is to prevent
@ -6781,7 +6781,7 @@ Additional new features and extended functionality:
* Applications:
- sysem/mdio: New PHY tool from Daniel Lazlo Sizter.
- system/mdio: New PHY tool from Daniel Lazlo Sizter.
- NSH: Networking logic modified to handler the case of SLIP
transport. From Max Neklyudov.
- NSH: Add a configuration to use a USB keyboard for the stdin
@ -9946,7 +9946,7 @@ Additional new features and extended functionality:
files.
- VFS: The VFS was extended to support standard file operations on
block drivers (open, close, read, write, etc.). The open() interface
accomplishes this by creating a temporary characer driver to mediate
accomplishes this by creating a temporary character driver to mediate
the character oriented accesses to the block driver.
- HOSTFS: Added a HOSTFS file system for use with the simulator. The
HOSTFS file system mounts in the simulated Nuttx context by provides
@ -10066,7 +10066,7 @@ Additional new features and extended functionality:
- bsearch(): Added the bsearch() function from NetBSD.
- freopen(): Added support for freopen().
- strftime(): Added day-of-week support (when avaialable).
- strftime(): Added day-of-week support (when available).
* Tools:
@ -10173,7 +10173,7 @@ detailed bugfix information):
* STMicro STM32 Boards:
- STM32F429i-Disco: Calculated partition boundries based on page
- STM32F429i-Disco: Calculated partition boundaries based on page
block sizes but mtd_partition() is expecting calculations based on
erase block size. From Alan Carvalho de Assis.
@ -10584,7 +10584,7 @@ Additional new features and extended functionality:
* Tools:
- tools/refesh.sh now has a --silent option so that it can be used in
- tools/refresh.sh now has a --silent option so that it can be used in
batch modes without human input.
* Build System:
@ -10609,7 +10609,7 @@ Additional new features and extended functionality:
- apps/examples/chat: Chat example contributed by Vladimir
Komendantskiy.
- apps/sysem/ubloxmodem: Example to control the power
- apps/system/ubloxmodem: Example to control the power
state of the modem in nsh. From Vladimir Komendantskiy.
- apps/examples/leds: An example to demonstrate use of LED driver.
- apps/examples/smp: Add a test to verify SMP configurations.
@ -11013,7 +11013,7 @@ detailed bugfix information):
* Atmel SAMV7 Drivers:
- SAMV7 TWIHS (as well as SAM3/4 and SAMA5: Ensure that the TWIHS
(i2c) hw get's its clock set when the sequence of
(i2c) hw gets its clock set when the sequence of
sam_i2cbus_initialize(), sam_i2cbus_uninitialize(), then
sam_i2cbus_initialize() or twi_reset() is called. I found this a
while back in the stm32 family, so there may be more arch-es with
@ -11127,7 +11127,7 @@ Additional new features and extended functionality:
fifo buffers. Adds mkfifo2() and pipe2() which are just like mkfifo()
and pipe(), but allow control of the size of the underlying, in-memory
circular buffer. Move pipe() and mkpipe() to the C library, they are
no longer core OS interfaces. Capability currenty used only by PTY
no longer core OS interfaces. Capability currently used only by PTY
logic to support, configurable, smaller buffers for PTYs.
* SYSLOG/Debug Output:
@ -11175,7 +11175,7 @@ Additional new features and extended functionality:
* Simulation Platform:
- Added the simulated QSPI (N25Q) flash to the simulation and extened
- Added the simulated QSPI (N25Q) flash to the simulation and extended
flash simulation capabilities to run with MTD drivers based on config
options (currently m25p, sst26 and w25). From Ken Pettit.
@ -11206,7 +11206,7 @@ Additional new features and extended functionality:
available in time
- force CS active after transfer: this forces the CS to stay
active after a transfer, even if the chip runs out of data.
Btw.: this is a prerequisit to make the LASTXFER bit working
Btw.: this is a prerequisite to make the LASTXFER bit working
at all.
- escape LASTXFER: this suppresses the LASTXFER bit at the end
of the next transfer. The "escape"-Flag is reset automatically.
@ -11321,12 +11321,12 @@ Additional new features and extended functionality:
Mateusz Szafoni.
- Nucleo-144: Added USB OTG device to Nucleo-144. From David Sidrane.
- Nucleo-144: Added bbsram test to Nucleo-144. From David Sidrane.
- STM32F4 Disovery: Add CAN support for STM32F4 Discovery. From
- STM32F4 Discovery: Add CAN support for STM32F4 Discovery. From
Matthias Renner.
- STM32F4 Disovery: added a canard configuration files. From
- STM32F4 Discovery: added a canard configuration files. From
Matthias Renner.
- STM32F4 Discovery: Add FPU support for ostest for the STM32F4
Disovery platform. From David Alessio.
Discovery platform. From David Alessio.
- STM32L476 Discovery: Update stm32l476 disco to include init code for
smartfs and nxffs for cases where those fs are included in build.
From ziggurat29.
@ -11351,7 +11351,7 @@ Additional new features and extended functionality:
- printf(): If there are no streams, let printf() fall back to use
syslog() for output.
- Move pipe() and mkpipe() to nuttx/libc, they are no
longer core OS interfaces. Capability currenty used only by PTY logi
longer core OS interfaces. Capability currently used only by PTY logi
to support, configurable, smaller buffers for PTYs.
- Move driver-related files from include/nuttx to include/nuttx/drivers.
Move driver related prototypes out of include/nuttx/fs/fs.h and into
@ -11373,7 +11373,7 @@ Additional new features and extended functionality:
- tools/tesbuild.sh will now build NxWM configurations.
* Appplication Build/Configuration System:
* Application Build/Configuration System:
- Change to the way that apps/ Kconfig files are generated in
order to better support reuse of the apps/ directory in NuttX
@ -11491,7 +11491,7 @@ detailed bugfix information):
This arises due to freeing the bulk IN endpoint before the loop
that frees the requests via cdcasm_freereq. That function checks
the parameters and skips the freeing if either is NULL. Freeing
the bulk IN enpoint will cause the first param to be NULL, thereby
the bulk IN endpoint will cause the first param to be NULL, thereby
bypassing the free operation. To fix, I moved the release of the
bulk IN endpoint until after to loop (much as was the case for the
OUT and read requests, which did not exhibit the problem). From
@ -11653,7 +11653,7 @@ detailed bugfix information):
From Konstantin Berezenko.
- STM32 F1-F4: Move backup domain reset to earlier in the
initialization sequence (stm32_rcc.c() in order to avoid disabling
LSE during RTC initialiation. From Alan Carvalho de Assis.
LSE during RTC initialization. From Alan Carvalho de Assis.
- STM32 F1-F4: When configuring a GPIO via stm32_configgpio() the
function will first set the mode to output and then set the initial
state of the gpio later on. If you have an application with an
@ -11825,19 +11825,19 @@ Additional new features and extended functionality:
- Add driver for the Bosch BMG160 3 axis gyroscope. From Alexander
Entinger.
- Add support for the Sensixs XEN1210 3D-board. This sensor is used
on NANOSATC-BR2 a Brazillian CUBESAT project. From Alan Carvalho
on NANOSATC-BR2 a Brazilian CUBESAT project. From Alan Carvalho
de Assis.
- Add a new ioctl command (set MAXPOS) for Tiva QEI. From Young.
* Other Common Device Drivers:
- I/O Expander: Remove hard-coded PCA9555 fields from ioexpander.h
definitons. Add support for an attach() method that may be used
definitions. Add support for an attach() method that may be used
when any subset of pin interrupts occur.
- I/O Expander Interface: Encode and extend I/O expander options to
include interrupt configuration.
- PCA9555 Driver: Replace the signalling logic with a simple callback
using the new definitons of ioexpander.h. This repartitioning of
using the new definitions of ioexpander.h. This repartitioning of
functionality is necessary because (1) the I/O expander driver is
the lower-lower part of any driver that uses GPIOs (include the GPIO
driver itself) and should not be interacting directly with the much
@ -11975,7 +11975,7 @@ Additional new features and extended functionality:
* Platforms: apps/system:
- Port tee command from NetBSD.
- Add a generic system command. Current implentation cannot use
- Add a generic system command. Current implementation cannot use
/bin/sh and spawns the custom NSH system command directly.
* Platforms: apps/platform:
@ -12479,7 +12479,7 @@ Additional new features and extended functionality:
* STMicro STM32 Drivers:
- STM32 F3: Implemention of the STM32 F37xx SDADC module. There are
- STM32 F3: Implementation of the STM32 F37xx SDADC module. There are
also changes to ADC, DAC modules. SDADC has only been tested in DMA
mode and does not support external TIMER triggers. This is a work in
progress. From Marc Rechté.
@ -12715,7 +12715,7 @@ detailed bugfix information):
with three APIs in the SMP configuration. The new internal interface
is sched_cpu_pause(tcb). This function will pause a CPU if the task
associated with 'tcb' is running on that CPU. This allows a different
CPU to modify that OS data stuctures associated with the CPU. When
CPU to modify that OS data structures associated with the CPU. When
the other CPU is resumed, those modifications can safely take place.
The three fixes are to handle cases in the SMP configuration where one
CPU does need to make modifications to TCB and data structures on a
@ -12801,7 +12801,7 @@ detailed bugfix information):
- ARMv7-R: Add new Kconfig entries for D/I-cache. Unlike in ARMv7-A/M,
Kconfig entries for data and instruction caches are currently missing
in ARMv7-R. This change adds those missing Kconfig entries. Actual
implmenetation for those functions will be added in the subsequent
implementation for those functions will be added in the subsequent
patches. From Heesub Shin.
- ARMv7-R: Add cache handling functions. This change adds functions for
enabling and disabling d/i-caches which were missing for ARMv7-R.
@ -13050,7 +13050,7 @@ detailed bugfix information):
* apps/netutils:
- FTPD: Fixed bug that didn't free ftpd ressources on exit. From Pascal
- FTPD: Fixed bug that didn't free ftpd resources on exit. From Pascal
Speck.
- NTP client: Fix missing left parenthesis. From Pierre-Noel Bouteville.
- cJSON: Import patch to fix:cJSON_PrintUnformatted() behaves unexpected
@ -13077,7 +13077,7 @@ detailed bugfix information):
encoder by a direct call into the board, cheating in a local header to
declare the normally unavailable function prototype. From Sebastien
Lorquet.
- apps/examples/archbuttons: Removed becaue it violates OS interface
- apps/examples/archbuttons: Removed because it violates OS interface
principles.
- examples/adc, pwm, can: Remove all usage of BOARDIOC_ADCTEST_SETUP,
BIOARDIOC_PWMSETUP. Remove BOARDIOC_CAN_INITIALIZE. CAN
@ -13296,7 +13296,7 @@ Additional new features and extended functionality:
- NSH: Add support for the 'ln' command.
- NSH ls command: if node is a symobolic link, use readlink() to get
and the display the target of the symblic link.
and the display the target of the symbolic link.
- NSH: Add readlink command.
* Applications: apps/examples:
@ -13351,7 +13351,7 @@ detailed bugfix information):
tasks running on other CPUs.
- SMP: Fix timer related issues: Round robin and sporadic
scheduling were only being performed for tasks running on the CPU
that processes the system timer interrupt. Similary, CPU load
that processes the system timer interrupt. Similarly, CPU load
measurements were only be processed for running on the CPU that
receives the sampling interrupt.
- sched_note: Fix spinlock instrumentation. From Masayuki Ishikawa.
@ -13643,7 +13643,7 @@ Additional new features and extended functionality:
Recently, Anthony Merlino has taken on this effort and has made
some significant progress. Using the Microchip MRF24J40 module with
the Mikroe Clicker2-STM32 board along with a PC-based IEEE 802.15.4
sniffer, Anthonly has verified correct transmittion and receipt of
sniffer, Anthonly has verified correct transmission and receipt of
basic frames.
- Microchip MRF24J40: As mentioned above, this IEEE 802.15.4 radio
driver is now basically functional.
@ -14299,7 +14299,7 @@ detailed bugfix information):
* STMicro STM32 Drivers:
- STM32, STM32 F7, STM32 L4: OTG host drivers: Do not do data toggle
if interrupt transfer is NAKed. Sugested by webbbn@gmail.com.
if interrupt transfer is NAKed. Suggested by webbbn@gmail.com.
- Save elapsed time before handling I2C in stm32_i2c_sem_waitstop().
This change follows the same logic as in previous fix to
stm32_i2c_sem_waitdone(). It is possible that a context switch
@ -14320,11 +14320,11 @@ detailed bugfix information):
- STM32: Fix erase sector number for microcontrolers with more than 11
sectors. Erase a sector from the second bank cause the bit 4 of SNB
being set but never unused, so trying to erase a sector from the first
bank was acually eraseing a sector from the second bank. From José
bank was actually eraseing a sector from the second bank. From José
Roberto de Souza.
- STM32: Make up_progmem thread safe. Writing to a flash sector while
starting the erase of other sector have a undefined behavior so lets
add a semaphore and syncronize access to Flash registers. But for
add a semaphore and synchronize access to Flash registers. But for
the semaphore to work it needs to be initialized so each board needs
call stm32_flash_initialize() on initialization, so to avoid runtime
problems it is only using semaphore and making it thread safe if
@ -14505,7 +14505,7 @@ detailed bugfix information):
- examples/random: Avoid stack overflows. From Juha Niskanen.
- examples/nettest: Fix an error in pre-processor expression.
- examples/mtdpart: Prevent part array overflow. mtdpart examples
create partions and allocate from 1 index not a 0 index to part[]
create partitions and allocate from 1 index not a 0 index to part[]
array. This cause buffer overflow for part array. This change fixes
this problem. From EunBong Song.
- examples/can: Fix can example app to print data when
@ -14587,7 +14587,7 @@ Additional new features and extended functionality:
- Sockets: Support listening sockets in the getsockname() function.
From Roland Takacs.
- IP Forwading: At the IP level, network may be configured to forward
- IP Forwarding: At the IP level, network may be configured to forward
IP packets that are not destined for the target through a different
network device, decrementing the packet TTL.
- IP forwarding: Add optional support to forward broadcast and
@ -14658,7 +14658,7 @@ Additional new features and extended functionality:
the representation of radio MAC meta-data, (2) changes to handle
variable-length radio addresses, (3) removal of all explicit IEEE
802.15.4 types, references, and interfaces, (4) a new radio driver
interface to return 'capabilities' of the drvier.
interface to return 'capabilities' of the driver.
- ICMPv6: Update so that ICMPv6 can be used with 6LoWPAN.
- IPv6 Neighbor: Update table format to support IEEE 802.15.4 MAC
addresses.
@ -14749,7 +14749,7 @@ Additional new features and extended functionality:
Read access to FLASH. From David Sidrane.
- configs/teensy-3.x: Removed call to khci_usbattach. The call is not
need by the driver if CONFIG_USBDEV_BUSPOWERED=y. On a USB powered device if we are running we are attached. From David Sidrane.
- freedom-k66f: Use SPI driver. Initalize SPI1 on connector J6. No
- freedom-k66f: Use SPI driver. Initialize SPI1 on connector J6. No
real use, as of yet. From David Sidrane.
* NXP Freescale LPC43xx:
@ -14860,7 +14860,7 @@ Additional new features and extended functionality:
mend+1, the next next address are not on ARMV7M_DCACHE_LINESIZE
boundaries. From David Sidrane.
- STM32 F7 SDMMC: SDMMC remove widebus limitation on DMA. There is no
documantation for the STM32F7 that limits DMA on 1 bit vrs 4 bit
documentation for the STM32F7 that limits DMA on 1 bit vrs 4 bit
mode. From David Sidrane.
- STM32 F7 SDMMC: SDMMC add dcache alignment check in
dma{recv|send}setup. In the case where CONFIG_SDIO_PREFLIGHT is not
@ -14980,7 +14980,7 @@ Additional new features and extended functionality:
started from the NSH command line after the network is configured.
- NSH Library: Misc changes needed for PktRadio support.
- NSH Library: Extend ifconfig command so that it can set variable
length packet radio addresss.
length packet radio address.
- NSH Library: Update addroute and delroute command. The would support either
IPv4 or IPv6, but not both. Allow expression of the netmask in IPv4 CIDR or
IPv6 slash notation. This really reduces the pain of using the commands,
@ -15007,7 +15007,7 @@ Additional new features and extended functionality:
Separate out network initialization so that it may be used by both a
target server and a target client. Fix client/server naming
confusion; Add command line option to select the server address on the
target. Add support for both enpoints on target boards vs. one on a
target. Add support for both endpoints on target boards vs. one on a
target and one on the host PC.
- examples/nettest: The send buffer size is now a configuration option.
- examples/nettest: Loopback option should be available in Kconfig for
@ -15015,7 +15015,7 @@ Additional new features and extended functionality:
- examples/keypadtest: REMOVED and warehoused in the Obsoleted
repository. This was just a bad clone of apps/examples/hidkbd for a
keypad driver that was removed years ago. It also uses illegal
function calls into the OS. So it has no purpse: It is redundant, it
function calls into the OS. So it has no purpose: It is redundant, it
uses illegal interfaces, and is a test for non-existent code.
- examples/ipforward: Add an IP forwarding example using only TUN
devices. Test extended to test forwarding of ICMPv6 multicast messages.
@ -15060,7 +15060,7 @@ Additional new features and extended functionality:
* System Utilities (apps/system)
- apps/system/composite: Update to apps/system/composite assocated with
- apps/system/composite: Update to apps/system/composite associated with
big changes to the composite device logic. From Frank Benkert.
- apps/system/composite: Remove CDC/ACM and MSC configuration logic.
This belongs in the OS composite initialization. Add and argument so
@ -15073,7 +15073,7 @@ Additional new features and extended functionality:
calls to support multiple composite device configurations dynamically.
- apps/system/composite: Remove references to USBMSC. There still
dependencies on CDC/ACM in the serial USB trace output.
- apps/system/telnet: Add Telnet Chat deamon and client from
- apps/system/telnet: Add Telnet Chat daemon and client from
libtelent.
* Platform-Specific Support (apps/platform)
@ -15138,7 +15138,7 @@ detailed bugfix information):
- TCP Listen: Throw error when error happens in the tcp_listen
function. From Roland Takacs.
- Nework Device Management: Do not search net device when all-zeros
- Network Device Management: Do not search net device when all-zeros
address is used. From Roland Takacs.
- Network Device Management: Fix a error in netdev_register(); it was
not handling device names properly when TUN is the only network device.
@ -15385,7 +15385,7 @@ detailed bugfix information):
and the variables used are byte or/and halfword types, since there is
no ECC management in this RAM on the STM32F7 Series, it is recommended
to disable the read-modify-write of the DTCM-RAM in the DTCM interface
(inthe DTCMCR register) to increase the performance." From Jussi
(in the DTCMCR register) to increase the performance." From Jussi
Kivilinna.
* STMicro STM32 Drivers:
@ -15396,7 +15396,7 @@ detailed bugfix information):
caused old samples being fetched from cache. From Jussi Kivilinna.
- STM32, STM32L4, STM32F7 ADC: Fix channel 18 sample time. From Juha
Niskanen.
- STM32 DAC: Fix some configuration logic. When STM32_NDAC is greather
- STM32 DAC: Fix some configuration logic. When STM32_NDAC is greater
than 1, then second channel is always DAC1OUT2. From Mateusz Szafoni.
- STM32 DAC: Fix compilation when DMA disabled for channel. From
Mateusz Szafoni.
@ -15677,7 +15677,7 @@ Additional new features and extended functionality:
capability of FTL which will let you use an MTD interface directly
as a block device. From Jussi Kivilinna.
- BCH: The character driver to block device access now supports an
IOCTL to get the geomtry of the underlying block device.
IOCTL to get the geometry of the underlying block device.
- mkfatfs: Remove mkfatfs from the OS. This is a user-space
application and belongs in apps, not in the OS.
- procfs: Implements procfs /proc/fs/blocks and /proc/fs/usage files,
@ -15685,7 +15685,7 @@ Additional new features and extended functionality:
file, replacing the NSH mount command when there are no arguments.
- procfs: Add /proc/meminfo. This is an alternative way to get the
information that was previoulsy available in apps/system/free.
apps/system/free was removed beause it made illegal calls into the
apps/system/free was removed because it made illegal calls into the
OS violating the portable interface. This new procfs entry provides
the same information with no such violation. it also provides
information about the kernel heap (formerly /proc/kmm), about the
@ -15706,13 +15706,13 @@ Additional new features and extended functionality:
* Graphics/Display Drivers:
- Framebufer character driver: Add framebuffer character device driver.
- Framebuffer character driver: Add framebuffer character device driver.
- LCD Framebuffer: Add support for a generic front-end that will
convert any LCD driver into a framebuffer driver.
- Framebufer character driver: Include support for LCD drivers that
- Framebuffer character driver: Include support for LCD drivers that
use a simulated framebuffer and must receive explicit notification
when there is an update to a region in the framebuffer.
- LCD: Make LCD driver configuration indepently selected from NX
- LCD: Make LCD driver configuration independently selected from NX
graphics configuration. This makes things awkward and loses some
error checking but is a necessary step in order to make LCD drivers
usable when the NX graphics system is disabled.
@ -15720,7 +15720,7 @@ Additional new features and extended functionality:
* Networking/Network Drivers:
- Networking: Add implementation of logic for SIOCGIFCONF and
SIOCGLIFCOF IOCTL commnds.
SIOCGLIFCOF IOCTL commands.
- Network IOCTLs: Add support for the SIOCGIFBRDADDR ioctl() command.
- Routing Tables: Permit IPv4 and IPv6 routing tables to be of
different sizes.
@ -15849,7 +15849,7 @@ Additional new features and extended functionality:
* Simulation
- Simulation: Add a configuration for non-graphical testing of the
frambuffer character driver using apps/example/fb.
framebuffer character driver using apps/example/fb.
- Simulation: Add a configuration for testing the UserFS using
apps/examples/userfs.
@ -15985,7 +15985,7 @@ Additional new features and extended functionality:
Alan Carvalho de Assis.
- STM32F103-Minimum: Add board support for MAX7219 LED Matrix
controller. From Alan Carvalho de Assis.
- STM32F103-Minimum: Add USB MSC device initialzation to
- STM32F103-Minimum: Add USB MSC device initialization to
stm32f103-minimum. From Alan Carvalho de Assis.
- STM32F103-Minimum: Add framebuffer driver initialization for
stm32f103-minimum board. From Alan Carvalho de Assis.
@ -16276,7 +16276,7 @@ detailed bugfix information):
case, only three files that have fs/ in their relative pathnames.
The logic was detecting that fs was the name of the enty to report,
but it was then declaring that fs was a file (because fs/block is of
type file). This was fixed by adding a check for matching lenghts.
type file). This was fixed by adding a check for matching lengths.
i.e., if strlen(fs) != strlen(fs/block), then report fs as a
directory instead of a file.
- procfs: Fix uptime being clse to maximum 32-bit value in certain
@ -16343,10 +16343,10 @@ detailed bugfix information):
after it was nullifed. Fixed in tcp_lost_connectino() by adding a
NULL pointer change before the access. This was reported by Dmitriy
Linikov in Bitbucket Issue 72.
- UDP Broadcat: Fix some issues with regard to UDP broadcast
- UDP Broadcast: Fix some issues with regard to UDP broadcast
handling. This is Bitbucket Issue #77.
- ICMP: Fix an error in the poll logic. It was assumed that the
input parmeter pvconn was valid. It was not. Instead, the poll
input parameter pvconn was valid. It was not. Instead, the poll
logic must work like the sendto() and recvfrom() logic: It must
keep a copy of the conn structure in the private data.
- ICMPv6: Fixes several errors preventing icmpv6_radvertise.c from
@ -16361,7 +16361,7 @@ detailed bugfix information):
- ICMPV6: icmpv6_input() needs to set d_len to 0 after consuming echo
reply, otherwise, garbage will get sent out. From Anthony Merlino.
- ICMPV6: Fix an error in the poll logic. It was assumed that the
input parmeter pvconn was valid. It was not. Instead, the poll
input parameter pvconn was valid. It was not. Instead, the poll
logic must work like the sendto() and recvfrom() logic: It must
keep a copy of the conn structure in the private data.
- IGMPv2 Send: Fix incoming IGMP checksum calculation. From Louis
@ -16598,7 +16598,7 @@ detailed bugfix information):
* ZiLOG Z80
- configs/z80sim and xtrs: Serial driver lower halfs ioctl methods
- configs/z80sim and xtrs: Serial driver lower halves ioctl methods
should return a negated errno value, not set the errno variable.
- z80 Make.defs: Fixes dependency generation with newest SDCC
compiler.
@ -16608,7 +16608,7 @@ detailed bugfix information):
* Build System
- configs/: All defconfig filess that include
- configs/: All defconfig files that include
CONFIG_NET_ICMPv6_SOCKET=y need to select CONFIG_SYSTEM_PING6=y and
deselect CONFIG_DISABLE_POLL.
- configs/: All NX configuration... Because of recent changes to
@ -16650,7 +16650,7 @@ detailed bugfix information):
- apps/nshlib/: Avoid truncating the strcmp result in the parser
into a unsigned char variable. nshlib/nsh_netcmds.c: Check for
valid hostip before using it. From Bruno Herrera.
- apps/nshlib/: Fix resouce leak in 'dd' commenad when 'if=' or
- apps/nshlib/: Fix resource leak in 'dd' commenad when 'if=' or
'of=' params are repeated in the command line. For example:
dd if=/dev/null if=/dev/zero of=/dev/null or
dd if=/dev/zero of=/dev/zero of=/dev/null. From Bruno Herrera.
@ -16738,7 +16738,7 @@ Additional new features and extended functionality:
Masayuki Ishikawa.
- SMP: Introduce spin_lock_wo_note() and spin_unlock_wo_note(). These
APIs are used in sched_note.c to protect instrumentation data. The
difference between these APIs to exsiting spin_lock() and
difference between these APIs to existing spin_lock() and
spin_unlock() is that they do not perform instrumentation to avoid
recursive call when SCHED_INSTRUMENTATION_SPINLOCKS=y. From
Masayuki Ishikawa.
@ -17185,7 +17185,7 @@ detailed bugfix information):
equivalent to their counterparts without the nx on front. These
versions do not modify the errno value. Changed all calls within
the OS to use these newer versions of the functions.
- errno: binfmt/, configs/, grahics/, libc/, mm/, net/, sched/: OS
- errno: binfmt/, configs/, graphics/, libc/, mm/, net/, sched/: OS
references to the errno variable should always use the set_errno(),
get_errno() macros.
- drivers/, fs/ and libc/: OS references to the errno variable should
@ -17467,7 +17467,7 @@ Additional new features and extended functionality:
* File Systems/Block and MTD Drivers
- fs/cromfs: Added CROMFS file system. CROMFS is a commpressed, in-
- fs/cromfs: Added CROMFS file system. CROMFS is a compressed, in-
memory, read-only file system based on LZF.
- fs/vfs: Added support for checking if a descriptor is a socket in
fstat(). From Pelle Windestam.
@ -17985,7 +17985,7 @@ detailed bugfix information):
* Networking/Network Drivers:
- net/tcp: Fixed problem with send() retrun value when using
- net/tcp: Fixed problem with send() return value when using
nonblocking I/O over buffered tcp socket From Dmitriy Linikov.
- net/sixlowpan: Fix a nasty, byte-ordering/endian-ness problem.
The root cause has been found and corrected. And a half dozen
@ -19040,7 +19040,7 @@ Additional new features and extended functionality:
characters. From mst.
- apps/system/i2c: Adapt to rename I2C_M_RESTART->i2C_M_START.
I2C_M_NOSTOP should be in flags of first message in every
write-read and write-write mesage sequence. From Gregory Nutt.
write-read and write-write message sequence. From Gregory Nutt.
- apps/system/i2c: Allow registers besides 0x00 in the dev command.
From Jakob Haufe.
- apps/system/nsh: Add logic to automatically register an
@ -19360,7 +19360,7 @@ detailed bugfix information):
not take effect immediately. This update is required to be
serialized to the instruction stream meaning that after this update
completes, it takes effect immediately and no exceptions of lower
priority than the new boosted priority can pre-empt execution.
priority than the new boosted priority can preempt execution.
Because of this erratum, the priority boosting does not take place
immediately, allowing the instruction after the MSR to be
interrupted by an exception of lower priority than the new boosted
@ -19727,7 +19727,7 @@ Additional new features and extended functionality:
- WDOG Timer: Improve accuracy of wd_gettime() in tickless mode From
ligd.
- Work Queues: Add a generic notification facility that runs on a work
queue. The notication facility can notify a group of subscribers to
queue. The notification facility can notify a group of subscribers to
an event via callbacks. This API is for use within the OS only. From
Gregory Nutt.
@ -20289,7 +20289,7 @@ detailed bugfix information):
- S25FL1: During a MTDIOC_GEOMETRY ioctl call, the driver was
incorrectly reporting the blocksize to be the same as the erasesize.
The blocksize should be 256 (the page size). This patch fixes that,
and now the SmartFS configration is working. From Ken Pettit.
and now the SmartFS configuration is working. From Ken Pettit.
- SYSLOG: nx_syslog's return value should include the timestamp length
From Xiang Xiao.
- SYSLOG: syslog_putc() calls sc_force in idle task even if interrupt
@ -21205,7 +21205,7 @@ Additional new features and extended functionality:
18. Support for '?' reverse search mode.
19. Support for 'J'oin next line with current line command.
20. Printing of current row,col in status line of display.
21. Command repeat '.' support for commands that modifiy text.
21. Command repeat '.' support for commands that modify text.
22. Support in replace / insert mode for arrow keys, PGUP / PGDN, HOME,
and END. Using these will cause the command repeat buffer to reset
such that only the last text addition after a cursor movement is saved.
@ -21722,7 +21722,7 @@ detailed bugfix information):
and 'i'nsert. Fixed.
5. The 'vi_shrinkpos' position didn't take the end of file pointer into
account when calculating 'curpos', 'prevpos' variables causing
wierdness when deleting things near the end of the file. Fixed.
weirdness when deleting things near the end of the file. Fixed.
6. The 'yy'ank command was improperly deleting the text from the
document instead of simply yanking to the paste buffer. Fixed.
7. The 'dd'elete line function was not copying the deleted line to the
@ -21861,7 +21861,7 @@ Additional new features and extended functionality:
- Protected Build: Add add a new field (us_heapend) to struct
userspace_s that labels the end of the heap. From Xiang Xiao.
* Binary Loader/Kernal Modules/Shared Libraries
* Binary Loader/Kernel Modules/Shared Libraries
- Shared Libraries: Implement dlerror() using strerror(). From Xiang
Xiao.
@ -21917,7 +21917,7 @@ Additional new features and extended functionality:
additional 'flag' parameter. This argument is current used only to
select a RAM backed, per-window framebuffer. From Gregory Nutt.
- Per-Window Framebuffers: Windows may now be optionally created
with a RAM frambuffer backing up the window content. Rending into
with a RAM framebuffer backing up the window content. Rending into
the window will result in rending into the backup framebuffer, then
updating the physical display from the framebuffer. The advantage
of this option is that the application that manages window will no
@ -22038,7 +22038,7 @@ Additional new features and extended functionality:
- i.MXRT OCOTP: Added OCOTP Support. From David Sidrane.
- i.MXRT LCD: Adds framebuffer support for the i.MXRT 1050.
Includes DCD initialization for SDRAM to provide space for the
framebufer. External code I used/ported is from NXP and is BSD
framebuffer. External code I used/ported is from NXP and is BSD
3-clause license. From Johannes.
* NXP i.MX RT Boards:
@ -22378,7 +22378,7 @@ detailed bugfix information):
order to avoid the conflict with the 3rd party libraries and clean
up the file inclusion: (1) Remove redundant elf32.h, (2) Remove
nuttx/binfmt/elf.h in libs/libc/machine, (2) Remove
nuttx/binfmt/elf.h in modlib, and (4) Rmove nuttx/module.h in
nuttx/binfmt/elf.h in modlib, and (4) Remove nuttx/module.h in
modlib. From Xiang Xiao.
- ELF Executables: If there is an address environment
(CONFIG_ARCH_ADDRENV), binfmt/elf doesn't need to free ctor/dtor
@ -22440,7 +22440,7 @@ detailed bugfix information):
Resolves the issue that bind() could not be called before send()
From anchao.
- TUN/TAP Driver: Re-order all TUN/TAP driver state data. Not only
was was with wasting memory due to alignement requirements, it was
was was with wasting memory due to alignment requirements, it was
also causing network packet buffers to be improperly aligned
causing problems because the network requires 16-bit packet buffer
alignment for uint16_t accesses. This alignment problem was
@ -22475,7 +22475,7 @@ detailed bugfix information):
- Graphics: Fix a coordinate system error in nx_filltrapezoid().
When no clipping rectangle is falls, it falls back to use the
entire window as for the clip. However, that window must then then
be in window relative coordinates, not in absoute device
be in window relative coordinates, not in absolute device
coordinates. From Gregory Nutt.
* Common Board Logic:
@ -22522,7 +22522,7 @@ detailed bugfix information):
- arch/ Common: Align semi-hosting call style with other syscalls in
architecture-specific syscall.h. From Xiang Xiao.
- arch/ Common: Every file that uses serial IOCTLs (TIOC*) must
explicity include nuttx/fs/ioctl.h. This was included previously
explicitly include nuttx/fs/ioctl.h. This was included previously
via sneak path in the now deleted arch/serial.h. From Gregory Nutt.
- arch/ Interfaces: Rename sched_process_cpuload to
nxsched_process_cpuload. All internal sched_ functions should be
@ -22627,7 +22627,7 @@ detailed bugfix information):
* NXP i.MXRT:
- i.MXRT Clock Configuration: If SDRAM is activated it was only
running at 40MHz. This was becaus imxrt_clockconfig.c changed the
running at 40MHz. This was because imxrt_clockconfig.c changed the
SEMC clock divider after the DCD was configured. This commit
corrects that. From Johannes.
@ -22697,7 +22697,7 @@ detailed bugfix information):
configurations. From Mateusz Szafoni.
- STM32F7 Interrupts: Add the missing macro STM32_IRQ_NIRQS used by
arch/arm/src/stm32f7/stm32_irq.c. From Kejun ZHOU.
- STM32H7 DMA: Fix AHB1 base adresses memory map. From Mateusz
- STM32H7 DMA: Fix AHB1 base addresses memory map. From Mateusz
Szafoni.
- STM32H7 SysTick: H7 appears to ignore the SysTick CLKSOURCE bit
and use the CPU clock in all cases. From Mateusz Szafoni.
@ -23260,8 +23260,8 @@ detailed bugfix information):
- Signals: The abnormal termination signal handler was just calling
exit() conditionally when, for example, Ctrl-C is sent to a task.
The abnormal termination handler must obey the rules of cancellation
points: If cancelation is disabled, then the abnormal termination
logic must wait for cancelation to be re-enabled; If cancellation
points: If cancellation is disabled, then the abnormal termination
logic must wait for cancellation to be re-enabled; If cancellation
is deferred then the abnormal termination logic may have to wait
for the victim task to enter or exit a cancellation point. From
Gregory Nutt.
@ -23744,7 +23744,7 @@ Additional new features and extended functionality:
Jerpelea.
- Add I2CTOOL support and extend GPIO for future use. Add delay
support for CXD56xx chip. For development is useful to register
I2C busses when the I2CTOOL is built. Enable GPIO interface on
I2C buses when the I2CTOOL is built. Enable GPIO interface on
the Spresense board. From Alin Jerpelea.
- Add use o the CXD56_I2C_DRIVER to register the /dev/i2c character
devices. Enable battery gauge and battery charger support. From
@ -24055,7 +24055,7 @@ Additional new features and extended functionality:
determines a preferred window width based primarily on the font
size. From Gregory Nutt.
- apps/graphics/tmw4nx: Add a CClock class that implements the
Twm4Nx digital clock based on the CSLcd simulated SLCD segements.
Twm4Nx digital clock based on the CSLcd simulated SLCD segments.
From Gregory Nutt.
- apps/graphics/twm4nx/README.txt: Add an overview of how to create
Twm4Nx applications. From Gregory Nutt.
@ -24440,7 +24440,7 @@ detailed bugfix information):
- apps/nshlib: Fix all places where cle() and readline() are used.
readline() returns EOF on a failure. cle() returns a negated errno
value. Checking only for EOF causes failues to be missed (and
value. Checking only for EOF causes failures to be missed (and
infinite loops ensuing). From Valmantas Paliksa.
- nshlib/nsh_parse.c: Fix a warning about an uninitialized variable
from the ZDS-II compiler. From Gregory Nutt.
@ -25628,7 +25628,7 @@ information):
index, i.e. the AT24CS0x, FLASH chips with a UUID that appears as a
2nd I2C slave at (address+8), report their serial number at
Reg[80]-Reg[8F] and will NAK a read of Reg[0]. (2) Modify get/set
to prevent write of reg index if not specifed From David Alessio.
to prevent write of reg index if not specified From David Alessio.
* Network Utilities: apps/netutils:
@ -25987,7 +25987,7 @@ Additional new features and extended functionality:
table for dlopen/insmod. From Xiang Xiao.
- getdelim() and getline(): Add implementations of the POSIX
functions getdelim() and getline(). Because of how the function is
defined, getline() canot be used on platforms that use CR-LF lin
defined, getline() cannot be used on platforms that use CR-LF lin
terminations. From Gregory Nutt.
- alarm(), setitimer(), and getitimer(): Implement alarm(),
setitimer() and getitimer() APIs. From liuhaitao.

24
TODO
View file

@ -27,7 +27,7 @@ nuttx/:
(12) File system/Generic drivers (fs/, drivers/)
(10) Graphics Subsystem (graphics/)
(1) Build system / Toolchains
(3) Linux/Cywgin simulation (arch/sim)
(3) Linux/Cygwin simulation (arch/sim)
(5) ARM (arch/arm/)
apps/ and other Add-Ons:
@ -473,7 +473,7 @@ o Task/Scheduler (sched/)
2. Then when either the ELF program task or the created task
in the same address environment exits, it would decrement
the reference count. When the last task exits, the reference
count would go to zero and the address environement could be
count would go to zero and the address environment could be
destroyed.
This is complex work and would take some effort and probably
@ -571,7 +571,7 @@ o SMP
The returned CPU number is then used for various things,
typically as an array index. However, if pre-emption is
not disabled,then it is possible that a context switch
could occur and that logic could run on anothe CPU with
could occur and that logic could run on another CPU with
possible fatal consequences.
We need to evaluate all use of this_cpu() and assure that
@ -579,7 +579,7 @@ o SMP
to execute on the same CPU.
Status: Open
Prioity: Medium. This is a logical problem but I have nevers seen
Prioity: Medium. This is a logical problem but I have never seen
an bugs caused by this. But I believe that failures are
possible.
@ -640,7 +640,7 @@ o SMP
That is really not as much work as it sounds. It is
something that could be done in 2-3 days of work if you know
what you are doing. Getting the proper test setup and
verifying the cahnge would be the more difficult task.
verifying the change would be the more difficult task.
Status: Open
Priority: Unknown. Might be high, but first we would need to confirm
@ -791,7 +791,7 @@ o Signals (sched/signal, arch/)
Priority: Low. Even if there are only 31 usable signals, that is still a lot.
Title: NO QUEUING of SIGNAL ACTIONS
Description: In the architecture specific implemenation of struct xcptcontext,
Description: In the architecture specific implementation of struct xcptcontext,
there are fields used by signal handling logic to pass the state
information needed to dispatch signal actions to the appropriate
handler.
@ -807,7 +807,7 @@ o Signals (sched/signal, arch/)
very low.
Title: QUEUED SIGNAL ACTIONS ARE INAPPROPRIATELY DEFERRED
Descirption: The implement of nxsig_deliver() does the followin in a loop:
Description: The implement of nxsig_deliver() does the following in a loop:
- It takes the next next queued signal action from a list
- Calls the architecture-specific up_sigdeliver() to perform
the signal action (through some sleight of hand in
@ -819,7 +819,7 @@ o Signals (sched/signal, arch/)
uninterrupted thread instead of returning to nxsig_deliver().
The loop in nxsig_deliver() then will have the opportunity to
run until when that normal, uniterrupted thread is suspended.
run until when that normal, uninterrupted thread is suspended.
Then the loop will continue with the next queued signal
action.
@ -2471,7 +2471,7 @@ o Graphics Subsystem (graphics/)
incomplete. In fact, many recent changes explicitly assume a
single color plane: Planar colors are specified by a array
of components; some recent logic uses only component [0],
ignoring the possible existence of other color componet frames.
ignoring the possible existence of other color component frames.
Completely removing planar color support is one reasonable
options; it is not likely that NuttX will encounter planar
@ -2528,7 +2528,7 @@ o Other drivers (drivers/)
Priority: Low, provided that the application can handle these characters
in the data stream.
o Linux/Cywgin simulation (arch/sim)
o Linux/Cygwin simulation (arch/sim)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Title: SIMULATOR HAS NO INTERRUPTS (NON-PREMPTIBLE)
@ -2709,7 +2709,7 @@ o ARM (arch/arm/)
Title: USE COMMON VECTOR LOGIC IN ALL ARM ARCHITECTURES.
Description: Originally, each ARMv7-M MCU architecture had its own
private implementation for interrupt vectors and interrupt
handling logic. This was superceded by common interrupt
handling logic. This was superseded by common interrupt
vector logic but these private implementations were never
removed from older MCU architectures. This is turning into
a maintenance issue because any improvements to the common
@ -2784,7 +2784,7 @@ o Other Applications & Tests (apps/examples/)
Title: EXAMPLES/PIPE ON CYGWIN
Description: The redirection test (part of examples/pipe) terminates
incorrectly on the Cywgin-based simulation platform (but works
incorrectly on the Cygwin-based simulation platform (but works
fine on the Linux-based simulation platform).
Status: Open
Priority: Low

4
arch/Kconfig
View file

@ -77,7 +77,7 @@ config ARCH_SIM
select ONESHOT
select SERIAL_CONSOLE
---help---
Linux/Cywgin user-mode simulation.
Linux/Cygwin user-mode simulation.
config ARCH_X86
bool "x86"
@ -462,7 +462,7 @@ config ARCH_KERNEL_STACKSIZE
int "Kernel stack size"
default 1568
---help---
The common size of each process' kernel stack
The common size of each process's kernel stack
endif # ARCH_KERNEL_STACK

2
arch/arm/Kconfig
View file

@ -830,7 +830,7 @@ config ARM_LWL_CONSOLE
for openocd as the debugger is available in tools/ocdconsole.py.
Currently only available for STM32 architectures, but easily
added to other ARM architectures be addd up_low_console.c to the
added to other ARM architectures be add up_low_console.c to the
architecture Make.defs file.
if ARCH_CORTEXM0

2
arch/arm/include/cxd56xx/audio.h
View file

@ -742,7 +742,7 @@ CXD56_AUDIO_ECODE cxd56_audio_free_dmahandle(FAR cxd56_audio_dma_t handle);
/* Set internal data path
*
* sig: Internal singal type
* sig: Internal signal type
* sel: Internal selector type
*
* CXD56_AUDIO_ECODE return code

4
arch/arm/include/cxd56xx/geofence.h
View file

@ -212,7 +212,7 @@ struct cxd56_geofence_trans_s
uint8_t status;
};
/* Geofence output data structer. */
/* Geofence output data structure. */
struct cxd56_geofence_status_s
{
@ -220,7 +220,7 @@ struct cxd56_geofence_status_s
uint8_t update;
/* The detail data od updated region ID */
/* The detail data of updated region ID */
struct cxd56_geofence_trans_s status[CXD56_GEOFENCE_REGION_CAPACITY];
};

6
arch/arm/include/cxd56xx/gnss.h
View file

@ -374,7 +374,7 @@ extern "C"
#define CXD56_GNSS_IOCTL_AGPS_SET_FRAMETIME 32
/* Set tau_GPS(&tau;GPS: Differnece of system time between GPS and Glonass
/* Set tau_GPS(&tau;GPS: Difference of system time between GPS and Glonass
* system).
*
* param[in] arg
@ -792,7 +792,7 @@ struct cxd56_gnss_test_result_s
float doppler; /* Doppler [Hz] */
};
/* signal setting for reading data asychronously
/* signal setting for reading data asynchronously
* The field 'enable' of struct #cxd56_gnss_signal_setting_s to be given as a
* parameter must be specified as 1 when setting and 0 when unsetting.
* Field 'gnsssig' specifies the value of 'Signal types from GNSS',
@ -810,7 +810,7 @@ struct cxd56_gnss_signal_setting_s
FAR void *data; /* user data */
};
/* Information for use after being signaled to read data asychronously */
/* Information for use after being signaled to read data asynchronously */
struct cxd56_gnss_signal_info_s
{

4
arch/arm/include/cxd56xx/pm.h
View file

@ -311,7 +311,7 @@ uint32_t up_pm_get_bootmask(void);
* Enable the boot cause of the specified bit.
*
* Parameter:
* mask - OR of Boot mask definied as PM_BOOT_XXX
* mask - OR of Boot mask defined as PM_BOOT_XXX
*
* Return:
* Updated boot mask
@ -327,7 +327,7 @@ uint32_t up_pm_set_bootmask(uint32_t mask);
* Disable the boot cause of the specified bit.
*
* Parameter:
* mask - OR of Boot mask definied as PM_BOOT_XXX
* mask - OR of Boot mask defined as PM_BOOT_XXX
*
* Return:
* Updated boot mask

2
arch/arm/include/cxd56xx/scu.h
View file

@ -392,7 +392,7 @@ struct scufifo_wm_s
{
int signo; /*< Signal number (0 - 31, except system reserved) */
/* Pointer to memomry to be timestamp stored */
/* Pointer to memory to be timestamp stored */
FAR struct scutimestamp_s *ts;

10
arch/arm/include/imx6/chip.h
View file

@ -61,7 +61,7 @@
# undef IMX_HAVE_DDR32 /* 32-bit DDR3 */
# define IMX_HAVE_DDR32x2 1 /* Two channel 32-bit DDR3 */
# define IMX_HAVE_SATAII 1 /* Integrated SATA-II */
# undef IMX_HAVE_EPD /* No interated EPD controller */
# undef IMX_HAVE_EPD /* No integrated EPD controller */
#elif defined(CONFIG_ARCH_CHIP_IMX6_6DUAL)
# define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */
# define IMX_L2CACHE_SIZE (1024*1024) /* 1MB L2 Cache */
@ -73,7 +73,7 @@
# undef IMX_HAVE_DDR32 /* 32-bit DDR3 */
# define IMX_HAVE_DDR32x2 1 /* Two channel 32-bit DDR3 */
# define IMX_HAVE_SATAII 1 /* Integrated SATA-II */
# undef IMX_HAVE_EPD /* No interated EPD controller */
# undef IMX_HAVE_EPD /* No integrated EPD controller */
#elif defined(CONFIG_ARCH_CHIP_IMX6_6DUALLITE)
# define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */
# define IMX_L2CACHE_SIZE (512*1024) /* 512KB L2 Cache */
@ -85,7 +85,7 @@
# undef IMX_HAVE_DDR32 /* No 32-bit DDR3 */
# define IMX_HAVE_DDR32x2 1 /* Two channel 32-bit DDR3 */
# undef IMX_HAVE_SATAII /* No integrated SATA-II */
# define IMX_HAVE_EPD 1 /* Interated EPD controller */
# define IMX_HAVE_EPD 1 /* Integrated EPD controller */
#elif defined(CONFIG_ARCH_CHIP_IMX6_6SOLO)
# define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */
# define IMX_L2CACHE_SIZE (512*1024) /* 512KB L2 Cache */
@ -97,7 +97,7 @@
# define IMX_HAVE_DDR32 1 /* 32-bit DDR3 */
# undef IMX_HAVE_DDR32x2 /* No two channel 32-bit DDR3 */
# undef IMX_HAVE_SATAII /* No integrated SATA-II */
# define IMX_HAVE_EPD 1 /* Interated EPD controller */
# define IMX_HAVE_EPD 1 /* Integrated EPD controller */
#elif defined(CONFIG_ARCH_CHIP_IMX6_6SOLOLITE)
# define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */
# define IMX_L2CACHE_SIZE (256*1024) /* 256KB L2 Cache */
@ -109,7 +109,7 @@
# define IMX_HAVE_DDR32 1 /* 32-bit DDR3 */
# undef IMX_HAVE_DDR32x2 /* No two channel 32-bit DDR3 */
# undef IMX_HAVE_SATAII /* No integrated SATA-II */
# define IMX_HAVE_EPD 1 /* Interated EPD controller */
# define IMX_HAVE_EPD 1 /* Integrated EPD controller */
#else
# error Unspecified i.MX6 chip
#endif

4
arch/arm/include/kl/irq.h
View file

@ -116,7 +116,7 @@
/* Note that the total number of IRQ numbers supported is equal to the number of
* valid interrupt vectors. This is wasteful in that certain tables are sized by
* this value. There are only 94 valid interrupts so, potentially the numver of
* this value. There are only 94 valid interrupts so, potentially the number of
* IRQs to could be reduced to 94. However, equating IRQ numbers with vector numbers
* also simplifies operations on NVIC registers and (at least in my state of mind
* now) seems to justify the waste.
@ -161,7 +161,7 @@
/* Note that the total number of IRQ numbers supported is equal to the number of
* valid interrupt vectors. This is wasteful in that certain tables are sized by
* this value. There are only 94 valid interrupts so, potentially the numver of
* this value. There are only 94 valid interrupts so, potentially the number of
* IRQs to could be reduced to 94. However, equating IRQ numbers with vector numbers
* also simplifies operations on NVIC registers and (at least in my state of mind
* now) seems to justify the waste.

18
arch/arm/include/max326xx/chip.h
View file

@ -76,9 +76,9 @@
/* Peripherals */
# define MAX326_NWDOG 0 /* No Watchog Timers */
# define MAX326_NWWDOG 2 /* Two Windowed Watchog Timers */
# define MAX326_NRWDOG 1 /* One Recovery Watchog Timer */
# define MAX326_NWDOG 0 /* No Watchdog Timers */
# define MAX326_NWWDOG 2 /* Two Windowed Watchdog Timers */
# define MAX326_NRWDOG 1 /* One Recovery Watchdog Timer */
# define MAX326_NWAKEUP 1 /* One Wakeup Timer */
# define MAX326_NRTC 1 /* One RTC */
# define MAX326_NCRC 1 /* One CRC16/32 */
@ -115,9 +115,9 @@
/* Peripherals */
# define MAX326_NWDOG 0 /* No Watchog Timers */
# define MAX326_NWWDOG 2 /* Two Windowed Watchog Timers */
# define MAX326_NRWDOG 0 /* No Recovery Watchog Timer */
# define MAX326_NWDOG 0 /* No Watchdog Timers */
# define MAX326_NWWDOG 2 /* Two Windowed Watchdog Timers */
# define MAX326_NRWDOG 0 /* No Recovery Watchdog Timer */
# define MAX326_NWAKEUP 1 /* One Wakeup Timer */
# define MAX326_NRTC 1 /* One RTC */
# define MAX326_NCRC 1 /* One CRC16/32 */
@ -164,9 +164,9 @@
/* Peripherals */
# define MAX326_NWDOG 1 /* One Watchog Timer */
# define MAX326_NWWDOG 0 /* No Windowed Watchog Timers */
# define MAX326_NRWDOG 0 /* No Recovery Watchog Timer */
# define MAX326_NWDOG 1 /* One Watchdog Timer */
# define MAX326_NWWDOG 0 /* No Windowed Watchdog Timers */
# define MAX326_NRWDOG 0 /* No Recovery Watchdog Timer */
# define MAX326_NWAKEUP 0 /* No Wakeup Timer */
# define MAX326_NRTC 1 /* One RTC */
# define MAX326_NCRC 0 /* No CRC16/32 */

2
arch/arm/include/stm32f0l0g0/stm32l0_irq.h
View file

@ -96,7 +96,7 @@
#define STM32_IRQ_USART2 (STM32_IRQ_EXTINT + 28) /* 28: USART2 global interrupt */
#define STM32_IRQ_LPUART1 (STM32_IRQ_EXTINT + 29) /* 29: LPUART1 global interrupt */
#define STM32_IRQ_AES (STM32_IRQ_EXTINT + 29) /* 29: AES global interrupt */
#define STM32_IRQ_RNG (STM32_IRQ_EXTINT + 29) /* 29: RNG gloabl interrupt */
#define STM32_IRQ_RNG (STM32_IRQ_EXTINT + 29) /* 29: RNG global interrupt */
#define STM32_IRQ_LCD (STM32_IRQ_EXTINT + 30) /* 30: LCD global interrupt */
#define STM32_IRQ_USB (STM32_IRQ_EXTINT + 31) /* 31: USB global interrupt */

2
arch/arm/src/a1x/a1x_boot.c
View file

@ -240,7 +240,7 @@ static void a1x_copyvectorblock(void)
uint32_t *dest;
/* If we are using re-mapped vectors in an area that has been marked
* read only, then temparily mark the mapping write-able (non-buffered).
* read only, then temporarily mark the mapping write-able (non-buffered).
*/
#ifdef CONFIG_PAGING

2
arch/arm/src/a1x/a1x_serial.c
View file

@ -1430,7 +1430,7 @@ static bool up_txempty(struct uart_dev_s *dev)
}
/****************************************************************************
* Public Funtions
* Public Functions
****************************************************************************/
#ifdef USE_EARLYSERIALINIT

2
arch/arm/src/a1x/hardware/a10_memorymap.h
View file

@ -296,7 +296,7 @@
/* A1X Virtual (mapped) Memory Map
*
* board_memorymap.h contains special mappings that are needed when a ROM
* memory map is used. It is included in this odd location becaue it depends
* memory map is used. It is included in this odd location because it depends
* on some the virtual address definitions provided above.
*/

2
arch/arm/src/a1x/hardware/a1x_intc.h
View file

@ -164,7 +164,7 @@
#define INTC_NMICTRL_SRCTYPE_SHIFT (0) /* Bits 0-1: External NMI Interrupt Source Type */
#define INTC_NMICTRL_SRCTYPE_MASK (3 << INTC_NMICTRL_SRCTYPE_SHIFT)
# define INTC_NMICTRL_SRCTYPE_LOW (0 << INTC_NMICTRL_SRCTYPE_SHIFT) /* Low level sensitive */
# define INTC_NMICTRL_SRCTYPE_NEDGE (1 << INTC_NMICTRL_SRCTYPE_SHIFT) /* Negative edge trigged */
# define INTC_NMICTRL_SRCTYPE_NEDGE (1 << INTC_NMICTRL_SRCTYPE_SHIFT) /* Negative edge triggered */
/* Interrupt IRQ Pending 0-2 Status */

2
arch/arm/src/am335x/am335x_can.c
View file

@ -592,7 +592,7 @@ static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id)
*
* Byte 0: Bits 0-7: Bits 3-10 of the 11-bit CAN identifier
* Byte 1: Bits 5-7: Bits 0-2 of the 11-bit CAN identifier
* Bit 4: Remote Tranmission Request (RTR)
* Bit 4: Remote Transmission Request (RTR)
* Bits 0-3: Data Length Code (DLC)
* Bytes 2-10: CAN data
*

2
arch/arm/src/arm/up_cache.S
View file

@ -6,7 +6,7 @@
*
* Several of these cache operations come from Atmel sample code with
* modifications for better integration with NuttX. The Atmel sample code
* has a BSD compatibile license that requires this copyright notice:
* has a BSD compatible license that requires this copyright notice:
*
* Copyright (c) 2008, Atmel Corporation
*

2
arch/arm/src/arm/up_head.S
View file

@ -588,7 +588,7 @@ __start:
strcc fp, [r0],#4
bcc .Lbssinit
/* If the .data section is in a separate, unitialized address space,
/* If the .data section is in a separate, uninitialized address space,
* then we will also need to copy the initial values of of the .data
* section from the .text region into that .data region. This would
* be the case if we are executing from FLASH and the .data section

2
arch/arm/src/arm/up_saveusercontext.S
View file

@ -83,7 +83,7 @@ up_saveusercontext:
/* Make sure that the return value will be non-zero (the
* value of the other volatile registers don't matter --
* r1-r3, ip). This function is called through the
* noraml C calling conventions and the values of these
* normal C calling conventions and the values of these
* registers cannot be assumed at the point of setjmp
* return.
*/

2
arch/arm/src/arm/vfork.S
View file

@ -77,7 +77,7 @@
* - Allocation of the child task's TCB.
* - Initialization of file descriptors and streams
* - Configuration of environment variables
* - Setup the intput parameters for the task.
* - Setup the input parameters for the task.
* - Initialization of the TCB (including call to up_initial_state()
* 4) up_vfork() provides any additional operating context. up_vfork must:
* - Allocate and initialize the stack

2
arch/arm/src/armv6-m/up_svcall.c
View file

@ -178,7 +178,7 @@ int up_svcall(int irq, FAR void *context, FAR void *arg)
* R0 = SYS_save_context
* R1 = saveregs
*
* In this case, we simply need to copy the current regsters to the
* In this case, we simply need to copy the current registers to the
* save register space references in the saved R1 and return.
*/

2
arch/arm/src/armv6-m/up_unblocktask.c
View file

@ -63,7 +63,7 @@
* Input Parameters:
* tcb: Refers to the tcb to be unblocked. This tcb is in one of the
* waiting tasks lists. It must be moved to the ready-to-run list and,
* if it is the highest priority ready to run taks, executed.
* if it is the highest priority ready to run task, executed.
*
****************************************************************************/

2
arch/arm/src/armv6-m/vfork.S
View file

@ -78,7 +78,7 @@
* - Allocation of the child task's TCB.
* - Initialization of file descriptors and streams
* - Configuration of environment variables
* - Setup the intput parameters for the task.
* - Setup the input parameters for the task.
* - Initialization of the TCB (including call to up_initial_state()
* 4) up_vfork() provides any additional operating context. up_vfork must:
* - Allocate and initialize the stack

2
arch/arm/src/armv7-a/arm_addrenv.c
View file

@ -284,7 +284,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
}
/* Allocate .bss/.data space pages. NOTE that a configurable offset is
* added to the allocted size. This is matched by the offset that is
* added to the allocated size. This is matched by the offset that is
* used when reporting the virtual data address in up_addrenv_vdata().
*/

2
arch/arm/src/armv7-a/arm_cpupause.c
View file

@ -151,7 +151,7 @@ int up_cpu_paused(int cpu)
spin_unlock(&g_cpu_paused[cpu]);
/* Wait for the spinlock to be released. The requesting CPU will release
* the spinlcok when the CPU is resumed.
* the spinlock when the CPU is resumed.
*/
spin_lock(&g_cpu_wait[cpu]);

2
arch/arm/src/armv7-a/arm_cpustart.c
View file

@ -143,7 +143,7 @@ int arm_start_handler(int irq, FAR void *context, FAR void *arg)
*
* Each CPU is provided the entry point to is IDLE task when started. A
* TCB for each CPU's IDLE task has been initialized and placed in the
* CPU's g_assignedtasks[cpu] list. Not stack has been alloced or
* CPU's g_assignedtasks[cpu] list. Not stack has been allocated or
* initialized.
*
* The OS initialization logic calls this function repeatedly until each

2
arch/arm/src/armv7-a/arm_l2cc_pl310.c
View file

@ -179,7 +179,7 @@
/* Bit 26: Non-Secure Lockdown Enable
*
* Default: 0=Lockdown registers cannot be modified using non-secure acceses
* Default: 0=Lockdown registers cannot be modified using non-secure accesses
*/
#define L2CC_ACR_NSLEN_CONFIG (0) /* 0=Secure access only */

2
arch/arm/src/armv7-a/arm_vfork.S
View file

@ -79,7 +79,7 @@
* - Allocation of the child task's TCB.
* - Initialization of file descriptors and streams
* - Configuration of environment variables
* - Setup the intput parameters for the task.
* - Setup the input parameters for the task.
* - Initialization of the TCB (including call to up_initial_state()
* 4) up_vfork() provides any additional operating context. up_vfork must:
* - Allocate and initialize the stack

10
arch/arm/src/armv7-a/cp15_cacheops.h
View file

@ -158,7 +158,7 @@
#define CACHE_VA_MASK (0xfffffffe0) /* Bits 5-31: Virtual address */
/************************************************************************************
* Assemby Macros
* Assembly Macros
************************************************************************************/
/* cp15_cache Cache Operations
*
@ -277,7 +277,7 @@
* Name: cp15_invalidate_icache_inner_sharable
*
* Description:
* Invalidate I cache predictor array inner sharable
* Invalidate I cache predictor array inner shareable
*
* Input Parameters:
* None
@ -296,7 +296,7 @@
* Name: cp15_invalidate_btb_inner_sharable
*
* Description:
* Invalidate entire branch predictor array inner sharable
* Invalidate entire branch predictor array inner shareable
*
* Input Parameters:
* None
@ -632,7 +632,7 @@ static inline void cp15_disable_icache(void)
* Name: cp15_invalidate_icache_inner_sharable
*
* Description:
* Invalidate I cache predictor array inner sharable
* Invalidate I cache predictor array inner shareable
*
* Input Parameters:
* None
@ -658,7 +658,7 @@ static inline void cp15_invalidate_icache_inner_sharable(void)
* Name: cp15_invalidate_btb_inner_sharable
*
* Description:
* Invalidate entire branch predictor array inner sharable
* Invalidate entire branch predictor array inner shareable
*
* Input Parameters:
* None

2
arch/arm/src/armv7-a/mmu.h
View file

@ -889,7 +889,7 @@ struct section_mapping_s
#endif
/************************************************************************************
* Assemby Macros
* Assembly Macros
************************************************************************************/
#ifdef __ASSEMBLY__

4
arch/arm/src/armv7-a/mpcore.h
View file

@ -61,9 +61,9 @@
#define MPCORE_SCU_OFFSET 0x0000 /* 0x0000-0x00fc SCU registers */
#ifdef CONFIG_ARCH_CORTEXA7
#define MPCORE_ICC_OFFSET 0x2000 /* 0x0000-0x00FC Interrupt conroller interface */
#define MPCORE_ICC_OFFSET 0x2000 /* 0x0000-0x00FC Interrupt controller interface */
#else
#define MPCORE_ICC_OFFSET 0x0100 /* 0x0000-0x00FC Interrupt conroller interface */
#define MPCORE_ICC_OFFSET 0x0100 /* 0x0000-0x00FC Interrupt controller interface */
#endif
#define MPCORE_GTM_OFFSET 0x0200 /* 0x0200-0x02ff Global timer */
/* 0x0300-0x05ff Reserved */

2
arch/arm/src/armv7-a/sctlr.h
View file

@ -261,7 +261,7 @@
/* TODO: To be provided */
/************************************************************************************
* Assemby Macros
* Assembly Macros
************************************************************************************/
#ifdef __ASSEMBLY__

2
arch/arm/src/armv7-m/Kconfig
View file

@ -78,7 +78,7 @@ config ARMV7M_BASEPRI_WAR
This update is required to be serialized to the instruction stream
meaning that after this update completes, it takes effect
immediately and no exceptions of lower priority than the new boosted
priority can pre-empt execution. Because of this erratum, the
priority can preempt execution. Because of this erratum, the
priority boosting does not take place immediately, allowing the
instruction after the MSR to be interrupted by an exception of
lower priority than the new boosted priority. This effect is only

2
arch/arm/src/armv7-m/etm.h
View file

@ -276,7 +276,7 @@
#define _ETM_ETMCCR_TRACESS_MASK 0x4000000UL /* Bit mask for ETM_TRACESS */
#define _ETM_ETMCCR_TRACESS_DEFAULT 0x00000001UL /* Mode DEFAULT for ETM_ETMCCR */
#define ETM_ETMCCR_TRACESS_DEFAULT (_ETM_ETMCCR_TRACESS_DEFAULT << 26) /* Shifted mode DEFAULT for ETM_ETMCCR */
#define ETM_ETMCCR_MMACCESS (0x1UL << 27) /* Coprocessor and Memeory Access */
#define ETM_ETMCCR_MMACCESS (0x1UL << 27) /* Coprocessor and Memory Access */
#define _ETM_ETMCCR_MMACCESS_SHIFT 27 /* Shift value for ETM_MMACCESS */
#define _ETM_ETMCCR_MMACCESS_MASK 0x8000000UL /* Bit mask for ETM_MMACCESS */
#define _ETM_ETMCCR_MMACCESS_DEFAULT 0x00000001UL /* Mode DEFAULT for ETM_ETMCCR */

2
arch/arm/src/armv7-m/gnu/up_setjmp.S
View file

@ -120,7 +120,7 @@ setjmp:
* control back to the point where setjmp() was called and to restore ("rewind")
* the stack to its state at the time of the setjmp() call. When control is
* passed back to where setjmp() had been called, setjmp() will return with
* 'val', the second paramater passed to longjmp().
* 'val', the second parameter passed to longjmp().
*
* C Function Prototype:
* void longjmp(jmp_buf env, int val);

2
arch/arm/src/armv7-m/gnu/vfork.S
View file

@ -79,7 +79,7 @@
* - Allocation of the child task's TCB.
* - Initialization of file descriptors and streams
* - Configuration of environment variables
* - Setup the intput parameters for the task.
* - Setup the input parameters for the task.
* - Initialization of the TCB (including call to up_initial_state()
* 4) up_vfork() provides any additional operating context. up_vfork must:
* - Allocate and initialize the stack

2
arch/arm/src/armv7-m/iar/vfork.S
View file

@ -80,7 +80,7 @@
* - Allocation of the child task's TCB.
* - Initialization of file descriptors and streams
* - Configuration of environment variables
* - Setup the intput parameters for the task.
* - Setup the input parameters for the task.
* - Initialization of the TCB (including call to up_initial_state()
* 4) up_vfork() provides any additional operating context. up_vfork must:
* - Allocate and initialize the stack

2
arch/arm/src/armv7-m/mpu.h
View file

@ -127,7 +127,7 @@
# define MPU_RASR_B (1 << 16) /* Bit 16: Bufferable */
# define MPU_RASR_C (1 << 17) /* Bit 17: Cacheable */
# define MPU_RASR_S (1 << 18) /* Bit 18: Shareable */
# define MPU_RASR_TEX_SHIFT (19) /* Bits 19-21: TEX Address Permisson */
# define MPU_RASR_TEX_SHIFT (19) /* Bits 19-21: TEX Address Permission */
# define MPU_RASR_TEX_MASK (7 << MPU_RASR_TEX_SHIFT)
# define MPU_RASR_TEX_SO (0 << MPU_RASR_TEX_SHIFT) /* Strongly Ordered */
# define MPU_RASR_TEX_NOR (1 << MPU_RASR_TEX_SHIFT) /* Normal */

4
arch/arm/src/armv7-m/nvic.h
View file

@ -195,7 +195,7 @@
#define NVIC_CPUID_BASE_OFFSET 0x0d00 /* CPUID base register */
#define NVIC_INTCTRL_OFFSET 0x0d04 /* Interrupt control state register */
#define NVIC_VECTAB_OFFSET 0x0d08 /* Vector table offset register */
#define NVIC_AIRCR_OFFSET 0x0d0c /* Application interrupt/reset contol registr */
#define NVIC_AIRCR_OFFSET 0x0d0c /* Application interrupt/reset control registr */
#define NVIC_SYSCON_OFFSET 0x0d10 /* System control register */
#define NVIC_CFGCON_OFFSET 0x0d14 /* Configuration control register */
#define NVIC_SYSH_PRIORITY_OFFSET(n) (0x0d14 + 4*((n) >> 2))
@ -518,7 +518,7 @@
#define NVIC_CFGCON_UNALIGNTRP (1 << 3) /* Bit 3: Enables unaligned access traps */
#define NVIC_CFGCON_DIV0TRP (1 << 4) /* Bit 4: Enables fault on divide-by-zero */
#define NVIC_CFGCON_BFHFNMIGN (1 << 8) /* Bit 8: Disables data bus faults */
#define NVIC_CFGCON_STKALIGN (1 << 9) /* Bit 9: Indicates stack alignment on exeption */
#define NVIC_CFGCON_STKALIGN (1 << 9) /* Bit 9: Indicates stack alignment on exception */
/* Cortex-M7: */
#define NVIC_CFGCON_DC (1 << 16) /* Bit 16: Data cache enable */
#define NVIC_CFGCON_IC (1 << 17) /* Bit 17: Instruction cache enable */

2
arch/arm/src/armv7-m/up_svcall.c
View file

@ -172,7 +172,7 @@ int up_svcall(int irq, FAR void *context, FAR void *arg)
* R0 = SYS_save_context
* R1 = saveregs
*
* In this case, we simply need to copy the current regsters to the
* In this case, we simply need to copy the current registers to the
* save register space references in the saved R1 and return.
*/

2
arch/arm/src/armv7-m/up_unblocktask.c
View file

@ -64,7 +64,7 @@
* tcb: Refers to the tcb to be unblocked. This tcb is
* in one of the waiting tasks lists. It must be moved to
* the ready-to-run list and, if it is the highest priority
* ready to run taks, executed.
* ready to run task, executed.
*
****************************************************************************/

2
arch/arm/src/armv7-r/Kconfig
View file

@ -30,7 +30,7 @@ config ARMV7R_HAVE_L2CC
bool
default n
---help---
Selected by the configuration tool if the architecutre supports any
Selected by the configuration tool if the architecture supports any
kind of L2 cache.
config ARMV7R_HAVE_L2CC_PL310

2
arch/arm/src/armv7-r/arm_l2cc_pl310.c
View file

@ -179,7 +179,7 @@
/* Bit 26: Non-Secure Lockdown Enable
*
* Default: 0=Lockdown registers cannot be modified using non-secure acceses
* Default: 0=Lockdown registers cannot be modified using non-secure accesses
*/
#define L2CC_ACR_NSLEN_CONFIG (0) /* 0=Secure access only */

2
arch/arm/src/armv7-r/arm_vfork.S
View file

@ -79,7 +79,7 @@
* - Allocation of the child task's TCB.
* - Initialization of file descriptors and streams
* - Configuration of environment variables
* - Setup the intput parameters for the task.
* - Setup the input parameters for the task.
* - Initialization of the TCB (including call to up_initial_state()
* 4) up_vfork() provides any additional operating context. up_vfork must:
* - Allocate and initialize the stack

10
arch/arm/src/armv7-r/cp15_cacheops.h
View file

@ -166,7 +166,7 @@
#define CACHE_VA_MASK (0xfffffffe0) /* Bits 5-31: Virtual address */
/************************************************************************************
* Assemby Macros
* Assembly Macros
************************************************************************************/
/* cp15_cache Cache Operations
*
@ -285,7 +285,7 @@
* Name: cp15_invalidate_icache_inner_sharable
*
* Description:
* Invalidate I cache predictor array inner sharable
* Invalidate I cache predictor array inner shareable
*
* Input Parameters:
* None
@ -304,7 +304,7 @@
* Name: cp15_invalidate_btb_inner_sharable
*
* Description:
* Invalidate entire branch predictor array inner sharable
* Invalidate entire branch predictor array inner shareable
*
* Input Parameters:
* None
@ -640,7 +640,7 @@ static inline void cp15_disable_icache(void)
* Name: cp15_invalidate_icache_inner_sharable
*
* Description:
* Invalidate I cache predictor array inner sharable
* Invalidate I cache predictor array inner shareable
*
* Input Parameters:
* None
@ -666,7 +666,7 @@ static inline void cp15_invalidate_icache_inner_sharable(void)
* Name: cp15_invalidate_btb_inner_sharable
*
* Description:
* Invalidate entire branch predictor array inner sharable
* Invalidate entire branch predictor array inner shareable
*
* Input Parameters:
* None

2
arch/arm/src/armv7-r/mpcore.h
View file

@ -60,7 +60,7 @@
/* Peripheral Base Offsets **************************************************/
#define MPCORE_SCU_OFFSET 0x0000 /* 0x0000-0x00fc SCU registers */
#define MPCORE_ICC_OFFSET 0x2000 /* 0x0000-0x00FC Interrupt conroller interface */
#define MPCORE_ICC_OFFSET 0x2000 /* 0x0000-0x00FC Interrupt controller interface */
#define MPCORE_GTM_OFFSET 0x0200 /* 0x0200-0x02ff Global timer */
/* 0x0300-0x05ff Reserved */
#define MPCORE_PTM_OFFSET 0x0600 /* 0x0600-0x06ff Private timers and watchdogs */

14
arch/arm/src/armv7-r/mpu.h
View file

@ -216,7 +216,7 @@ static inline unsigned int mpu_get_mpuir(void)
* Name: mpu_set_drbar
*
* Description:
* Wrtie to the DRBAR register
* Write to the DRBAR register
*
****************************************************************************/
@ -235,7 +235,7 @@ static inline void mpu_set_drbar(unsigned int drbar)
* Name: mpu_set_drsr
*
* Description:
* Wrtie to the DRSR register
* Write to the DRSR register
*
****************************************************************************/
@ -254,7 +254,7 @@ static inline void mpu_set_drsr(unsigned int drsr)
* Name: mpu_set_dracr
*
* Description:
* Wrtie to the DRACR register
* Write to the DRACR register
*
****************************************************************************/
@ -273,7 +273,7 @@ static inline void mpu_set_dracr(unsigned int dracr)
* Name: mpu_set_irbar
*
* Description:
* Wrtie to the IRBAR register
* Write to the IRBAR register
*
****************************************************************************/
@ -294,7 +294,7 @@ static inline void mpu_set_irbar(unsigned int irbar)
* Name: mpu_set_irsr
*
* Description:
* Wrtie to the IRSR register
* Write to the IRSR register
*
****************************************************************************/
@ -315,7 +315,7 @@ static inline void mpu_set_irsr(unsigned int irsr)
* Name: mpu_set_iracr
*
* Description:
* Wrtie to the IRCR register
* Write to the IRCR register
*
****************************************************************************/
@ -336,7 +336,7 @@ static inline void mpu_set_iracr(unsigned int iracr)
* Name: mpu_set_rgnr
*
* Description:
* Wrtie to the IRCR register
* Write to the IRCR register
*
****************************************************************************/

4
arch/arm/src/armv7-r/sctlr.h
View file

@ -376,7 +376,7 @@
/* Implementation defined */
/************************************************************************************
* Assemby Macros
* Assembly Macros
************************************************************************************/
#ifdef __ASSEMBLY__
@ -463,7 +463,7 @@ static inline void cp15_wrsctlr(unsigned int sctlr)
);
}
/* Read/write the implementation defined Auxiliary Control Regster (ACTLR) */
/* Read/write the implementation defined Auxiliary Control Register (ACTLR) */
static inline unsigned int cp15_rdactlr(void)
{

4
arch/arm/src/c5471/c5471_ethernet.c
View file

@ -727,7 +727,7 @@ static int c5471_mdread (int adr, int reg)
* internal registers allowing host configuration and status access. These
* internal registers are accessible by clocking serial data in/out of the
* MDIO pin of the LU3X31T-T64 chip. For c547X, the MDC and the MDIO pins
* are connected to the C547x GPIO15 and GPIO14 pins respectivley. Host
* are connected to the C547x GPIO15 and GPIO14 pins respectively. Host
* software twiddles the GPIO pins appropriately to get data serially into
* and out of the chip. This is typically a one time operation at boot and
* normal operation of the transeiver involves EIM/Transeiver interaction at
@ -1599,7 +1599,7 @@ static void c5471_interrupt_work(FAR void *arg)
if ((EIM_STATUS_CPU_RX & priv->c_eimstatus) != 0)
{
/* An outgoing packet has been processed by the EIM and the interrupt
* associated with EIM's CPU RX que has been asserted. It is the EIM's
* associated with EIM's CPU RX queue has been asserted. It is the EIM's
* CPU RX queue that we put packets on to send them *out*. TWe use this
* terminology to stay consistent with the Orion documentation.
*/

4
arch/arm/src/c5471/c5471_lowputc.S
View file

@ -106,8 +106,8 @@ up_lowputc:
str r0, [r2, #UART_THR_OFFS]
/* Wait for the tranmsit holding regiser (THR) to be
* emptied. This is detemined when bit 6 of the LSR
/* Wait for the tranmsit holding register (THR) to be
* emptied. This is determined when bit 6 of the LSR
* is set.
*/

4
arch/arm/src/c5471/c5471_serial.c
View file

@ -528,7 +528,7 @@ static void up_detach(struct uart_dev_s *dev)
* when an interrupt received on the 'irq' It should call
* uart_transmitchars or uart_receivechar to perform the
* appropriate data transfers. The interrupt handling logic\
* must be able to map the 'irq' number into the approprite
* must be able to map the 'irq' number into the appropriate
* uart_dev_s structure in order to call these functions.
*
****************************************************************************/
@ -789,7 +789,7 @@ static bool up_txempty(struct uart_dev_s *dev)
}
/****************************************************************************
* Public Funtions
* Public Functions
****************************************************************************/
#ifdef USE_EARLYSERIALINIT

2
arch/arm/src/c5471/c5471_watchdog.c
View file

@ -254,7 +254,7 @@ static int wdt_interrupt(int irq, void *context, FAR void *arg)
static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen)
{
/* We are going to return "NNNNNNNN NNNNNNNN." The followig logic will
/* We are going to return "NNNNNNNN NNNNNNNN." The following logic will
* not work if the user provides a buffer smaller than 18 bytes.
*/

2
arch/arm/src/c5471/chip.h
View file

@ -53,7 +53,7 @@
#define EIM_CPU_TXBA 0xffff0008 /* CPU TX descriptors base address */
#define EIM_CPU_RXBA 0xffff000c /* CPU RX descriptors base address */
#define EIM_BUFSIZE 0xffff0010 /* Packet buffer size register */
#define EIM_CPU_FILTER 0xffff0014 /* CPU filtering contol registers */
#define EIM_CPU_FILTER 0xffff0014 /* CPU filtering control registers */
#define EIM_CPU_DAHI 0xffff0018 /* CPU destination address (HI) */
#define EIM_CPU_DALO 0xffff001c /* CPU destination address (LO) */
#define EIM_MFVHI 0xffff0020 /* Multicast filter valid (HI) */

4
arch/arm/src/cxd56xx/Kconfig
View file

@ -92,7 +92,7 @@ config CXD56_FARAPI_VERSION_CHECK
default y
---help---
Enable the Far API version compatibility check. If the version
mismatch is deteced during system bootup, the target system shows
mismatch is detected during system bootup, the target system shows
the message to update the loader and gnssfw firmwares.
if CXD56_FARAPI_VERSION_CHECK
@ -1026,7 +1026,7 @@ config CXD56_SFC_VERIFY_WRITE
bool "Enable write with verify"
default n
---help---
Enalbe SPI flash write function with verify.
Enable SPI flash write function with verify.
endif # CXD56_SFC

2
arch/arm/src/cxd56xx/cxd56_adc.c
View file

@ -143,7 +143,7 @@ typedef enum adc_ch
struct cxd56adc_dev_s
{
adc_ch_t ch; /* adc cnannel number */
adc_ch_t ch; /* adc channel number */
FAR struct seq_s *seq; /* sequencer */
uint8_t freq; /* coefficient of adc sampling frequency */
uint16_t fsize; /* SCU FIFO size */

2
arch/arm/src/cxd56xx/cxd56_cisif.c
View file

@ -91,7 +91,7 @@
#define YUV_SIZE(v, h) (v * h * 2)
/* Check Buffer address alignement */
/* Check Buffer address alignment */
#define CISIF_BUFADDR_ALIGNMENT (32)
#define ILLEGAL_BUFADDR_ALIGNMENT(addr) (((addr) == NULL) || \

2
arch/arm/src/cxd56xx/cxd56_config.h
View file

@ -56,7 +56,7 @@
# define HAVE_UART 1
#endif
/* Make sure all features are disabled for diabled U[S]ARTs. This simplifies
/* Make sure all features are disabled for disabled U[S]ARTs. This simplifies
* checking later.
*/

4
arch/arm/src/cxd56xx/cxd56_cpustart.c
View file

@ -155,7 +155,7 @@ static void appdsp_boot(void)
*
* Each CPU is provided the entry point to is IDLE task when started. A
* TCB for each CPU's IDLE task has been initialized and placed in the
* CPU's g_assignedtasks[cpu] list. Not stack has been alloced or
* CPU's g_assignedtasks[cpu] list. Not stack has been allocated or
* initialized.
*
* The OS initialization logic calls this function repeatedly until each
@ -236,7 +236,7 @@ int up_cpu_start(int cpu)
putreg32(0, CXD56_CPU_P2_INT);
/* Setup SW_INT fot this APP_DSP0 */
/* Setup SW_INT for this APP_DSP0 */
irq_attach(CXD56_IRQ_SW_INT, arm_pause_handler, NULL);
up_enable_irq(CXD56_IRQ_SW_INT);

2
arch/arm/src/cxd56xx/cxd56_irq.c
View file

@ -448,7 +448,7 @@ void up_disable_irq(int irq)
return;
}
/* If a defferent cpu requested, send an irq request */
/* If a different cpu requested, send an irq request */
if (cpu != (int8_t)up_cpu_index())
{

8
arch/arm/src/cxd56xx/cxd56_pmic.c
View file

@ -281,7 +281,7 @@ static int pmic_int_handler(int irq, void *context, void *arg)
*
* Description:
* Get Raw Interrupt Status register. And furthermore, if status is set,
* then clear the interrupt. Register's decription is below:
* then clear the interrupt. Register's description is below:
*
* 7 6 5 4 3 2 1 0
* +---------------+-----+-----+-----+-----+
@ -306,7 +306,7 @@ int cxd56_pmic_get_interrupt_status(uint8_t *status)
* Name: cxd56_pmic_set_gpo_reg
*
* Description:
* Set GPO register. Register's decription is below:
* Set GPO register. Register's description is below:
*
* 7 6 5 4 3 2 1 0
* +---+---+---+---+---+---+---+---+
@ -489,7 +489,7 @@ bool cxd56_pmic_get_gpo(uint8_t chset)
* Name: cxd56_pmic_set_loadswitch_reg
*
* Description:
* Set LoadSwitch register. Register's decription is below:
* Set LoadSwitch register. Register's description is below:
*
* 7 6 5 4 3 2 1 0
* +---+---+---+---+---+---+---+---+
@ -585,7 +585,7 @@ bool cxd56_pmic_get_loadswitch(uint8_t chset)
* Name: cxd56_pmic_set_ddc_ldo_reg
*
* Description:
* Set DDC/LDO register. Register's decription is below:
* Set DDC/LDO register. Register's description is below:
*
* 7 6 5 4 3 2 1 0
* +----+----+----+----+----+----+----+----+

8
arch/arm/src/cxd56xx/cxd56_pmic.h
View file

@ -213,7 +213,7 @@ extern "C"
*
* Description:
* Get Raw Interrupt Status register. And furthermore, if status is set,
* then clear the interrupt. Register's decription is below:
* then clear the interrupt. Register's description is below:
*
* 7 6 5 4 3 2 1 0
* +---------------+-----+-----+-----+-----+
@ -235,7 +235,7 @@ int cxd56_pmic_get_interrupt_status(FAR uint8_t *status);
* Name: cxd56_pmic_set_gpo_reg
*
* Description:
* Set GPO register. Register's decription is below:
* Set GPO register. Register's description is below:
*
* 7 6 5 4 3 2 1 0
* +---+---+---+---+---+---+---+---+
@ -313,7 +313,7 @@ bool cxd56_pmic_get_gpo(uint8_t chset);
* Name: cxd56_pmic_set_loadswitch_reg
*
* Description:
* Set LoadSwitch register. Register's decription is below:
* Set LoadSwitch register. Register's description is below:
*
* 7 6 5 4 3 2 1 0
* +---+---+---+---+---+---+---+---+
@ -371,7 +371,7 @@ bool cxd56_pmic_get_loadswitch(uint8_t chset);
* Name: cxd56_pmic_set_ddc_ldo_reg
*
* Description:
* Set DDC/LDO register. Register's decription is below:
* Set DDC/LDO register. Register's description is below:
*
* 7 6 5 4 3 2 1 0
* +----+----+----+----+----+----+----+----+

6
arch/arm/src/cxd56xx/cxd56_powermgr.c
View file

@ -217,7 +217,7 @@ static int cxd56_pmsendmsg(int mid, uint32_t data)
iccmsg_t msg;
msg.cpuid = 0;
msg.msgid = 0; /* Power manger message does not used this field. */
msg.msgid = 0; /* Power manager message does not used this field. */
msg.protodata = mid;
msg.data = data;
return cxd56_iccsend(CXD56_PROTO_PM, &msg, 0);
@ -869,7 +869,7 @@ uint32_t up_pm_get_bootmask(void)
* Enable the boot cause of the specified bit.
*
* Parameter:
* mask - OR of Boot mask definied as PM_BOOT_XXX
* mask - OR of Boot mask defined as PM_BOOT_XXX
*
* Return:
* Updated boot mask
@ -908,7 +908,7 @@ uint32_t up_pm_set_bootmask(uint32_t mask)
* Disable the boot cause of the specified bit.
*
* Parameter:
* mask - OR of Boot mask definied as PM_BOOT_XXX
* mask - OR of Boot mask defined as PM_BOOT_XXX
*
* Return:
* Updated boot mask

2
arch/arm/src/cxd56xx/cxd56_pwm.c
View file

@ -258,7 +258,7 @@ static int convert_freq2period(uint32_t freq, ub16_t duty, uint32_t *param)
return -1;
}
/* calcurate period and offperiod */
/* calculate period and offperiod */
period = (pwmfreq * 10 / freq - 5) / 10;
if (period > 0xffff)

2
arch/arm/src/cxd56xx/cxd56_rtc.h
View file

@ -64,7 +64,7 @@ enum alm_id_e
RTC_ALARM2, /* RTC ALARM 2 (relative) */
};
/* Structure used to pass parmaters to set an alarm */
/* Structure used to pass parameters to set an alarm */
struct alm_setalarm_s
{

6
arch/arm/src/cxd56xx/cxd56_sdhci.c
View file

@ -573,7 +573,7 @@ static void cxd56_takesem(struct cxd56_sdiodev_s *priv)
* Name: cxd56_configwaitints
*
* Description:
* Enable/disable SDIO interrupts needed to suport the wait function
* Enable/disable SDIO interrupts needed to support the wait function
*
* Input Parameters:
* priv - A reference to the SDIO device state structure
@ -1955,7 +1955,7 @@ static int cxd56_sdio_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd,
* Name: cxd56_blocksetup
*
* Description:
* Some hardward needs to be informed of the selected blocksize.
* Some hardware needs to be informed of the selected blocksize.
*
* Input Parameters:
* dev - An instance of the SDIO device interface
@ -4516,7 +4516,7 @@ FAR struct sdio_dev_s *cxd56_sdhci_initialize(int slotno)
struct cxd56_sdiodev_s *priv = &g_sdhcdev;
DEBUGASSERT(slotno == 0);
/* Initalize the pins */
/* Initialize the pins */
board_sdcard_pin_initialize();

2
arch/arm/src/cxd56xx/cxd56_sdhci.h
View file

@ -82,7 +82,7 @@ extern "C"
#define CXD56_SDHCI_FEVT_OFFSET (0x0050) /* Force Event Register */
#define CXD56_SDHCI_ADMAES_OFFSET (0x0054) /* ADMA Error Status Register */
#define CXD56_SDHCI_ADSADDR_OFFSET (0x0058) /* ADMA System Address Register */
#define CXD56_SDHCI_VENDSPEC_OFFSET (0x0110) /* Vender Specific Control */
#define CXD56_SDHCI_VENDSPEC_OFFSET (0x0110) /* Vendor Specific Control */
#define CXD56_SDHCI_OTHERIOLL_OFFSET (0x021C) /* IO Pin Control */
#define CXD56_SDHCI_USERDEF1CTL_OFFSET (0x0270) /* User Define1 Control Register */
#define CXD56_SDHCI_USERDEF2CTL_OFFSET (0x0274) /* User Define2 Control Register */

2
arch/arm/src/cxd56xx/cxd56_serial.c
View file

@ -880,7 +880,7 @@ static bool up_txempty(FAR struct uart_dev_s *dev)
}
/****************************************************************************
* Public Funtions
* Public Functions
****************************************************************************/
/****************************************************************************

8
arch/arm/src/cxd56xx/cxd56_spi.c
View file

@ -82,7 +82,7 @@
* Private Types
****************************************************************************/
/* This structure descibes the state of the SPI driver */
/* This structure describes the state of the SPI driver */
struct cxd56_spidev_s
{
@ -399,12 +399,12 @@ static inline void spi_putreg(FAR struct cxd56_spidev_s *priv, uint8_t offset,
* Name: spi_lock
*
* Description:
* On SPI busses where there are multiple devices, it will be necessary to
* lock SPI to have exclusive access to the busses for a sequence of
* On SPI buses where there are multiple devices, it will be necessary to
* lock SPI to have exclusive access to the buses for a sequence of
* transfers. The bus should be locked before the chip is selected. After
* locking the SPI bus, the caller should then also call the setfrequency,
* setbits, and setmode methods to make sure that the SPI is properly
* configured for the device. If the SPI buss is being shared, then it
* configured for the device. If the SPI bus is being shared, then it
* may have been left in an incompatible state.
*
* Input Parameters:

2
arch/arm/src/cxd56xx/cxd56_start.c
View file

@ -49,7 +49,7 @@
* chip is disabled at reset. The boot ROM determines the boot mode based on
* the OTP BOOT_SRC value or reset state pins. For flash-based parts,
* the part boots from internal flash by default.
* Otherwse, the boot ROM copies the image to internal SRAM at location
* Otherwise, the boot ROM copies the image to internal SRAM at location
* 0x1000:0000, sets the ARM's shadow pointer to 0x1000:0000,
* and jumps to that location.
*

2
arch/arm/src/cxd56xx/cxd56_uart.c
View file

@ -172,7 +172,7 @@ static uint32_t g_cr;
* Configure the UART pin
*
* Input Parameter:
* ch - channel numer
* ch - channel number
* on - true: enable pin, false: disable pin
*
****************************************************************************/

2
arch/arm/src/cxd56xx/cxd56_usbdev.c
View file

@ -3031,7 +3031,7 @@ static int cxd56_vbusninterrupt(int irq, FAR void *context, FAR void *arg)
up_disable_irq(CXD56_IRQ_USB_INT);
up_disable_irq(CXD56_IRQ_USB_SYS);
/* Notify dettach signal */
/* Notify detach signal */
priv->power = 0;
cxd56_notify_signal(USBDEV_STATE_DETACH, priv->power);

10
arch/arm/src/cxd56xx/cxd56_wdt.c
View file

@ -106,7 +106,7 @@ static void cxd56_putreg(uint32_t regval, uintptr_t regaddr);
# define cxd56_putreg(regval, regaddr) putreg32(regval, regaddr)
#endif
/* Interrupt hanlding *******************************************************/
/* Interrupt handling *******************************************************/
#ifdef CONFIG_CXD56_WDT_INTERRUPT
static int cxd56_wdtinterrupt(int irq, FAR void *context, FAR void *arg);
@ -175,7 +175,7 @@ static uint32_t cxd56_getreg(uintptr_t regaddr)
uint32_t regval = getreg32(regaddr);
/* Is this the same value that we read from the same registe last time? Are
/* Is this the same value that we read from the same register last time? Are
* we polling the register? If so, suppress some of the output.
*/
@ -400,7 +400,7 @@ static int cxd56_getstatus(FAR struct watchdog_lowerhalf_s *lower,
status->timeout = priv->timeout;
/* Get the time remaining until the watchdog expires (in miliseconds) */
/* Get the time remaining until the watchdog expires (in milliseconds) */
remain = (uint64_t)cxd56_getreg(CXD56_WDT_WDOGVALUE);
status->timeleft = (uint32_t)(remain * 1000 / cxd56_get_cpu_baseclk());
@ -448,7 +448,7 @@ static int cxd56_settimeout(FAR struct watchdog_lowerhalf_s *lower,
return -EINVAL;
}
/* Calculate the reload value to achiee this (appoximate) timeout. */
/* Calculate the reload value to achiee this (approximate) timeout. */
freq = cxd56_get_cpu_baseclk();
@ -481,7 +481,7 @@ static int cxd56_settimeout(FAR struct watchdog_lowerhalf_s *lower,
priv->reload = reload;
wdinfo("reload=%u timout: %d->%d\n", reload, timeout, priv->timeout);
wdinfo("reload=%u timeout: %d->%d\n", reload, timeout, priv->timeout);
/* Set the WDT register according to calculated value */

2
arch/arm/src/cxd56xx/hardware/cxd56_emmc.h
View file

@ -287,7 +287,7 @@
/* 4bit: Reserved.
* 3-2bit: Reserved for application specific command
* 1-0bit: Reserved for manifacturer testmode
* 1-0bit: Reserved for manufacturer testmode
*/
#define R1STATUS_ALL_ERR \

2
arch/arm/src/cxd56xx/hardware/cxd56_spi.h
View file

@ -187,7 +187,7 @@
#define SPI_INT_ROR (1 << 0) /* Bit 0: RX FIFO overrun */
#define SPI_INT_RT (1 << 1) /* Bit 1: RX FIFO timeout */
#define SPI_INT_RX (1 << 2) /* Bit 2: RX FIFO at least half full */
#define SPI_INT_TX (1 << 3 ) /* Bit 3: TX FIFO at least half empy */
#define SPI_INT_TX (1 << 3 ) /* Bit 3: TX FIFO at least half empty */
/* Bits 4-31: Reserved */
/* DMA Control Register */

2
arch/arm/src/cxd56xx/hardware/cxd56_timer.h
View file

@ -59,7 +59,7 @@
#define CXD56_TIMER_INTCLR (0x000C) /* Clear Interrupt register [WO] */
#define CXD56_TIMER_RIS (0x0010) /* Raw Interrupt Status register [RO] */
#define CXD56_TIMER_MIS (0x0014) /* Interrupt Status register [RO] */
#define CXD56_TIMER_BGLOAD (0x0018) /* Backround Load register [RO] */
#define CXD56_TIMER_BGLOAD (0x0018) /* Background Load register [RO] */
#define CXD56_TIMER_ITCR (0x0F00) /* Integration Test Control register */
#define CXD56_TIMER_ITOP (0x0F04) /* Integration Test Output register [WO] */
#define CXD56_TIMER_PERIPHID0 (0x0FE0) /* Peripheral ID0 register [RO] */

4
arch/arm/src/dm320/dm320_framebuffer.c
View file

@ -514,7 +514,7 @@ static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR const struct fb_cma
#endif
#ifdef CONFIG_FB_HWCURSOR
static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursorattrib_s *attrib);
static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcursor_s *setttings);
static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcursor_s *settings);
#endif
/****************************************************************************
@ -941,7 +941,7 @@ static void dm320_hwinitialize(void)
* Bits 113: Vertical line height: {1,2,4,6,8,10,12,14} CONFIG_DM320_CURSORLINEHEIGHT
* 4:6: Horizontal line width: {1,4,8,16,20,24,28} CONFIG_DM320_CURSORLINEWIDTH
* 7: 0=ROM lookup table, 1=RAM lookup table 0
* 8:15: Rectangular cursor color pallette address CONFIG_DM320_CURSORCLUT
* 8:15: Rectangular cursor color palette address CONFIG_DM320_CURSORCLUT
*/
putreg16(DM320_RECTCURSOR_SETUP, DM320_OSD_RECTCUR);

2
arch/arm/src/dm320/dm320_irq.c
View file

@ -216,7 +216,7 @@ void up_enable_irq(int irq)
void up_ack_irq(int irq)
{
/* Acknowlege the interrupt by setting the corresponding bit in the
/* Acknowledge the interrupt by setting the corresponding bit in the
* IRQ status register.
*/

4
arch/arm/src/dm320/dm320_lowputc.S
View file

@ -108,8 +108,8 @@ up_lowputc:
strh r0, [r2, #UART_DTRR]
/* Wait for the tranmsit regiser to be emptied. This is
* detemined when TX register empty bit of the SR is zero.
/* Wait for the tranmsit register to be emptied. This is
* determined when TX register empty bit of the SR is zero.
*/
2: ldrh r1, [r2, #UART_SR]

4
arch/arm/src/dm320/dm320_memorymap.h
View file

@ -53,7 +53,7 @@
/* DM320 Physical Memory Map, where:
*
* CW = cachable with write buffering
* CW = cacheable with write buffering
* -W = Write buffering only
* -- = Neither
*
@ -73,7 +73,7 @@
* so that physical memory regions is in the board-specific files.
*/
/* Section/Region Name Phys Address Size TLB Enty CW */
/* Section/Region Name Phys Address Size TLB Entry CW */
#define DM320_PERIPHERALS_PSECTION 0x00000000 /* 1Mb 1 section -- */
#define DM320_IRAM_PADDR 0x00000000 /* 16Kb 1 large page CW */
#define DM320_PERIPHERALS_PADDR 0x00030000 /* 4Kb 1 small pages -- */

4
arch/arm/src/dm320/dm320_serial.c
View file

@ -465,7 +465,7 @@ static void up_detach(struct uart_dev_s *dev)
* when an interrupt received on the 'irq' It should call
* uart_transmitchars or uart_receivechar to perform the
* appropriate data transfers. The interrupt handling logic\
* must be able to map the 'irq' number into the approprite
* must be able to map the 'irq' number into the appropriate
* uart_dev_s structure in order to call these functions.
*
****************************************************************************/
@ -703,7 +703,7 @@ static bool up_txempty(struct uart_dev_s *dev)
}
/****************************************************************************
* Public Funtions
* Public Functions
****************************************************************************/
#ifdef USE_EARLYSERIALINIT

6
arch/arm/src/dm320/dm320_usbdev.c
View file

@ -433,7 +433,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
uint8_t val = getreg8(addr);
/* Is this the same value that we read from the same registe last time? Are
/* Is this the same value that we read from the same register last time? Are
* we polling the register? If so, suppress some of the output.
*/
@ -496,7 +496,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
uint16_t val = getreg16(addr);
/* Is this the same value that we read from the same registe last time? Are
/* Is this the same value that we read from the same register last time? Are
* we polling the register? If so, suppress some of the output.
*/
@ -559,7 +559,7 @@ static uint32_t dm320_getreg32(uint32_t addr)
uint32_t val = getreg32(addr);
/* Is this the same value that we read from the same registe last time? Are
/* Is this the same value that we read from the same register last time? Are
* we polling the register? If so, suppress some of the output.
*/

2
arch/arm/src/efm32/efm32_adc.c
View file

@ -779,7 +779,7 @@ static void adc_startconv(struct efm32_dev_s *priv, bool enable)
regval = adc_getreg(priv, EFM32_ADC_CR2_OFFSET);
if (enable)
{
/* Start conversion of regular channles */
/* Start conversion of regular channels */
regval |= ADC_CR2_SWSTART;
}

2
arch/arm/src/efm32/efm32_gpio.h
View file

@ -68,7 +68,7 @@
#define GPIO_MODE_SHIFT (12) /* Bits 12-15: Port mode */
#define GPIO_MODE_MASK (15 << GPIO_MODE_SHIFT)
#define GPIO_MODE_DOUT_SHIFT (11) /* Bit 11: Input mode modifer */
#define GPIO_MODE_DOUT_SHIFT (11) /* Bit 11: Input mode modifier */
#define GPIO_MODE_DOUT_MASK (1 << GPIO_MODE_DOUT_SHIFT)
# define GPIO_MODE_DOUT GPIO_MODE_DOUT_MASK

2
arch/arm/src/efm32/efm32_i2c.c
View file

@ -1325,7 +1325,7 @@ static int efm32_i2c_init(FAR struct efm32_i2c_priv_s *priv)
modifyreg32(EFM32_CMU_HFPERCLKEN0, 0, priv->config->clk_bit);
/* Eeset all resgister */
/* Eeset all register */
efm32_i2c_hwreset(priv);

12
arch/arm/src/efm32/efm32_rtc_burtc.c
View file

@ -107,23 +107,23 @@
#elif (BOARD_BURTC_PRESC == BURTC_CTRL_PRESC_DIV64)
# define BURTC_CLK_DIV 128
#else
# error "BOARD_BURTC_PRESC is setted with unknown value"
# error "BOARD_BURTC_PRESC is set with unknown value"
#endif
#if (BOARD_BURTC_CLKSRC == BURTC_CTRL_CLKSEL_LFRCO)
# if (CONFIG_RTC_FREQUENCY*BURTC_CLK_DIV != BOARD_LFRCO_FREQUENCY)
# error "CONFIG_RTC_FREQUENCY is not well be setted"
# error "CONFIG_RTC_FREQUENCY is not well be set"
# endif
#elif (BOARD_BURTC_CLKSRC == BURTC_CTRL_CLKSEL_LFXO)
# if (CONFIG_RTC_FREQUENCY*BURTC_CLK_DIV != BOARD_LFXO_FREQUENCY)
# error "CONFIG_RTC_FREQUENCY is not well be setted"
# error "CONFIG_RTC_FREQUENCY is not well be set"
# endif
#elif (BOARD_BURTC_CLKSRC == BURTC_CTRL_CLKSEL_ULFRCO)
# if (CONFIG_RTC_FREQUENCY*BURTC_CLK_DIV != BOARD_ULFRCO_FREQUENCY)
# error "CONFIG_RTC_FREQUENCY is not well be setted"
# error "CONFIG_RTC_FREQUENCY is not well be set"
# endif
#else
# error "BOARD_BURTC_CLKSRC badly setted !"
# error "BOARD_BURTC_CLKSRC badly set !"
#endif
#define __CNT_TOP (((uint64_t)(_BURTC_CNT_MASK))+1)
@ -266,7 +266,7 @@ static void efm32_rtc_burtc_init(void)
putreg32(BURTC_FREEZE_REGFREEZE_FREEZE, EFM32_BURTC_FREEZE);
/* Restore all not setted BURTC registers to default value */
/* Restore all not set BURTC registers to default value */
// putreg32(_BURTC_LPMODE_RESETVALUE, EFM32_BURTC_LPMODE);
// putreg32(_BURTC_LFXOFDET_RESETVALUE, EFM32_BURTC_LFXOFDET);

2
arch/arm/src/efm32/efm32_spi.c
View file

@ -802,7 +802,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
if (frequency == priv->frequency)
{
/* No... just return the actual frequency from the last calcualtion */
/* No... just return the actual frequency from the last calculation */
actual = priv->actual;
}

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