mirror of
https://github.com/apache/nuttx.git
synced 2025-01-12 20:58:44 +08:00
use small lock in following files:
arch/arm/src/am335x/am335x_can.c arch/arm/src/am335x/am335x_gpio.c arch/arm/src/am335x/am335x_i2c.c arch/arm/src/am335x/am335x_irq.c arch/arm/src/am335x/am335x_serial.c arch/arm64/src/imx9/imx9_gpio.c arch/arm64/src/imx9/imx9_lpi2c.c arch/arm64/src/imx9/imx9_lpspi.c arch/arm64/src/imx9/imx9_usbdev.c arch/x86_64/src/intel64/intel64_tsc_tickless.c Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com>
This commit is contained in:
parent
58c95f5d85
commit
d84ba608a1
10 changed files with 108 additions and 62 deletions
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@ -27,9 +27,11 @@
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#include <nuttx/config.h>
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#include <assert.h>
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#include <sched.h>
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#include <arch/board/board.h>
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#include <nuttx/irq.h>
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#include <nuttx/spinlock.h>
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#include <nuttx/arch.h>
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#include <nuttx/can/can.h>
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@ -205,6 +207,8 @@ static struct can_dev_s g_can1dev =
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};
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#endif
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static spinlock_t g_can_lock = SP_UNLOCKED;
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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@ -1079,7 +1083,8 @@ struct can_dev_s *am335x_can_initialize(int port)
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syslog(LOG_DEBUG, "CAN%d\n", port);
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flags = enter_critical_section();
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flags = spin_lock_irqsave(&g_can_lock);
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sched_lock();
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#ifdef CONFIG_AM335X_CAN0
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if (port == 0)
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@ -1109,11 +1114,13 @@ struct can_dev_s *am335x_can_initialize(int port)
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{
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canerr("Unsupported port: %d\n", port);
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leave_critical_section(flags);
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spin_unlock_irqrestore(&g_can_lock, flags);
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sched_unlock();
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return NULL;
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}
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leave_critical_section(flags);
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spin_unlock_irqrestore(&g_can_lock, flags);
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sched_unlock();
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return candev;
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}
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@ -1124,7 +1131,8 @@ void am335x_can_uninitialize(struct can_dev_s *dev)
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DEBUGASSERT(dev);
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flags = enter_critical_section();
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flags = spin_lock_irqsave(&g_can_lock);
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sched_lock();
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#ifdef CONFIG_AM335X_CAN0
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if (dev == &g_can0dev)
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@ -1151,7 +1159,8 @@ void am335x_can_uninitialize(struct can_dev_s *dev)
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canerr("Not a CAN device: %p\n", dev);
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}
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leave_critical_section(flags);
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spin_unlock_irqrestore(&g_can_lock, flags);
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sched_unlock();
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}
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#endif
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@ -31,6 +31,7 @@
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#include <errno.h>
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#include <nuttx/irq.h>
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#include <nuttx/spinlock.h>
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#include "chip.h"
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#include "arm_internal.h"
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@ -219,6 +220,8 @@ static const uint8_t *g_gpio_padctl[AM335X_GPIO_NPORTS] =
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g_gpio3_padctl, /* GPIO3 */
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};
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static spinlock_t g_gpio_lock = SP_UNLOCKED;
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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@ -364,7 +367,7 @@ int am335x_gpio_config(gpio_pinset_t pinset)
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/* Configure the pin as an input initially to avoid any spurious outputs */
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flags = enter_critical_section();
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flags = spin_lock_irqsave(&g_gpio_lock);
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/* Configure based upon the pin mode */
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@ -407,7 +410,7 @@ int am335x_gpio_config(gpio_pinset_t pinset)
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break;
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}
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leave_critical_section(flags);
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spin_unlock_irqrestore(&g_gpio_lock, flags);
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return ret;
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}
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@ -425,9 +428,9 @@ void am335x_gpio_write(gpio_pinset_t pinset, bool value)
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int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
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int pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
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flags = enter_critical_section();
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flags = spin_lock_irqsave(&g_gpio_lock);
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am335x_gpio_setoutput(port, pin, value);
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leave_critical_section(flags);
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spin_unlock_irqrestore(&g_gpio_lock, flags);
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}
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/****************************************************************************
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@ -445,9 +448,9 @@ bool am335x_gpio_read(gpio_pinset_t pinset)
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int pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
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bool value;
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flags = enter_critical_section();
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flags = spin_lock_irqsave(&g_gpio_lock);
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value = am335x_gpio_getinput(port, pin);
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leave_critical_section(flags);
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spin_unlock_irqrestore(&g_gpio_lock, flags);
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return value;
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}
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@ -37,6 +37,7 @@
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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#include <nuttx/spinlock.h>
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#include <nuttx/clock.h>
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#include <nuttx/mutex.h>
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#include <nuttx/semaphore.h>
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@ -185,6 +186,7 @@ struct am335x_i2c_priv_s
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int refs; /* Reference count */
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mutex_t lock; /* Mutual exclusion mutex */
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spinlock_t spinlock; /* Spinlock */
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#ifndef CONFIG_I2C_POLLED
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sem_t sem_isr; /* Interrupt wait semaphore */
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#endif
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@ -317,6 +319,7 @@ static struct am335x_i2c_priv_s am335x_i2c0_priv =
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.config = &am335x_i2c0_config,
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.refs = 0,
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.lock = NXMUTEX_INITIALIZER,
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.spinlock = SP_UNLOCKED,
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#ifndef CONFIG_I2C_POLLED
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.sem_isr = SEM_INITIALIZER(0),
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#endif
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@ -352,6 +355,7 @@ static struct am335x_i2c_priv_s am335x_i2c1_priv =
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.config = &am335x_i2c1_config,
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.refs = 0,
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.lock = NXMUTEX_INITIALIZER,
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.spinlock = SP_UNLOCKED,
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#ifndef CONFIG_I2C_POLLED
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.sem_isr = SEM_INITIALIZER(0),
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#endif
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@ -387,6 +391,7 @@ static struct am335x_i2c_priv_s am335x_i2c2_priv =
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.config = &am335x_i2c2_config,
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.refs = 0,
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.lock = NXMUTEX_INITIALIZER,
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.spinlock = SP_UNLOCKED,
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#ifndef CONFIG_I2C_POLLED
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.sem_isr = SEM_INITIALIZER(0),
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#endif
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@ -492,7 +497,7 @@ static inline int am335x_i2c_sem_waitdone(struct am335x_i2c_priv_s *priv)
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uint32_t regval;
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int ret;
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flags = enter_critical_section();
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flags = spin_lock_irqsave(&priv->spinlock);
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/* Enable Interrupts when master mode */
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@ -529,6 +534,8 @@ static inline int am335x_i2c_sem_waitdone(struct am335x_i2c_priv_s *priv)
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*/
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priv->intstate = INTSTATE_WAITING;
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spin_unlock_irqrestore(&priv->spinlock, flags);
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do
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{
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/* Wait until either the transfer is complete or the timeout expires */
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@ -551,6 +558,8 @@ static inline int am335x_i2c_sem_waitdone(struct am335x_i2c_priv_s *priv)
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}
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}
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flags = spin_lock_irqsave(&priv->spinlock);
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/* Loop until the interrupt level transfer is complete. */
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while (priv->intstate != INTSTATE_DONE);
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@ -563,7 +572,7 @@ static inline int am335x_i2c_sem_waitdone(struct am335x_i2c_priv_s *priv)
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am335x_i2c_putreg(priv, AM335X_I2C_IRQ_EN_CLR_OFFSET, I2C_ICR_CLEARMASK);
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leave_critical_section(flags);
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spin_unlock_irqrestore(&priv->spinlock, flags);
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return ret;
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}
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#else
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@ -992,7 +1001,7 @@ static int am335x_i2c_isr_process(struct am335x_i2c_priv_s *priv)
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*/
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#ifdef CONFIG_I2C_POLLED
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irqstate_t flags = enter_critical_section();
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irqstate_t flags = spin_lock_irqsave(&priv->spinlock);
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#endif
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/* Transmit a byte */
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@ -1001,7 +1010,7 @@ static int am335x_i2c_isr_process(struct am335x_i2c_priv_s *priv)
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priv->dcnt--;
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#ifdef CONFIG_I2C_POLLED
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leave_critical_section(flags);
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spin_unlock_irqrestore(&priv->spinlock, flags);
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#endif
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if ((priv->dcnt == 0) && ((priv->flags & I2C_M_NOSTOP) == 0))
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{
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@ -1026,7 +1035,7 @@ static int am335x_i2c_isr_process(struct am335x_i2c_priv_s *priv)
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*/
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#ifdef CONFIG_I2C_POLLED
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irqstate_t flags = enter_critical_section();
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irqstate_t flags = spin_lock_irqsave(&priv->spinlock);
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#endif
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/* Receive a byte */
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priv->dcnt--;
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#ifdef CONFIG_I2C_POLLED
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leave_critical_section(flags);
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spin_unlock_irqrestore(&priv->spinlock, flags);
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#endif
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if ((priv->msgc <= 0) && (priv->dcnt == 0))
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{
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@ -1100,7 +1109,7 @@ static int am335x_i2c_isr_process(struct am335x_i2c_priv_s *priv)
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*/
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#ifdef CONFIG_I2C_POLLED
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irqstate_t flags = enter_critical_section();
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irqstate_t flags = spin_lock_irqsave(&priv->spinlock);
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#endif
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/* Transmit a byte */
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priv->dcnt--;
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#ifdef CONFIG_I2C_POLLED
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leave_critical_section(flags);
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spin_unlock_irqrestore(&priv->spinlock, flags);
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#endif
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if ((priv->dcnt == 0) && ((priv->flags & I2C_M_NOSTOP) == 0))
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{
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@ -29,6 +29,7 @@
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#include <assert.h>
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#include <nuttx/arch.h>
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#include <nuttx/spinlock.h>
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#include "arm_internal.h"
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#include "sctlr.h"
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#include "am335x_gpio.h"
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#include "am335x_irq.h"
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/****************************************************************************
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* Private Data
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****************************************************************************/
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#ifdef CONFIG_ARCH_IRQPRIO
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static spinlock_t g_irq_lock = SP_UNLOCKED;
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#endif
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/****************************************************************************
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* Public Data
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****************************************************************************/
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@ -328,7 +336,7 @@ int up_prioritize_irq(int irq, int priority)
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{
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/* These operations must be atomic */
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flags = enter_critical_section();
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flags = spin_lock_irqsave(&g_irq_lock);
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#if 0 // TODO
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/* Set the new priority */
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putreg32(regval, regaddr);
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#endif
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leave_critical_section(flags);
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spin_unlock_irqrestore(&g_irq_lock, flags);
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return OK;
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}
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@ -39,6 +39,7 @@
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#endif
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#include <nuttx/irq.h>
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#include <nuttx/spinlock.h>
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#include <nuttx/arch.h>
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#include <nuttx/fs/ioctl.h>
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#include <nuttx/serial/serial.h>
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struct up_dev_s
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{
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uint32_t uartbase; /* Base address of UART registers */
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uint32_t baud; /* Configured baud */
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uint32_t ier; /* Saved IER value */
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uint8_t irq; /* IRQ associated with this UART */
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t bits; /* Number of bits (7 or 8) */
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bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */
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uint32_t uartbase; /* Base address of UART registers */
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uint32_t baud; /* Configured baud */
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uint32_t ier; /* Saved IER value */
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uint8_t irq; /* IRQ associated with this UART */
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t bits; /* Number of bits (7 or 8) */
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bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */
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spinlock_t spinlock; /* Spinlock */
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};
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/****************************************************************************
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.parity = CONFIG_UART0_PARITY,
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.bits = CONFIG_UART0_BITS,
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.stopbits2 = CONFIG_UART0_2STOP,
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.spinlock = SP_UNLOCKED,
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};
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static uart_dev_t g_uart0port =
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.parity = CONFIG_UART1_PARITY,
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.bits = CONFIG_UART1_BITS,
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.stopbits2 = CONFIG_UART1_2STOP,
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.spinlock = SP_UNLOCKED,
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};
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static uart_dev_t g_uart1port =
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.parity = CONFIG_UART2_PARITY,
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.bits = CONFIG_UART2_BITS,
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.stopbits2 = CONFIG_UART2_2STOP,
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.spinlock = SP_UNLOCKED,
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};
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static uart_dev_t g_uart2port =
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.parity = CONFIG_UART3_PARITY,
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.bits = CONFIG_UART3_BITS,
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.stopbits2 = CONFIG_UART3_2STOP,
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.spinlock = SP_UNLOCKED,
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};
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static uart_dev_t g_uart3port =
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@ -290,6 +296,7 @@ static struct up_dev_s g_uart4priv =
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.parity = CONFIG_UART4_PARITY,
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.bits = CONFIG_UART4_BITS,
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.stopbits2 = CONFIG_UART4_2STOP,
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.spinlock = SP_UNLOCKED,
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};
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static uart_dev_t g_uart4port =
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@ -320,6 +327,7 @@ static struct up_dev_s g_uart5priv =
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.parity = CONFIG_UART5_PARITY,
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.bits = CONFIG_UART5_BITS,
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.stopbits2 = CONFIG_UART5_2STOP,
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.spinlock = SP_UNLOCKED,
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};
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static uart_dev_t g_uart5port =
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@ -484,6 +492,10 @@ static uart_dev_t g_uart5port =
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# define UART5_ASSIGNED 1
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#endif
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/* Spinlock */
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static spinlock_t g_gpio_lock = SP_UNLOCKED;
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/****************************************************************************
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* Inline Functions
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****************************************************************************/
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@ -567,7 +579,7 @@ static inline void am335x_uart0config(void)
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/* Step 1: Enable power to UART0 */
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flags = enter_critical_section();
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flags = spin_lock_irqsave(&g_gpio_lock);
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#warning Missing logic
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/* Step 2: Enable clocking to UART0 */
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@ -577,7 +589,7 @@ static inline void am335x_uart0config(void)
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am335x_gpio_config(GPIO_UART0_TXD);
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am335x_gpio_config(GPIO_UART0_RXD);
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leave_critical_section(flags);
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spin_unlock_irqrestore(&g_gpio_lock, flags);
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};
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#endif
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@ -588,7 +600,7 @@ static inline void am335x_uart1config(void)
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/* Step 1: Enable power to UART1 */
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flags = enter_critical_section();
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flags = spin_lock_irqsave(&g_gpio_lock);
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#warning Missing logic
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/* Step 2: Enable clocking to UART1 */
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@ -598,7 +610,7 @@ static inline void am335x_uart1config(void)
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am335x_gpio_config(GPIO_UART1_TXD);
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am335x_gpio_config(GPIO_UART1_RXD);
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leave_critical_section(flags);
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spin_unlock_irqrestore(&g_gpio_lock, flags);
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};
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#endif
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@ -609,7 +621,7 @@ static inline void am335x_uart2config(void)
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/* Step 1: Enable power to UART2 */
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flags = enter_critical_section();
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flags = spin_lock_irqsave(&g_gpio_lock);
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#warning Missing logic
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/* Step 2: Enable clocking on UART2 */
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@ -619,7 +631,7 @@ static inline void am335x_uart2config(void)
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am335x_gpio_config(GPIO_UART2_TXD);
|
||||
am335x_gpio_config(GPIO_UART2_RXD);
|
||||
leave_critical_section(flags);
|
||||
spin_unlock_irqrestore(&g_gpio_lock, flags);
|
||||
};
|
||||
#endif
|
||||
|
||||
|
@ -630,7 +642,7 @@ static inline void am335x_uart3config(void)
|
|||
|
||||
/* Step 1: Enable power to UART3 */
|
||||
|
||||
flags = enter_critical_section();
|
||||
flags = spin_lock_irqsave(&g_gpio_lock);
|
||||
#warning Missing logic
|
||||
|
||||
/* Step 2: Enable clocking to UART3 */
|
||||
|
@ -640,7 +652,7 @@ static inline void am335x_uart3config(void)
|
|||
|
||||
am335x_gpio_config(GPIO_UART3_TXD);
|
||||
am335x_gpio_config(GPIO_UART3_RXD);
|
||||
leave_critical_section(flags);
|
||||
spin_unlock_irqrestore(&g_gpio_lock, flags);
|
||||
};
|
||||
#endif
|
||||
|
||||
|
@ -651,7 +663,7 @@ static inline void am335x_uart4config(void)
|
|||
|
||||
/* Step 1: Enable power to UART4 */
|
||||
|
||||
flags = enter_critical_section();
|
||||
flags = spin_lock_irqsave(&g_gpio_lock);
|
||||
#warning Missing logic
|
||||
|
||||
/* Step 2: Enable clocking to UART4 */
|
||||
|
@ -661,7 +673,7 @@ static inline void am335x_uart4config(void)
|
|||
|
||||
am335x_gpio_config(GPIO_UART4_TXD);
|
||||
am335x_gpio_config(GPIO_UART4_RXD);
|
||||
leave_critical_section(flags);
|
||||
spin_unlock_irqrestore(&g_gpio_lock, flags);
|
||||
};
|
||||
#endif
|
||||
|
||||
|
@ -672,7 +684,7 @@ static inline void am335x_uart5config(void)
|
|||
|
||||
/* Step 1: Enable power to UART5 */
|
||||
|
||||
flags = enter_critical_section();
|
||||
flags = spin_lock_irqsave(&g_gpio_lock);
|
||||
#warning Missing logic
|
||||
|
||||
/* Step 2: Enable clocking to UART5 */
|
||||
|
@ -682,7 +694,7 @@ static inline void am335x_uart5config(void)
|
|||
|
||||
am335x_gpio_config(GPIO_UART5_TXD);
|
||||
am335x_gpio_config(GPIO_UART5_RXD);
|
||||
leave_critical_section(flags);
|
||||
spin_unlock_irqrestore(&g_gpio_lock, flags);
|
||||
};
|
||||
#endif
|
||||
|
||||
|
@ -1029,18 +1041,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
|
|||
|
||||
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
|
||||
{
|
||||
irqstate_t flags = enter_critical_section();
|
||||
irqstate_t flags = spin_lock_irqsave(&priv->spinlock);
|
||||
up_enablebreaks(priv, true);
|
||||
leave_critical_section(flags);
|
||||
spin_unlock_irqrestore(&priv->spinlock, flags);
|
||||
}
|
||||
break;
|
||||
|
||||
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
|
||||
{
|
||||
irqstate_t flags;
|
||||
flags = enter_critical_section();
|
||||
flags = spin_lock_irqsave(&priv->spinlock);
|
||||
up_enablebreaks(priv, false);
|
||||
leave_critical_section(flags);
|
||||
spin_unlock_irqrestore(&priv->spinlock, flags);
|
||||
}
|
||||
break;
|
||||
|
||||
|
@ -1204,13 +1216,15 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
|
|||
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
||||
irqstate_t flags;
|
||||
|
||||
flags = enter_critical_section();
|
||||
flags = spin_lock_irqsave(&priv->spinlock);
|
||||
if (enable)
|
||||
{
|
||||
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
||||
priv->ier |= UART_IER_THR;
|
||||
up_serialout(priv, AM335X_UART_IER_OFFSET, priv->ier);
|
||||
|
||||
spin_unlock_irqrestore(&priv->spinlock, flags);
|
||||
|
||||
/* Fake a TX interrupt here by just calling uart_xmitchars() with
|
||||
* interrupts disabled (note this may recurse).
|
||||
*/
|
||||
|
@ -1222,9 +1236,9 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
|
|||
{
|
||||
priv->ier &= ~UART_IER_THR;
|
||||
up_serialout(priv, AM335X_UART_IER_OFFSET, priv->ier);
|
||||
}
|
||||
|
||||
leave_critical_section(flags);
|
||||
spin_unlock_irqrestore(&priv->spinlock, flags);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
|
|
@ -33,6 +33,7 @@
|
|||
#include <errno.h>
|
||||
|
||||
#include <nuttx/irq.h>
|
||||
#include <nuttx/spinlock.h>
|
||||
|
||||
#include <imx9_gpiobase.c>
|
||||
|
||||
|
@ -45,6 +46,10 @@
|
|||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Spinlock */
|
||||
|
||||
static spinlock_t g_gpio_lock = SP_UNLOCKED;
|
||||
|
||||
/****************************************************************************
|
||||
* Name: imx9_gpio_dirout
|
||||
****************************************************************************/
|
||||
|
@ -174,7 +179,7 @@ int imx9_config_gpio(gpio_pinset_t pinset)
|
|||
|
||||
/* Configure the pin as an input initially to avoid any spurious outputs */
|
||||
|
||||
flags = enter_critical_section();
|
||||
flags = spin_lock_irqsave(&g_gpio_lock);
|
||||
|
||||
/* Configure based upon the pin mode */
|
||||
|
||||
|
@ -223,7 +228,7 @@ int imx9_config_gpio(gpio_pinset_t pinset)
|
|||
break;
|
||||
}
|
||||
|
||||
leave_critical_section(flags);
|
||||
spin_unlock_irqrestore(&g_gpio_lock, flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -243,9 +248,9 @@ void imx9_gpio_write(gpio_pinset_t pinset, bool value)
|
|||
|
||||
DEBUGASSERT((unsigned int)port < IMX9_GPIO_NPORTS);
|
||||
|
||||
flags = enter_critical_section();
|
||||
flags = spin_lock_irqsave(&g_gpio_lock);
|
||||
imx9_gpio_setoutput(port, pin, value);
|
||||
leave_critical_section(flags);
|
||||
spin_unlock_irqrestore(&g_gpio_lock, flags);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -265,7 +270,7 @@ bool imx9_gpio_read(gpio_pinset_t pinset)
|
|||
|
||||
DEBUGASSERT((unsigned int)port < IMX9_GPIO_NPORTS);
|
||||
|
||||
flags = enter_critical_section();
|
||||
flags = spin_lock_irqsave(&g_gpio_lock);
|
||||
if ((pinset & (GPIO_OUTPUT)) == (GPIO_OUTPUT))
|
||||
{
|
||||
value = imx9_gpio_get_pinstatus(port, pin);
|
||||
|
@ -275,6 +280,6 @@ bool imx9_gpio_read(gpio_pinset_t pinset)
|
|||
value = imx9_gpio_getinput(port, pin);
|
||||
}
|
||||
|
||||
leave_critical_section(flags);
|
||||
spin_unlock_irqrestore(&g_gpio_lock, flags);
|
||||
return value;
|
||||
}
|
||||
|
|
|
@ -2438,7 +2438,7 @@ int imx9_i2cbus_uninitialize(struct i2c_master_s *dev)
|
|||
|
||||
if (--priv->refs > 0)
|
||||
{
|
||||
leave_critical_section(flags);
|
||||
spin_unlock_irqrestore(&priv->spinlock, flags);
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
|
|
@ -1798,8 +1798,6 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
|
|||
{
|
||||
struct imx9_lpspidev_s *priv = NULL;
|
||||
|
||||
irqstate_t flags = enter_critical_section();
|
||||
|
||||
#ifdef CONFIG_IMX9_LPSPI1
|
||||
if (bus == 1)
|
||||
{
|
||||
|
@ -2017,7 +2015,6 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
|
|||
else
|
||||
#endif
|
||||
{
|
||||
leave_critical_section(flags);
|
||||
spierr("ERROR: Unsupported SPI bus: %d\n", bus);
|
||||
return NULL;
|
||||
}
|
||||
|
@ -2061,7 +2058,6 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
|
|||
}
|
||||
#endif
|
||||
|
||||
leave_critical_section(flags);
|
||||
return (struct spi_dev_s *)priv;
|
||||
}
|
||||
|
||||
|
|
|
@ -2319,9 +2319,9 @@ static int imx9_epdisable(struct usbdev_ep_s *ep)
|
|||
|
||||
/* Cancel any ongoing activity */
|
||||
|
||||
spin_unlock_irqrestore(&privep->spinlock, flags);
|
||||
imx9_cancelrequests(privep, -ESHUTDOWN);
|
||||
|
||||
leave_critical_section(flags);
|
||||
spin_unlock_irqrestore(&privep->spinlock, flags);
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
|
|
@ -57,6 +57,7 @@
|
|||
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/clock.h>
|
||||
#include <nuttx/spinlock.h>
|
||||
|
||||
#ifdef CONFIG_SCHED_TICKLESS
|
||||
|
||||
|
@ -90,6 +91,7 @@ static uint32_t g_timer_active;
|
|||
|
||||
static irqstate_t g_tmr_sync_count;
|
||||
static irqstate_t g_tmr_flags;
|
||||
static spinlock_t g_tmr_lock = SP_UNLOCKED;
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
|
@ -161,7 +163,7 @@ static inline void up_tmr_sync_up(void)
|
|||
{
|
||||
if (!g_tmr_sync_count)
|
||||
{
|
||||
g_tmr_flags = enter_critical_section();
|
||||
g_tmr_flags = spin_lock_irqsave(&g_tmr_lock);
|
||||
}
|
||||
|
||||
g_tmr_sync_count++;
|
||||
|
@ -171,7 +173,7 @@ static inline void up_tmr_sync_down(void)
|
|||
{
|
||||
if (g_tmr_sync_count == 1)
|
||||
{
|
||||
leave_critical_section(g_tmr_flags);
|
||||
spin_unlock_irqrestore(&g_tmr_lock, g_tmr_flags);
|
||||
}
|
||||
|
||||
if (g_tmr_sync_count > 0)
|
||||
|
|
Loading…
Reference in a new issue