Merge commit '1207647ee19ac48746300f2d3fa8f4679c32de95'

This commit is contained in:
Gregory Nutt 2015-01-31 13:47:10 -06:00
commit e4b0df0431
10 changed files with 200 additions and 9 deletions

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@ -51,10 +51,11 @@
* Pre-processor Definitions
****************************************************************************/
/* The ATmega128 has 35 interrupt vectors including vector 0, the reset
* vector. The remaining 34 are assigned IRQ numbers here:
/* ATmega interrupt vectors other than vector 0, the reset vector, are
* assigned here:
*/
#if defined(CONFIG_ARCH_CHIP_ATMEGA128)
#define ATMEGA_IRQ_INT0 0 /* 0x0002 External Interrupt Request 0 */
#define ATMEGA_IRQ_INT1 1 /* 0x0004 External Interrupt Request 1 */
#define ATMEGA_IRQ_INT2 2 /* 0x0006 External Interrupt Request 2 */
@ -89,6 +90,44 @@
#define ATMEGA_IRQ_U1TX 31 /* 0x0040 USART1 Tx Complete */
#define ATMEGA_IRQ_TWI 32 /* 0x0042 TWI Two-wire Serial Interface */
#define ATMEGA_IRQ_SPMRDY 33 /* 0x0044 Store Program Memory Ready */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P)
#define ATMEGA_IRQ_INT0 0 /* 0x0002 External Interrupt Request 0 */
#define ATMEGA_IRQ_INT1 1 /* 0x0004 External Interrupt Request 1 */
#define ATMEGA_IRQ_INT2 2 /* 0x0006 External Interrupt Request 2 */
#define ATMEGA_IRQ_PCINT0 3 /* 0x0008 Pin Change Interrupt Request 0 */
#define ATMEGA_IRQ_PCINT1 4 /* 0x000a Pin Change Interrupt Request 1 */
#define ATMEGA_IRQ_PCINT2 5 /* 0x000c Pin Change Interrupt Request 2 */
#define ATMEGA_IRQ_PCINT3 6 /* 0x000e Pin Change Interrupt Request 3 */
#define ATMEGA_IRQ_WDT 7 /* 0x0010 Watchdog Time-Out Interrupt */
#define ATMEGA_IRQ_T2COMPA 8 /* 0x0012 TIMER2 COMPA Timer/Counter2 Compare Match */
#define ATMEGA_IRQ_T2COMPB 9 /* 0x0014 TIMER2 COMPB Timer/Counter2 Compare Match */
#define ATMEGA_IRQ_T2OVF 10 /* 0x0016 TIMER2 OVF Timer/Counter2 Overflow */
#define ATMEGA_IRQ_T1CAPT 11 /* 0x0018 TIMER1 CAPT Timer/Counter1 Capture Event */
#define ATMEGA_IRQ_T1COMPA 12 /* 0x001a TIMER1 COMPA Timer/Counter1 Compare Match A */
#define ATMEGA_IRQ_T1COMPB 13 /* 0x001c TIMER1 COMPB Timer/Counter1 Compare Match B */
#define ATMEGA_IRQ_T1OVF 14 /* 0x001e TIMER1 OVF Timer/Counter1 Overflow */
#define ATMEGA_IRQ_T0COMPA 15 /* 0x0020 TIMER0 COMP Timer/Counter0 Compare Match */
#define ATMEGA_IRQ_T0COMPB 16 /* 0x0022 TIMER0 COMP Timer/Counter0 Compare Match */
#define ATMEGA_IRQ_T0OVF 17 /* 0x0024 TIMER0 OVF Timer/Counter0 Overflow */
#define ATMEGA_IRQ_SPI 18 /* 0x0026 STC SPI Serial Transfer Complete */
#define ATMEGA_IRQ_U0RX 19 /* 0x0028 USART0 Rx Complete */
#define ATMEGA_IRQ_U0DRE 20 /* 0x002a USART0 Data Register Empty */
#define ATMEGA_IRQ_U0TX 21 /* 0x002c USART0 Tx Complete */
#define ATMEGA_IRQ_ANACOMP 22 /* 0x002e ANALOG COMP Analog Comparator */
#define ATMEGA_IRQ_ADC 23 /* 0x0030 ADC Conversion Complete */
#define ATMEGA_IRQ_EE 24 /* 0x0032 EEPROM Ready */
#define ATMEGA_IRQ_TWI 25 /* 0x0034 TWI Two-wire Serial Interface */
#define ATMEGA_IRQ_SPMRDY 26 /* 0x0036 Store Program Memory Ready */
#define ATMEGA_IRQ_U1RX 27 /* 0x0038 USART1 Rx Complete */
#define ATMEGA_IRQ_U1DRE 28 /* 0x003a USART1 Data Register Empty */
#define ATMEGA_IRQ_U1TX 29 /* 0x003c USART1 Tx Complete */
#define ATMEGA_IRQ_T3CAPT 30 /* 0x003e TIMER3 CAPT Timer/Counter3 Capture Event */
#define ATMEGA_IRQ_T3COMPA 31 /* 0x0040 TIMER3 COMPA Timer/Counter3 Compare Match A */
#define ATMEGA_IRQ_T3COMPB 32 /* 0x0042 TIMER3 COMPB Timer/Counter3 Compare Match B */
#define ATMEGA_IRQ_T3OVF 33 /* 0x0044 TIMER3 OVF Timer/Counter3 Overflow */
#else
#error "Unrecognized chip"
#endif
#define NR_IRQS 34

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@ -15,6 +15,11 @@ config ARCH_CHIP_ATMEGA128
---help---
Atmel ATMega128 8-bit AVR.
config ARCH_CHIP_ATMEGA1284P
bool "ATMega1284P"
---help---
Atmel ATMega1284P 8-bit AVR.
endchoice # ATMega Configuration Options
menu "ATMega Peripheral Selections"

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@ -48,7 +48,7 @@
/* USARTs ***************************************************************************/
#undef HAVE_USART_DEVICE
#if defined(CONFIG_AVR_USART0) || defined(CONFIG_AVR_USART0)
#if defined(CONFIG_AVR_USART0) || defined(CONFIG_AVR_USART1)
# define HAVE_USART_DEVICE 1
#endif

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@ -61,6 +61,7 @@
.section .handlers, "ax", @progbits
#if defined(CONFIG_ARCH_CHIP_ATMEGA128)
HANDLER atmega_int0, ATMEGA_IRQ_INT0, excpt_common /* External interrupt request 0 */
HANDLER atmega_int1, ATMEGA_IRQ_INT1, excpt_common /* External interrupt request 1 */
HANDLER atmega_int2, ATMEGA_IRQ_INT2, excpt_common /* External interrupt request 2 */
@ -95,6 +96,44 @@
HANDLER atmega_u1tx, ATMEGA_IRQ_U1TX, excpt_common /* USART1 TX complete */
HANDLER atmega_twi, ATMEGA_IRQ_TWI, excpt_common /* TWI two-wire serial interface */
HANDLER atmega_spmrdy, ATMEGA_IRQ_SPMRDY, excpt_common /* Store program memory ready */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P)
HANDLER atmega_int0, ATMEGA_IRQ_INT0, excpt_common /* External interrupt request 0 */
HANDLER atmega_int1, ATMEGA_IRQ_INT1, excpt_common /* External interrupt request 1 */
HANDLER atmega_int2, ATMEGA_IRQ_INT2, excpt_common /* External interrupt request 2 */
HANDLER atmega_pcint0, ATMEGA_IRQ_PCINT0, excpt_common /* Pin change interrupt request 0 */
HANDLER atmega_pcint1, ATMEGA_IRQ_PCINT1, excpt_common /* Pin change interrupt request 1 */
HANDLER atmega_pcint2, ATMEGA_IRQ_PCINT2, excpt_common /* Pin change interrupt request 2 */
HANDLER atmega_pcint3, ATMEGA_IRQ_PCINT3, excpt_common /* Pin change interrupt request 3 */
HANDLER atmega_wdt, ATMEGA_IRQ_WDT, excpt_common /* Watchdog time-out interrupt */
HANDLER atmega_t2compa, ATMEGA_IRQ_T2COMPA, excpt_common /* TIMER2 COMPA timer/counter2 compare match */
HANDLER atmega_t2compb, ATMEGA_IRQ_T2COMPB, excpt_common /* TIMER2 COMPB timer/counter2 compare match */
HANDLER atmega_t2ovf, ATMEGA_IRQ_T2OVF, excpt_common /* TIMER2 OVF timer/counter2 overflow */
HANDLER atmega_t1capt, ATMEGA_IRQ_T1CAPT, excpt_common /* TIMER1 CAPT timer/counter1 capture event */
HANDLER atmega_t1compa, ATMEGA_IRQ_T1COMPA, excpt_common /* TIMER1 COMPA timer/counter1 compare match a */
HANDLER atmega_t1compb, ATMEGA_IRQ_T1COMPB, excpt_common /* TIMER1 COMPB timer/counter1 compare match b */
HANDLER atmega_t1ovf, ATMEGA_IRQ_T1OVF, excpt_common /* TIMER1 OVF timer/counter1 overflow */
HANDLER atmega_t0compa, ATMEGA_IRQ_T0COMPA, excpt_common /* TIMER0 COMPA timer/counter0 compare match */
HANDLER atmega_t0compb, ATMEGA_IRQ_T0COMPB, excpt_common /* TIMER0 COMPB timer/counter0 compare match */
HANDLER atmega_t0ovf, ATMEGA_IRQ_T0OVF, excpt_common /* TIMER0 OVF timer/counter0 overflow */
HANDLER atmega_spi, ATMEGA_IRQ_SPI, excpt_common /* STC SPI serial transfer complete */
HANDLER atmega_u0rx, ATMEGA_IRQ_U0RX, excpt_common /* USART0 RX complete */
HANDLER atmega_u0dre, ATMEGA_IRQ_U0DRE, excpt_common /* USART0 data register empty */
HANDLER atmega_u0tx, ATMEGA_IRQ_U0TX, excpt_common /* USART0 TX complete */
HANDLER atmega_anacomp, ATMEGA_IRQ_ANACOMP, excpt_common /* ANALOG COMP analog comparator */
HANDLER atmega_adc, ATMEGA_IRQ_ADC, excpt_common /* ADC conversion complete */
HANDLER atmega_ee, ATMEGA_IRQ_EE, excpt_common /* EEPROM ready */
HANDLER atmega_twi , ATMEGA_IRQ_TWI, excpt_common /* TWI two-wire serial interface */
HANDLER atmega_spmrdy, ATMEGA_IRQ_SPMRDY, excpt_common /* Store program memory ready */
HANDLER atmega_u1rx, ATMEGA_IRQ_U1RX, excpt_common /* USART1 RX complete */
HANDLER atmega_u1dre, ATMEGA_IRQ_U1DRE, excpt_common /* USART1 data register empty */
HANDLER atmega_u1tx, ATMEGA_IRQ_U1TX, excpt_common /* USART1 TX complete */
HANDLER atmega_t3capt, ATMEGA_IRQ_T3CAPT, excpt_common /* TIMER3 CAPT timer/counter3 capture event */
HANDLER atmega_t3compa, ATMEGA_IRQ_T3COMPA, excpt_common /* TIMER3 COMPA timer/counter3 compare match a */
HANDLER atmega_t3compb, ATMEGA_IRQ_T3COMPB, excpt_common /* TIMER3 COMPB timer/counter3 compare match b */
HANDLER atmega_t3ovf, ATMEGA_IRQ_T3OVF, excpt_common /* TIMER3 OVF timer/counter3 overflow */
#else
#error "Unrecognized chip"
#endif
/********************************************************************************************
* Name: excpt_common

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@ -77,6 +77,7 @@
.global os_start /* NuttX entry point */
.global vectortab
#if defined(CONFIG_ARCH_CHIP_ATMEGA128)
.global atmega_int0 /* External interrupt request 0 */
.global atmega_int1 /* External interrupt request 1 */
.global atmega_int2 /* External interrupt request 2 */
@ -111,6 +112,44 @@
.global atmega_u1tx /* USART1 TX complete */
.global atmega_twi /* TWI two-wire serial interface */
.global atmega_spmrdy /* Store program memory ready */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P)
.global atmega_int0 /* External interrupt request 0 */
.global atmega_int1 /* External interrupt request 1 */
.global atmega_int2 /* External interrupt request 2 */
.global atmega_pcint0 /* Pin change interrupt request 0 */
.global atmega_pcint1 /* Pin change interrupt request 1 */
.global atmega_pcint2 /* Pin change interrupt request 2 */
.global atmega_pcint3 /* Pin change interrupt request 3 */
.global atmega_wdt /* Watchdog time-out interrupt */
.global atmega_t2compa /* TIMER2 COMPA timer/counter2 compare match */
.global atmega_t2compb /* TIMER2 COMPB timer/counter2 compare match */
.global atmega_t2ovf /* TIMER2 OVF timer/counter2 overflow */
.global atmega_t1capt /* TIMER1 CAPT timer/counter1 capture event */
.global atmega_t1compa /* TIMER1 COMPA timer/counter1 compare match a */
.global atmega_t1compb /* TIMER1 COMPB timer/counter1 compare match b */
.global atmega_t1ovf /* TIMER1 OVF timer/counter1 overflow */
.global atmega_t0compa /* TIMER0 COMPA timer/counter0 compare match */
.global atmega_t0compb /* TIMER0 COMPB timer/counter0 compare match */
.global atmega_t0ovf /* TIMER0 OVF timer/counter0 overflow */
.global atmega_spi /* STC SPI serial transfer complete */
.global atmega_u0rx /* USART0 RX complete */
.global atmega_u0dre /* USART0 data register empty */
.global atmega_u0tx /* USART0 TX complete */
.global atmega_anacomp /* ANALOG COMP analog comparator */
.global atmega_adc /* ADC conversion complete */
.global atmega_ee /* EEPROM ready */
.global atmega_twi /* TWI two-wire serial interface */
.global atmega_spmrdy /* Store program memory ready */
.global atmega_u1rx /* USART1 RX complete */
.global atmega_u1dre /* USART1 data register empty */
.global atmega_u1tx /* USART1 TX complete */
.global atmega_t3capt /* TIMER3 CAPT timer/counter3 capture event */
.global atmega_t3compa /* TIMER3 COMPA timer/counter3 compare match a */
.global atmega_t3compb /* TIMER3 COMPB timer/counter3 compare match b */
.global atmega_t3ovf /* TIMER3 OVF timer/counter3 overflow */
#else
#error "Unrecognized chip"
#endif
/****************************************************************************
* Macros
@ -132,6 +171,7 @@
.func vectortab
vectortab:
jmp __start /* 0: Vector 0 is the reset vector */
#if defined(CONFIG_ARCH_CHIP_ATMEGA128)
vector atmega_int0 /* 1: External interrupt request 0 */
vector atmega_int1 /* 2: External interrupt request 1 */
vector atmega_int2 /* 3: External interrupt request 2 */
@ -166,6 +206,44 @@ vectortab:
vector atmega_u1tx /* 32: USART1 TX complete */
vector atmega_twi /* 33: TWI two-wire serial interface */
vector atmega_spmrdy /* 34: Store program memory ready */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P)
vector atmega_int0 /* External interrupt request 0 */
vector atmega_int1 /* External interrupt request 1 */
vector atmega_int2 /* External interrupt request 2 */
vector atmega_pcint0 /* Pin change interrupt request 0 */
vector atmega_pcint1 /* Pin change interrupt request 1 */
vector atmega_pcint2 /* Pin change interrupt request 2 */
vector atmega_pcint3 /* Pin change interrupt request 3 */
vector atmega_wdt /* Watchdog time-out interrupt */
vector atmega_t2compa /* TIMER2 COMPA timer/counter2 compare match */
vector atmega_t2compb /* TIMER2 COMPB timer/counter2 compare match */
vector atmega_t2ovf /* TIMER2 OVF timer/counter2 overflow */
vector atmega_t1capt /* TIMER1 CAPT timer/counter1 capture event */
vector atmega_t1compa /* TIMER1 COMPA timer/counter1 compare match a */
vector atmega_t1compb /* TIMER1 COMPB timer/counter1 compare match b */
vector atmega_t1ovf /* TIMER1 OVF timer/counter1 overflow */
vector atmega_t0compa /* TIMER0 COMPA timer/counter0 compare match */
vector atmega_t0compb /* TIMER0 COMPB timer/counter0 compare match */
vector atmega_t0ovf /* TIMER0 OVF timer/counter0 overflow */
vector atmega_spi /* STC SPI serial transfer complete */
vector atmega_u0rx /* USART0 RX complete */
vector atmega_u0dre /* USART0 data register empty */
vector atmega_u0tx /* USART0 TX complete */
vector atmega_anacomp /* ANALOG COMP analog comparator */
vector atmega_adc /* ADC conversion complete */
vector atmega_ee /* EEPROM ready */
vector atmega_twi /* TWI two-wire serial interface */
vector atmega_spmrdy /* Store program memory ready */
vector atmega_u1rx /* USART1 RX complete */
vector atmega_u1dre /* USART1 data register empty */
vector atmega_u1tx /* USART1 TX complete */
vector atmega_t3capt /* TIMER3 CAPT timer/counter3 capture event */
vector atmega_t3compa /* TIMER3 COMPA timer/counter3 compare match a */
vector atmega_t3compb /* TIMER3 COMPB timer/counter3 compare match b */
vector atmega_t3ovf /* TIMER3 OVF timer/counter3 overflow */
#else
#error "Unrecognized chip"
#endif
.endfunc
/****************************************************************************

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@ -218,8 +218,13 @@ void usart0_reset(void)
/* Unconfigure pins (no action needed */
#ifdef CONFIG_ARCH_CHIP_ATMEGA1284P
DDRD &= ~(1 << 1);
PORTD &= ~(1 << 0);
#else
DDRE &= ~(1 << 1);
PORTE &= ~(1 << 0);
#endif
/* Unconfigure BAUD divisor */
@ -309,6 +314,22 @@ void usart0_configure(void)
UCSR0B = ucsr0b;
UCSR0C = ucsr0c;
#ifdef CONFIG_ARCH_CHIP_ATMEGA1284P
/* Pin Configuration: None necessary, Port D bits 0&1 are automatically
* configured:
*
* Port D, Bit 0: RXD0, USART0 Receive Pin. Receive Data (Data input pin
* for the USART0). When the USART0 receiver is enabled this pin is
* configured as an input regardless of the value of DDRD0. When the
* USART0 forces this pin to be an input, a logical one in PORTD0 will
* turn on the internal pull-up.
*
* Port D, Bit 1: TXD0, UART0 Transmit pin.
*/
DDRD |= (1 << 1); /* Force Port D pin 1 to be an output -- should not be necessary */
PORTD |= (1 << 0); /* Set pull-up on Port D pin 0 */
#else
/* Pin Configuration: None necessary, Port E bits 0&1 are automatically
* configured:
*
@ -324,8 +345,9 @@ void usart0_configure(void)
* However, this is not explicitly stated in the text.
*/
DDRE |= (1 << 1); /* Force Port E pin 1 to be an input -- might not be necessary */
DDRE |= (1 << 1); /* Force Port E pin 1 to be an output -- might not be necessary */
PORTE |= (1 << 0); /* Set pull-up on Port E pin 0 */
#endif
/* Set the baud rate divisor */

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@ -128,7 +128,12 @@ void up_lowinit(void)
/* Set the system clock divider to 1 */
#ifdef CONFIG_ARCH_CHIP_ATMEGA1284P
CLKPR = 0x80;
CLKPR = 0;
#else
XDIV = 0;
#endif
/* Initialize the watchdog timer */

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@ -897,7 +897,7 @@ void up_earlyserialinit(void)
{
/* Disable all USARTS */
#ifdef CONFIG_AVR_USART1
#ifdef CONFIG_AVR_USART0
usart0_disableusartint(NULL);
#endif
#ifdef CONFIG_AVR_USART1
@ -949,9 +949,6 @@ void up_serialinit(void)
*
****************************************************************************/
#ifdef HAVE_SERIAL_CONSOLE
#endif
int up_putc(int ch)
{
#ifdef HAVE_SERIAL_CONSOLE
@ -960,7 +957,7 @@ int up_putc(int ch)
#if defined(CONFIG_USART0_SERIAL_CONSOLE)
usart0_disableusartint(&imr);
#else
usart1_cdisableusartint(&imr);
usart1_disableusartint(&imr);
#endif
/* Check for LF */

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@ -177,5 +177,9 @@ void up_timer_initialize(void)
/* Enable the interrupt on compare match A */
#ifdef CONFIG_ARCH_CHIP_ATMEGA1284P
TIMSK1 |= (1 << OCIE1A);
#else
TIMSK |= (1 << OCIE1A);
#endif
}

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@ -70,6 +70,8 @@ endif
ifeq ($(CONFIG_ARCH_CHIP_ATMEGA128),y)
ARCHCPUFLAGS += -mmcu=atmega128
else ifeq ($(CONFIG_ARCH_CHIP_ATMEGA1284P),y)
ARCHCPUFLAGS += -mmcu=atmega1284p
else ifeq ($(CONFIG_ARCH_CHIP_AT90USB646),y)
ARCHCPUFLAGS += -mmcu=at90usb646
else ifeq ($(CONFIG_ARCH_CHIP_AT90USB647),y)