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Rename *lldbg to *llerr

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This commit is contained in:
Gregory Nutt 2016-06-11 14:55:27 -06:00
parent 86b79b33cf
commit e99301d7c2
646 changed files with 2688 additions and 2688 deletions
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24
arch/arm/src/a1x/a1x_irq.c
View file

@ -85,37 +85,37 @@ static void a1x_dumpintc(const char *msg, int irq)
/* Dump some relevant ARMv7 register contents */
flags = enter_critical_section();
lldbg("ARMv7 (%s, irq=%d):\n", msg, irq);
lldbg(" CPSR: %08x SCTLR: %08x\n", flags, cp15_rdsctlr());
llerr("ARMv7 (%s, irq=%d):\n", msg, irq);
llerr(" CPSR: %08x SCTLR: %08x\n", flags, cp15_rdsctlr());
/* Dump all of the (readable) INTC register contents */
lldbg("INTC (%s, irq=%d):\n", msg, irq);
lldbg(" VECTOR: %08x BASE: %08x PROTECT: %08x NMICTRL: %08x\n",
llerr("INTC (%s, irq=%d):\n", msg, irq);
llerr(" VECTOR: %08x BASE: %08x PROTECT: %08x NMICTRL: %08x\n",
getreg32(A1X_INTC_VECTOR), getreg32(A1X_INTC_BASEADDR),
getreg32(A1X_INTC_PROTECT), getreg32(A1X_INTC_NMICTRL));
lldbg(" IRQ PEND: %08x %08x %08x\n",
llerr(" IRQ PEND: %08x %08x %08x\n",
getreg32(A1X_INTC_IRQ_PEND0), getreg32(A1X_INTC_IRQ_PEND1),
getreg32(A1X_INTC_IRQ_PEND2));
lldbg(" FIQ PEND: %08x %08x %08x\n",
llerr(" FIQ PEND: %08x %08x %08x\n",
getreg32(A1X_INTC_FIQ_PEND0), getreg32(A1X_INTC_FIQ_PEND1),
getreg32(A1X_INTC_FIQ_PEND2));
lldbg(" SEL: %08x %08x %08x\n",
llerr(" SEL: %08x %08x %08x\n",
getreg32(A1X_INTC_IRQ_SEL0), getreg32(A1X_INTC_IRQ_SEL1),
getreg32(A1X_INTC_IRQ_SEL2));
lldbg(" EN: %08x %08x %08x\n",
llerr(" EN: %08x %08x %08x\n",
getreg32(A1X_INTC_EN0), getreg32(A1X_INTC_EN1),
getreg32(A1X_INTC_EN2));
lldbg(" MASK: %08x %08x %08x\n",
llerr(" MASK: %08x %08x %08x\n",
getreg32(A1X_INTC_MASK0), getreg32(A1X_INTC_MASK1),
getreg32(A1X_INTC_MASK2));
lldbg(" RESP: %08x %08x %08x\n",
llerr(" RESP: %08x %08x %08x\n",
getreg32(A1X_INTC_RESP0), getreg32(A1X_INTC_RESP1),
getreg32(A1X_INTC_RESP2));
lldbg(" FF: %08x %08x %08x\n",
llerr(" FF: %08x %08x %08x\n",
getreg32(A1X_INTC_FF0), getreg32(A1X_INTC_FF1),
getreg32(A1X_INTC_FF2));
lldbg(" PRIO: %08x %08x %08x %08x %08x\n",
llerr(" PRIO: %08x %08x %08x %08x %08x\n",
getreg32(A1X_INTC_PRIO0), getreg32(A1X_INTC_PRIO1),
getreg32(A1X_INTC_PRIO2), getreg32(A1X_INTC_PRIO3),
getreg32(A1X_INTC_PRIO4));

2
arch/arm/src/a1x/a1x_serial.c
View file

@ -1192,7 +1192,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
default:
{
lldbg("Unexpected IIR: %02x\n", status);
llerr("Unexpected IIR: %02x\n", status);
break;
}
}

42
arch/arm/src/arm/up_assert.c
View file

@ -81,7 +81,7 @@
* code. We are going to print the task name if:
*
* CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
* (defined(CONFIG_DEBUG_FEATURES) || <-- And the debug is enabled (lldbg used)
* (defined(CONFIG_DEBUG_FEATURES) || <-- And the debug is enabled (llerr used)
* defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
*/
@ -127,7 +127,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t *)stack;
lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
llerr("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
@ -154,12 +154,12 @@ static inline void up_registerdump(void)
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
llerr("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
llerr("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
}
}
#else
@ -228,12 +228,12 @@ static void up_dumpstate(void)
/* Show interrupt stack info */
lldbg("sp: %08x\n", sp);
lldbg("IRQ stack:\n");
lldbg(" base: %08x\n", istackbase);
lldbg(" size: %08x\n", istacksize);
llerr("sp: %08x\n", sp);
llerr("IRQ stack:\n");
llerr(" base: %08x\n", istackbase);
llerr(" size: %08x\n", istacksize);
#ifdef CONFIG_STACK_COLORATION
lldbg(" used: %08x\n", up_check_intstack());
llerr(" used: %08x\n", up_check_intstack());
#endif
/* Does the current stack pointer lie within the interrupt
@ -251,24 +251,24 @@ static void up_dumpstate(void)
*/
sp = g_intstackbase;
lldbg("sp: %08x\n", sp);
llerr("sp: %08x\n", sp);
}
/* Show user stack info */
lldbg("User stack:\n");
lldbg(" base: %08x\n", ustackbase);
lldbg(" size: %08x\n", ustacksize);
llerr("User stack:\n");
llerr(" base: %08x\n", ustackbase);
llerr(" size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
lldbg(" used: %08x\n", up_check_tcbstack(rtcb));
llerr(" used: %08x\n", up_check_tcbstack(rtcb));
#endif
#else
lldbg("sp: %08x\n", sp);
lldbg("stack base: %08x\n", ustackbase);
lldbg("stack size: %08x\n", ustacksize);
llerr("sp: %08x\n", sp);
llerr("stack base: %08x\n", ustackbase);
llerr("stack size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
lldbg("stack used: %08x\n", up_check_tcbstack(rtcb));
llerr("stack used: %08x\n", up_check_tcbstack(rtcb));
#endif
#endif
@ -279,7 +279,7 @@ static void up_dumpstate(void)
if (sp > ustackbase || sp <= ustackbase - ustacksize)
{
#if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
lldbg("ERROR: Stack pointer is not within allocated stack\n");
llerr("ERROR: Stack pointer is not within allocated stack\n");
#endif
}
else
@ -346,10 +346,10 @@ void up_assert(const uint8_t *filename, int lineno)
board_autoled_on(LED_ASSERTION);
#ifdef CONFIG_PRINT_TASKNAME
lldbg("Assertion failed at file:%s line: %d task: %s\n",
llerr("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
lldbg("Assertion failed at file:%s line: %d\n",
llerr("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif

6
arch/arm/src/arm/up_dataabort.c
View file

@ -131,7 +131,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
* fatal error.
*/
pglldbg("FSR: %08x FAR: %08x\n", fsr, far);
pgllerr("FSR: %08x FAR: %08x\n", fsr, far);
if ((fsr & FSR_MASK) != FSR_PAGE)
{
goto segfault;
@ -180,7 +180,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
segfault:
#endif
lldbg("Data abort. PC: %08x FAR: %08x FSR: %08x\n", regs[REG_PC], far, fsr);
llerr("Data abort. PC: %08x FAR: %08x FSR: %08x\n", regs[REG_PC], far, fsr);
PANIC();
}
@ -196,7 +196,7 @@ void up_dataabort(uint32_t *regs)
/* Crash -- possibly showing diagnost debug information. */
lldbg("Data abort. PC: %08x\n", regs[REG_PC]);
llerr("Data abort. PC: %08x\n", regs[REG_PC]);
PANIC();
}

4
arch/arm/src/arm/up_prefetchabort.c
View file

@ -110,7 +110,7 @@ void up_prefetchabort(uint32_t *regs)
* virtual addresses.
*/
pglldbg("VADDR: %08x VBASE: %08x VEND: %08x\n",
pgllerr("VADDR: %08x VBASE: %08x VEND: %08x\n",
regs[REG_PC], PG_PAGED_VBASE, PG_PAGED_VEND);
if (regs[REG_R15] >= PG_PAGED_VBASE && regs[REG_R15] < PG_PAGED_VEND)
@ -148,7 +148,7 @@ void up_prefetchabort(uint32_t *regs)
else
#endif
{
lldbg("Prefetch abort. PC: %08x\n", regs[REG_PC]);
llerr("Prefetch abort. PC: %08x\n", regs[REG_PC]);
PANIC();
}
}

2
arch/arm/src/arm/up_releasepending.c
View file

@ -67,7 +67,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
slldbg("From TCB=%p\n", rtcb);
sllerr("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */

2
arch/arm/src/arm/up_reprioritizertr.c
View file

@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
slldbg("TCB=%p PRI=%d\n", tcb, priority);
sllerr("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just

2
arch/arm/src/arm/up_syscall.c
View file

@ -93,7 +93,7 @@
void up_syscall(uint32_t *regs)
{
lldbg("Syscall from 0x%x\n", regs[REG_PC]);
llerr("Syscall from 0x%x\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC();
}

2
arch/arm/src/arm/up_undefinedinsn.c
View file

@ -80,7 +80,7 @@
void up_undefinedinsn(uint32_t *regs)
{
lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]);
llerr("Undefined instruction at 0x%x\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC();
}

50
arch/arm/src/armv6-m/up_assert.c
View file

@ -80,7 +80,7 @@
* code. We are going to print the task name if:
*
* CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
* (defined(CONFIG_DEBUG_FEATURES) || <-- And the debug is enabled (lldbg used)
* (defined(CONFIG_DEBUG_FEATURES) || <-- And the debug is enabled (llerr used)
* defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
*/
@ -126,7 +126,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t *)stack;
lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
llerr("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
@ -145,11 +145,11 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
/* Dump interesting properties of this task */
#ifdef CONFIG_PRINT_TASKNAME
lldbg("%s: PID=%d Stack Used=%lu of %lu\n",
llerr("%s: PID=%d Stack Used=%lu of %lu\n",
tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#else
lldbg("PID: %d Stack Used=%lu of %lu\n",
llerr("PID: %d Stack Used=%lu of %lu\n",
tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#endif
@ -184,22 +184,22 @@ static inline void up_registerdump(void)
{
/* Yes.. dump the interrupt registers */
lldbg("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
llerr("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
lldbg("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
llerr("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
#ifdef CONFIG_BUILD_PROTECTED
lldbg("xPSR: %08x PRIMASK: %08x EXEC_RETURN: %08x\n",
llerr("xPSR: %08x PRIMASK: %08x EXEC_RETURN: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
#else
lldbg("xPSR: %08x PRIMASK: %08x\n",
llerr("xPSR: %08x PRIMASK: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif
}
@ -270,12 +270,12 @@ static void up_dumpstate(void)
/* Show interrupt stack info */
lldbg("sp: %08x\n", sp);
lldbg("IRQ stack:\n");
lldbg(" base: %08x\n", istackbase);
lldbg(" size: %08x\n", istacksize);
llerr("sp: %08x\n", sp);
llerr("IRQ stack:\n");
llerr(" base: %08x\n", istackbase);
llerr(" size: %08x\n", istacksize);
#ifdef CONFIG_STACK_COLORATION
lldbg(" used: %08x\n", up_check_intstack());
llerr(" used: %08x\n", up_check_intstack());
#endif
/* Does the current stack pointer lie within the interrupt
@ -297,14 +297,14 @@ static void up_dumpstate(void)
if (CURRENT_REGS)
{
sp = CURRENT_REGS[REG_R13];
lldbg("sp: %08x\n", sp);
llerr("sp: %08x\n", sp);
}
lldbg("User stack:\n");
lldbg(" base: %08x\n", ustackbase);
lldbg(" size: %08x\n", ustacksize);
llerr("User stack:\n");
llerr(" base: %08x\n", ustackbase);
llerr(" size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
lldbg(" used: %08x\n", up_check_tcbstack(rtcb));
llerr(" used: %08x\n", up_check_tcbstack(rtcb));
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@ -317,11 +317,11 @@ static void up_dumpstate(void)
}
#else
lldbg("sp: %08x\n", sp);
lldbg("stack base: %08x\n", ustackbase);
lldbg("stack size: %08x\n", ustacksize);
llerr("sp: %08x\n", sp);
llerr("stack base: %08x\n", ustackbase);
llerr("stack size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
lldbg("stack used: %08x\n", up_check_tcbstack(rtcb));
llerr("stack used: %08x\n", up_check_tcbstack(rtcb));
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@ -330,7 +330,7 @@ static void up_dumpstate(void)
if (sp > ustackbase || sp <= ustackbase - ustacksize)
{
lldbg("ERROR: Stack pointer is not within allocated stack\n");
llerr("ERROR: Stack pointer is not within allocated stack\n");
}
else
{
@ -401,10 +401,10 @@ void up_assert(const uint8_t *filename, int lineno)
board_autoled_on(LED_ASSERTION);
#ifdef CONFIG_PRINT_TASKNAME
lldbg("Assertion failed at file:%s line: %d task: %s\n",
llerr("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
lldbg("Assertion failed at file:%s line: %d\n",
llerr("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif

12
arch/arm/src/armv6-m/up_dumpnvic.c
View file

@ -83,25 +83,25 @@ void up_dumpnvic(FAR const char *msg)
flags = enter_critical_section();
lldbg("NVIC: %s\n", msg);
lldbg(" ISER: %08x ICER: %08x ISPR: %08x ICPR: %08x\n",
llerr("NVIC: %s\n", msg);
llerr(" ISER: %08x ICER: %08x ISPR: %08x ICPR: %08x\n",
getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER),
getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
for (i = 0 ; i < 8; i += 4)
{
lldbg(" IPR%d: %08x IPR%d: %08x IPR%d: %08x IPR%d: %08x\n",
llerr(" IPR%d: %08x IPR%d: %08x IPR%d: %08x IPR%d: %08x\n",
i, getreg32(ARMV6M_NVIC_IPR(i)),
i+1, getreg32(ARMV6M_NVIC_IPR(i+1)),
i+2, getreg32(ARMV6M_NVIC_IPR(i+2)),
i+3, getreg32(ARMV6M_NVIC_IPR(i+3)));
}
lldbg("SYSCON:\n");
lldbg(" CPUID: %08x ICSR: %08x AIRCR: %08x SCR: %08x\n",
llerr("SYSCON:\n");
llerr(" CPUID: %08x ICSR: %08x AIRCR: %08x SCR: %08x\n",
getreg32(ARMV6M_SYSCON_CPUID), getreg32(ARMV6M_SYSCON_ICSR),
getreg32(ARMV6M_SYSCON_AIRCR), getreg32(ARMV6M_SYSCON_SCR));
lldbg(" CCR: %08x SHPR2: %08x SHPR3: %08x\n",
llerr(" CCR: %08x SHPR2: %08x SHPR3: %08x\n",
getreg32(ARMV6M_SYSCON_CCR), getreg32(ARMV6M_SYSCON_SHPR2),
getreg32(ARMV6M_SYSCON_SHPR3));

4
arch/arm/src/armv6-m/up_hardfault.c
View file

@ -55,7 +55,7 @@
****************************************************************************/
#ifdef CONFIG_DEBUG_HARDFAULT
# define hfdbg(format, ...) lldbg(format, ##__VA_ARGS__)
# define hfdbg(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define hfdbg(x...)
#endif
@ -149,7 +149,7 @@ int up_hardfault(int irq, FAR void *context)
#endif
(void)up_irq_save();
lldbg("PANIC!!! Hard fault\n");
llerr("PANIC!!! Hard fault\n");
PANIC();
return OK; /* Won't get here */
}

2
arch/arm/src/armv6-m/up_releasepending.c
View file

@ -66,7 +66,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
slldbg("From TCB=%p\n", rtcb);
sllerr("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */

2
arch/arm/src/armv6-m/up_reprioritizertr.c
View file

@ -94,7 +94,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
slldbg("TCB=%p PRI=%d\n", tcb, priority);
sllerr("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just removed the head

4
arch/arm/src/armv6-m/up_svcall.c
View file

@ -69,7 +69,7 @@
*/
#if defined(CONFIG_DEBUG_SYSCALL) || defined(CONFIG_DEBUG_SVCALL)
# define svcdbg(format, ...) lldbg(format, ##__VA_ARGS__)
# define svcdbg(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define svcdbg(x...)
#endif
@ -471,7 +471,7 @@ int up_svcall(int irq, FAR void *context)
regs[REG_R0] -= CONFIG_SYS_RESERVED;
#else
slldbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
sllerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
#endif
}
break;

50
arch/arm/src/armv7-a/arm_assert.c
View file

@ -79,7 +79,7 @@
* code. We are going to print the task name if:
*
* CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
* (defined(CONFIG_DEBUG_FEATURES) || <-- And the debug is enabled (lldbg used)
* (defined(CONFIG_DEBUG_FEATURES) || <-- And the debug is enabled (llerr used)
* defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
*/
@ -121,7 +121,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t *)stack;
lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
llerr("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
@ -140,11 +140,11 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
/* Dump interesting properties of this task */
#ifdef CONFIG_PRINT_TASKNAME
lldbg("%s: PID=%d Stack Used=%lu of %lu\n",
llerr("%s: PID=%d Stack Used=%lu of %lu\n",
tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#else
lldbg("PID: %d Stack Used=%lu of %lu\n",
llerr("PID: %d Stack Used=%lu of %lu\n",
tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#endif
@ -184,12 +184,12 @@ static inline void up_registerdump(void)
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
llerr("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
llerr("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
}
}
#else
@ -253,7 +253,7 @@ static void up_dumpstate(void)
ustacksize = (uint32_t)rtcb->adj_stack_size;
}
lldbg("Current sp: %08x\n", sp);
llerr("Current sp: %08x\n", sp);
#if CONFIG_ARCH_INTERRUPTSTACK > 3
/* Get the limits on the interrupt stack memory */
@ -263,21 +263,21 @@ static void up_dumpstate(void)
/* Show interrupt stack info */
lldbg("Interrupt stack:\n");
lldbg(" base: %08x\n", istackbase);
lldbg(" size: %08x\n", istacksize);
llerr("Interrupt stack:\n");
llerr(" base: %08x\n", istackbase);
llerr(" size: %08x\n", istacksize);
#ifdef CONFIG_STACK_COLORATION
lldbg(" used: %08x\n", up_check_intstack());
llerr(" used: %08x\n", up_check_intstack());
#endif
#endif
/* Show user stack info */
lldbg("User stack:\n");
lldbg(" base: %08x\n", ustackbase);
lldbg(" size: %08x\n", ustacksize);
llerr("User stack:\n");
llerr(" base: %08x\n", ustackbase);
llerr(" size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
lldbg(" used: %08x\n", up_check_tcbstack(rtcb));
llerr(" used: %08x\n", up_check_tcbstack(rtcb));
#endif
#ifdef CONFIG_ARCH_KERNEL_STACK
@ -287,9 +287,9 @@ static void up_dumpstate(void)
{
kstackbase = (uint32_t)rtcb->xcp.kstack + CONFIG_ARCH_KERNEL_STACKSIZE - 4;
lldbg("Kernel stack:\n");
lldbg(" base: %08x\n", kstackbase);
lldbg(" size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
llerr("Kernel stack:\n");
llerr(" base: %08x\n", kstackbase);
llerr(" size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
}
#endif
@ -300,7 +300,7 @@ static void up_dumpstate(void)
{
/* Yes.. dump the interrupt stack */
lldbg("Interrupt Stack\n", sp);
llerr("Interrupt Stack\n", sp);
up_stackdump(sp, istackbase);
/* Extract the user stack pointer which should lie
@ -308,7 +308,7 @@ static void up_dumpstate(void)
*/
sp = g_intstackbase;
lldbg("User sp: %08x\n", sp);
llerr("User sp: %08x\n", sp);
}
#endif
@ -318,7 +318,7 @@ static void up_dumpstate(void)
if (sp > ustackbase - ustacksize && sp < ustackbase)
{
lldbg("User Stack\n", sp);
llerr("User Stack\n", sp);
up_stackdump(sp, ustackbase);
}
@ -329,7 +329,7 @@ static void up_dumpstate(void)
if (sp >= (uint32_t)rtcb->xcp.kstack && sp < kstackbase)
{
lldbg("Kernel Stack\n", sp);
llerr("Kernel Stack\n", sp);
up_stackdump(sp, kstackbase);
}
#endif
@ -337,7 +337,7 @@ static void up_dumpstate(void)
#ifdef CONFIG_SMP
/* Show the CPU number */
lldbg("CPU%d:\n", up_cpu_index());
llerr("CPU%d:\n", up_cpu_index());
#endif
/* Then dump the CPU registers (if available) */
@ -402,10 +402,10 @@ void up_assert(const uint8_t *filename, int lineno)
board_autoled_on(LED_ASSERTION);
#ifdef CONFIG_PRINT_TASKNAME
lldbg("Assertion failed at file:%s line: %d task: %s\n",
llerr("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
lldbg("Assertion failed at file:%s line: %d\n",
llerr("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
up_dumpstate();

6
arch/arm/src/armv7-a/arm_cpustart.c
View file

@ -64,19 +64,19 @@ static inline void arm_registerdump(FAR struct tcb_s *tcb)
{
int regndx;
lldbg("CPU%d:\n", up_cpu_index());
llerr("CPU%d:\n", up_cpu_index());
/* Dump the startup registers */
for (regndx = REG_R0; regndx <= REG_R15; regndx += 8)
{
uint32_t *ptr = (uint32_t *)&tcb->xcp.regs[regndx];
lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
llerr("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regndx, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
lldbg("CPSR: %08x\n", tcb->xcp.regs[REG_CPSR]);
llerr("CPSR: %08x\n", tcb->xcp.regs[REG_CPSR]);
}
#else
# define arm_registerdump(tcb)

6
arch/arm/src/armv7-a/arm_dataabort.c
View file

@ -115,7 +115,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
* fatal error.
*/
pglldbg("DFSR: %08x DFAR: %08x\n", dfsr, dfar);
pgllerr("DFSR: %08x DFAR: %08x\n", dfsr, dfar);
if ((dfsr & FSR_MASK) != FSR_PAGE)
{
goto segfault;
@ -163,7 +163,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
return regs;
segfault:
lldbg("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
llerr("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
regs[REG_PC], dfar, dfsr);
PANIC();
return regs; /* To keep the compiler happy */
@ -181,7 +181,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
/* Crash -- possibly showing diagnostic debug information. */
lldbg("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
llerr("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
regs[REG_PC], dfar, dfsr);
PANIC();
return regs; /* To keep the compiler happy */

2
arch/arm/src/armv7-a/arm_l2cc_pl310.c
View file

@ -411,7 +411,7 @@ void up_l2ccinitialize(void)
putreg32(L2CC_CR_L2CEN, L2CC_CR);
}
lldbg("(%d ways) * (%d bytes/way) = %d bytes\n",
llerr("(%d ways) * (%d bytes/way) = %d bytes\n",
PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE);
}

6
arch/arm/src/armv7-a/arm_prefetchabort.c
View file

@ -97,7 +97,7 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
* virtual addresses.
*/
pglldbg("VADDR: %08x VBASE: %08x VEND: %08x\n",
pgllerr("VADDR: %08x VBASE: %08x VEND: %08x\n",
regs[REG_PC], PG_PAGED_VBASE, PG_PAGED_VEND);
if (regs[REG_R15] >= PG_PAGED_VBASE && regs[REG_R15] < PG_PAGED_VEND)
@ -134,7 +134,7 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
}
else
{
lldbg("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
llerr("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
regs[REG_PC], ifar, ifsr);
PANIC();
}
@ -154,7 +154,7 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
/* Crash -- possibly showing diagnostic debug information. */
lldbg("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
llerr("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
regs[REG_PC], ifar, ifsr);
PANIC();
return regs; /* To keep the compiler happy */

2
arch/arm/src/armv7-a/arm_releasepending.c
View file

@ -67,7 +67,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
slldbg("From TCB=%p\n", rtcb);
sllerr("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */

2
arch/arm/src/armv7-a/arm_reprioritizertr.c
View file

@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
slldbg("TCB=%p PRI=%d\n", tcb, priority);
sllerr("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just

4
arch/arm/src/armv7-a/arm_syscall.c
View file

@ -71,7 +71,7 @@
/* Debug ********************************************************************/
#if defined(CONFIG_DEBUG_SYSCALL)
# define svcdbg(format, ...) lldbg(format, ##__VA_ARGS__)
# define svcdbg(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define svcdbg(x...)
#endif
@ -526,7 +526,7 @@ uint32_t *arm_syscall(uint32_t *regs)
uint32_t *arm_syscall(uint32_t *regs)
{
lldbg("SYSCALL from 0x%x\n", regs[REG_PC]);
llerr("SYSCALL from 0x%x\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC();
}

2
arch/arm/src/armv7-a/arm_undefinedinsn.c
View file

@ -68,7 +68,7 @@
uint32_t *arm_undefinedinsn(uint32_t *regs)
{
lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]);
llerr("Undefined instruction at 0x%x\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC();
return regs; /* To keep the compiler happy */

4
arch/arm/src/armv7-a/gic.h
View file

@ -595,12 +595,12 @@
#ifdef CONFIG_DEBUG_IRQ
# define gicdbg(format, ...) dbg(format, ##__VA_ARGS__)
# define giclldbg(format, ...) lldbg(format, ##__VA_ARGS__)
# define gicllerr(format, ...) llerr(format, ##__VA_ARGS__)
# define gicinfo(format, ...) info(format, ##__VA_ARGS__)
# define gicllinfo(format, ...) llinfo(format, ##__VA_ARGS__)
#else
# define gicdbg(x...)
# define giclldbg(x...)
# define gicllerr(x...)
# define gicinfo(x...)
# define gicllinfo(x...)
#endif

52
arch/arm/src/armv7-m/up_assert.c
View file

@ -79,7 +79,7 @@
* code. We are going to print the task name if:
*
* CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
* (defined(CONFIG_DEBUG_FEATURES) || <-- And the debug is enabled (lldbg used)
* (defined(CONFIG_DEBUG_FEATURES) || <-- And the debug is enabled (llerr used)
* defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
*/
@ -125,7 +125,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t *)stack;
lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
llerr("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
@ -144,11 +144,11 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
/* Dump interesting properties of this task */
#ifdef CONFIG_PRINT_TASKNAME
lldbg("%s: PID=%d Stack Used=%lu of %lu\n",
llerr("%s: PID=%d Stack Used=%lu of %lu\n",
tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#else
lldbg("PID: %d Stack Used=%lu of %lu\n",
llerr("PID: %d Stack Used=%lu of %lu\n",
tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#endif
@ -183,29 +183,29 @@ static inline void up_registerdump(void)
{
/* Yes.. dump the interrupt registers */
lldbg("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
llerr("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
lldbg("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
llerr("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
lldbg("xPSR: %08x BASEPRI: %08x CONTROL: %08x\n",
llerr("xPSR: %08x BASEPRI: %08x CONTROL: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
getcontrol());
#else
lldbg("xPSR: %08x PRIMASK: %08x CONTROL: %08x\n",
llerr("xPSR: %08x PRIMASK: %08x CONTROL: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
getcontrol());
#endif
#ifdef REG_EXC_RETURN
lldbg("EXC_RETURN: %08x\n", CURRENT_REGS[REG_EXC_RETURN]);
llerr("EXC_RETURN: %08x\n", CURRENT_REGS[REG_EXC_RETURN]);
#endif
}
}
@ -275,12 +275,12 @@ static void up_dumpstate(void)
/* Show interrupt stack info */
lldbg("sp: %08x\n", sp);
lldbg("IRQ stack:\n");
lldbg(" base: %08x\n", istackbase);
lldbg(" size: %08x\n", istacksize);
llerr("sp: %08x\n", sp);
llerr("IRQ stack:\n");
llerr(" base: %08x\n", istackbase);
llerr(" size: %08x\n", istacksize);
#ifdef CONFIG_STACK_COLORATION
lldbg(" used: %08x\n", up_check_intstack());
llerr(" used: %08x\n", up_check_intstack());
#endif
/* Does the current stack pointer lie within the interrupt
@ -302,14 +302,14 @@ static void up_dumpstate(void)
if (CURRENT_REGS)
{
sp = CURRENT_REGS[REG_R13];
lldbg("sp: %08x\n", sp);
llerr("sp: %08x\n", sp);
}
lldbg("User stack:\n");
lldbg(" base: %08x\n", ustackbase);
lldbg(" size: %08x\n", ustacksize);
llerr("User stack:\n");
llerr(" base: %08x\n", ustackbase);
llerr(" size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
lldbg(" used: %08x\n", up_check_tcbstack(rtcb));
llerr(" used: %08x\n", up_check_tcbstack(rtcb));
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@ -325,11 +325,11 @@ static void up_dumpstate(void)
/* Show user stack info */
lldbg("sp: %08x\n", sp);
lldbg("stack base: %08x\n", ustackbase);
lldbg("stack size: %08x\n", ustacksize);
llerr("sp: %08x\n", sp);
llerr("stack base: %08x\n", ustackbase);
llerr("stack size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
lldbg("stack used: %08x\n", up_check_tcbstack(rtcb));
llerr("stack used: %08x\n", up_check_tcbstack(rtcb));
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@ -338,7 +338,7 @@ static void up_dumpstate(void)
if (sp > ustackbase || sp <= ustackbase - ustacksize)
{
lldbg("ERROR: Stack pointer is not within the allocated stack\n");
llerr("ERROR: Stack pointer is not within the allocated stack\n");
}
else
{
@ -410,10 +410,10 @@ void up_assert(const uint8_t *filename, int lineno)
board_autoled_on(LED_ASSERTION);
#ifdef CONFIG_PRINT_TASKNAME
lldbg("Assertion failed at file:%s line: %d task: %s\n",
llerr("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
lldbg("Assertion failed at file:%s line: %d\n",
llerr("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif

4
arch/arm/src/armv7-m/up_hardfault.c
View file

@ -60,7 +60,7 @@
*/
#ifdef CONFIG_DEBUG_HARDFAULT
# define hfdbg(format, ...) lldbg(format, ##__VA_ARGS__)
# define hfdbg(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define hfdbg(x...)
#endif
@ -179,7 +179,7 @@ int up_hardfault(int irq, FAR void *context)
#endif
(void)up_irq_save();
lldbg("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));
llerr("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));
PANIC();
return OK;
}

6
arch/arm/src/armv7-m/up_memfault.c
View file

@ -55,7 +55,7 @@
#undef DEBUG_MEMFAULTS /* Define to debug memory management faults */
#ifdef DEBUG_MEMFAULTS
# define mfdbg(format, ...) lldbg(format, ##__VA_ARGS__)
# define mfdbg(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define mfdbg(x...)
#endif
@ -92,9 +92,9 @@ int up_memfault(int irq, FAR void *context)
/* Dump some memory management fault info */
(void)up_irq_save();
lldbg("PANIC!!! Memory Management Fault:\n");
llerr("PANIC!!! Memory Management Fault:\n");
mfdbg(" IRQ: %d context: %p\n", irq, regs);
lldbg(" CFAULTS: %08x MMFAR: %08x\n",
llerr(" CFAULTS: %08x MMFAR: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_MEMMANAGE_ADDR));
mfdbg(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());

4
arch/arm/src/armv7-m/up_ramvec_attach.c
View file

@ -54,12 +54,12 @@
****************************************************************************/
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the interrupt
* config. NOTE: that only lldbg types are used so that the output is
* config. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_IRQ
# define intdbg lldbg
# define intdbg llerr
# define intinfo llinfo
#else
# define intdbg(x...)

4
arch/arm/src/armv7-m/up_ramvec_initialize.c
View file

@ -73,12 +73,12 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the interrupt
* config. NOTE: that only lldbg types are used so that the output is
* config. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_IRQ
# define intdbg lldbg
# define intdbg llerr
# define intinfo llinfo
#else
# define intdbg(x...)

2
arch/arm/src/armv7-m/up_releasepending.c
View file

@ -66,7 +66,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
slldbg("From TCB=%p\n", rtcb);
sllerr("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */

2
arch/arm/src/armv7-m/up_reprioritizertr.c
View file

@ -94,7 +94,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
slldbg("TCB=%p PRI=%d\n", tcb, priority);
sllerr("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just removed the head

4
arch/arm/src/armv7-m/up_svcall.c
View file

@ -70,7 +70,7 @@
*/
#if defined(CONFIG_DEBUG_SYSCALL) || defined(CONFIG_DEBUG_SVCALL)
# define svcdbg(format, ...) lldbg(format, ##__VA_ARGS__)
# define svcdbg(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define svcdbg(x...)
#endif
@ -473,7 +473,7 @@ int up_svcall(int irq, FAR void *context)
regs[REG_R0] -= CONFIG_SYS_RESERVED;
#else
slldbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
sllerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
#endif
}
break;

48
arch/arm/src/armv7-r/arm_assert.c
View file

@ -79,7 +79,7 @@
* code. We are going to print the task name if:
*
* CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
* (defined(CONFIG_DEBUG_FEATURES) || <-- And the debug is enabled (lldbg used)
* (defined(CONFIG_DEBUG_FEATURES) || <-- And the debug is enabled (llerr used)
* defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
*/
@ -121,7 +121,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t *)stack;
lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
llerr("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
@ -140,11 +140,11 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
/* Dump interesting properties of this task */
#ifdef CONFIG_PRINT_TASKNAME
lldbg("%s: PID=%d Stack Used=%lu of %lu\n",
llerr("%s: PID=%d Stack Used=%lu of %lu\n",
tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#else
lldbg("PID: %d Stack Used=%lu of %lu\n",
llerr("PID: %d Stack Used=%lu of %lu\n",
tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#endif
@ -184,12 +184,12 @@ static inline void up_registerdump(void)
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
llerr("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
llerr("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
}
}
#else
@ -253,7 +253,7 @@ static void up_dumpstate(void)
ustacksize = (uint32_t)rtcb->adj_stack_size;
}
lldbg("Current sp: %08x\n", sp);
llerr("Current sp: %08x\n", sp);
#if CONFIG_ARCH_INTERRUPTSTACK > 3
/* Get the limits on the interrupt stack memory */
@ -263,21 +263,21 @@ static void up_dumpstate(void)
/* Show interrupt stack info */
lldbg("Interrupt stack:\n");
lldbg(" base: %08x\n", istackbase);
lldbg(" size: %08x\n", istacksize);
llerr("Interrupt stack:\n");
llerr(" base: %08x\n", istackbase);
llerr(" size: %08x\n", istacksize);
#ifdef CONFIG_STACK_COLORATION
lldbg(" used: %08x\n", up_check_intstack());
llerr(" used: %08x\n", up_check_intstack());
#endif
#endif
/* Show user stack info */
lldbg("User stack:\n");
lldbg(" base: %08x\n", ustackbase);
lldbg(" size: %08x\n", ustacksize);
llerr("User stack:\n");
llerr(" base: %08x\n", ustackbase);
llerr(" size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
lldbg(" used: %08x\n", up_check_tcbstack(rtcb));
llerr(" used: %08x\n", up_check_tcbstack(rtcb));
#endif
#ifdef CONFIG_ARCH_KERNEL_STACK
@ -287,9 +287,9 @@ static void up_dumpstate(void)
{
kstackbase = (uint32_t)rtcb->xcp.kstack + CONFIG_ARCH_KERNEL_STACKSIZE - 4;
lldbg("Kernel stack:\n");
lldbg(" base: %08x\n", kstackbase);
lldbg(" size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
llerr("Kernel stack:\n");
llerr(" base: %08x\n", kstackbase);
llerr(" size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
}
#endif
@ -300,7 +300,7 @@ static void up_dumpstate(void)
{
/* Yes.. dump the interrupt stack */
lldbg("Interrupt Stack\n", sp);
llerr("Interrupt Stack\n", sp);
up_stackdump(sp, istackbase);
/* Extract the user stack pointer which should lie
@ -308,7 +308,7 @@ static void up_dumpstate(void)
*/
sp = g_intstackbase;
lldbg("User sp: %08x\n", sp);
llerr("User sp: %08x\n", sp);
}
#endif
@ -318,7 +318,7 @@ static void up_dumpstate(void)
if (sp > ustackbase - ustacksize && sp < ustackbase)
{
lldbg("User Stack\n", sp);
llerr("User Stack\n", sp);
up_stackdump(sp, ustackbase);
}
@ -329,7 +329,7 @@ static void up_dumpstate(void)
if (sp >= (uint32_t)rtcb->xcp.kstack && sp < kstackbase)
{
lldbg("Kernel Stack\n", sp);
llerr("Kernel Stack\n", sp);
up_stackdump(sp, kstackbase);
}
#endif
@ -396,10 +396,10 @@ void up_assert(const uint8_t *filename, int lineno)
board_autoled_on(LED_ASSERTION);
#ifdef CONFIG_PRINT_TASKNAME
lldbg("Assertion failed at file:%s line: %d task: %s\n",
llerr("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
lldbg("Assertion failed at file:%s line: %d\n",
llerr("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
up_dumpstate();

2
arch/arm/src/armv7-r/arm_dataabort.c
View file

@ -86,7 +86,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
/* Crash -- possibly showing diagnostic debug information. */
lldbg("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
llerr("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
regs[REG_PC], dfar, dfsr);
PANIC();
return regs; /* To keep the compiler happy */

2
arch/arm/src/armv7-r/arm_l2cc_pl310.c
View file

@ -411,7 +411,7 @@ void up_l2ccinitialize(void)
putreg32(L2CC_CR_L2CEN, L2CC_CR);
}
lldbg("(%d ways) * (%d bytes/way) = %d bytes\n",
llerr("(%d ways) * (%d bytes/way) = %d bytes\n",
PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE);
}

2
arch/arm/src/armv7-r/arm_prefetchabort.c
View file

@ -82,7 +82,7 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
/* Crash -- possibly showing diagnostic debug information. */
lldbg("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
llerr("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
regs[REG_PC], ifar, ifsr);
PANIC();
return regs; /* To keep the compiler happy */

2
arch/arm/src/armv7-r/arm_releasepending.c
View file

@ -67,7 +67,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
slldbg("From TCB=%p\n", rtcb);
sllerr("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */

2
arch/arm/src/armv7-r/arm_reprioritizertr.c
View file

@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
slldbg("TCB=%p PRI=%d\n", tcb, priority);
sllerr("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just

4
arch/arm/src/armv7-r/arm_syscall.c
View file

@ -69,7 +69,7 @@
/* Debug ********************************************************************/
#if defined(CONFIG_DEBUG_SYSCALL)
# define svcdbg(format, ...) lldbg(format, ##__VA_ARGS__)
# define svcdbg(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define svcdbg(x...)
#endif
@ -524,7 +524,7 @@ uint32_t *arm_syscall(uint32_t *regs)
uint32_t *arm_syscall(uint32_t *regs)
{
lldbg("SYSCALL from 0x%x\n", regs[REG_PC]);
llerr("SYSCALL from 0x%x\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC();
}

2
arch/arm/src/armv7-r/arm_undefinedinsn.c
View file

@ -80,7 +80,7 @@
uint32_t *arm_undefinedinsn(uint32_t *regs)
{
lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]);
llerr("Undefined instruction at 0x%x\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC();
return regs; /* To keep the compiler happy */

2
arch/arm/src/c5471/c5471_ethernet.c
View file

@ -2241,7 +2241,7 @@ void up_netinitialize(void)
{
/* We could not attach the ISR to the ISR */
nlldbg("irq_attach() failed\n");
nllerr("irq_attach() failed\n");
return;
}

4
arch/arm/src/common/up_exit.c
View file

@ -138,10 +138,10 @@ void _exit(int status)
(void)up_irq_save();
slldbg("TCB=%p exiting\n", this_task());
sllerr("TCB=%p exiting\n", this_task());
#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
slldbg("Other tasks:\n");
sllerr("Other tasks:\n");
sched_foreach(_up_dumponexit, NULL);
#endif

4
arch/arm/src/common/up_initialize.c
View file

@ -77,13 +77,13 @@ static void up_calibratedelay(void)
{
int i;
lldbg("Beginning 100s delay\n");
llerr("Beginning 100s delay\n");
for (i = 0; i < 100; i++)
{
up_mdelay(1000);
}
lldbg("End 100s delay\n");
llerr("End 100s delay\n");
}
#else
# define up_calibratedelay()

26
arch/arm/src/dm320/dm320_usbdev.c
View file

@ -443,7 +443,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
{
if (count == 4)
{
lldbg("...\n");
llerr("...\n");
}
return val;
@ -460,7 +460,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
lldbg("[repeats %d more times]\n", count-3);
llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@ -472,7 +472,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
/* Show the register value read */
lldbg("%08x->%02x\n", addr, val);
llerr("%08x->%02x\n", addr, val);
return val;
}
#endif
@ -506,7 +506,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
{
if (count == 4)
{
lldbg("...\n");
llerr("...\n");
}
return val;
@ -523,7 +523,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
lldbg("[repeats %d more times]\n", count-3);
llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@ -535,7 +535,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
/* Show the register value read */
lldbg("%08x->%04x\n", addr, val);
llerr("%08x->%04x\n", addr, val);
return val;
}
#endif
@ -569,7 +569,7 @@ static uint32_t dm320_getreg32(uint32_t addr)
{
if (count == 4)
{
lldbg("...\n");
llerr("...\n");
}
return val;
@ -586,7 +586,7 @@ static uint32_t dm320_getreg32(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
lldbg("[repeats %d more times]\n", count-3);
llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@ -598,7 +598,7 @@ static uint32_t dm320_getreg32(uint32_t addr)
/* Show the register value read */
lldbg("%08x->%08x\n", addr, val);
llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@ -616,7 +616,7 @@ static void dm320_putreg8(uint8_t val, uint32_t addr)
{
/* Show the register value being written */
lldbg("%08x<-%02x\n", addr, val);
llerr("%08x<-%02x\n", addr, val);
/* Write the value */
@ -637,7 +637,7 @@ static void dm320_putreg16(uint16_t val, uint32_t addr)
{
/* Show the register value being written */
lldbg("%08x<-%04x\n", addr, val);
llerr("%08x<-%04x\n", addr, val);
/* Write the value */
@ -658,7 +658,7 @@ static void dm320_putreg32(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
lldbg("%08x<-%08x\n", addr, val);
llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@ -2417,7 +2417,7 @@ void up_usbinitialize(void)
#ifdef CONFIG_DEBUG_USB
chiprev = dm320_getreg16(DM320_BUSC_REVR);
ulldbg("DM320 revision : %d.%d\n", chiprev >> 4, chiprev & 0x0f);
ullerr("DM320 revision : %d.%d\n", chiprev >> 4, chiprev & 0x0f);
#endif
/* Enable USB clock & GIO clock */

2
arch/arm/src/efm32/efm32_adc.c
View file

@ -1191,7 +1191,7 @@ static int adc_interrupt(FAR struct adc_dev_s *dev)
adcsr = adc_getreg(priv, EFM32_ADC_SR_OFFSET);
if ((adcsr & ADC_SR_AWD) != 0)
{
alldbg("WARNING: Analog Watchdog, Value converted out of range!\n");
allerr("WARNING: Analog Watchdog, Value converted out of range!\n");
}
/* EOC: End of conversion */

20
arch/arm/src/efm32/efm32_irq.c
View file

@ -115,34 +115,34 @@ static void efm32_dumpnvic(const char *msg, int irq)
irqstate_t flags;
flags = enter_critical_section();
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
lldbg(" INTCTRL: %08x VECTAB: %08x\n",
llerr("NVIC (%s, irq=%d):\n", msg, irq);
llerr(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
llerr(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
lldbg(" IRQ ENABLE: %08x %08x %08x\n",
llerr(" IRQ ENABLE: %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
lldbg(" SYSH_PRIO: %08x %08x %08x\n",
llerr(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 32)
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 48)
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 64)
lldbg(" %08x\n",
llerr(" %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY));
#endif
#endif

4
arch/arm/src/efm32/efm32_leserial.c
View file

@ -518,7 +518,7 @@ static int efm32_interrupt(struct uart_dev_s *dev)
* FERR - Framing Error Interrupt Enable
*/
lldbg("RX ERROR: %08x\n", intflags);
llerr("RX ERROR: %08x\n", intflags);
}
/* Check for transmit errors */
@ -527,7 +527,7 @@ static int efm32_interrupt(struct uart_dev_s *dev)
{
/* TXOF - TX Overflow Interrupt Enable */
lldbg("RX ERROR: %08x\n", intflags);
llerr("RX ERROR: %08x\n", intflags);
}
#endif

4
arch/arm/src/efm32/efm32_pwm.c
View file

@ -83,7 +83,7 @@
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmlldbg lldbg
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
# define pwmllinfo llinfo
@ -95,7 +95,7 @@
# endif
#else
# define pwmdbg(x...)
# define pwmlldbg(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)

4
arch/arm/src/efm32/efm32_rmu.h
View file

@ -56,9 +56,9 @@
#endif
#ifdef CONFIG_EFM32_RMU_DEBUG
# define rmudbg lldbg
# define rmudbg llerr
# ifdef CONFIG_DEBUG_INFO
# define rmuinfo lldbg
# define rmuinfo llerr
# else
# define rmuinfo(x...)
# endif

2
arch/arm/src/efm32/efm32_rtc_burtc.c
View file

@ -131,7 +131,7 @@
#define __CNT_ZERO_REG EFM32_BURTC_RET_REG(1)
#if defined CONFIG_DEBUG_FEATURES && defined CONFIG_RTC_DEBUG
# define burtcdbg lldbg
# define burtcdbg llerr
#else
# define burtcdbg(x...)
#endif

4
arch/arm/src/efm32/efm32_serial.c
View file

@ -780,7 +780,7 @@ static int efm32_rxinterrupt(struct uart_dev_s *dev)
* FERR - Framing Error Interrupt Enable
*/
lldbg("RX ERROR: %08x\n", intflags);
llerr("RX ERROR: %08x\n", intflags);
}
#endif
@ -863,7 +863,7 @@ static int efm32_txinterrupt(struct uart_dev_s *dev)
{
/* TXOF - TX Overflow Interrupt Enable */
lldbg("RX ERROR: %08x\n", intflags);
llerr("RX ERROR: %08x\n", intflags);
}
#endif

4
arch/arm/src/efm32/efm32_spi.c
View file

@ -100,9 +100,9 @@
#endif
#ifdef CONFIG_DEBUG_SPI
# define spidbg lldbg
# define spidbg llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo lldbg
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif

6
arch/arm/src/efm32/efm32_timer.c
View file

@ -69,19 +69,19 @@
#ifdef CONFIG_DEBUG_TIMER
# define efm32_timerdbg dbg
# define efm32_timerlldbg lldbg
# define efm32_timerllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define efm32_timerinfo info
# define efm32_timerllinfo llinfo
# define efm32_timer_dumpgpio(p,m) efm32_dumpgpio(p,m)
# else
# define efm32_timerlldbg(x...)
# define efm32_timerllerr(x...)
# define efm32_timerllinfo(x...)
# define efm32_timer_dumpgpio(p,m)
# endif
#else
# define efm32_timerdbg(x...)
# define efm32_timerlldbg(x...)
# define efm32_timerllerr(x...)
# define efm32_timerinfo(x...)
# define efm32_timerllinfo(x...)
# define efm32_timer_dumpgpio(p,m)

12
arch/arm/src/efm32/efm32_usbdev.c
View file

@ -815,7 +815,7 @@ static uint32_t efm32_getreg(uint32_t addr)
{
if (count == 4)
{
lldbg("...\n");
llerr("...\n");
}
return val;
@ -832,7 +832,7 @@ static uint32_t efm32_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
lldbg("[repeats %d more times]\n", count-3);
llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@ -844,7 +844,7 @@ static uint32_t efm32_getreg(uint32_t addr)
/* Show the register value read */
lldbg("%08x->%08x\n", addr, val);
llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@ -862,7 +862,7 @@ static void efm32_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
lldbg("%08x<-%08x\n", addr, val);
llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@ -2629,7 +2629,7 @@ static inline void efm32_epout_interrupt(FAR struct efm32_usbdev_s *priv)
if ((daint & 1) != 0)
{
regval = efm32_getreg(EFM32_USB_DOEPINT(epno));
ulldbg("DOEPINT(%d) = %08x\n", epno, regval);
ullerr("DOEPINT(%d) = %08x\n", epno, regval);
efm32_putreg(0xFF, EFM32_USB_DOEPINT(epno));
}
@ -2859,7 +2859,7 @@ static inline void efm32_epin_interrupt(FAR struct efm32_usbdev_s *priv)
{
if ((daint & 1) != 0)
{
ulldbg("DIEPINT(%d) = %08x\n",
ullerr("DIEPINT(%d) = %08x\n",
epno, efm32_getreg(EFM32_USB_DIEPINT(epno)));
efm32_putreg(0xFF, EFM32_USB_DIEPINT(epno));
}

4
arch/arm/src/efm32/efm32_usbhost.c
View file

@ -582,7 +582,7 @@ static const struct efm32_usbhost_trace_s g_trace2[TRACE2_NSTRINGS] =
#ifdef CONFIG_EFM32_USBHOST_REGDEBUG
static void efm32_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@ -632,7 +632,7 @@ static void efm32_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
lldbg("[repeats %d more times]\n", count);
llerr("[repeats %d more times]\n", count);
}
}

26
arch/arm/src/kinetis/kinetis_irq.c
View file

@ -111,43 +111,43 @@ static void kinetis_dumpnvic(const char *msg, int irq)
irqstate_t flags;
flags = enter_critical_section();
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
lldbg(" INTCTRL: %08x VECTAB: %08x\n",
llerr("NVIC (%s, irq=%d):\n", msg, irq);
llerr(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
llerr(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
lldbg(" IRQ ENABLE: %08x %08x %08x %08x\n",
llerr(" IRQ ENABLE: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
lldbg(" SYSH_PRIO: %08x %08x %08x\n",
llerr(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
#if NR_VECTORS > 111
lldbg(" %08x %08x\n",
llerr(" %08x %08x\n",
getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY));
#endif

4
arch/arm/src/kinetis/kinetis_pindump.c
View file

@ -115,9 +115,9 @@ void kinetis_pindump(uint32_t pinset, const char *msg)
flags = enter_critical_section();
lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
llerr("GPIO%c pinset: %08x base: %08x -- %s\n",
g_portchar[port], pinset, base, msg);
lldbg(" PDOR: %08x PDIR: %08x PDDR: %08x\n",
llerr(" PDOR: %08x PDIR: %08x PDDR: %08x\n",
getreg32(base + KINETIS_GPIO_PDOR_OFFSET),
getreg32(base + KINETIS_GPIO_PDIR_OFFSET),
getreg32(base + KINETIS_GPIO_PDDR_OFFSET));

6
arch/arm/src/kinetis/kinetis_pwm.c
View file

@ -84,19 +84,19 @@
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmlldbg lldbg
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
# define pwmllinfo llinfo
# define pwm_dumpgpio(p,m) kinetis_pindump(p,m)
# else
# define pwmlldbg(x...)
# define pwmllerr(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmlldbg(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)

6
arch/arm/src/kinetis/kinetis_sdhc.c
View file

@ -973,7 +973,7 @@ static void kinetis_eventtimeout(int argc, uint32_t arg)
/* Wake up any waiting threads */
kinetis_endwait(priv, SDIOWAIT_TIMEOUT);
flldbg("Timeout: remaining: %d\n", priv->remaining);
fllerr("Timeout: remaining: %d\n", priv->remaining);
}
}
@ -1162,7 +1162,7 @@ static int kinetis_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
flldbg("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
fllerr("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
kinetis_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@ -1172,7 +1172,7 @@ static int kinetis_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
flldbg("ERROR: Data timeout, remaining: %d\n", priv->remaining);
fllerr("ERROR: Data timeout, remaining: %d\n", priv->remaining);
kinetis_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT);
}
}

2
arch/arm/src/kinetis/kinetis_serial.c
View file

@ -804,7 +804,7 @@ static int up_interrupte(int irq, void *context)
*/
regval = up_serialin(priv, KINETIS_UART_S1_OFFSET);
lldbg("S1: %02x\n", regval);
llerr("S1: %02x\n", regval);
regval = up_serialin(priv, KINETIS_UART_D_OFFSET);
return OK;
}

34
arch/arm/src/kinetis/kinetis_usbdev.c
View file

@ -369,9 +369,9 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
# undef CONFIG_KHCI_USBDEV_BDTDEBUG
# define CONFIG_KHCI_USBDEV_BDTDEBUG 1
# define regdbg lldbg
# define regdbg llerr
# ifdef CONFIG_DEBUG_INFO
# define reginfo lldbg
# define reginfo llerr
# else
# define reginfo(x...)
# endif
@ -389,9 +389,9 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
#ifdef CONFIG_KHCI_USBDEV_BDTDEBUG
# define bdtdbg lldbg
# define bdtdbg llerr
# ifdef CONFIG_DEBUG_INFO
# define bdtinfo lldbg
# define bdtinfo llerr
# else
# define bdtinfo(x...)
# endif
@ -714,7 +714,7 @@ static uint16_t khci_getreg(uint32_t addr)
{
if (count == 4)
{
lldbg("...\n");
llerr("...\n");
}
return val;
}
@ -730,7 +730,7 @@ static uint16_t khci_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
lldbg("[repeats %d more times]\n", count-3);
llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@ -742,7 +742,7 @@ static uint16_t khci_getreg(uint32_t addr)
/* Show the register value read */
lldbg("%08x->%04x\n", addr, val);
llerr("%08x->%04x\n", addr, val);
return val;
}
#endif
@ -756,7 +756,7 @@ static void khci_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
lldbg("%08x<-%04x\n", addr, val);
llerr("%08x<-%04x\n", addr, val);
/* Write the value */
@ -2913,7 +2913,7 @@ x
if ((usbir & USB_INT_ERROR) != 0)
{
usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_UERR), usbir);
ulldbg("Error: EIR=%04x\n", khci_getreg(KINETIS_USB0_ERRSTAT));
ullerr("Error: EIR=%04x\n", khci_getreg(KINETIS_USB0_ERRSTAT));
/* Clear all pending USB error interrupts */
@ -3241,7 +3241,7 @@ static int khci_epconfigure(struct usbdev_ep_s *ep,
if (!ep || !desc)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
ulldbg("ERROR: ep=%p desc=%p\n");
ullerr("ERROR: ep=%p desc=%p\n");
return -EINVAL;
}
#endif
@ -3368,7 +3368,7 @@ static int khci_epdisable(struct usbdev_ep_s *ep)
if (!ep)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
ulldbg("ERROR: ep=%p\n", ep);
ullerr("ERROR: ep=%p\n", ep);
return -EINVAL;
}
#endif
@ -3467,7 +3467,7 @@ static int khci_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
ulldbg("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
ullerr("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
return -EINVAL;
}
#endif
@ -3479,7 +3479,7 @@ static int khci_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
if (!priv->driver)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
ulldbg("ERROR: driver=%p\n", priv->driver);
ullerr("ERROR: driver=%p\n", priv->driver);
return -ESHUTDOWN;
}
#endif
@ -4248,10 +4248,10 @@ static void khci_hwreset(struct khci_usbdev_s *priv)
khci_putreg((uint8_t)((uint32_t)g_bdt >> 16), KINETIS_USB0_BDTPAGE2);
khci_putreg((uint8_t)(((uint32_t)g_bdt >> 8) & USB_BDTPAGE1_MASK), KINETIS_USB0_BDTPAGE1);
ulldbg("BDT Address %hhx \n" ,&g_bdt);
ulldbg("BDTPAGE3 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE3));
ulldbg("BDTPAGE2 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE2));
ulldbg("BDTPAGE1 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE1));
ullerr("BDT Address %hhx \n" ,&g_bdt);
ullerr("BDTPAGE3 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE3));
ullerr("BDTPAGE2 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE2));
ullerr("BDTPAGE1 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE1));
/* Clear any pending interrupts */

4
arch/arm/src/kl/kl_dumpgpio.c
View file

@ -123,9 +123,9 @@ void kl_dumpgpio(gpio_cfgset_t pinset, const char *msg)
flags = enter_critical_section();
lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
llerr("GPIO%c pinset: %08x base: %08x -- %s\n",
g_portchar[port], pinset, base, msg);
lldbg(" PDOR: %08x PDIR: %08x PDDR: %08x\n",
llerr(" PDOR: %08x PDIR: %08x PDDR: %08x\n",
getreg32(base + KL_GPIO_PDOR_OFFSET),
getreg32(base + KL_GPIO_PDIR_OFFSET),
getreg32(base + KL_GPIO_PDDR_OFFSET));

20
arch/arm/src/kl/kl_irq.c
View file

@ -97,26 +97,26 @@ static void kl_dumpnvic(const char *msg, int irq)
flags = enter_critical_section();
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
lldbg(" ISER: %08x ICER: %08x\n",
llerr("NVIC (%s, irq=%d):\n", msg, irq);
llerr(" ISER: %08x ICER: %08x\n",
getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
lldbg(" ISPR: %08x ICPR: %08x\n",
llerr(" ISPR: %08x ICPR: %08x\n",
getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
lldbg("SYSCON:\n");
lldbg(" CPUID: %08x\n",
llerr("SYSCON:\n");
llerr(" CPUID: %08x\n",
getreg32(ARMV6M_SYSCON_CPUID));
lldbg(" ICSR: %08x AIRCR: %08x\n",
llerr(" ICSR: %08x AIRCR: %08x\n",
getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
lldbg(" SCR: %08x CCR: %08x\n",
llerr(" SCR: %08x CCR: %08x\n",
getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
lldbg(" SHPR2: %08x SHPR3: %08x\n",
llerr(" SHPR2: %08x SHPR3: %08x\n",
getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
leave_critical_section(flags);

4
arch/arm/src/kl/kl_pwm.c
View file

@ -81,7 +81,7 @@
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmlldbg lldbg
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
# define pwmllinfo llinfo
@ -93,7 +93,7 @@
# endif
#else
# define pwmdbg(x...)
# define pwmlldbg(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)

4
arch/arm/src/kl/kl_spi.c
View file

@ -71,9 +71,9 @@
*/
#ifdef CONFIG_DEBUG_SPI
# define spidbg lldbg
# define spidbg llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo lldbg
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif

12
arch/arm/src/lpc11xx/lpc11_gpiodbg.c
View file

@ -157,30 +157,30 @@ int lpc11_dumpgpio(lpc11_pinset_t pinset, const char *msg)
/* The following requires exclusive access to the GPIO registers */
flags = enter_critical_section();
lldbg("GPIO%c pin%d (pinset: %08x) -- %s\n",
llerr("GPIO%c pin%d (pinset: %08x) -- %s\n",
port + '0', pin, pinset, msg);
#if defined(LPC176x)
lldbg(" PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n",
llerr(" PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n",
pinsel, pinsel ? getreg32(pinsel) : 0,
pinmode, pinmode ? getreg32(pinmode) : 0,
g_odmode[port], getreg32(g_odmode[port]));
#elif defined(LPC178x)
lldbg(" IOCON[%08x]: %08x\n", iocon, getreg32(iocon));
llerr(" IOCON[%08x]: %08x\n", iocon, getreg32(iocon));
#endif
base = g_fiobase[port];
lldbg(" FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n",
llerr(" FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n",
base+LPC11_FIO_DIR_OFFSET, getreg32(base+LPC11_FIO_DIR_OFFSET),
base+LPC11_FIO_MASK_OFFSET, getreg32(base+LPC11_FIO_MASK_OFFSET),
base+LPC11_FIO_PIN_OFFSET, getreg32(base+LPC11_FIO_PIN_OFFSET));
base = g_intbase[port];
lldbg(" IOINTSTATUS[%08x]: %08x INTSTATR[%08x]: %08x INSTATF[%08x]: %08x\n",
llerr(" IOINTSTATUS[%08x]: %08x INTSTATR[%08x]: %08x INSTATF[%08x]: %08x\n",
LPC11_GPIOINT_IOINTSTATUS, getreg32(LPC11_GPIOINT_IOINTSTATUS),
base+LPC11_GPIOINT_INTSTATR_OFFSET, getreg32(base+LPC11_GPIOINT_INTSTATR_OFFSET),
base+LPC11_GPIOINT_INTSTATF_OFFSET, getreg32(base+LPC11_GPIOINT_INTSTATF_OFFSET));
lldbg(" INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
llerr(" INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
base+LPC11_GPIOINT_INTENR_OFFSET, getreg32(base+LPC11_GPIOINT_INTENR_OFFSET),
base+LPC11_GPIOINT_INTENF_OFFSET, getreg32(base+LPC11_GPIOINT_INTENF_OFFSET));
leave_critical_section(flags);

20
arch/arm/src/lpc11xx/lpc11_irq.c
View file

@ -93,26 +93,26 @@ static void lpc11_dumpnvic(const char *msg, int irq)
flags = enter_critical_section();
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
lldbg(" ISER: %08x ICER: %08x\n",
llerr("NVIC (%s, irq=%d):\n", msg, irq);
llerr(" ISER: %08x ICER: %08x\n",
getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
lldbg(" ISPR: %08x ICPR: %08x\n",
llerr(" ISPR: %08x ICPR: %08x\n",
getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
lldbg("SYSCON:\n");
lldbg(" CPUID: %08x\n",
llerr("SYSCON:\n");
llerr(" CPUID: %08x\n",
getreg32(ARMV6M_SYSCON_CPUID));
lldbg(" ICSR: %08x AIRCR: %08x\n",
llerr(" ICSR: %08x AIRCR: %08x\n",
getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
lldbg(" SCR: %08x CCR: %08x\n",
llerr(" SCR: %08x CCR: %08x\n",
getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
lldbg(" SHPR2: %08x SHPR3: %08x\n",
llerr(" SHPR2: %08x SHPR3: %08x\n",
getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
leave_critical_section(flags);

4
arch/arm/src/lpc11xx/lpc11_spi.c
View file

@ -80,9 +80,9 @@
*/
#ifdef CONFIG_DEBUG_SPI
# define spidbg lldbg
# define spidbg llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo lldbg
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif

4
arch/arm/src/lpc11xx/lpc11_ssp.c
View file

@ -81,9 +81,9 @@
*/
#ifdef CONFIG_DEBUG_SPI
# define sspdbg lldbg
# define sspdbg llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo lldbg
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif

4
arch/arm/src/lpc11xx/lpc11_timer.c
View file

@ -90,7 +90,7 @@
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmlldbg lldbg
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
# define pwmllinfo llinfo
@ -102,7 +102,7 @@
# endif
#else
# define pwmdbg(x...)
# define pwmlldbg(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)

24
arch/arm/src/lpc17xx/lpc176x_rtc.c
View file

@ -83,12 +83,12 @@
#ifdef CONFIG_DEBUG_RTC
# define rtcdbg dbg
# define rtcinfo info
# define rtclldbg lldbg
# define rtcllerr llerr
# define rtcllinfo llinfo
#else
# define rtcdbg(x...)
# define rtcinfo(x...)
# define rtclldbg(x...)
# define rtcllerr(x...)
# define rtcllinfo(x...)
#endif
@ -134,9 +134,9 @@ volatile bool g_rtc_enabled = false;
#ifdef CONFIG_DEBUG_RTC
static void rtc_dumpregs(FAR const char *msg)
{
rtclldbg("%s:\n", msg);
rtclldbg(" DOM : %08x\n", (getreg32(LPC17_RTC_DOM) & RTC_DOM_MASK));
rtclldbg(" DOW : %08x\n", (getreg32(LPC17_RTC_DOW) & RTC_DOW_MASK));
rtcllerr("%s:\n", msg);
rtcllerr(" DOM : %08x\n", (getreg32(LPC17_RTC_DOM) & RTC_DOM_MASK));
rtcllerr(" DOW : %08x\n", (getreg32(LPC17_RTC_DOW) & RTC_DOW_MASK));
}
#else
# define rtc_dumpregs(msg)
@ -159,13 +159,13 @@ static void rtc_dumpregs(FAR const char *msg)
#ifdef CONFIG_DEBUG_RTC
static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
{
rtclldbg("%s:\n", msg);
rtclldbg(" tm_sec: %08x\n", tp->tm_sec);
rtclldbg(" tm_min: %08x\n", tp->tm_min);
rtclldbg(" tm_hour: %08x\n", tp->tm_hour);
rtclldbg(" tm_mday: %08x\n", tp->tm_mday);
rtclldbg(" tm_mon: %08x\n", tp->tm_mon);
rtclldbg(" tm_year: %08x\n", tp->tm_year);
rtcllerr("%s:\n", msg);
rtcllerr(" tm_sec: %08x\n", tp->tm_sec);
rtcllerr(" tm_min: %08x\n", tp->tm_min);
rtcllerr(" tm_hour: %08x\n", tp->tm_hour);
rtcllerr(" tm_mday: %08x\n", tp->tm_mday);
rtcllerr(" tm_mon: %08x\n", tp->tm_mon);
rtcllerr(" tm_year: %08x\n", tp->tm_year);
}
#else
# define rtc_dumptime(tp, msg)

18
arch/arm/src/lpc17xx/lpc17_can.c
View file

@ -166,18 +166,18 @@
#ifdef CONFIG_DEBUG_CAN
# ifdef CONFIG_CAN_REGDEBUG
# define candbg lldbg
# define candbg llerr
# define caninfo llinfo
# else
# define candbg dbg
# define caninfo info
# endif
# define canlldbg lldbg
# define canllerr llerr
# define canllinfo llinfo
#else
# define candbg(x...)
# define caninfo(x...)
# define canlldbg(x...)
# define canllerr(x...)
# define canllinfo(x...)
#endif
@ -325,7 +325,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
{
if (count == 4)
{
lldbg("...\n");
llerr("...\n");
}
return;
@ -342,7 +342,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
{
/* Yes.. then show how many times the value repeated */
lldbg("[repeats %d more times]\n", count-3);
llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@ -354,7 +354,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
/* Show the register value read */
lldbg("%08x->%08x\n", addr, value);
llerr("%08x->%08x\n", addr, value);
}
#endif
@ -415,7 +415,7 @@ static void can_putreg(struct up_dev_s *priv, int offset, uint32_t value)
/* Show the register value being written */
lldbg("%08x<-%08x\n", addr, value);
llerr("%08x<-%08x\n", addr, value);
/* Write the value */
@ -475,7 +475,7 @@ static void can_putcommon(uint32_t addr, uint32_t value)
{
/* Show the register value being written */
lldbg("%08x<-%08x\n", addr, value);
llerr("%08x<-%08x\n", addr, value);
/* Write the value */
@ -988,7 +988,7 @@ static void can_interrupt(FAR struct can_dev_s *dev)
if ((rfs & CAN_RFS_FF) != 0)
{
canlldbg("ERROR: Received message with extended identifier. Dropped\n");
canllerr("ERROR: Received message with extended identifier. Dropped\n");
}
else
#endif

16
arch/arm/src/lpc17xx/lpc17_ethernet.c
View file

@ -837,7 +837,7 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
if ((*rxstat & RXSTAT_INFO_ERROR) != 0)
{
nlldbg("Error. considx: %08x prodidx: %08x rxstat: %08x\n",
nllerr("Error. considx: %08x prodidx: %08x rxstat: %08x\n",
considx, prodidx, *rxstat);
NETDEV_RXERRORS(&priv->lp_dev);
}
@ -850,20 +850,20 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
/* else */ if (pktlen > CONFIG_NET_ETH_MTU + CONFIG_NET_GUARDSIZE)
{
nlldbg("Too big. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
nllerr("Too big. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
considx, prodidx, pktlen, *rxstat);
NETDEV_RXERRORS(&priv->lp_dev);
}
else if ((*rxstat & RXSTAT_INFO_LASTFLAG) == 0)
{
nlldbg("Fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
nllerr("Fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
considx, prodidx, pktlen, *rxstat);
NETDEV_RXFRAGMENTS(&priv->lp_dev);
fragment = true;
}
else if (fragment)
{
nlldbg("Last fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
nllerr("Last fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
considx, prodidx, pktlen, *rxstat);
NETDEV_RXFRAGMENTS(&priv->lp_dev);
fragment = false;
@ -1202,13 +1202,13 @@ static int lpc17_interrupt(int irq, void *context)
{
if ((status & ETH_INT_RXOVR) != 0)
{
nlldbg("RX Overrun. status: %08x\n", status);
nllerr("RX Overrun. status: %08x\n", status);
NETDEV_RXERRORS(&priv->lp_dev);
}
if ((status & ETH_INT_TXUNR) != 0)
{
nlldbg("TX Underrun. status: %08x\n", status);
nllerr("TX Underrun. status: %08x\n", status);
NETDEV_TXERRORS(&priv->lp_dev);
}
@ -1229,7 +1229,7 @@ static int lpc17_interrupt(int irq, void *context)
if ((status & ETH_INT_RXERR) != 0)
{
nlldbg("RX Error. status: %08x\n", status);
nllerr("RX Error. status: %08x\n", status);
NETDEV_RXERRORS(&priv->lp_dev);
}
@ -1281,7 +1281,7 @@ static int lpc17_interrupt(int irq, void *context)
if ((status & ETH_INT_TXERR) != 0)
{
nlldbg("TX Error. status: %08x\n", status);
nllerr("TX Error. status: %08x\n", status);
NETDEV_TXERRORS(&priv->lp_dev);
}

12
arch/arm/src/lpc17xx/lpc17_gpiodbg.c
View file

@ -157,30 +157,30 @@ int lpc17_dumpgpio(lpc17_pinset_t pinset, const char *msg)
/* The following requires exclusive access to the GPIO registers */
flags = enter_critical_section();
lldbg("GPIO%c pin%d (pinset: %08x) -- %s\n",
llerr("GPIO%c pin%d (pinset: %08x) -- %s\n",
port + '0', pin, pinset, msg);
#if defined(LPC176x)
lldbg(" PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n",
llerr(" PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n",
pinsel, pinsel ? getreg32(pinsel) : 0,
pinmode, pinmode ? getreg32(pinmode) : 0,
g_odmode[port], getreg32(g_odmode[port]));
#elif defined(LPC178x)
lldbg(" IOCON[%08x]: %08x\n", iocon, getreg32(iocon));
llerr(" IOCON[%08x]: %08x\n", iocon, getreg32(iocon));
#endif
base = g_fiobase[port];
lldbg(" FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n",
llerr(" FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n",
base+LPC17_FIO_DIR_OFFSET, getreg32(base+LPC17_FIO_DIR_OFFSET),
base+LPC17_FIO_MASK_OFFSET, getreg32(base+LPC17_FIO_MASK_OFFSET),
base+LPC17_FIO_PIN_OFFSET, getreg32(base+LPC17_FIO_PIN_OFFSET));
base = g_intbase[port];
lldbg(" IOINTSTATUS[%08x]: %08x INTSTATR[%08x]: %08x INSTATF[%08x]: %08x\n",
llerr(" IOINTSTATUS[%08x]: %08x INTSTATR[%08x]: %08x INSTATF[%08x]: %08x\n",
LPC17_GPIOINT_IOINTSTATUS, getreg32(LPC17_GPIOINT_IOINTSTATUS),
base+LPC17_GPIOINT_INTSTATR_OFFSET, getreg32(base+LPC17_GPIOINT_INTSTATR_OFFSET),
base+LPC17_GPIOINT_INTSTATF_OFFSET, getreg32(base+LPC17_GPIOINT_INTSTATF_OFFSET));
lldbg(" INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
llerr(" INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
base+LPC17_GPIOINT_INTENR_OFFSET, getreg32(base+LPC17_GPIOINT_INTENR_OFFSET),
base+LPC17_GPIOINT_INTENF_OFFSET, getreg32(base+LPC17_GPIOINT_INTENF_OFFSET));
leave_critical_section(flags);

16
arch/arm/src/lpc17xx/lpc17_irq.c
View file

@ -108,25 +108,25 @@ static void lpc17_dumpnvic(const char *msg, int irq)
irqstate_t flags;
flags = enter_critical_section();
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
lldbg(" INTCTRL: %08x VECTAB: %08x\n",
llerr("NVIC (%s, irq=%d):\n", msg, irq);
llerr(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
llerr(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
lldbg(" IRQ ENABLE: %08x\n", getreg32(NVIC_IRQ0_31_ENABLE));
lldbg(" SYSH_PRIO: %08x %08x %08x\n",
llerr(" IRQ ENABLE: %08x\n", getreg32(NVIC_IRQ0_31_ENABLE));
llerr(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
leave_critical_section(flags);

4
arch/arm/src/lpc17xx/lpc17_mcpwm.c
View file

@ -89,7 +89,7 @@
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmlldbg lldbg
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
# define pwmllinfo llinfo
@ -101,7 +101,7 @@
# endif
#else
# define pwmdbg(x...)
# define pwmlldbg(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)

4
arch/arm/src/lpc17xx/lpc17_pwm.c
View file

@ -107,7 +107,7 @@
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmlldbg lldbg
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
# define pwmllinfo llinfo
@ -119,7 +119,7 @@
# endif
#else
# define pwmdbg(x...)
# define pwmlldbg(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)

14
arch/arm/src/lpc17xx/lpc17_sdcard.c
View file

@ -813,7 +813,7 @@ static void lpc17_dmacallback(DMA_HANDLE handle, void *arg, int status)
if (status < 0)
{
flldbg("DMA error %d, remaining: %d\n", status, priv->remaining);
fllerr("DMA error %d, remaining: %d\n", status, priv->remaining);
result = SDIOWAIT_ERROR;
}
else
@ -1080,7 +1080,7 @@ static void lpc17_eventtimeout(int argc, uint32_t arg)
/* Yes.. wake up any waiting threads */
lpc17_endwait(priv, SDIOWAIT_TIMEOUT);
flldbg("Timeout: remaining: %d\n", priv->remaining);
fllerr("Timeout: remaining: %d\n", priv->remaining);
}
}
@ -1297,7 +1297,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
flldbg("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
fllerr("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@ -1307,7 +1307,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
flldbg("ERROR: Data timeout, remaining: %d\n", priv->remaining);
fllerr("ERROR: Data timeout, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT);
}
@ -1317,7 +1317,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
flldbg("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining);
fllerr("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@ -1327,7 +1327,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
flldbg("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining);
fllerr("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@ -1337,7 +1337,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
flldbg("ERROR: Start bit, remaining: %d\n", priv->remaining);
fllerr("ERROR: Start bit, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
}

4
arch/arm/src/lpc17xx/lpc17_spi.c
View file

@ -80,9 +80,9 @@
*/
#ifdef CONFIG_DEBUG_SPI
# define spidbg lldbg
# define spidbg llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo lldbg
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif

4
arch/arm/src/lpc17xx/lpc17_ssp.c
View file

@ -81,9 +81,9 @@
*/
#ifdef CONFIG_DEBUG_SPI
# define sspdbg lldbg
# define sspdbg llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo lldbg
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif

4
arch/arm/src/lpc17xx/lpc17_timer.c
View file

@ -90,7 +90,7 @@
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmlldbg lldbg
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
# define pwmllinfo llinfo
@ -102,7 +102,7 @@
# endif
#else
# define pwmdbg(x...)
# define pwmlldbg(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)

4
arch/arm/src/lpc17xx/lpc17_usbdev.c
View file

@ -531,7 +531,7 @@ static struct lpc17_dmadesc_s g_usbddesc[CONFIG_LPC17_USBDEV_NDMADESCRIPTORS];
#ifdef CONFIG_LPC17_USBDEV_REGDEBUG
static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@ -581,7 +581,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
lldbg("[repeats %d more times]\n", count);
llerr("[repeats %d more times]\n", count);
}
}

12
arch/arm/src/lpc17xx/lpc17_usbhost.c
View file

@ -456,7 +456,7 @@ static struct lpc17_xfrinfo_s g_xfrbuffers[CONFIG_LPC17_USBHOST_NPREALLOC];
#ifdef CONFIG_LPC17_USBHOST_REGDEBUG
static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@ -506,7 +506,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
lldbg("[repeats %d more times]\n", count);
llerr("[repeats %d more times]\n", count);
}
}
@ -1694,7 +1694,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
}
else
{
ulldbg("Spurious status change (connected)\n");
ullerr("Spurious status change (connected)\n");
}
/* The LSDA (Low speed device attached) bit is valid
@ -1750,7 +1750,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
}
else
{
ulldbg("Spurious status change (disconnected)\n");
ullerr("Spurious status change (disconnected)\n");
}
}
@ -1830,7 +1830,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
{
/* The transfer failed for some reason... dump some diagnostic info. */
ulldbg("ERROR: ED xfrtype:%d TD CTRL:%08x/CC:%d RHPORTST1:%08x\n",
ullerr("ERROR: ED xfrtype:%d TD CTRL:%08x/CC:%d RHPORTST1:%08x\n",
ed->xfrtype, td->hw.ctrl, xfrinfo->tdstatus,
lpc17_getreg(LPC17_USBHOST_RHPORTST1));
}
@ -1894,7 +1894,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
#ifdef CONFIG_DEBUG_USB
if ((pending & LPC17_DEBUG_INTS) != 0)
{
ulldbg("ERROR: Unhandled interrupts INTST:%08x\n", intst);
ullerr("ERROR: Unhandled interrupts INTST:%08x\n", intst);
}
#endif

8
arch/arm/src/lpc214x/lpc214x_usbdev.c
View file

@ -539,7 +539,7 @@ static uint32_t lpc214x_getreg(uint32_t addr)
{
if (count == 4)
{
lldbg("...\n");
llerr("...\n");
}
return val;
@ -556,7 +556,7 @@ static uint32_t lpc214x_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
lldbg("[repeats %d more times]\n", count-3);
llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@ -568,7 +568,7 @@ static uint32_t lpc214x_getreg(uint32_t addr)
/* Show the register value read */
lldbg("%08x->%08x\n", addr, val);
llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@ -586,7 +586,7 @@ static void lpc214x_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
lldbg("%08x<-%08x\n", addr, val);
llerr("%08x<-%08x\n", addr, val);
/* Write the value */

4
arch/arm/src/lpc2378/lpc23xx_spi.c
View file

@ -79,9 +79,9 @@
/* CONFIG_DEBUG_SPI enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spidbg lldbg
# define spidbg llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo lldbg
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif

4
arch/arm/src/lpc31xx/lpc31_ehci.c
View file

@ -833,7 +833,7 @@ static uint32_t lpc31_swap32(uint32_t value)
static void lpc31_printreg(volatile uint32_t *regaddr, uint32_t regval,
bool iswrite)
{
lldbg("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
llerr("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
}
#endif
@ -884,7 +884,7 @@ static void lpc31_checkreg(volatile uint32_t *regaddr, uint32_t regval, bool isw
{
/* No.. More than one. */
lldbg("[repeats %d more times]\n", count);
llerr("[repeats %d more times]\n", count);
}
}

8
arch/arm/src/lpc31xx/lpc31_spi.c
View file

@ -207,7 +207,7 @@ static bool spi_checkreg(bool wr, uint32_t value, uint32_t address)
{
if (g_ntimes > 0)
{
lldbg("...[Repeats %d times]...\n", g_ntimes);
llerr("...[Repeats %d times]...\n", g_ntimes);
}
g_wrlast = wr;
@ -239,7 +239,7 @@ static void spi_putreg(uint32_t value, uint32_t address)
{
if (spi_checkreg(true, value, address))
{
lldbg("%08x<-%08x\n", address, value);
llerr("%08x<-%08x\n", address, value);
}
putreg32(value, address);
}
@ -265,7 +265,7 @@ static uint32_t spi_getreg(uint32_t address)
uint32_t value = getreg32(address);
if (spi_checkreg(false, value, address))
{
lldbg("%08x->%08x\n", address, value);
llerr("%08x->%08x\n", address, value);
}
return value;
}
@ -921,7 +921,7 @@ FAR struct spi_dev_s *lpc31_spibus_initialize(int port)
*/
#ifdef CONFIG_LPC31_SPI_REGDEBUG
lldbg("PINS: %08x MODE0: %08x MODE1: %08x\n",
llerr("PINS: %08x MODE0: %08x MODE1: %08x\n",
spi_getreg(LPC31_IOCONFIG_SPI_PINS),
spi_getreg(LPC31_IOCONFIG_SPI_MODE0),
spi_getreg(LPC31_IOCONFIG_SPI_MODE1));

8
arch/arm/src/lpc31xx/lpc31_usbdev.c
View file

@ -501,7 +501,7 @@ static uint32_t lpc31_getreg(uint32_t addr)
{
if (count == 4)
{
lldbg("...\n");
llerr("...\n");
}
return val;
@ -518,7 +518,7 @@ static uint32_t lpc31_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
lldbg("[repeats %d more times]\n", count-3);
llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@ -530,7 +530,7 @@ static uint32_t lpc31_getreg(uint32_t addr)
/* Show the register value read */
lldbg("%08x->%08x\n", addr, val);
llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@ -548,7 +548,7 @@ static void lpc31_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
lldbg("%08x<-%08x\n", addr, val);
llerr("%08x<-%08x\n", addr, val);
/* Write the value */

4
arch/arm/src/lpc43xx/lpc43_ehci.c
View file

@ -817,7 +817,7 @@ static uint32_t lpc43_swap32(uint32_t value)
static void lpc43_printreg(volatile uint32_t *regaddr, uint32_t regval,
bool iswrite)
{
lldbg("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
llerr("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
}
#endif
@ -868,7 +868,7 @@ static void lpc43_checkreg(volatile uint32_t *regaddr, uint32_t regval, bool isw
{
/* No.. More than one. */
lldbg("[repeats %d more times]\n", count);
llerr("[repeats %d more times]\n", count);
}
}

20
arch/arm/src/lpc43xx/lpc43_ethernet.c
View file

@ -704,7 +704,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
{
if (count == 4)
{
lldbg("...\n");
llerr("...\n");
}
return val;
@ -721,7 +721,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
lldbg("[repeats %d more times]\n", count-3);
llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@ -733,7 +733,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
/* Show the register value read */
lldbg("%08x->%08x\n", addr, val);
llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@ -760,7 +760,7 @@ static void lpc43_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
lldbg("%08x<-%08x\n", addr, val);
llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@ -1440,7 +1440,7 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv)
if (!lpc43_isfreebuffer(priv))
{
nlldbg("No free buffers\n");
nllerr("No free buffers\n");
return -ENOMEM;
}
@ -1547,7 +1547,7 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv)
* scanning logic, and continue scanning with the next frame.
*/
nlldbg("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
nllerr("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
lpc43_freesegment(priv, rxcurr, priv->segments);
}
}
@ -1608,7 +1608,7 @@ static void lpc43_receive(FAR struct lpc43_ethmac_s *priv)
if (dev->d_len > CONFIG_NET_ETH_MTU)
{
nlldbg("DROPPED: Too big: %d\n", dev->d_len);
nllerr("DROPPED: Too big: %d\n", dev->d_len);
/* Free dropped packet buffer */
if (dev->d_buf)
@ -1727,7 +1727,7 @@ static void lpc43_receive(FAR struct lpc43_ethmac_s *priv)
else
#endif
{
nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
nllerr("DROPPED: Unknown type: %04x\n", BUF->type);
}
/* We are finished with the RX buffer. NOTE: If the buffer is
@ -1975,7 +1975,7 @@ static inline void lpc43_interrupt_process(FAR struct lpc43_ethmac_s *priv)
{
/* Just let the user know what happened */
nlldbg("Abnormal event(s): %08x\n", dmasr);
nllerr("Abnormal event(s): %08x\n", dmasr);
/* Clear all pending abnormal events */
@ -2179,7 +2179,7 @@ static void lpc43_txtimeout_expiry(int argc, uint32_t arg, ...)
{
FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)arg;
nlldbg("Timeout!\n");
nllerr("Timeout!\n");
#ifdef CONFIG_NET_NOINTS
/* Disable further Ethernet interrupts. This will prevent some race

4
arch/arm/src/lpc43xx/lpc43_gpdma.c
View file

@ -67,9 +67,9 @@
#undef DMA_VERBOSE /* Define to enable verbose debug */
#ifdef DMA_DEBUG
# define dmadbg lldbg
# define dmadbg llerr
# ifdef DMA_VERBOSE
# define spiinfo lldbg
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif

18
arch/arm/src/lpc43xx/lpc43_irq.c
View file

@ -113,29 +113,29 @@ static void lpc43_dumpnvic(const char *msg, int irq)
irqstate_t flags;
flags = enter_critical_section();
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
lldbg(" INTCTRL: %08x VECTAB: %08x\n",
llerr("NVIC (%s, irq=%d):\n", msg, irq);
llerr(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
llerr(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
lldbg(" IRQ ENABLE: %08x %08x\n",
llerr(" IRQ ENABLE: %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
lldbg(" SYSH_PRIO: %08x %08x %08x\n",
llerr(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
lldbg(" %08x %08x %08x\n",
llerr(" %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY));
leave_critical_section(flags);

2
arch/arm/src/lpc43xx/lpc43_rit.c
View file

@ -201,7 +201,7 @@ void up_timer_initialize(void)
mask_bits++;
}
lldbg("mask_bits = %d, mask = %X, ticks_per_int = %d\r\n",
llerr("mask_bits = %d, mask = %X, ticks_per_int = %d\r\n",
mask_bits, (0xffffffff << (32 - mask_bits)), ticks_per_int);
/* Set the mask and compare value so we get interrupts every

4
arch/arm/src/lpc43xx/lpc43_spi.c
View file

@ -67,9 +67,9 @@
/* Enables debug output from this file (needs CONFIG_DEBUG_FEATURES too) */
#ifdef CONFIG_DEBUG_SPI
# define spidbg lldbg
# define spidbg llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo lldbg
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif

4
arch/arm/src/lpc43xx/lpc43_ssp.c
View file

@ -76,9 +76,9 @@
*/
#ifdef CONFIG_SSP_DEBUG
# define sspdbg lldbg
# define sspdbg llerr
# ifdef CONFIG_SSP_VERBOSE
# define spiinfo lldbg
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif

8
arch/arm/src/lpc43xx/lpc43_usb0dev.c
View file

@ -522,7 +522,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
{
if (count == 4)
{
lldbg("...\n");
llerr("...\n");
}
return val;
@ -539,7 +539,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
lldbg("[repeats %d more times]\n", count-3);
llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@ -551,7 +551,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
/* Show the register value read */
lldbg("%08x->%08x\n", addr, val);
llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@ -569,7 +569,7 @@ static void lpc43_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
lldbg("%08x<-%08x\n", addr, val);
llerr("%08x<-%08x\n", addr, val);
/* Write the value */

10
arch/arm/src/moxart/moxart_irq.c
View file

@ -145,15 +145,15 @@ void up_irqinitialize(void)
#if 1
#define REG(x) (*(volatile uint32_t *)(x))
lldbg("\n=============================================================\n");
lldbg("TM CNTL=%08x INTRS=%08x MASK=%08x LOAD=%08x COUNT=%08x M1=%08x\n",
llerr("\n=============================================================\n");
llerr("TM CNTL=%08x INTRS=%08x MASK=%08x LOAD=%08x COUNT=%08x M1=%08x\n",
REG(0x98400030), REG(0x98400034), REG(0x98400038), REG(0x98400004),
REG(0x98400000), REG(0x98400008));
lldbg("IRQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
llerr("IRQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
REG(0x98800014), REG(0x98800004), REG(0x9880000C), REG(0x98800010));
lldbg("FIQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
llerr("FIQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
REG(0x98800034), REG(0x98800024), REG(0x9880002C), REG(0x98800020));
lldbg("=============================================================\n");
llerr("=============================================================\n");
#endif
#ifndef CONFIG_SUPPRESS_INTERRUPTS

8
arch/arm/src/nuc1xx/nuc_dumpgpio.c
View file

@ -124,19 +124,19 @@ void nuc_dumpgpio(gpio_cfgset_t pinset, const char *msg)
flags = enter_critical_section();
lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
llerr("GPIO%c pinset: %08x base: %08x -- %s\n",
g_portchar[port], pinset, base, msg);
lldbg(" PMD: %08x OFFD: %08x DOUT: %08x DMASK: %08x\n",
llerr(" PMD: %08x OFFD: %08x DOUT: %08x DMASK: %08x\n",
getreg32(base + NUC_GPIO_PMD_OFFSET),
getreg32(base + NUC_GPIO_OFFD_OFFSET),
getreg32(base + NUC_GPIO_DOUT_OFFSET),
getreg32(base + NUC_GPIO_DMASK_OFFSET));
lldbg(" PIN: %08x DBEN: %08x IMD: %08x IEN: %08x\n",
llerr(" PIN: %08x DBEN: %08x IMD: %08x IEN: %08x\n",
getreg32(base + NUC_GPIO_PIN_OFFSET),
getreg32(base + NUC_GPIO_DBEN_OFFSET),
getreg32(base + NUC_GPIO_IMD_OFFSET),
getreg32(base + NUC_GPIO_IEN_OFFSET));
lldbg(" ISRC: %08x\n",
llerr(" ISRC: %08x\n",
getreg32(base + NUC_GPIO_ISRC_OFFSET));
leave_critical_section(flags);

20
arch/arm/src/nuc1xx/nuc_irq.c
View file

@ -97,26 +97,26 @@ static void nuc_dumpnvic(const char *msg, int irq)
flags = enter_critical_section();
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
lldbg(" ISER: %08x ICER: %08x\n",
llerr("NVIC (%s, irq=%d):\n", msg, irq);
llerr(" ISER: %08x ICER: %08x\n",
getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
lldbg(" ISPR: %08x ICPR: %08x\n",
llerr(" ISPR: %08x ICPR: %08x\n",
getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
lldbg(" %08x %08x %08x %08x\n",
llerr(" %08x %08x %08x %08x\n",
getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
lldbg("SYSCON:\n");
lldbg(" CPUID: %08x\n",
llerr("SYSCON:\n");
llerr(" CPUID: %08x\n",
getreg32(ARMV6M_SYSCON_CPUID));
lldbg(" ICSR: %08x AIRCR: %08x\n",
llerr(" ICSR: %08x AIRCR: %08x\n",
getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
lldbg(" SCR: %08x CCR: %08x\n",
llerr(" SCR: %08x CCR: %08x\n",
getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
lldbg(" SHPR2: %08x SHPR3: %08x\n",
llerr(" SHPR2: %08x SHPR3: %08x\n",
getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
leave_critical_section(flags);

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