Stack and backtrace dump for Espressif's SoCs (ESP32, ESP32-S2,
ESP32-S3, ESP32-C3, ESP32-C6 and ESP32-H2) is now documented in a
new section for each chip entry page.
This renames a few RV32 configs to follow the convention that names w/o
numbers are for RV32, so that to be in line with majority RV32 configs.
As a result, we have: `nsh` vs `nsh64`, `knsh` vs `knsh64`, `pnsh`
vs `pnsh64`,`flats` vs `flats64`, `nsbi` vs `nsbi64`, `libcxx` vs
`libcxx64` etc. This helps us pick the right config name w/o checking
file contents.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This PR adds a new Build Config `rv-virt:leds64_rust` that builds the Rust App `leds_rust` for QEMU RISC-V 64-bit. The build requires the [Rust Target `riscv64gc-unknown-none-elf`](https://github.com/apache/nuttx/pull/12858):
```bash
rustup target add riscv64gc-unknown-none-elf
```
New Files:
`boards/risc-v/qemu-rv/rv-virt/configs/leds64_rust/defconfig`: Add new Build Config `rv-virt:leds64_rust`
Updated Docs:
`applications/examples/leds_rust/index.rst`: Add `leds_rust` example app
`platforms/risc-v/qemu-rv/boards/rv-virt/index.rst`: Add `rv-virt:leds64_rust` config
This revises PROTECTED build for qemu-rv mainly to avoid hard-coded
addresses in linker scripts. It also added rv32 support, cleaned up
config `pnsh64` and added config `pnsh`.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This change implements a driver for the two watchdog timers on the BL808, and enables it as part of the timer config. The driver is based on the GP timer driver.
- This PR adds the LED Driver for QEMU RISC-V 32-bit and 64-bit (User LEDs and Auto LEDs)
- QEMU RISC-V LED Driver will be used by the Rust Blinky App for Google Summer of Code
- Blinking the LED is probably the most common Embedded Demo, and now it's supported by QEMU RISC-V
- We added NuttX Configs `rv-virt:leds` and `rv-virt:leds64` to support User LEDs for 32-bit and 64-bit RISC-V
- Turning on/off a Simulated User LED will print a log message: "LED 1 set to 1"
- The code is derived from NuttX PinePhone LED Driver
This PR adds support for Milk-V Duo S 64-bit RISC-V SBC, based on SOPHGO SG2000 SoC (T-Head C906 Core). Most of the code is derived from NuttX for Ox64 BL808. The source files are explained in the articles here: https://github.com/lupyuen/nuttx-sg2000
Modified Files:
`boards/Kconfig`: Added Milk-V Duo S board
`arch/risc-v/src/sg2000/sg2000_timerisr.c`: Fixed MTIMER_FREQ for sleep() to work correctly
New Files in boards/risc-v/sg2000/milkv_duos:
`src/sg2000_appinit.c`: Startup Code
`include/board.h`: Milk-V Duo S Definitions
`include/board_memorymap.h`: Memory Map
`src/etc/init.d/rc.sysinit`, `rcS`: Startup Script
`src/.gitignore`: Ignore the tmp filesystem
`scripts/ld.script`: Linker Script
`scripts/Make.defs`: Milk-V Duo S Makefile
`src/Makefile`: Milk-V Duo S Makefile
`Kconfig`: Milk-V Duo S Config
`configs/nsh/defconfig`: Build Config for `milkv_duos:nsh`
Updated Documentation:
`platforms/risc-v/sg2000/index.rst`: New page for SOPHGO SG2000 SoC
`platforms/risc-v/sg2000/boards/milkv_duos/index.rst`: Building and booting NuttX for Milk-V Duo S
As kernel mode is not necessary for S mode build, update related
information for the rv-virt board.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.
This commit also removes deprecated code and makes this bootloader
configuration as default for esp32s2 targets and removes the need
for running 'make bootloader' command for it.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
Since SSTC is support by QEMU 7.2.9, kernel mode nuttx is no
longer worked for older QEMU.
Add necessary requirement information for rv-virt board.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
The qemu-rv use a small init code for M mode in kernel build.
It is hard-coding and is difficult to change. Due to the fact,
introduce a already mature SBI implement (e.g OpenSBI) to
replace existing code is a better choice.
This patch introduce some change for qemu-rv:
1. use SSTC to provide time interrupt in kernel build
2. remove uncessary M mode trap.
For simplicity, this patch does not add support for booting
nuttx for any core, but force boot core to start core 0 and
let core 0 do the initialization.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
