board_spiflash_init() => init_storage_partition() => parse_mtd_partition()
`parse_mtd_partition()` may return value that greater than zero when succ
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
After compilation, when starting nsh, the following crash occurs.
==2500151==Shadow memory range interleaves with an existing memory mapping. ASan cannot proceed correctly. ABORTING.
==2500151==ASan shadow was supposed to be located in the [0x1ffff000-0x3fffffff] range.
==2500151==Process memory map follows:
0x30000000-0x33dd4000 /nuttx/nuttx
To avoid overlaps, change the starting address of the text segment.
Using Ttext-segment=0x30000000 causes a crash when starting the 32-bit SIM.
Using -Ttext-segment=0x50000000 causes a crash when starting the 64-bit SIM.
Setting -Ttext-segment=0x40000000 resolves all issues perfectly.
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
profile-generate is used to generate compilation feedback optimization data, not just code coverage data
It will rely on the toolchain library:
nuttx/libs/libc/misc/lib_utsname.c:94:(.text.uname+0x2c): undefined reference to `__gcov_indirect_call_profiler_v4'
arm-none-eabi-ld: nuttx/libs/libc/misc/lib_utsname.c:113:(.text.uname+0x178): undefined reference to `__gcov_indirect_call'
arm-none-eabi-ld: nuttx/libs/libc/misc/lib_utsname.c:113:(.text.uname+0x188): undefined reference to `__gcov_time_profiler_counter'
arm-none-eabi-ld: nuttx/staging/libc.a(lib_utsname.o):(.data..LPBX0+0x30): undefined reference to `__gcov_merge_time_profile'
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
The large max command line length may cause stack overflow.
Test
./tools/configure.sh lm3s6965-ek:qemu-flat
make -j16
qemu-system-arm -semihosting \
-M lm3s6965evb \
-device loader,file=nuttx.bin,addr=0x00000000 \
-netdev user,id=user0 \
-serial mon:stdio -nographic
Link: https://github.com/apache/nuttx-apps/pull/2850
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
/usr/bin/ld: nuttx.rel: relocation R_X86_64_32S against `.rodata' can not be used when making a PIE object; recompile with -fPIE
/usr/bin/ld: failed to set dynamic section sizes: bad value
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
Adds ADC support with minimal feature set (no DMA or Timers etc). A new nucleo-h563zi configuration was added to
provide easy testing with the adc example NSH addon.
Fix Kconfig spacing to tabs
Old upstream from @acassis:
d97227eddd/nuttx/configs/efm32gg-pnbfano/include/board.h
chip/efm32_clockconfig.c:860:24: error: 'BOARD_SWOPORT_LOCATION' undeclared (first use in this function);
did you mean 'BOARD_UART0_ROUTE_LOCATION'?
860 | regval |= ((uint32_t)BOARD_SWOPORT_LOCATION <<
| ^~~~~~~~~~~~~~~~~~~~~~
| BOARD_UART0_ROUTE_LOCATION
chip/efm32_clockconfig.c:860:24: note: each undeclared identifier is reported only once for each function it appears in
chip/efm32_clockconfig.c:866:20: error: 'BOARD_GPIO_SWOPORT' undeclared (first use in this function)
866 | efm32_configgpio(BOARD_GPIO_SWOPORT);
| ^~~~~~~~~~~~~~~~~~
Signed-off-by: chao an <anchao@lixiang.com>
Split nucleo-f4x1re into nucleo-f401re and nucleo-f411re.
These are separate boards and should be in separate directories as it's
done for all other nucleo boards in NuttX
The PLL clock configuration was simplified on the assumption the clocks are correctly set in the board.h file. Instead of seperate conditions
for register components, assume the relevant PLL registers are fully defined in board.h. This should result in easier to understand defines in board.h
and simpler code flow in the standard clock configuration function.
Changes were mad in the board file alongside changing the arch files. Changes to board/stm32h5:
- PLL1 has been configured to use integer instead of fractional mode to reach the 250 MHz target. PLL2 and PLL3 configurations were
removed since they are currently unused in the H5 configuration.
- PLL1 output was verified by testing for changes in serial baud rate.
This performs the DDR training for imx93-evk. In addition to the source code,
it downloads binaries which are included in the final image. The bootloader
must be ARCH_CORTEX_A53 instead of A55 due to atomic instructions that don't
work with the OCRAM / EL3 combination.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
Add lvgl and fb examples for qemu-intel64.
NOTE: multiboot framebufer doesn't work with -kernel argument in QEMU,
NuttX image must be loaded with -cdrom argument.
QEMU command to run examples:
qemu-system-x86_64 -m 2G -cpu host -enable-kvm -cdrom disk.iso -serial mon:stdio
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
enable various types of common applications and libraries, and enable CMake CI checks.
To avoid regression issues in the build system
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
Let's turn off kasan to prevent gprof from running recursively. And turn on gprof to add this profile library to the CI build.
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
This patch fix _eronly value which is used during boot process to initialize
.data section to sram.
Since .data section is 4 byte aligned in flash, also _eronly must follow this
alignment to stay coherent with the start address of .data.
If one of the sections preceeding .data has a size which is not 4 byte aligned,
the _eronly value does not match with .data physical address resulting in wrong
copy of data section to sram and thus an almost immediate hardfault.
Signed-off-by: Federico Braghiroli <federico.braghiroli@gmail.com>
Trdc is configured in EL3 bootloader
Clock pre-initialization is also executed there.
Trdc board configuration for imx93evk included
Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
