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286d37026c
Most tools used for compliance and SBOM generation use SPDX identifiers This change brings us a step closer to an easy SBOM generation. Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
855 lines
23 KiB
C
855 lines
23 KiB
C
/****************************************************************************
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* drivers/pci/pci_ep_test.c
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <stdio.h>
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#include <debug.h>
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#include <stdint.h>
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#include <nuttx/bits.h>
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#include <nuttx/crc32.h>
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#include <nuttx/mm/mm.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/semaphore.h>
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#include <nuttx/irq.h>
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#include <nuttx/pci/pci.h>
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#include <nuttx/pci/pci_regs.h>
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#include <nuttx/pci/pci_ep_test.h>
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#include "pci_drivers.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define PCI_EP_TEST_DEVICE_NAME "/dev/pci-ep-test"
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#define PCI_EP_TEST_IRQ_TYPE_UNDEFINED -1
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#define PCI_EP_TEST_IRQ_TYPE_LEGACY 0
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#define PCI_EP_TEST_IRQ_TYPE_MSI 1
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#define PCI_EP_TEST_IRQ_TYPE_MSIX 2
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#define PCI_EP_TEST_MAGIC 0x0
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#define PCI_EP_TEST_COMMAND 0x4
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#define PCI_EP_TEST_COMMAND_LEGACY_IRQ BIT(0)
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#define PCI_EP_TEST_COMMAND_MSI_IRQ BIT(1)
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#define PCI_EP_TEST_COMMAND_MSIX_IRQ BIT(2)
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#define PCI_EP_TEST_COMMAND_READ BIT(3)
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#define PCI_EP_TEST_COMMAND_WRITE BIT(4)
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#define PCI_EP_TEST_COMMAND_COPY BIT(5)
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#define PCI_EP_TEST_STATUS 0x8
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#define PCI_EP_TEST_STATUS_READ_SUCCESS BIT(0)
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#define PCI_EP_TEST_STATUS_READ_FAIL BIT(1)
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#define PCI_EP_TEST_STATUS_WRITE_SUCCESS BIT(2)
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#define PCI_EP_TEST_STATUS_WRITE_FAIL BIT(3)
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#define PCI_EP_TEST_STATUS_COPY_SUCCESS BIT(4)
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#define PCI_EP_TEST_STATUS_COPY_FAIL BIT(5)
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#define PCI_EP_TEST_STATUS_IRQ_RAISED BIT(6)
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#define PCI_EP_TEST_STATUS_SRC_ADDR_INVALID BIT(7)
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#define PCI_EP_TEST_STATUS_DST_ADDR_INVALID BIT(8)
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#define PCI_EP_TEST_LOWER_SRC_ADDR 0x0c
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#define PCI_EP_TEST_UPPER_SRC_ADDR 0x10
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#define PCI_EP_TEST_LOWER_DST_ADDR 0x14
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#define PCI_EP_TEST_UPPER_DST_ADDR 0x18
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#define PCI_EP_TEST_SIZE 0x1c
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#define PCI_EP_TEST_CHECKSUM 0x20
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#define PCI_EP_TEST_IRQ_TYPE 0x24
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#define PCI_EP_TEST_IRQ_NUMBER 0x28
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#define PCI_EP_TEST_FLAGS 0x2c
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct pci_ep_test_s
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{
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FAR struct pci_device_s *pdev;
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FAR void *base;
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FAR void *bar[PCI_STD_NUM_BARS];
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sem_t irq_raise;
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int irq;
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int irq_type;
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mutex_t mutex;
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int test_bar;
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size_t alignment;
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char name[32];
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};
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/****************************************************************************
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* Private Functions Definitions
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****************************************************************************/
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static int pci_ep_test_probe(FAR struct pci_device_s *dev);
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static int pci_ep_test_open(FAR struct file *filep);
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static int pci_ep_test_close(FAR struct file *filep);
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static int pci_ep_test_ioctl(FAR struct file *filep,
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int cmd, unsigned long arge);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const struct pci_device_id_s g_pci_ep_test_id_table[] =
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{
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{ PCI_DEVICE(0x104c, 0xb500), },
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{ }
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};
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static struct pci_driver_s g_pci_ep_test_drv =
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{
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.id_table = g_pci_ep_test_id_table,
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.probe = pci_ep_test_probe,
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};
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static const struct file_operations g_pci_ep_test_fops =
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{
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pci_ep_test_open, /* open */
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pci_ep_test_close, /* close */
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NULL, /* read */
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NULL, /* write */
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NULL, /* seek */
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pci_ep_test_ioctl, /* ioctl */
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NULL, /* mmap */
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};
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static int g_pci_ep_idr = 0;
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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static inline uint32_t
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pci_ep_test_read_dword(FAR struct pci_ep_test_s *test,
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uint32_t offset)
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{
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uint32_t value;
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pci_read_mmio_dword(test->pdev, test->base + offset, &value);
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return value;
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}
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static inline void
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pci_ep_test_write_dword(FAR struct pci_ep_test_s *test,
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uint32_t offset, uint32_t value)
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{
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pci_write_mmio_dword(test->pdev, test->base + offset, value);
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}
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static inline uint32_t
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pci_ep_test_bar_read_dword(FAR struct pci_ep_test_s *test,
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int bar, uint32_t offset)
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{
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uint32_t value;
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pci_read_mmio_dword(test->pdev, test->bar[bar] + offset, &value);
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return value;
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}
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static inline void
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pci_ep_test_bar_write_dword(FAR struct pci_ep_test_s *test, int bar,
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uint32_t offset, uint32_t value)
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{
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pci_write_mmio_dword(test->pdev, test->bar[bar] + offset, value);
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}
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/****************************************************************************
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* Name: pci_ep_test_open
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*
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* Description:
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* This function is used to open /dev/X.
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*
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****************************************************************************/
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static int pci_ep_test_open(FAR struct file *filep)
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{
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FAR struct pci_ep_test_s *test;
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test = filep->f_inode->i_private;
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DEBUGASSERT(test != NULL);
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filep->f_priv = test;
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return 0;
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}
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/****************************************************************************
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* Name: pci_ep_test_close
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*
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* Description:
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* This function is used to close /dev/X.
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*
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****************************************************************************/
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static int pci_ep_test_close(FAR struct file *filep)
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{
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filep->f_priv = NULL;
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return 0;
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}
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/****************************************************************************
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* Name: pci_ep_test_bar
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*
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* Description:
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* This function is used to test bar access.
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*
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****************************************************************************/
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static bool pci_ep_test_bar(FAR struct pci_ep_test_s *test,
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int barno)
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{
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FAR struct pci_device_s *pdev = test->pdev;
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int size;
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int step;
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if (NULL == test->bar[barno])
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{
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pcierr("bar address is null \n");
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return false;
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}
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size = pci_resource_len(pdev, barno);
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if (barno == test->test_bar)
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{
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size = 0x4;
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}
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for (step = 0; step < size; step += 4)
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{
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pci_ep_test_bar_write_dword(test, barno, step, 0xa0a0a0a0);
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}
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for (step = 0; step < size; step += 4)
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{
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uint32_t val = pci_ep_test_bar_read_dword(test, barno, step);
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if (val != 0xa0a0a0a0)
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{
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pcierr("verify value not pass!!!\n");
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return false;
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}
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}
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return true;
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}
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/****************************************************************************
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* Name: pci_ep_test_legacy_irq
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*
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* Description:
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* This function is used to test legacy irq
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*
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****************************************************************************/
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static bool
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pci_ep_test_legacy_irq(FAR struct pci_ep_test_s *test)
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{
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pci_ep_test_write_dword(test, PCI_EP_TEST_IRQ_TYPE,
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PCI_EP_TEST_IRQ_TYPE_LEGACY);
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pci_ep_test_write_dword(test, PCI_EP_TEST_IRQ_NUMBER, 0);
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pci_ep_test_write_dword(test, PCI_EP_TEST_COMMAND,
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PCI_EP_TEST_COMMAND_LEGACY_IRQ);
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nxsem_wait(&test->irq_raise);
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return true;
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}
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/****************************************************************************
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* Name: pci_ep_test_msi_irq
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*
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* Description:
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* This function is used to test msi or msix irq
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*
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****************************************************************************/
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static bool pci_ep_test_msi_irq(FAR struct pci_ep_test_s *test,
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uint16_t msi_num, bool msix)
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{
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pci_ep_test_write_dword(test, PCI_EP_TEST_IRQ_TYPE,
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msix ? PCI_EP_TEST_IRQ_TYPE_MSIX :
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PCI_EP_TEST_IRQ_TYPE_MSI);
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pci_ep_test_write_dword(test, PCI_EP_TEST_IRQ_NUMBER, msi_num);
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pci_ep_test_write_dword(test, PCI_EP_TEST_COMMAND,
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msix ? PCI_EP_TEST_COMMAND_MSIX_IRQ :
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PCI_EP_TEST_COMMAND_MSI_IRQ);
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nxsem_wait(&test->irq_raise);
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return true;
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}
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/****************************************************************************
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* Name: pci_ep_fill_init
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*
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* Description:
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* This function is used to fill init data.
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*
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****************************************************************************/
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static void pci_ep_fill_init(FAR void *addr, size_t size)
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{
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FAR char *tmp = addr;
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int idx;
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for (idx = 0; idx < size; idx++)
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{
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*(tmp + idx) = idx % 255;
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}
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}
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/****************************************************************************
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* Name: pci_ep_test_write
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*
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* Description:
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* This function is used to test write.
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*
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****************************************************************************/
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static bool pci_ep_test_write(FAR struct pci_ep_test_s *test,
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unsigned long arg)
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{
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FAR struct pci_ep_test_param_s *param;
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FAR void *addr;
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uint64_t phys_addr;
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uint32_t crc32;
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param = (FAR struct pci_ep_test_param_s *)arg;
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if (param->size == 0)
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{
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pcierr("xfer size is zero, invalid param\n");
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return false;
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}
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if (test->irq_type < PCI_EP_TEST_IRQ_TYPE_LEGACY ||
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test->irq_type > PCI_EP_TEST_IRQ_TYPE_MSIX)
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{
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pcierr("invalid IRQ type option\n");
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return false;
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}
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addr = kmm_memalign(test->alignment, param->size);
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if (NULL == addr)
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{
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pcierr("Failed to alloc origin memory addr\n");
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return false;
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}
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pci_ep_fill_init(addr, param->size);
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phys_addr = up_addrenv_va_to_pa(addr);
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crc32 = crc32part(addr, param->size, ~0);
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pci_ep_test_write_dword(test, PCI_EP_TEST_CHECKSUM, crc32);
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pci_ep_test_write_dword(test, PCI_EP_TEST_LOWER_SRC_ADDR,
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phys_addr);
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pci_ep_test_write_dword(test, PCI_EP_TEST_UPPER_SRC_ADDR,
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phys_addr >> 32);
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pci_ep_test_write_dword(test, PCI_EP_TEST_SIZE, param->size);
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pci_ep_test_write_dword(test, PCI_EP_TEST_FLAGS, 0);
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pci_ep_test_write_dword(test, PCI_EP_TEST_IRQ_TYPE, test->irq_type);
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pci_ep_test_write_dword(test, PCI_EP_TEST_IRQ_NUMBER, 1);
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pci_ep_test_write_dword(test, PCI_EP_TEST_COMMAND,
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PCI_EP_TEST_COMMAND_READ);
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nxsem_wait(&test->irq_raise);
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kmm_free(addr);
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return !!(pci_ep_test_read_dword(test, PCI_EP_TEST_STATUS) &
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PCI_EP_TEST_STATUS_READ_SUCCESS);
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}
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/****************************************************************************
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* Name: pci_ep_test_read
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*
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* Description:
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* This function is used to test read.
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*
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****************************************************************************/
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static bool pci_ep_test_read(FAR struct pci_ep_test_s *test,
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unsigned long arg)
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{
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FAR struct pci_ep_test_param_s *param;
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FAR void *addr;
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uint64_t phys_addr;
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uint32_t crc32;
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param = (FAR struct pci_ep_test_param_s *)arg;
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if (param->size == 0)
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{
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pcierr("xfer size is zero, invalid param\n");
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return false;
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}
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if (test->irq_type < PCI_EP_TEST_IRQ_TYPE_LEGACY ||
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test->irq_type > PCI_EP_TEST_IRQ_TYPE_MSIX)
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{
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pcierr("invalid IRQ type option\n");
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return false;
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}
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addr = kmm_memalign(test->alignment, param->size);
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if (NULL == addr)
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{
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pcierr("Failed to alloc origin memory addr\n");
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return false;
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}
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phys_addr = up_addrenv_va_to_pa(addr);
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pci_ep_test_write_dword(test, PCI_EP_TEST_LOWER_DST_ADDR,
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phys_addr);
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pci_ep_test_write_dword(test, PCI_EP_TEST_UPPER_DST_ADDR,
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phys_addr >> 32);
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pci_ep_test_write_dword(test, PCI_EP_TEST_SIZE, param->size);
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pci_ep_test_write_dword(test, PCI_EP_TEST_FLAGS, 0);
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pci_ep_test_write_dword(test, PCI_EP_TEST_IRQ_TYPE, test->irq_type);
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pci_ep_test_write_dword(test, PCI_EP_TEST_IRQ_NUMBER, 1);
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pci_ep_test_write_dword(test, PCI_EP_TEST_COMMAND,
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PCI_EP_TEST_COMMAND_WRITE);
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nxsem_wait(&test->irq_raise);
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crc32 = crc32part(addr, param->size, ~0);
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kmm_free(addr);
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return crc32 == pci_ep_test_read_dword(test, PCI_EP_TEST_CHECKSUM);
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}
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/****************************************************************************
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* Name: pci_ep_test_copy
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*
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* Description:
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* This function is used to test copy.
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*
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****************************************************************************/
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static bool
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pci_ep_test_copy(struct pci_ep_test_s *test, unsigned long arg)
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{
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FAR struct pci_ep_test_param_s *param;
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FAR void *src_addr;
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FAR void *dst_addr;
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uint64_t src_phys_addr;
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uint64_t dst_phys_addr;
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uint32_t src_crc32;
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uint32_t dst_crc32;
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param = (FAR struct pci_ep_test_param_s *)arg;
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if (param->size == 0)
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{
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pcierr("xfer size is zero, invalid param\n");
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return false;
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}
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if (test->irq_type < PCI_EP_TEST_IRQ_TYPE_LEGACY ||
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test->irq_type > PCI_EP_TEST_IRQ_TYPE_MSIX)
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{
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pcierr("invalid IRQ type option\n");
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return false;
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}
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src_addr = kmm_memalign(test->alignment, param->size);
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if (NULL == src_addr)
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{
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pcierr("Failed to alloc origin memory addr\n");
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return false;
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}
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pci_ep_fill_init(src_addr, param->size);
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src_phys_addr = up_addrenv_va_to_pa(src_addr);
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pci_ep_test_write_dword(test, PCI_EP_TEST_LOWER_SRC_ADDR,
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src_phys_addr);
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pci_ep_test_write_dword(test, PCI_EP_TEST_UPPER_SRC_ADDR,
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src_phys_addr >> 32);
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src_crc32 = crc32part(src_addr, param->size, ~0);
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dst_addr = kmm_memalign(test->alignment, param->size);
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if (NULL == dst_addr)
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{
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pcierr("Failed to alloc origin memory addr\n");
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kmm_free(src_addr);
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return false;
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}
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dst_phys_addr = up_addrenv_va_to_pa(dst_addr);
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pci_ep_test_write_dword(test, PCI_EP_TEST_LOWER_DST_ADDR,
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dst_phys_addr);
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pci_ep_test_write_dword(test, PCI_EP_TEST_UPPER_DST_ADDR,
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dst_phys_addr >> 32);
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pci_ep_test_write_dword(test, PCI_EP_TEST_SIZE, param->size);
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|
|
pci_ep_test_write_dword(test, PCI_EP_TEST_FLAGS, 0);
|
|
pci_ep_test_write_dword(test, PCI_EP_TEST_IRQ_TYPE, test->irq_type);
|
|
pci_ep_test_write_dword(test, PCI_EP_TEST_IRQ_NUMBER, 1);
|
|
pci_ep_test_write_dword(test, PCI_EP_TEST_COMMAND,
|
|
PCI_EP_TEST_COMMAND_COPY);
|
|
|
|
nxsem_wait(&test->irq_raise);
|
|
|
|
dst_crc32 = crc32part(dst_addr, param->size, ~0);
|
|
|
|
kmm_free(dst_addr);
|
|
kmm_free(src_addr);
|
|
|
|
return src_crc32 == dst_crc32;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: pci_ep_test_free_irq
|
|
*
|
|
* Description:
|
|
* This function is used to clear request irq type.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static bool pci_ep_test_free_irq(FAR struct pci_ep_test_s *test)
|
|
{
|
|
up_disable_irq(test->irq);
|
|
irq_detach(test->irq);
|
|
if (test->irq_type != PCI_EP_TEST_IRQ_TYPE_LEGACY)
|
|
{
|
|
pci_release_irq(test->pdev, &test->irq, 1);
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: pci_ep_test_handler
|
|
*
|
|
* Description:
|
|
* request pci irq and register handler
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int pci_ep_test_handler(int irq, FAR void *context,
|
|
FAR void *args)
|
|
{
|
|
FAR struct pci_ep_test_s *test =
|
|
(FAR struct pci_ep_test_s *)args;
|
|
uint32_t reg;
|
|
|
|
reg = pci_ep_test_read_dword(test, PCI_EP_TEST_STATUS);
|
|
if (reg & PCI_EP_TEST_STATUS_IRQ_RAISED)
|
|
{
|
|
nxsem_post(&test->irq_raise);
|
|
reg &= ~PCI_EP_TEST_STATUS_IRQ_RAISED;
|
|
}
|
|
|
|
pci_ep_test_write_dword(test, PCI_EP_TEST_STATUS, reg);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: pci_ep_test_alloc_irq
|
|
*
|
|
* Description:
|
|
* Alloc pci irq by irq type
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int pci_ep_test_alloc_irq(FAR struct pci_ep_test_s *test,
|
|
int irq_type)
|
|
{
|
|
FAR struct pci_device_s *pdev = test->pdev;
|
|
int ret = -EINVAL;
|
|
|
|
switch (irq_type)
|
|
{
|
|
case PCI_EP_TEST_IRQ_TYPE_LEGACY:
|
|
ret = test->irq = pci_get_irq(pdev);
|
|
break;
|
|
|
|
case PCI_EP_TEST_IRQ_TYPE_MSI:
|
|
ret = pci_alloc_irq(pdev, &test->irq, 1);
|
|
break;
|
|
|
|
case PCI_EP_TEST_IRQ_TYPE_MSIX:
|
|
ret = pci_alloc_irq(pdev, &test->irq, 1);
|
|
break;
|
|
|
|
default:
|
|
pcierr("invalid irq type %d\n", irq_type);
|
|
break;
|
|
}
|
|
|
|
if (ret < 0)
|
|
{
|
|
return ret;
|
|
}
|
|
|
|
test->irq_type = irq_type;
|
|
if (irq_type >= PCI_EP_TEST_IRQ_TYPE_MSI)
|
|
{
|
|
ret = pci_connect_irq(pdev, &test->irq, 1);
|
|
if (ret < 0)
|
|
{
|
|
pcierr("Failed to connect MSI %d\n", ret);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
ret = irq_attach(test->irq, pci_ep_test_handler, test);
|
|
if (ret >= 0)
|
|
{
|
|
up_enable_irq(test->irq);
|
|
}
|
|
else
|
|
{
|
|
pci_release_irq(test->pdev, &test->irq, 1);
|
|
pcierr("error ret=%d\n", ret);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: pci_ep_test_set_irq
|
|
*
|
|
* Description:
|
|
* This function is used to set request irq type.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static bool
|
|
pci_ep_test_set_irq(struct pci_ep_test_s *test, int req_irq_type)
|
|
{
|
|
int ret;
|
|
|
|
if (req_irq_type < PCI_EP_TEST_IRQ_TYPE_LEGACY ||
|
|
req_irq_type > PCI_EP_TEST_COMMAND_MSIX_IRQ)
|
|
{
|
|
pcierr("invaild irq option\n");
|
|
return false;
|
|
}
|
|
|
|
if (test->irq_type == req_irq_type)
|
|
{
|
|
return true;
|
|
}
|
|
|
|
pci_ep_test_free_irq(test);
|
|
|
|
ret = pci_ep_test_alloc_irq(test, req_irq_type);
|
|
if (ret < 0)
|
|
{
|
|
pcierr("alloc pci irq %d fail\n", req_irq_type);
|
|
return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: pci_ep_test_ioctl
|
|
*
|
|
* Description:
|
|
* This function is used to respond ioctl cmd.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int pci_ep_test_ioctl(FAR struct file *filep,
|
|
int cmd, unsigned long arg)
|
|
{
|
|
FAR struct pci_ep_test_s *test;
|
|
int ret = -EINVAL;
|
|
int bar;
|
|
|
|
test = filep->f_priv;
|
|
DEBUGASSERT(test != NULL);
|
|
|
|
nxmutex_lock(&test->mutex);
|
|
switch (cmd)
|
|
{
|
|
case PCITEST_BAR:
|
|
bar = arg;
|
|
if (bar > PCI_STD_NUM_BARS || bar < 0)
|
|
{
|
|
pcierr("bar num %d is invaild\n", bar);
|
|
break;
|
|
}
|
|
|
|
ret = pci_ep_test_bar(test, bar);
|
|
break;
|
|
|
|
case PCITEST_LEGACY_IRQ:
|
|
ret = pci_ep_test_legacy_irq(test);
|
|
break;
|
|
|
|
case PCITEST_MSI:
|
|
case PCITEST_MSIX:
|
|
ret = pci_ep_test_msi_irq(test, arg, cmd == PCITEST_MSIX);
|
|
break;
|
|
|
|
case PCITEST_WRITE:
|
|
ret = pci_ep_test_write(test, arg);
|
|
break;
|
|
|
|
case PCITEST_READ:
|
|
ret = pci_ep_test_read(test, arg);
|
|
break;
|
|
|
|
case PCITEST_COPY:
|
|
ret = pci_ep_test_copy(test, arg);
|
|
break;
|
|
|
|
case PCITEST_SET_IRQTYPE:
|
|
ret = pci_ep_test_set_irq(test, arg);
|
|
break;
|
|
|
|
case PCITEST_GET_IRQTYPE:
|
|
ret = test->irq_type;
|
|
break;
|
|
|
|
case PCITEST_CLEAR_IRQ:
|
|
ret = pci_ep_test_free_irq(test);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
nxmutex_unlock(&test->mutex);
|
|
return ret;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: pci_ep_test_probe
|
|
*
|
|
* Description:
|
|
* Initialize device
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int pci_ep_test_probe(FAR struct pci_device_s *dev)
|
|
{
|
|
FAR struct pci_ep_test_s *test;
|
|
int bar;
|
|
int ret;
|
|
|
|
pciinfo("Enter pci endpoint test probe.\n");
|
|
|
|
if (pci_is_bridge(dev))
|
|
{
|
|
pcierr("pci device is not endpoint!!!\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
test = kmm_zalloc(sizeof(*test));
|
|
if (NULL == test)
|
|
{
|
|
pcierr("malloc ptest memory faild\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
test->pdev = dev;
|
|
test->alignment = sizeof(uint32_t);
|
|
|
|
nxsem_init(&test->irq_raise, 0, 0);
|
|
nxmutex_init(&test->mutex);
|
|
|
|
ret = pci_enable_device(dev);
|
|
if (ret < 0)
|
|
{
|
|
pcierr("Enable endpoint device failed, ret=%d\n", ret);
|
|
goto en_err;
|
|
}
|
|
|
|
pci_set_master(dev);
|
|
|
|
ret = pci_ep_test_alloc_irq(test, PCI_EP_TEST_IRQ_TYPE_LEGACY);
|
|
if (ret < 0)
|
|
{
|
|
pcierr("Fail to alloc pci irq\n");
|
|
goto irq_err;
|
|
}
|
|
|
|
for (bar = 0; bar < PCI_STD_NUM_BARS; bar++)
|
|
{
|
|
if (pci_resource_flags(dev, bar) & PCI_RESOURCE_MEM)
|
|
{
|
|
test->bar[bar] = pci_map_bar(dev, bar);
|
|
if (NULL == test->bar[bar])
|
|
{
|
|
pcierr("failed to read bar%d\n", bar);
|
|
ret = -ENOMEM;
|
|
goto bar_err;
|
|
}
|
|
}
|
|
}
|
|
|
|
test->base = test->bar[0];
|
|
|
|
snprintf(test->name, sizeof(test->name),
|
|
PCI_EP_TEST_DEVICE_NAME ".%d", g_pci_ep_idr++);
|
|
register_driver(test->name, &g_pci_ep_test_fops, 0666, test);
|
|
pciinfo("pci ep test device register success.\n");
|
|
|
|
return 0;
|
|
|
|
bar_err:
|
|
pci_ep_test_free_irq(test);
|
|
irq_err:
|
|
pci_clear_master(dev);
|
|
pci_disable_device(dev);
|
|
en_err:
|
|
nxmutex_destroy(&test->mutex);
|
|
nxsem_destroy(&test->irq_raise);
|
|
kmm_free(test);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Public Functions
|
|
****************************************************************************/
|
|
|
|
/****************************************************************************
|
|
* Name: pci_register_ep_test_driver
|
|
*
|
|
* Description:
|
|
* Register a pci driver to test endpoint
|
|
*
|
|
****************************************************************************/
|
|
|
|
int pci_register_ep_test_driver(void)
|
|
{
|
|
return pci_register_driver(&g_pci_ep_test_drv);
|
|
}
|