nuttx-mirror/libs/libc/machine
Ville Juven 90d73153fb riscv/arch_elf: Check for _HI20 relocation validity
As pointed out in #11322 there is a hardware design issue in RISC-V that
affects RV64 relocations. The problem is with how address bits are loaded
into registers via lui / auipc and sign extension.

If the hi20 relocation value happens to have its 32-bit sign bit set, i.e.
value is 0x80000000 (but not negative! i.e. negative in 64-bit format) the
relocation will fail, as the address is erroneously sign extended:

0x00000000_80000000 becomes 0xffffffff_80000000 which is not correct.

Also, make sure the correct opcode is used with PCREL_HI20, it expects
AUIPC (not LUI). The C compiler will never emit such code but when hand-
writing assembly code this can happen.
2023-12-14 06:54:17 -08:00
..
arm riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly 2023-12-12 17:32:36 -08:00
arm64 riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly 2023-12-12 17:32:36 -08:00
renesas Remove the tail spaces from all files except Documentation 2023-02-26 13:24:24 -08:00
risc-v riscv/arch_elf: Check for _HI20 relocation validity 2023-12-14 06:54:17 -08:00
sim riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly 2023-12-12 17:32:36 -08:00
sparc riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly 2023-12-12 17:32:36 -08:00
x86 riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly 2023-12-12 17:32:36 -08:00
xtensa riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly 2023-12-12 17:32:36 -08:00
arch_atomic.c libc/arch_atomic: add FAR to pointers. 2022-04-29 15:06:11 +08:00
CMakeLists.txt libc_atomic: add file to cmake script 2023-11-07 17:39:03 +01:00
Kconfig lib/machine: Add LIBC_PREVENT_xxx which select LIBC_PREVENT_XXX_[KERNEL|USER] automatically 2023-09-15 22:31:34 +03:00
Make.defs libc: add arm64 libc function 2023-01-10 11:31:26 +08:00