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drivers/spi:Define SPI_~CS~_DELAY_CONTROL to support other delays

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This commit is contained in:
David Sidrane 2021-11-05 09:54:40 -07:00 committed by Xiang Xiao
parent f8832f7d86
commit 040a04241e
9 changed files with 38 additions and 25 deletions
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15
arch/arm/src/samv7/sam_spi.c
View file

@ -254,9 +254,9 @@ static int spi_lock(struct spi_dev_s *dev, bool lock);
static void spi_select(struct spi_dev_s *dev, uint32_t devid, static void spi_select(struct spi_dev_s *dev, uint32_t devid,
bool selected); bool selected);
static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency); static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency);
#ifdef CONFIG_SPI_CS_DELAY_CONTROL #ifdef CONFIG_SPI_DELAY_CONTROL
static int spi_setdelay(struct spi_dev_s *dev, uint32_t a, uint32_t b, static int spi_setdelay(struct spi_dev_s *dev, uint32_t a, uint32_t b,
uint32_t c); uint32_t c, uint32_t i);
#endif #endif
#ifdef CONFIG_SPI_HWFEATURES #ifdef CONFIG_SPI_HWFEATURES
static int spi_hwfeatures(struct spi_dev_s *dev, uint8_t features); static int spi_hwfeatures(struct spi_dev_s *dev, uint8_t features);
@ -311,7 +311,7 @@ static const struct spi_ops_s g_spi0ops =
.lock = spi_lock, .lock = spi_lock,
.select = spi_select, .select = spi_select,
.setfrequency = spi_setfrequency, .setfrequency = spi_setfrequency,
#ifdef CONFIG_SPI_CS_DELAY_CONTROL #ifdef CONFIG_SPI_DELAY_CONTROL
.setdelay = spi_setdelay, .setdelay = spi_setdelay,
#endif #endif
.setmode = spi_setmode, .setmode = spi_setmode,
@ -353,7 +353,7 @@ static const struct spi_ops_s g_spi1ops =
.lock = spi_lock, .lock = spi_lock,
.select = spi_select, .select = spi_select,
.setfrequency = spi_setfrequency, .setfrequency = spi_setfrequency,
#ifdef CONFIG_SPI_CS_DELAY_CONTROL #ifdef CONFIG_SPI_DELAY_CONTROL
.setdelay = spi_setdelay, .setdelay = spi_setdelay,
#endif #endif
.setmode = spi_setmode, .setmode = spi_setmode,
@ -1105,15 +1105,17 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
* startdelay - The delay between CS active and first CLK * startdelay - The delay between CS active and first CLK
* stopdelay - The delay between last CLK and CS inactive * stopdelay - The delay between last CLK and CS inactive
* csdelay - The delay between CS inactive and CS active again * csdelay - The delay between CS inactive and CS active again
* ifdelay - The delay between frames
* *
* Returned Value: * Returned Value:
* Returns 0 if ok * Returns 0 if ok
* *
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_SPI_CS_DELAY_CONTROL #ifdef CONFIG_SPI_DELAY_CONTROL
static int spi_setdelay(struct spi_dev_s *dev, uint32_t startdelay, static int spi_setdelay(struct spi_dev_s *dev, uint32_t startdelay,
uint32_t stopdelay, uint32_t csdelay) uint32_t stopdelay, uint32_t csdelay,
uint32_t ifdelay)
{ {
struct sam_spics_s *spics = (struct sam_spics_s *)dev; struct sam_spics_s *spics = (struct sam_spics_s *)dev;
struct sam_spidev_s *spi = spi_device(spics); struct sam_spidev_s *spi = spi_device(spics);
@ -1126,6 +1128,7 @@ static int spi_setdelay(struct spi_dev_s *dev, uint32_t startdelay,
spiinfo("cs=%d startdelay=%d\n", spics->cs, startdelay); spiinfo("cs=%d startdelay=%d\n", spics->cs, startdelay);
spiinfo("cs=%d stopdelay=%d\n", spics->cs, stopdelay); spiinfo("cs=%d stopdelay=%d\n", spics->cs, stopdelay);
spiinfo("cs=%d csdelay=%d\n", spics->cs, csdelay); spiinfo("cs=%d csdelay=%d\n", spics->cs, csdelay);
spiinfo("cs=%d ifdelay=%d\n", spics->if, ifdelay);
offset = (unsigned int)g_csroffset[spics->cs]; offset = (unsigned int)g_csroffset[spics->cs];

8
arch/risc-v/src/bl602/bl602_spi.c
View file

@ -196,7 +196,7 @@ static const struct spi_ops_s bl602_spi_ops =
.lock = bl602_spi_lock, .lock = bl602_spi_lock,
.select = bl602_spi_select, .select = bl602_spi_select,
.setfrequency = bl602_spi_setfrequency, .setfrequency = bl602_spi_setfrequency,
#ifdef CONFIG_SPI_CS_DELAY_CONTROL #ifdef CONFIG_SPI_DELAY_CONTROL
.setdelay = bl602_spi_setdelay, .setdelay = bl602_spi_setdelay,
#endif #endif
.setmode = bl602_spi_setmode, .setmode = bl602_spi_setmode,
@ -518,6 +518,7 @@ static uint32_t bl602_spi_setfrequency(struct spi_dev_s *dev,
* startdelay - The delay between CS active and first CLK * startdelay - The delay between CS active and first CLK
* stopdelay - The delay between last CLK and CS inactive * stopdelay - The delay between last CLK and CS inactive
* csdelay - The delay between CS inactive and CS active again * csdelay - The delay between CS inactive and CS active again
* ifdelay - The delay between frames
* *
* Returned Value: * Returned Value:
* Returns zero (OK) on success; a negated errno value is return on any * Returns zero (OK) on success; a negated errno value is return on any
@ -525,9 +526,10 @@ static uint32_t bl602_spi_setfrequency(struct spi_dev_s *dev,
* *
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_SPI_CS_DELAY_CONTROL #ifdef CONFIG_SPI_DELAY_CONTROL
static int bl602_spi_setdelay(struct spi_dev_s *dev, uint32_t startdelay, static int bl602_spi_setdelay(struct spi_dev_s *dev, uint32_t startdelay,
uint32_t stopdelay, uint32_t csdelay) uint32_t stopdelay, uint32_t csdelay,
uint32_t ifdelay)
{ {
spierr("SPI CS delay control not supported\n"); spierr("SPI CS delay control not supported\n");
DEBUGPANIC(); DEBUGPANIC();

2
arch/risc-v/src/mpfs/mpfs_spi.c
View file

@ -193,7 +193,7 @@ static const struct spi_ops_s mpfs_spi_ops =
.lock = mpfs_spi_lock, .lock = mpfs_spi_lock,
.select = mpfs_spi_select, .select = mpfs_spi_select,
.setfrequency = mpfs_spi_setfrequency, .setfrequency = mpfs_spi_setfrequency,
#ifdef CONFIG_SPI_CS_DELAY_CONTROL #ifdef CONFIG_SPI_DELAY_CONTROL
.setdelay = mpfs_spi_setdelay, .setdelay = mpfs_spi_setdelay,
#endif #endif
.setmode = mpfs_spi_setmode, .setmode = mpfs_spi_setmode,

2
arch/z80/src/ez80/ez80_spi.c
View file

@ -95,7 +95,7 @@ static const struct spi_ops_s g_spiops =
spi_lock, /* lock() */ spi_lock, /* lock() */
ez80_spiselect, /* select(): Provided externally by board logic */ ez80_spiselect, /* select(): Provided externally by board logic */
spi_setfrequency, /* setfrequency() */ spi_setfrequency, /* setfrequency() */
#ifdef CONFIG_SPI_CS_DELAY_CONTROL #ifdef CONFIG_SPI_DELAY_CONTROL
NULL, /* setdelay() */ NULL, /* setdelay() */
#endif #endif
spi_setmode, spi_setmode,

2
boards/arm/kinetis/freedom-k66f/configs/nsh/defconfig
View file

@ -92,7 +92,7 @@ CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_WAITPID=y CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y CONFIG_SDCLONE_DISABLE=y
CONFIG_SERIAL_TERMIOS=y CONFIG_SERIAL_TERMIOS=y
CONFIG_SPI_CS_DELAY_CONTROL=y CONFIG_SPI_DELAY_CONTROL=y
CONFIG_STACK_COLORATION=y CONFIG_STACK_COLORATION=y
CONFIG_SYSTEM_I2CTOOL=y CONFIG_SYSTEM_I2CTOOL=y
CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_NSH=y

18
drivers/spi/Kconfig
View file

@ -163,14 +163,20 @@ config SPI_BITORDER
Enables capability to select MSB- or LSB-first hardware feature for Enables capability to select MSB- or LSB-first hardware feature for
data transfers. data transfers.
config SPI_CS_DELAY_CONTROL config SPI_DELAY_CONTROL
bool "SPI CS Delay Control" bool "SPI Delay Control"
default n default n
---help--- ---help---
Enables possibilities to define the SPI-ChipSelect-Delays like Enables possibilities to define the SPI Delays such as
time between ChipSelect assertion and first Data-Bit, the time SPI-ChipSelect-Delays and inter frame delays.
between the last Data-Bit and the de-assertion and the minimum
delay between two ChipSelects. SPI-ChipSelect-Delays: are the delay between ChipSelect assertion
and first Data-Bit, the delay between the last Data-Bit and the
de-assertion and the minimum delay between two ChipSelects.
The inter-frame delays also know as Inter-Data Idleness, controls the
delay between frames. (one transaction of nbits as configured with
SPI_SETBITS).
This option enables the setdelay() interface method. This option enables the setdelay() interface method.

4
drivers/spi/spi_transfer.c
View file

@ -72,8 +72,8 @@ int spi_transfer(FAR struct spi_dev_s *spi, FAR struct spi_sequence_s *seq)
SPI_SETFREQUENCY(spi, seq->frequency); SPI_SETFREQUENCY(spi, seq->frequency);
#ifdef CONFIG_SPI_CS_DELAY_CONTROL #ifdef CONFIG_SPI_DELAY_CONTROL
ret = SPI_SETDELAY(spi, seq->a, seq->b, seq->c); ret = SPI_SETDELAY(spi, seq->a, seq->b, seq->c, seq->i);
if (ret < 0) if (ret < 0)
{ {
spierr("ERROR: SPI_SETDELAY failed: %d\n", ret); spierr("ERROR: SPI_SETDELAY failed: %d\n", ret);

9
include/nuttx/spi/spi.h
View file

@ -124,6 +124,7 @@
* startdelay - The delay between CS active and first CLK * startdelay - The delay between CS active and first CLK
* stopdelay - The delay between last CLK and CS inactive * stopdelay - The delay between last CLK and CS inactive
* csdelay - The delay between CS inactive and CS active again * csdelay - The delay between CS inactive and CS active again
* ifdelay - The delay between frames
* *
* Returned Value: * Returned Value:
* Returns zero (OK) on success; a negated errno value is return on any * Returns zero (OK) on success; a negated errno value is return on any
@ -131,8 +132,8 @@
* *
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_SPI_CS_DELAY_CONTROL #ifdef CONFIG_SPI_DELAY_CONTROL
# define SPI_SETDELAY(d,a,b,c) ((d)->ops->setdelay(d,a,b,c)) # define SPI_SETDELAY(d,a,b,c,i) ((d)->ops->setdelay(d,a,b,c,i))
#endif #endif
/**************************************************************************** /****************************************************************************
@ -543,9 +544,9 @@ struct spi_ops_s
bool selected); bool selected);
CODE uint32_t (*setfrequency)(FAR struct spi_dev_s *dev, CODE uint32_t (*setfrequency)(FAR struct spi_dev_s *dev,
uint32_t frequency); uint32_t frequency);
#ifdef CONFIG_SPI_CS_DELAY_CONTROL #ifdef CONFIG_SPI_DELAY_CONTROL
CODE int (*setdelay)(FAR struct spi_dev_s *dev, uint32_t a, CODE int (*setdelay)(FAR struct spi_dev_s *dev, uint32_t a,
uint32_t b, uint32_t c); uint32_t b, uint32_t c, uint32_t i);
#endif #endif
CODE void (*setmode)(FAR struct spi_dev_s *dev, enum spi_mode_e mode); CODE void (*setmode)(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
CODE void (*setbits)(FAR struct spi_dev_s *dev, int nbits); CODE void (*setbits)(FAR struct spi_dev_s *dev, int nbits);

3
include/nuttx/spi/spi_transfer.h
View file

@ -100,10 +100,11 @@ struct spi_sequence_s
uint8_t nbits; /* Number of bits */ uint8_t nbits; /* Number of bits */
uint8_t ntrans; /* Number of transactions */ uint8_t ntrans; /* Number of transactions */
uint32_t frequency; /* SPI frequency (Hz) */ uint32_t frequency; /* SPI frequency (Hz) */
#ifdef CONFIG_SPI_CS_DELAY_CONTROL #ifdef CONFIG_SPI_DELAY_CONTROL
uint32_t a; /* Arguments to setdelay() */ uint32_t a; /* Arguments to setdelay() */
uint32_t b; uint32_t b;
uint32_t c; uint32_t c;
uint32_t i;
#endif #endif
/* A pointer to the list of transfers to be be performed. */ /* A pointer to the list of transfers to be be performed. */