From 12c9fd9683350fa8b592e1ecbaeefac010d96390 Mon Sep 17 00:00:00 2001 From: Eero Nurkkala Date: Mon, 9 Dec 2024 09:31:12 +0200 Subject: [PATCH] risc-v/mpfs: make cache clearing optional L2 needs to be zeroed to make the ECC happy. However, if there's more than one bootloader in the chain, the cache doesn't need to be wiped every time. One time is enough. Thus, make this optional so that it's initialized only when really needed. Signed-off-by: Eero Nurkkala --- arch/risc-v/src/mpfs/Kconfig | 7 +++++++ arch/risc-v/src/mpfs/mpfs_head.S | 2 ++ 2 files changed, 9 insertions(+) diff --git a/arch/risc-v/src/mpfs/Kconfig b/arch/risc-v/src/mpfs/Kconfig index 67ae59f1c1..34e459907d 100644 --- a/arch/risc-v/src/mpfs/Kconfig +++ b/arch/risc-v/src/mpfs/Kconfig @@ -54,6 +54,13 @@ config MPFS_CLKINIT This initilizes the system clocks at mpfs_start.c file. The option may be also turned off if some other entity has already set them up. +config MPFS_L2_CLEAR + bool "Clear the L2 cache at boot" + depends on MPFS_BOOTLOADER + default y + ---help--- + L2 should be zero-initialized on the first boot so that the ECC will be happy. + config MPFS_BOARD_PMP bool "Enable board specific PMP configuration" depends on ARCH_USE_MPU && MPFS_BOOTLOADER diff --git a/arch/risc-v/src/mpfs/mpfs_head.S b/arch/risc-v/src/mpfs/mpfs_head.S index 057aa5bd02..b0463bcf22 100644 --- a/arch/risc-v/src/mpfs/mpfs_head.S +++ b/arch/risc-v/src/mpfs/mpfs_head.S @@ -181,6 +181,7 @@ __start: .continue_boot: +#ifdef CONFIG_MPFS_L2_CLEAR /* L2 needs to be zeroed before ECC (error correction) is enabled later. */ la a4, __l2lim_start @@ -190,6 +191,7 @@ __start: sd x0, 0(a4) add a4, a4, 8 blt a4, a5, .clear_l2lim +#endif /* CONFIG_MPFS_L2_CLEAR */ #endif /* Set stack pointer to the idle thread stack */