From 1b8d5a4367bac5e41ce79c7a9f0d77ae433536d6 Mon Sep 17 00:00:00 2001 From: Huang Qi Date: Wed, 8 Jan 2025 19:25:54 +0800 Subject: [PATCH] arch/risc-v: Refactor LLVM CPU type handling in Toolchain.cmake - Replace direct string comparisons with regex pattern matching for ARCHCPUEXTFLAGS - Change from using LLVM_CPUFLAGS list to setting LLVM_CPUTYPE directly - Simplify CPU type detection logic while maintaining same functionality - Use more consistent string variable naming convention This change makes the CPU type detection more flexible and maintainable while keeping the same behavior for supported RISC-V configurations. Signed-off-by: Huang Qi --- arch/risc-v/src/cmake/Toolchain.cmake | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/arch/risc-v/src/cmake/Toolchain.cmake b/arch/risc-v/src/cmake/Toolchain.cmake index b155953a05..e3c82031fb 100644 --- a/arch/risc-v/src/cmake/Toolchain.cmake +++ b/arch/risc-v/src/cmake/Toolchain.cmake @@ -343,21 +343,19 @@ if(CONFIG_RISCV_TOOLCHAIN STREQUAL GNU_RVG) # These models can't cover all implementation of RISCV, but it's enough for # most cases. - set(LLVM_CPUFLAGS) - if(CONFIG_ARCH_RV32) - if(${ARCHCPUEXTFLAGS} STREQUAL imc) - list(APPEND LLVM_CPUFLAGS -mcpu=sifive-e20) - elseif(${ARCHCPUEXTFLAGS} STREQUAL imac) - list(APPEND LLVM_CPUFLAGS -mcpu=sifive-e31) - elseif(${ARCHCPUEXTFLAGS} STREQUAL imafc) - list(APPEND LLVM_CPUFLAGS -mcpu=sifive-e76) + if(${ARCHCPUEXTFLAGS} MATCHES "^imc") + set(LLVM_CPUTYPE "sifive-e20") + elseif(${ARCHCPUEXTFLAGS} MATCHES "^imac") + set(LLVM_CPUTYPE "sifive-e31") + elseif(${ARCHCPUEXTFLAGS} MATCHES "^imafc") + set(LLVM_CPUTYPE "sifive-e76") endif() else() - if(${ARCHCPUEXTFLAGS} STREQUAL imac) - list(APPEND LLVM_CPUFLAGS -mcpu=sifive-s51) - elseif(${ARCHCPUEXTFLAGS} STREQUAL imafdc) - list(APPEND LLVM_CPUFLAGS -mcpu=sifive-u54) + if(${ARCHCPUEXTFLAGS} MATCHES "^imac") + set(LLVM_CPUTYPE "sifive-s51") + elseif(${ARCHCPUEXTFLAGS} MATCHES "^imafdc") + set(LLVM_CPUTYPE "sifive-u54") endif() endif()