risc-v/mpfs/opensbi: update opensbi to version 1.3.1
Version 1.3.1 is the latest tagged version as of November the 21st, 2023. This patch prepares the required changes to make v1.3.1 work. Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
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6a6538c1b8
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1cb879773a
3 changed files with 52 additions and 14 deletions
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@ -84,6 +84,8 @@ typedef struct sbi_scratch_holder_s sbi_scratch_holder_t;
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extern const uint8_t __mpfs_nuttx_start[];
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extern const uint8_t __mpfs_nuttx_end[];
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extern const uint8_t _ssbi_ddr[];
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extern const uint8_t _esbi_ddr[];
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/****************************************************************************
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* Private Function Prototypes
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@ -96,8 +98,8 @@ static int mpfs_irqchip_init(bool cold_boot);
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static int mpfs_ipi_init(bool cold_boot);
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static int mpfs_timer_init(bool cold_boot);
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#ifdef CONFIG_MPFS_IHC_SBI
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static int mpfs_opensbi_vendor_ext_check(long extid);
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static int mpfs_opensbi_ecall_handler(long extid, long funcid,
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static bool mpfs_opensbi_vendor_ext_check(void);
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static int mpfs_opensbi_ecall_handler(long funcid,
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const struct sbi_trap_regs *regs,
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unsigned long *out_val,
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struct sbi_trap_info *out_trap);
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@ -148,7 +150,7 @@ static struct aclint_mtimer_data mpfs_mtimer =
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.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
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.first_hartid = 0,
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.hart_count = MPFS_HART_COUNT,
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.has_64bit_mmio = TRUE,
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.has_64bit_mmio = true,
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};
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static const struct sbi_platform_operations platform_ops =
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@ -477,19 +479,45 @@ static void mpfs_opensbi_scratch_setup(uint32_t hartid)
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* them so that OpenSBI has no chance override then.
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*/
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g_scratches[hartid].scratch.fw_start = (unsigned long)__mpfs_nuttx_start;
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g_scratches[hartid].scratch.fw_size = (unsigned long)__mpfs_nuttx_end -
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(unsigned long)__mpfs_nuttx_start;
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g_scratches[hartid].scratch.fw_start = (unsigned long)_ssbi_ddr;
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g_scratches[hartid].scratch.fw_size = (unsigned long)_esbi_ddr -
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(unsigned long)_ssbi_ddr;
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g_scratches[hartid].scratch.fw_rw_offset =
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(unsigned long)g_scratches[hartid].scratch.fw_size;
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/* fw_rw_offset needs to be an aligned address */
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g_scratches[hartid].scratch.fw_rw_offset += 1024 * 2;
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g_scratches[hartid].scratch.fw_rw_offset &= 0xffffff800;
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g_scratches[hartid].scratch.fw_size =
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g_scratches[hartid].scratch.fw_rw_offset;
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g_scratches[hartid].scratch.fw_heap_offset =
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(unsigned long)g_scratches[hartid].scratch.fw_size;
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/* Heap minimum is 16k. Otherwise sbi_heap.c fails:
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* hpctrl.hksize = hpctrl.size / HEAP_HOUSEKEEPING_FACTOR;
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* hpctrl.hksize &= ~((unsigned long)HEAP_BASE_ALIGN - 1);
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* eg. 8k: (0x2000 / 16) & ~(1024 - 1) = 0 (Fail!)
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* 16k: (0x4000 / 16) & ~(1024 - 1) = 0x400 (Ok)
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* hpctrl.hksize gets to be zero making the OpenSBI crash.
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*/
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g_scratches[hartid].scratch.fw_heap_size = 1024 * 16;
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g_scratches[hartid].scratch.fw_size =
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g_scratches[hartid].scratch.fw_heap_offset +
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g_scratches[hartid].scratch.fw_heap_size;
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}
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/****************************************************************************
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* Name: mpfs_opensbi_vendor_ext_check
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*
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* Description:
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* Used by the OpenSBI in vendor probe to check the vendor ID.
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* Used by the OpenSBI to check if vendor extension is enabled.
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*
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* Input Parameters:
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* extid - Vendor ID to be checked
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* None
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*
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* Returned Value:
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* 1 on match, zero in case of no match
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@ -497,9 +525,9 @@ static void mpfs_opensbi_scratch_setup(uint32_t hartid)
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****************************************************************************/
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#ifdef CONFIG_MPFS_IHC_SBI
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static int mpfs_opensbi_vendor_ext_check(long extid)
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static bool mpfs_opensbi_vendor_ext_check(void)
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{
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return (SBI_EXT_MICROCHIP_TECHNOLOGY == extid);
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return true;
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}
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/****************************************************************************
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@ -510,7 +538,6 @@ static int mpfs_opensbi_vendor_ext_check(long extid)
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* related to Inter-Hart Communication (IHC).
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*
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* Input Parameters:
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* extid - Vendor ID
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* funcid - One of the valid functions
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* sbi_trap_regs - SBI trap registers
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* out_val - Error code location
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@ -521,7 +548,7 @@ static int mpfs_opensbi_vendor_ext_check(long extid)
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*
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****************************************************************************/
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static int mpfs_opensbi_ecall_handler(long extid, long funcid,
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static int mpfs_opensbi_ecall_handler(long funcid,
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const struct sbi_trap_regs *regs,
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unsigned long *out_val,
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struct sbi_trap_info *out_trap)
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@ -28,6 +28,12 @@ SBI_CSRCS += opensbi/opensbi-3rdparty/lib/utils/ipi/aclint_mswi.c
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SBI_CSRCS += opensbi/opensbi-3rdparty/lib/utils/irqchip/plic.c
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SBI_CSRCS += opensbi/opensbi-3rdparty/lib/utils/timer/aclint_mtimer.c
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EXCLUDED_FILES = opensbi/opensbi-3rdparty/lib/sbi/sbi_pmu.c
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EXCLUDED_FILES += opensbi/opensbi-3rdparty/lib/sbi/sbi_ecall_dbcn.c
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TMPVAR := $(SBI_CSRCS)
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SBI_CSRCS = $(filter-out $(EXCLUDED_FILES), $(TMPVAR))
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SBI_ASRCS += opensbi/opensbi-3rdparty/lib/sbi/sbi_expected_trap.S
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SBI_ASRCS += opensbi/opensbi-3rdparty/lib/sbi/sbi_hfence.S
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SBI_ASRCS += opensbi/opensbi-3rdparty/lib/sbi/riscv_hardfp.S
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@ -37,10 +43,10 @@ INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)opensbi$(DELIM)opensbi-3rdpar
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SBI_DIR := opensbi
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OPENSBI_UNPACK = opensbi-3rdparty
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OPENSBI_COMMIT = 4998a712b2ab504eff306110879ee05af6050177
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OPENSBI_COMMIT = fbaaafe808f3da7745760d757c436ef1b293d3ed
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OPENSBI_URL = https://github.com/riscv-software-src/opensbi/tarball
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OPENSBI_TARBALL = opensbi.tar.gz
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OPENSBI_DIR = riscv-software-src-opensbi-4998a71
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OPENSBI_DIR = riscv-software-src-opensbi-fbaaafe
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$(OPENSBI_TARBALL):
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$(call DOWNLOAD,$(OPENSBI_URL),$(OPENSBI_COMMIT),opensbi/$(OPENSBI_TARBALL))
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@ -50,6 +56,7 @@ $(OPENSBI_TARBALL):
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$(Q) tar xzf opensbi/$(OPENSBI_TARBALL) -C opensbi
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$(Q) mv opensbi/$(OPENSBI_DIR) opensbi/$(OPENSBI_UNPACK)
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$(Q) touch opensbi/.opensbi_unpack
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$(Q) opensbi/$(OPENSBI_UNPACK)/scripts/carray.sh -i opensbi/$(OPENSBI_UNPACK)/lib/sbi/sbi_ecall_exts.carray -l "ecall_base ecall_hsm ecall_ipi ecall_rfence ecall_time ecall_vendor" > opensbi/$(OPENSBI_UNPACK)/lib/sbi/sbi_ecall_exts.c
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ifeq ($(wildcard opensbi/$(OPENSBI_UNPACK)/.git),)
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context:: .opensbi_unpack
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@ -36,10 +36,14 @@ SECTIONS
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PROVIDE(__l2lim_end = ORIGIN(l2lim) + LENGTH(l2lim));
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.text.sbi : {
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_ssbi_ddr = ABSOLUTE(.);
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sbi*
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riscv_atomic*
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riscv_locks*
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riscv_asm*
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_esbi_ddr = ABSOLUTE(.);
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. = ALIGN(0x2000);
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. += 16k; /* OpenSBI heap, aligned, at least 16k */
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} > ddr
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.l2_scratchpad : ALIGN(0x10)
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