esp32c3: Add initial support to esp32c3-devkit-rust-1 board

This commit is contained in:
Alan Carvalho de Assis 2022-08-22 17:24:14 -03:00 committed by Xiang Xiao
parent d22e1e1998
commit 23a7d8a693
20 changed files with 3581 additions and 0 deletions

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@ -305,6 +305,14 @@ config ARCH_BOARD_ESP32C3_DEVKIT
The ESP32-C3-DevKitM-1 version contains the ESP32-C3-MINI-1 module and the
ESP32-C3-DevKitC-02 version the ESP32-C3-WROOM-02.
config ARCH_BOARD_ESP32C3_DEVKIT_RUST1
bool "Espressif ESP32-C3-RUST-1 board"
depends on ARCH_CHIP_ESP32C3MINI1
---help---
The ESP32-C3-DevKit-RUST-1 features the ESP32-C3 CPU with a RISC-V core.
This board includes the ESP32-C3-MINI-1 module, a 6DoF IMU, a temperature
and humidity sensor, a Li-Ion battery charger, and a Type-C USB.
config ARCH_BOARD_ESP32S2_SAOLA_1
bool "Espressif ESP32-S2-Saola-1 V1.2"
depends on ARCH_CHIP_ESP32S2WROVER
@ -2594,6 +2602,7 @@ config ARCH_BOARD
default "esp32-ethernet-kit" if ARCH_BOARD_ESP32_ETHERNETKIT
default "esp32-wrover-kit" if ARCH_BOARD_ESP32_WROVERKIT
default "esp32c3-devkit" if ARCH_BOARD_ESP32C3_DEVKIT
default "esp32c3-devkit-rust-1" if ARCH_BOARD_ESP32C3_DEVKIT_RUST1
default "esp32s2-saola-1" if ARCH_BOARD_ESP32S2_SAOLA_1
default "esp32s3-devkit" if ARCH_BOARD_ESP32S3_DEVKIT
default "esp32s3-eye" if ARCH_BOARD_ESP32S3_EYE
@ -3531,6 +3540,9 @@ endif
if ARCH_BOARD_ESP32C3_DEVKIT
source "boards/risc-v/esp32c3/esp32c3-devkit/Kconfig"
endif
if ARCH_BOARD_ESP32C3_DEVKIT_RUST1
source "boards/risc-v/esp32c3/esp32c3-devkit-rust-1/Kconfig"
endif
if ARCH_BOARD_ESP32S2_SAOLA_1
source "boards/xtensa/esp32s2/esp32s2-saola-1/Kconfig"
endif

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@ -0,0 +1,12 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_ESP32C3_DEVKIT_RUST1
config ESP32C3_DEVKIT_RUST1_RUN_IRAM
bool "Run from IRAM"
default n
endif # ARCH_BOARD_ESP32C3_DEVKIT_RUST1

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@ -0,0 +1,37 @@
README
======
Overview
--------
Initial port to ESP32C3-Devkit-RUST-1 board:
https://github.com/esp-rs/esp-rust-board
Testing
-------
$ ./tools/configure.sh esp32c3-devkit-rust-1:nsh
$ make
$ make flash ESPTOOL_PORT=/dev/ttyACM0
Alternatively you can compile and flash faster this way:
$ make -j flash ESPTOOL_PORT=/dev/ttyACM0
After flashing NuttX in this board use minicom or other serial console
configured to:
Device: /dev/ttyACM0
Baudrate: 9600 8n1
If everything is fine you should be able to get the serial console:
nsh> uname -a
NuttX 10.4.0 55df6e951e-dirty Aug 22 2022 17:12:29 risc-v esp32c3-devkit-rust-1
nsh> mount
/proc type procfs
nsh> free
total used free largest nused nfree
Umem: 377872 5792 372080 372080 30 1
nsh>

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@ -0,0 +1,43 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ESP32C3_UART0 is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32c3-devkit-rust-1"
CONFIG_ARCH_BOARD_ESP32C3_DEVKIT_RUST1=y
CONFIG_ARCH_CHIP="esp32c3"
CONFIG_ARCH_CHIP_ESP32C3=y
CONFIG_ARCH_CHIP_ESP32C3MINI1=y
CONFIG_ARCH_INTERRUPTSTACK=1536
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_DEV_ZERO=y
CONFIG_ESP32C3_USBSERIAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_NSH=y

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@ -0,0 +1,38 @@
/****************************************************************************
* boards/risc-v/esp32c3/esp32c3-devkit-rust-1/include/board.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32C3_ESP32C3_DEVKIT_RUST1_INCLUDE_BOARD_H
#define __BOARDS_RISCV_ESP32C3_ESP32C3_DEVKIT_RUST1_INCLUDE_BOARD_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
#define BOARD_XTAL_FREQUENCY 40000000
/* GPIO pins used by the GPIO Subsystem */
#define BOARD_NGPIOOUT 2 /* Amount of GPIO Output pins */
#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */
#endif /* __BOARDS_RISCV_ESP32C3_ESP32C3_DEVKIT_RUST1_INCLUDE_BOARD_H */

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@ -0,0 +1,116 @@
/****************************************************************************
* boards/risc-v/esp32c3/esp32c3-devkit-rust-1/include/board_memorymap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32C3_ESP32C3_DEVKIT_RUST1_INCLUDE_BOARD_MEMORYMAP_H
#define __BOARDS_RISCV_ESP32C3_ESP32C3_DEVKIT_RUST1_INCLUDE_BOARD_MEMORYMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <stdint.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Kernel ROM */
#define KIROM_START (uintptr_t)&__kirom_start
#define KIROM_SIZE (uintptr_t)&__kirom_size
#define KDROM_START (uintptr_t)&__kdrom_start
#define KDROM_SIZE (uintptr_t)&__kdrom_size
/* Kernel RAM */
#define KIRAM_START (uintptr_t)&__kiram_start
#define KIRAM_SIZE (uintptr_t)&__kiram_size
#define KIRAM_END (uintptr_t)&__kiram_end
#define KDRAM_START (uintptr_t)&__kdram_start
#define KDRAM_SIZE (uintptr_t)&__kdram_size
#define KDRAM_END (uintptr_t)&__kdram_end
/* Exception vectors */
#define VECTORS_START (uintptr_t)&__vectors_start
#define VECTORS_END (uintptr_t)&__vectors_end
/* User ROM */
#define UIROM_START (uintptr_t)&__uirom_start
#define UIROM_SIZE (uintptr_t)&__uirom_size
#define UIROM_END (uintptr_t)&__uirom_end
#define UDROM_START (uintptr_t)&__udrom_start
#define UDROM_SIZE (uintptr_t)&__udrom_size
#define UDROM_END (uintptr_t)&__udrom_end
/* User RAM */
#define UIRAM_START (uintptr_t)&__uiram_start
#define UIRAM_SIZE (uintptr_t)&__uiram_size
#define UIRAM_END (uintptr_t)&__uiram_end
#define UDRAM_START (uintptr_t)&__udram_start
#define UDRAM_SIZE (uintptr_t)&__udram_size
#define UDRAM_END (uintptr_t)&__udram_end
/****************************************************************************
* Public Data
****************************************************************************/
/* Kernel ROM (RX) */
extern uintptr_t __kirom_start;
extern uintptr_t __kirom_size;
extern uintptr_t __kdrom_start;
extern uintptr_t __kdrom_size;
/* Kernel RAM (RW) */
extern uintptr_t __kiram_start;
extern uintptr_t __kiram_size;
extern uintptr_t __kiram_end;
extern uintptr_t __kdram_start;
extern uintptr_t __kdram_size;
extern uintptr_t __kdram_end;
/* Exception vectors */
extern uintptr_t __vectors_start;
extern uintptr_t __vectors_end;
/* User ROM (RX) */
extern uintptr_t __uirom_start;
extern uintptr_t __uirom_size;
extern uintptr_t __uirom_end;
extern uintptr_t __udrom_start;
extern uintptr_t __udrom_size;
extern uintptr_t __udrom_end;
/* User RAM (RW) */
extern uintptr_t __uiram_start;
extern uintptr_t __uiram_size;
extern uintptr_t __uiram_end;
extern uintptr_t __udram_start;
extern uintptr_t __udram_size;
extern uintptr_t __udram_end;
#endif /* __BOARDS_RISCV_ESP32C3_ESP32C3_DEVKIT_RUST1_INCLUDE_BOARD_MEMORYMAP_H */

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@ -0,0 +1,25 @@
/****************************************************************************
* boards/risc-v/esp32c3/esp32c3-devkit-rust-1/include/nsh_romfsimg.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32C3_ESP32C3_DEVKIT_RUST1_INCLUDE_NSH_ROMFSIMG_H
#define __BOARDS_RISCV_ESP32C3_ESP32C3_DEVKIT_RUST1_INCLUDE_NSH_ROMFSIMG_H
extern const unsigned char romfs_img[];
extern const unsigned int romfs_img_len;
#endif

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@ -0,0 +1 @@
/esp32c3_out.ld

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@ -0,0 +1,54 @@
############################################################################
# boards/risc-v/esp32c3/esp32c3-devkit-rust-1/scripts/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
###########################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/tools/esp32c3/Config.mk
include $(TOPDIR)/arch/risc-v/src/common/Toolchain.defs
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32c3_out.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32c3.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32c3_rom.ld
ARCHCFLAGS += -msmall-data-limit=0
ARCHCXXFLAGS += -msmall-data-limit=0
ARCHPICFLAGS = -fpic
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
# Loadable module definitions
CMODULEFLAGS = $(CFLAGS)
LDMODULEFLAGS = -melf32lriscv -r -e module_initialize
LDMODULEFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/libs/libc/modlib/gnu-elf.ld)
# ELF module definitions
CELFFLAGS = $(CFLAGS)
CXXELFFLAGS = $(CXXFLAGS)
LDELFFLAGS = -melf32lriscv -r -e main
LDELFFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)$(DELIM)binfmt$(DELIM)libelf$(DELIM)gnu-elf.ld)

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@ -0,0 +1,260 @@
/****************************************************************************
* boards/risc-v/esp32c3/esp32c3-devkit-rust-1/scripts/esp32c3.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* Default entry point: */
ENTRY(__start);
SECTIONS
{
.iram0.text :
{
_iram_start = ABSOLUTE(.);
/* Vectors go to start of IRAM */
KEEP(*(.exception_vectors.text));
. = ALIGN(4);
*(.iram1)
*(.iram1.*)
*libsched.a:irq_dispatch.*(.text .text.* .literal .literal.*)
*(.wifi0iram .wifi0iram.*)
*(.wifirxiram .wifirxiram.*)
*(.wifislpiram .wifislpiram.*)
*(.wifislprxiram .wifislprxiram.*)
} >iram0_0_seg
/* This section is required to skip .iram0.text area because iram0_0_seg
* and dram0_0_seg reflect the same address space on different buses.
*/
.dram0.dummy (NOLOAD):
{
. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
} >dram0_0_seg
/* Shared RAM */
.dram0.bss (NOLOAD) :
{
. = ALIGN (8);
_sbss = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.share.mem)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_ebss = ABSOLUTE(.);
} >dram0_0_seg
.noinit (NOLOAD):
{
/* This section contains data that is not initialized during load,
* or during the application's initialization sequence.
*/
*(.noinit)
*(.noinit.*)
} >dram0_0_seg
.dram0.data :
{
_sdata = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
__global_pointer$ = . + 0x800;
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
*(.dram1)
*(.dram1.*)
. = ALIGN(4);
_edata = ABSOLUTE(.);
/* Heap starts at the end of .data */
_sheap = ABSOLUTE(.);
} >dram0_0_seg
.flash.text :
{
_stext = .;
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
*(.fini.literal)
*(.fini)
*(.gnu.version)
_etext = .;
/* Similar to _iram_start, this symbol goes here so it is
* resolved by addr2line in preference to the first symbol in
* the flash.text segment.
*/
_flash_cache_start = ABSOLUTE(0);
} >default_code_seg
.flash_rodata_dummy (NOLOAD):
{
. = SIZEOF(.flash.text);
. = ALIGN(0x10000) + 0x20;
} >drom0_0_seg
.flash.rodata : ALIGN(0x10)
{
_srodata = ABSOLUTE(.);
*(.rodata)
*(.rodata.*)
*(.srodata.*)
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table .gcc_except_table.*)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
. = (. + 3) & ~ 3;
__eh_frame = ABSOLUTE(.);
KEEP(*(.eh_frame))
. = (. + 7) & ~ 3;
/* C++ constructor and destructor tables:
* RISC-V GCC is configured with --enable-initfini-array so it emits an
* .init_array section instead.
*/
_sinit = ABSOLUTE(.);
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
_einit = ABSOLUTE(.);
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
_erodata = ABSOLUTE(.);
/* Literals are also RO data. */
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
. = ALIGN(4);
} >default_rodata_seg
/* Marks the end of IRAM code segment */
.iram0.text_end (NOLOAD) :
{
. = ALIGN (16);
} >iram0_0_seg
.iram0.data :
{
. = ALIGN(16);
*(.iram.data)
*(.iram.data*)
} >iram0_0_seg
.iram0.bss (NOLOAD) :
{
. = ALIGN(16);
*(.iram.bss)
*(.iram.bss*)
. = ALIGN(16);
_iram_end = ABSOLUTE(.);
} >iram0_0_seg
/* RTC fast memory holds RTC wake stub code !*/
.rtc.text :
{
. = ALIGN(4);
*(.rtc.literal .rtc.text)
} >rtc_seg
/* This section is required to skip rtc.text area because the text and
* data segments reflect the same address space on different buses.
*/
.rtc.dummy :
{
. = SIZEOF(.rtc.text);
} >rtc_seg
/* RTC BSS section. */
.rtc.bss (NOLOAD) :
{
*(.rtc.bss)
} >rtc_seg
/* RTC data section holds RTC wake stub data/rodata. */
.rtc.data :
{
*(.rtc.data)
*(.rtc.rodata)
/* Whatever is left from the RTC memory is used as a special heap. */
_srtcheap = ABSOLUTE(.);
} >rtc_seg
}

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@ -0,0 +1,148 @@
/****************************************************************************
* boards/risc-v/esp32c3/esp32c3-devkit-rust-1/scripts/flat.template.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* This file describes the memory layout (memory blocks) as virtual
* memory addresses.
*
* NOTE: That this is not the actual linker script but rather a "template"
* for the esp32c3_out.ld script. This template script is passed through
* the C preprocessor to include selected configuration options.
*
****************************************************************************/
#include <nuttx/config.h>
#define SRAM_IRAM_START 0x4037c000
#define SRAM_DRAM_START 0x3fc7c000
/* ICache size is fixed to 16KB on ESP32-C3 */
#define ICACHE_SIZE 0x4000
#define I_D_SRAM_OFFSET (SRAM_IRAM_START - SRAM_DRAM_START)
/* 2nd stage bootloader iram_loader_seg start address */
#define SRAM_DRAM_END 0x403d0000 - I_D_SRAM_OFFSET
#define SRAM_IRAM_ORG (SRAM_IRAM_START + ICACHE_SIZE)
#define SRAM_DRAM_ORG (SRAM_DRAM_START + ICACHE_SIZE)
#define I_D_SRAM_SIZE SRAM_DRAM_END - SRAM_DRAM_ORG
#ifdef CONFIG_ESP32C3_FLASH_2M
# define FLASH_SIZE 0x200000
#elif defined (CONFIG_ESP32C3_FLASH_4M)
# define FLASH_SIZE 0x400000
#elif defined (CONFIG_ESP32C3_FLASH_8M)
# define FLASH_SIZE 0x800000
#elif defined (CONFIG_ESP32C3_FLASH_16M)
# define FLASH_SIZE 0x1000000
#endif
MEMORY
{
#ifdef CONFIG_ESP32C3_APP_FORMAT_MCUBOOT
/* The origin values for "metadata" and "ROM" memory regions are the actual
* load addresses.
*
* NOTE: The memory region starting from 0x0 with length represented by
* CONFIG_ESP32C3_APP_MCUBOOT_HEADER_SIZE is reserved for the MCUboot header,
* which will be prepended to the binary file by the "imgtool" during the
* signing of firmware image.
*/
metadata (RX) : org = CONFIG_ESP32C3_APP_MCUBOOT_HEADER_SIZE, len = 0x20
ROM (RX) : org = CONFIG_ESP32C3_APP_MCUBOOT_HEADER_SIZE + 0x20,
len = FLASH_SIZE - (CONFIG_ESP32C3_APP_MCUBOOT_HEADER_SIZE + 0x20)
#endif
/* Below values assume the flash cache is on, and have the blocks this
* uses subtracted from the length of the various regions. The 'data access
* port' dram/drom regions map to the same iram/irom regions but are
* connected to the data port of the CPU and e.g. allow bytewise access.
*/
iram0_0_seg (RX) : org = SRAM_IRAM_ORG, len = I_D_SRAM_SIZE
/* Flash mapped instruction data. */
#ifdef CONFIG_ESP32C3_APP_FORMAT_MCUBOOT
irom0_0_seg (RX) : org = 0x42000000, len = FLASH_SIZE
#else
/* The 0x20 offset is a convenience for the app binary image generation.
* Flash cache has 64KB pages. The .bin file which is flashed to the chip
* has a 0x18 byte file header, and each segment has a 0x08 byte segment
* header. Setting this offset makes it simple to meet the flash cache MMU's
* constraint that (paddr % 64KB == vaddr % 64KB).
*/
irom0_0_seg (RX) : org = 0x42000020, len = FLASH_SIZE - 0x20
#endif
/* Shared data RAM, excluding memory reserved for ROM bss/data/stack. */
dram0_0_seg (RW) : org = SRAM_DRAM_ORG, len = I_D_SRAM_SIZE
/* Flash mapped constant data */
#ifdef CONFIG_ESP32C3_APP_FORMAT_MCUBOOT
/* The DROM segment origin is offset by 0x40 for mirroring the actual ROM
* image layout:
* 0x0 - 0x1F : MCUboot header
* 0x20 - 0x3F : Application image metadata section
* 0x40 onwards: ROM code and data
* This is required to meet the following constraint from the external
* flash MMU:
* VMA % 64KB == LMA % 64KB
* i.e. the lower 16 bits of both the virtual address (address seen by the
* CPU) and the load address (physical address of the external flash) must
* be equal.
*/
drom0_0_seg (R) : org = 0x3c000000 + (CONFIG_ESP32C3_APP_MCUBOOT_HEADER_SIZE + 0x20),
len = FLASH_SIZE - (CONFIG_ESP32C3_APP_MCUBOOT_HEADER_SIZE + 0x20)
#else
/* The 0x20 offset is a convenience for the app binary image generation.
* Flash cache has 64KB pages. The .bin file which is flashed to the chip
* has a 0x18 byte file header, and each segment has a 0x08 byte segment
* header. Setting this offset makes it simple to meet the flash cache MMU's
* constraint that (paddr % 64KB == vaddr % 64KB).
*/
drom0_0_seg (R) : org = 0x3c000020, len = FLASH_SIZE - 0x20
#endif
/* RTC fast memory. Persists over deep sleep. */
rtc_seg(RWX) : org = 0x50000000, len = 0x2000
}
#if CONFIG_ESP32C3_DEVKIT_RUST1_RUN_IRAM
REGION_ALIAS("default_rodata_seg", dram0_0_seg);
REGION_ALIAS("default_code_seg", iram0_0_seg);
#else
REGION_ALIAS("default_rodata_seg", drom0_0_seg);
REGION_ALIAS("default_code_seg", irom0_0_seg);
#endif /* CONFIG_ESP32C3_DEVKIT_RUST1_RUN_IRAM */
/* Mark the end of the RTC heap (top of the RTC region) */
_ertcheap = 0x50001fff;

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@ -0,0 +1 @@
/etctmp*

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@ -0,0 +1,54 @@
#############################################################################
# boards/risc-v/esp32c3/esp32c3-devkit-rust-1/src/Makefile
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
#############################################################################
include $(TOPDIR)/Make.defs
SCRIPTDIR = $(BOARD_DIR)$(DELIM)scripts
CONFIGFILE = $(TOPDIR)$(DELIM)include$(DELIM)nuttx$(DELIM)config.h
CSRCS = esp32c3_boot.c esp32c3_bringup.c
ifeq ($(CONFIG_BOARDCTL),y)
CSRCS += esp32c3_appinit.c
ifeq ($(CONFIG_BOARDCTL_RESET),y)
CSRCS += esp32c3_reset.c
endif
endif
ifeq ($(CONFIG_BOARDCTL_IOCTL),y)
CSRCS += esp32c3_ioctl.c
endif
SCRIPTIN = $(SCRIPTDIR)$(DELIM)flat.template.ld
SCRIPTOUT = $(SCRIPTDIR)$(DELIM)esp32c3_out.ld
.PHONY = context distclean
$(SCRIPTOUT): $(SCRIPTIN) $(CONFIGFILE)
$(Q) $(CC) -isystem $(TOPDIR)/include -I $(BOARD_DIR)/scripts -C -P -x c -E $(SCRIPTIN) -o $@
context:: $(SCRIPTOUT)
distclean::
$(call DELFILE, $(SCRIPTOUT))
include $(TOPDIR)/boards/Board.mk

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@ -0,0 +1,282 @@
/****************************************************************************
* boards/risc-v/esp32c3/esp32c3-devkit-rust-1/src/esp32c3-devkit-rust-1.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32C3_ESP32C3_DEVKIT_RUST1_SRC_ESP32C3_DEVKIT_RUST1_H
#define __BOARDS_RISCV_ESP32C3_ESP32C3_DEVKIT_RUST1_SRC_ESP32C3_DEVKIT_RUST1_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/compiler.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* TIMERS */
#define TIMER0 0
#define TIMER1 1
/* ONESHOT */
#define ONESHOT_TIMER 1
#define ONESHOT_RESOLUTION_US 1
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: esp32c3_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_BOARDCTL=y :
* Called from the NSH library via board_app_initialize()
*
****************************************************************************/
int esp32c3_bringup(void);
/****************************************************************************
* Name: esp32c3_gpio_init
****************************************************************************/
#ifdef CONFIG_DEV_GPIO
int esp32c3_gpio_init(void);
#endif
/****************************************************************************
* Name: board_wdt_init
*
* Description:
* Configure the timer driver.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_WATCHDOG
int board_wdt_init(void);
#endif
/****************************************************************************
* Name: board_spidev_initialize
*
* Description:
* Initialize SPI driver and register the /dev/spi device.
*
* Input Parameters:
* bus - The SPI bus number, used to build the device path as /dev/spiN
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_SPI_DRIVER
int board_spidev_initialize(int bus);
#endif
/****************************************************************************
* Name: board_spislavedev_initialize
*
* Description:
* Initialize SPI Slave driver and register the /dev/spislv device.
*
* Input Parameters:
* bus - The SPI bus number, used to build the device path as /dev/spislvN
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_SPI_SLAVE
int board_spislavedev_initialize(int bus);
#endif
/****************************************************************************
* Name: board_i2c_init
*
* Description:
* Configure the I2C driver.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_I2C_DRIVER
int board_i2c_init(void);
#endif
/****************************************************************************
* Name: board_twai_setup
*
* Description:
* Configure the TWAI driver.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_CAN
int esp32c3_twai_setup(void);
#endif
/****************************************************************************
* Name: board_oneshot_init
*
* Description:
* Configure the oneshot timer driver.
*
* Input Parameters:
* timer - Timer instance to be used as oneshot timer.
* resolution - Oneshot timer resolution.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_ONESHOT
int board_oneshot_init(int timer, uint16_t resolution);
#endif
/****************************************************************************
* Name: board_bmp180_initialize
*
* Description:
* Initialize and register the BMP180 Pressure Sensor driver.
*
* Input Parameters:
* devno - The device number, used to build the device path as /dev/pressN
* busno - The I2C bus number
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
#ifdef CONFIG_SENSORS_BMP180
int board_bmp180_initialize(int devno, int busno);
#endif
/****************************************************************************
* Name: board_wlan_init
*
* Description:
* Configure the wireless subsystem.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_ESP32C3_WIRELESS
int board_wlan_init(void);
#endif
/****************************************************************************
* Name: board_spiflash_init
*
* Description:
* Initialize the SPIFLASH and register the MTD device.
*
****************************************************************************/
#ifdef CONFIG_ESP32C3_SPIFLASH
int board_spiflash_init(void);
#endif
/****************************************************************************
* Name: esp32c3_spiflash_encrypt_test
*
* Description:
* Test ESP32-C3 SPI Flash driver read/write with encryption.
*
* Input Parameters:
* None
*
* Returned Value:
* None.
*
****************************************************************************/
#ifdef CONFIG_ESP32C3_SPIFLASH_ENCRYPTION_TEST
void esp32c3_spiflash_encrypt_test(void);
#endif
/****************************************************************************
* Name: esp32c3_ledc_setup
*
* Description:
* Initialize LEDC PWM and register the PWM device.
*
****************************************************************************/
#ifdef CONFIG_ESP32C3_LEDC
int esp32c3_pwm_setup(void);
#endif
/****************************************************************************
* Name: board_adc_init
*
* Description:
* Configure the ADC driver.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_ADC
int board_adc_init(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32C3_ESP32C3_DEVKIT_RUST1_SRC_ESP32C3_DEVKIT_RUST1_H */

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@ -0,0 +1,80 @@
/****************************************************************************
* boards/risc-v/esp32c3/esp32c3-devkit-rust-1/src/esp32c3_appinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/board.h>
#include "esp32c3-devkit-rust-1.h"
#ifdef CONFIG_BOARDCTL
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
#ifdef CONFIG_BOARD_LATE_INITIALIZE
/* Board initialization already performed by board_late_initialize() */
return OK;
#else
/* Perform board-specific initialization */
return esp32c3_bringup();
#endif
}
#endif /* CONFIG_BOARDCTL */

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@ -0,0 +1,86 @@
/****************************************************************************
* boards/risc-v/esp32c3/esp32c3-devkit-rust-1/src/esp32c3_boot.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "riscv_internal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp32c3_board_initialize
*
* Description:
* All ESP32-C3 architectures must provide the following entry point.
* This entry point is called early in the initialization -- after all
* memory has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void esp32c3_board_initialize(void)
{
#ifdef CONFIG_SCHED_CRITMONITOR
up_perf_init(NULL);
#endif
/* Configure on-board LEDs if LED support has been selected. */
#ifdef CONFIG_ARCH_LEDS
board_autoled_initialize();
#endif
}
/****************************************************************************
* Name: board_late_initialize
*
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will
* be called immediately after up_initialize() is called and just before
* the initial application is started. This additional initialization
* phase may be used, for example, to initialize board-specific device
* drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_LATE_INITIALIZE
void board_late_initialize(void)
{
/* Perform board-specific initialization */
esp32c3_bringup();
}
#endif

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/****************************************************************************
* boards/risc-v/esp32c3/esp32c3-devkit-rust-1/src/esp32c3_bringup.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <fcntl.h>
#include <unistd.h>
#include <syslog.h>
#include <sys/stat.h>
#include <sys/ioctl.h>
#include <sys/types.h>
#include <syslog.h>
#include <debug.h>
#include <stdio.h>
#include <nuttx/fs/fs.h>
#include "esp32c3_wlan.h"
#include "esp32c3_spiflash.h"
#include "esp32c3_partition.h"
#include "esp32c3-devkit-rust-1.h"
#include "esp32c3_rtc.h"
#ifdef CONFIG_ESP32C3_EFUSE
# include "esp32c3_efuse.h"
#endif
#ifdef CONFIG_ESP32C3_SHA_ACCELERATOR
# include "esp32c3_sha.h"
#endif
#ifdef CONFIG_RTC_DRIVER
# include "esp32c3_rtc_lowerhalf.h"
#endif
#ifdef CONFIG_ESP32C3_BLE
# include "esp32c3_ble.h"
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp32c3_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y
* Called from the NSH library
*
****************************************************************************/
int esp32c3_bringup(void)
{
int ret;
#if defined(CONFIG_ESP32C3_EFUSE)
ret = esp32c3_efuse_initialize("/dev/efuse");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to init EFUSE: %d\n", ret);
}
#endif
#ifdef CONFIG_ESP32C3_SHA_ACCELERATOR
ret = esp32c3_sha_init();
if (ret < 0)
{
syslog(LOG_ERR,
"ERROR: Failed to initialize SHA: %d\n", ret);
}
#endif
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = nx_mount(NULL, "/proc", "procfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret);
}
#endif
#ifdef CONFIG_FS_TMPFS
/* Mount the tmpfs file system */
ret = nx_mount(NULL, CONFIG_LIBC_TMPDIR, "tmpfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount tmpfs at %s: %d\n",
CONFIG_LIBC_TMPDIR, ret);
}
#endif
#ifdef CONFIG_RTC_DRIVER
/* Instantiate the ESP32-C3 RTC driver */
ret = esp32c3_rtc_driverinit();
if (ret < 0)
{
syslog(LOG_ERR,
"ERROR: Failed to Instantiate the RTC driver: %d\n", ret);
}
#endif
/* If we got here then perhaps not all initialization was successful, but
* at least enough succeeded to bring-up NSH with perhaps reduced
* capabilities.
*/
UNUSED(ret);
return OK;
}

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/****************************************************************************
* boards/risc-v/esp32c3/esp32c3-devkit-rust-1/src/esp32c3_ioctl.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <errno.h>
#include <nuttx/board.h>
#ifdef CONFIG_BOARDCTL_IOCTL
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_ioctl
*
* Description:
* The "landing site" for much of the boardctl() interface. Generic board-
* control functions invoked via ioctl() get routed through here.
*
* Since we don't do anything unusual at the moment, this function
* accomplishes nothing except avoid a missing-function linker error if
* CONFIG_BOARDCTL_IOCTL is selected.
*
* Input Parameters:
* cmd - IOCTL command being requested.
* arg - Arguments for the IOCTL.
*
* Returned Value:
* we don't yet support any boardctl IOCTLs. This function always returns
* -ENOTTY which is the standard IOCTL return value when a command is not
* supported
*
****************************************************************************/
int board_ioctl(unsigned int cmd, uintptr_t arg)
{
switch (cmd)
{
default:
return -ENOTTY;
}
return OK;
}
#endif /* CONFIG_BOARDCTL_IOCTL */

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/****************************************************************************
* boards/risc-v/esp32c3/esp32c3-devkit-rust-1/src/esp32c3_reset.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdlib.h>
#include <debug.h>
#include <assert.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include "esp32c3_systemreset.h"
#ifdef CONFIG_BOARDCTL_RESET
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_reset
*
* Description:
* Reset board. Support for this function is required by board-level
* logic if CONFIG_BOARDCTL_RESET is selected.
*
* Input Parameters:
* status - Status information provided with the reset event. This
* meaning of this status information is board-specific. If not
* used by a board, the value zero may be provided in calls to
* board_reset().
*
* Returned Value:
* If this function returns, then it was not possible to power-off the
* board due to some constraints. The return value in this case is a
* board-specific reason for the failure to shutdown.
*
****************************************************************************/
int board_reset(int status)
{
syslog(LOG_INFO, "reboot status=%d\n", status);
switch (status)
{
case EXIT_SUCCESS:
up_shutdown_handler();
break;
case CONFIG_BOARD_ASSERT_RESET_VALUE:
break;
default:
break;
}
up_systemreset();
return 0;
}
#endif /* CONFIG_BOARDCTL_RESET */