boards/arm/imxrt/imxrt1060-evk: An update to the configuration on imx1060-evk to remove compilation warnings about duplicated definitions. No functional changes.
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71a968ad71
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27a6039501
2 changed files with 46 additions and 155 deletions
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@ -194,13 +194,13 @@
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* sure shapes are square with minimal ringing.
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*/
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#define PIN_USDHC1_D0 (GPIO_USDHC1_DATA0 | IOMUX_USDHC1_DATAX_DEFAULT)
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#define PIN_USDHC1_D1 (GPIO_USDHC1_DATA1 | IOMUX_USDHC1_DATAX_DEFAULT)
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#define PIN_USDHC1_D2 (GPIO_USDHC1_DATA2 | IOMUX_USDHC1_DATAX_DEFAULT)
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#define PIN_USDHC1_D3 (GPIO_USDHC1_DATA3 | IOMUX_USDHC1_DATAX_DEFAULT)
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#define PIN_USDHC1_DCLK (GPIO_USDHC1_CLK | IOMUX_USDHC1_CLK_DEFAULT)
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#define PIN_USDHC1_CMD (GPIO_USDHC1_CMD | IOMUX_USDHC1_CMD_DEFAULT)
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#define PIN_USDHC1_CD (GPIO_USDHC1_CD_2 | IOMUX_USDHC1_CLK_DEFAULT)
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#define PIN_USDHC1_D0 (GPIO_USDHC1_DATA0 | IOMUX_USDHC1_DATAX_DEFAULT)
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#define PIN_USDHC1_D1 (GPIO_USDHC1_DATA1 | IOMUX_USDHC1_DATAX_DEFAULT)
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#define PIN_USDHC1_D2 (GPIO_USDHC1_DATA2 | IOMUX_USDHC1_DATAX_DEFAULT)
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#define PIN_USDHC1_D3 (GPIO_USDHC1_DATA3 | IOMUX_USDHC1_DATAX_DEFAULT)
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#define PIN_USDHC1_DCLK (GPIO_USDHC1_CLK | IOMUX_USDHC1_CLK_DEFAULT)
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#define PIN_USDHC1_CMD (GPIO_USDHC1_CMD | IOMUX_USDHC1_CMD_DEFAULT)
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#define PIN_USDHC1_CD (GPIO_USDHC1_CD_2 | IOMUX_USDHC1_CLK_DEFAULT)
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/* 386 KHz for initial inquiry stuff */
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@ -246,7 +246,7 @@
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#ifdef CONFIG_ARCH_LEDS
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#define GPIO_LED (GPIO_OUTPUT | IOMUX_LED_DEFAULT | \
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GPIO_OUTPUT_ZERO | GPIO_PORT1 | GPIO_PIN9) /* AD_BO_09 */
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GPIO_OUTPUT_ZERO | GPIO_PORT1 | GPIO_PIN9) /* AD_BO_09 */
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#endif
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/* LCD *********************************************************************/
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@ -310,12 +310,12 @@
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GPIO_PORT1 | GPIO_PIN10) /* AD_B0_10 */
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#define GPIO_ENET_IRQ IMXRT_IRQ_GPIO1_10
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#define GPIO_ENET_RST (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
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GPIO_PORT1 | GPIO_PIN9 | IOMUX_ENET_RST_DEFAULT)
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GPIO_PORT1 | GPIO_PIN9 | IOMUX_ENET_RST_DEFAULT) /* AD_B0_09 */
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#ifdef CONFIG_ETH0_PHY_KSZ8081
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#ifdef GPIO_LED
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#warning LED interferes with ETH reset unless R323 is removed.
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#endif
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# ifdef GPIO_LED
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# warning LED interferes with ETH reset unless R323 is removed.
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# endif
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#endif
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/* PIO Disambiguation *******************************************************/
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@ -327,20 +327,20 @@
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*
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*/
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#define GPIO_LPUART1_RX (GPIO_LPUART1_RX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B0_13 */
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#define GPIO_LPUART1_TX (GPIO_LPUART1_TX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B0_12 */
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#define GPIO_LPUART3_RX (GPIO_LPUART3_RX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B1_07 */
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#define GPIO_LPUART3_TX (GPIO_LPUART3_TX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B1_06 */
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#define GPIO_LPUART1_RX (GPIO_LPUART1_RX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B0_13 */
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#define GPIO_LPUART1_TX (GPIO_LPUART1_TX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B0_12 */
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#define GPIO_LPUART3_RX (GPIO_LPUART3_RX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B1_07 */
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#define GPIO_LPUART3_TX (GPIO_LPUART3_TX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B1_06 */
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/* LPI2Cs
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*
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* Arduino Connector LPI2C1 and audio/gyro IO on LPI2C3.
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*/
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#define GPIO_LPI2C1_SDA (GPIO_LPI2C1_SDA_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_01 */
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#define GPIO_LPI2C1_SCL (GPIO_LPI2C1_SCL_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_00 */
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#define GPIO_LPI2C3_SDA (GPIO_LPI2C3_SDA_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_01 */
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#define GPIO_LPI2C3_SCL (GPIO_LPI2C3_SCL_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_00 */
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#define GPIO_LPI2C1_SDA (GPIO_LPI2C1_SDA_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_01 */
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#define GPIO_LPI2C1_SCL (GPIO_LPI2C1_SCL_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_00 */
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#define GPIO_LPI2C3_SDA (GPIO_LPI2C3_SDA_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_01 */
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#define GPIO_LPI2C3_SCL (GPIO_LPI2C3_SCL_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_00 */
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/* LPSPI
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*
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@ -351,28 +351,36 @@
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* J24 D15 GPIO_AD_B0_00 LPSPI3_SCK
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*/
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#define GPIO_LPSPI3_SCK (GPIO_LPSPI3_SCK_2|IOMUX_LPSPI_DEFAULT) /* GPIO_AD_B0_00 */
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#define GPIO_LPSPI3_MISO (GPIO_LPSPI3_SDI_2|IOMUX_LPSPI_DEFAULT) /* GPIO_AD_B0_02 */
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#define GPIO_LPSPI3_MOSI (GPIO_LPSPI3_SDO_2|IOMUX_LPSPI_DEFAULT) /* GPIO_AD_B0_01 */
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#define IOMUX_LPSPI3_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
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IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
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_IOMUX_PULL_ENABLE)
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#define GPIO_LPSPI3_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
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GPIO_PORT1 | GPIO_PIN3 | IOMUX_LPSPI3_CS) /* GPIO_AD_B0_03 */
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#define GPIO_LPSPI3_SCK (GPIO_LPSPI3_SCK_2|IOMUX_LPSPI_DEFAULT) /* GPIO_AD_B0_00 */
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#define GPIO_LPSPI3_MISO (GPIO_LPSPI3_SDI_2|IOMUX_LPSPI_DEFAULT) /* GPIO_AD_B0_02 */
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#define GPIO_LPSPI3_MOSI (GPIO_LPSPI3_SDO_2|IOMUX_LPSPI_DEFAULT) /* GPIO_AD_B0_01 */
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#define IOMUX_LPSPI3_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
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IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
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_IOMUX_PULL_ENABLE)
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#define GPIO_LPSPI3_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
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GPIO_PORT1 | GPIO_PIN3 | IOMUX_LPSPI3_CS) /* GPIO_AD_B0_03 */
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/* LPSPI1 CS: GPIO_SD_B0_01 */
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#define IOMUX_LPSPI1_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
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IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
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_IOMUX_PULL_ENABLE)
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#define GPIO_LPSPI1_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
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GPIO_PORT3 | GPIO_PIN13 | IOMUX_LPSPI1_CS)
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#define IOMUX_LPSPI1_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
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IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
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_IOMUX_PULL_ENABLE)
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#define GPIO_LPSPI1_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
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GPIO_PORT3 | GPIO_PIN13 | IOMUX_LPSPI1_CS)
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#define IOMUX_MMCSD_EN (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
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IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
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_IOMUX_PULL_ENABLE)
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#define GPIO_MMCSD_EN (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
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GPIO_PORT3 | GPIO_PIN2 | IOMUX_MMCSD_EN)
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#define IOMUX_MMCSD_EN (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
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IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
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_IOMUX_PULL_ENABLE)
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#define GPIO_MMCSD_EN (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
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GPIO_PORT3 | GPIO_PIN2 | IOMUX_MMCSD_EN)
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#define GPIO_FT5X06_INTR IMXRT_IRQ_GPIO1_11
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#define IOMUX_FT5X06_RST (IOMUX_PULL_NONE | IOMUX_CMOS_OUTPUT | \
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IOMUX_DRIVE_40OHM | IOMUX_SPEED_MEDIUM | \
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IOMUX_SLEW_SLOW) /* AD_B0_11 */
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#define GPIO_FT5X06_CTRSTn (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
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GPIO_PORT1 | GPIO_PIN2 | IOMUX_FT5X06_RST) /* AD_B0_02 */
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/****************************************************************************
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* Public Types
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@ -56,123 +56,6 @@
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* i.MX RT 1060 GPIO Pin Definitions ****************************************/
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/* LEDs
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*
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* There are four LED status indicators located on the EVK Board. The
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* functions of these LEDs include:
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*
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* - Main Power Supply(D3)
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* Green: DC 5V main supply is normal.
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* Red: J2 input voltage is over 5.6V.
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* Off: The board is not powered.
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* - Reset RED LED(D21)
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* - OpenSDA LED(D20)
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* - USER LED(D18)
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*
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* Only a single LED, D18, is under software control. It connects to
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* GPIO_AD_B0_09 which is shared with JTAG_TDI and ENET_RST. This pin
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* must be configured as ALT5, GPIO1_IO09
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*/
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#define IOMUX_LED (IOMUX_PULL_NONE | IOMUX_CMOS_OUTPUT | \
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IOMUX_DRIVE_40OHM | IOMUX_SPEED_MEDIUM | \
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IOMUX_SLEW_SLOW)
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#define GPIO_LED (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | GPIO_PORT1 | \
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GPIO_PIN9 | IOMUX_LED)
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/* Backlight of LCD */
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#define IOMUX_LCD_BL (IOMUX_PULL_NONE | IOMUX_CMOS_OUTPUT | \
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IOMUX_DRIVE_40OHM | IOMUX_SPEED_MEDIUM | \
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IOMUX_SLEW_SLOW)
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#define GPIO_LCD_BL (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | GPIO_PORT2 | \
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GPIO_PIN31 | IOMUX_LCD_BL)
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/* Buttons
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*
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* The IMXRT board has one external user button
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*
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* 1. SW8 (IRQ88) GPIO5-00
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*/
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#define IOMUX_SW8 (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
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IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
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_IOMUX_PULL_ENABLE)
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#define GPIO_SW8 (GPIO_INTERRUPT | GPIO_INT_FALLINGEDGE | \
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GPIO_PORT5 | GPIO_PIN0 | IOMUX_SW8)
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/* Touchscreen
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*
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* Interrupt line: GPIO_AD_B0_11
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*
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* The interrupt line coming from the touchscreen FT5336GQQ IC.
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* The touchscreen IC is integrated into the optional RK043FN02H-CT LCD panel
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* and it's connected to the LPI2C1 bus.
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*
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* Reset line: GPIO_AD_B0_02
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*
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* The reset line is active low.
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*/
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#define GPIO_FT5X06_INTR IMXRT_IRQ_GPIO1_11
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#define IOMUX_FT5X06_RST (IOMUX_PULL_NONE | IOMUX_CMOS_OUTPUT | \
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IOMUX_DRIVE_40OHM | IOMUX_SPEED_MEDIUM | \
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IOMUX_SLEW_SLOW)
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#define GPIO_FT5X06_CTRSTn (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
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GPIO_PORT1 | GPIO_PIN2 | IOMUX_FT5X06_RST)
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/* Ethernet Interrupt: GPIOAD_B0_10
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*
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* This pin has a week pull-up within the PHY, is open-drain, and requires
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* an external 1k ohm pull-up resistor (present on the EVK). A falling
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* edge then indicates a change in state of the PHY.
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*/
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#define IOMUX_ENET_INT (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
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IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K)
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#define GPIO_ENET_INT (GPIO_INTERRUPT | GPIO_INT_FALLINGEDGE | \
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GPIO_PORT1 | GPIO_PIN10 | IOMUX_ENET_INT)
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#define GPIO_ENET_IRQ IMXRT_IRQ_GPIO1_10
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/* Ethernet Reset: GPIOAD_B0_09
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*
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* The #RST uses inverted logic. The initial value of zero will put the
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* PHY into the reset state.
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*/
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#define IOMUX_ENET_RST (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
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IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
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_IOMUX_PULL_ENABLE)
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#define GPIO_ENET_RST (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
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GPIO_PORT1 | GPIO_PIN9 | IOMUX_ENET_RST)
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/* LPSPI1 CS: GPIO_SD_B0_01 */
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#define IOMUX_LPSPI1_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
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IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
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_IOMUX_PULL_ENABLE)
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#define GPIO_LPSPI1_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
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GPIO_PORT3 | GPIO_PIN13 | IOMUX_LPSPI1_CS)
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#define IOMUX_MMCSD_EN (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
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IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
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_IOMUX_PULL_ENABLE)
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#define GPIO_MMCSD_EN (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
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GPIO_PORT3 | GPIO_PIN2 | IOMUX_MMCSD_EN)
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/* LPSPI3 CS: GPIO_AD_B0_03 */
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#define IOMUX_LPSPI3_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
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IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
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_IOMUX_PULL_ENABLE)
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#define GPIO_LPSPI3_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
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GPIO_PORT1 | GPIO_PIN3 | IOMUX_LPSPI3_CS)
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/****************************************************************************
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* Public Types
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****************************************************************************/
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