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arch: Remove the extra space before the function prototype

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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
Xiang Xiao 2022-05-10 12:06:44 +08:00 committed by Petro Karashchenko
parent 1fb8c13e5e
commit 2976accd9f
19 changed files with 149 additions and 149 deletions
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2
arch/arm/src/cxd56xx/cxd56_usbdev.c
View file

@ -442,7 +442,7 @@ static void cxd56_usbreset(struct cxd56_usbdev_s *priv);
/* Interrupt handling */
static struct cxd56_ep_s *
cxd56_epfindbyaddr(struct cxd56_usbdev_s *priv, uint16_t eplog);
cxd56_epfindbyaddr(struct cxd56_usbdev_s *priv, uint16_t eplog);
static void cxd56_dispatchrequest(struct cxd56_usbdev_s *priv);
static inline void cxd56_ep0setup(struct cxd56_usbdev_s *priv);
static int cxd56_usbinterrupt(int irq, void *context, void *arg);

4
arch/arm/src/efm32/efm32_i2c.c
View file

@ -262,7 +262,7 @@ static inline void efm32_i2c_modifyreg(struct efm32_i2c_priv_s *priv,
uint32_t setbits);
static inline int efm32_i2c_sem_wait(struct efm32_i2c_priv_s *priv);
static int
efm32_i2c_sem_wait_noncancelable(struct efm32_i2c_priv_s *priv);
efm32_i2c_sem_wait_noncancelable(struct efm32_i2c_priv_s *priv);
#ifdef CONFIG_EFM32_I2C_DYNTIMEOUT
static useconds_t efm32_i2c_tousecs(int msgc, struct i2c_msg_s *msgs);
@ -482,7 +482,7 @@ static inline int efm32_i2c_sem_wait(struct efm32_i2c_priv_s *priv)
****************************************************************************/
static int
efm32_i2c_sem_wait_noncancelable(struct efm32_i2c_priv_s *priv)
efm32_i2c_sem_wait_noncancelable(struct efm32_i2c_priv_s *priv)
{
return nxsem_wait_uninterruptible(&priv->sem_excl);
}

38
arch/arm/src/imxrt/imxrt_lpi2c.c
View file

@ -218,7 +218,7 @@ struct imxrt_lpi2c_priv_s
****************************************************************************/
static inline uint32_t
imxrt_lpi2c_getreg(struct imxrt_lpi2c_priv_s *priv, uint16_t offset);
imxrt_lpi2c_getreg(struct imxrt_lpi2c_priv_s *priv, uint16_t offset);
static inline void imxrt_lpi2c_putreg(struct imxrt_lpi2c_priv_s *priv,
uint16_t offset, uint32_t value);
static inline void imxrt_lpi2c_modifyreg(struct imxrt_lpi2c_priv_s *priv,
@ -227,7 +227,7 @@ static inline void imxrt_lpi2c_modifyreg(struct imxrt_lpi2c_priv_s *priv,
static inline int imxrt_lpi2c_sem_wait(struct imxrt_lpi2c_priv_s *priv);
#ifdef CONFIG_I2C_RESET
static int
imxrt_lpi2c_sem_wait_noncancelable(struct imxrt_lpi2c_priv_s *priv);
imxrt_lpi2c_sem_wait_noncancelable(struct imxrt_lpi2c_priv_s *priv);
#endif
#ifdef CONFIG_IMXRT_LPI2C_DYNTIMEO
@ -235,15 +235,15 @@ static useconds_t imxrt_lpi2c_tousecs(int msgc, struct i2c_msg_s *msgs);
#endif /* CONFIG_IMXRT_LPI2C_DYNTIMEO */
static inline int
imxrt_lpi2c_sem_waitdone(struct imxrt_lpi2c_priv_s *priv);
imxrt_lpi2c_sem_waitdone(struct imxrt_lpi2c_priv_s *priv);
static inline void
imxrt_lpi2c_sem_waitstop(struct imxrt_lpi2c_priv_s *priv);
imxrt_lpi2c_sem_waitstop(struct imxrt_lpi2c_priv_s *priv);
static inline void
imxrt_lpi2c_sem_post(struct imxrt_lpi2c_priv_s *priv);
imxrt_lpi2c_sem_post(struct imxrt_lpi2c_priv_s *priv);
static inline void
imxrt_lpi2c_sem_init(struct imxrt_lpi2c_priv_s *priv);
imxrt_lpi2c_sem_init(struct imxrt_lpi2c_priv_s *priv);
static inline void
imxrt_lpi2c_sem_destroy(struct imxrt_lpi2c_priv_s *priv);
imxrt_lpi2c_sem_destroy(struct imxrt_lpi2c_priv_s *priv);
#ifdef CONFIG_I2C_TRACE
static void imxrt_lpi2c_tracereset(struct imxrt_lpi2c_priv_s *priv);
@ -260,7 +260,7 @@ static inline void imxrt_lpi2c_sendstart(struct imxrt_lpi2c_priv_s *priv,
uint8_t address);
static inline void imxrt_lpi2c_sendstop(struct imxrt_lpi2c_priv_s *priv);
static inline uint32_t
imxrt_lpi2c_getstatus(struct imxrt_lpi2c_priv_s *priv);
imxrt_lpi2c_getstatus(struct imxrt_lpi2c_priv_s *priv);
static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s * priv);
@ -475,7 +475,7 @@ static struct imxrt_lpi2c_priv_s imxrt_lpi2c4_priv =
****************************************************************************/
static inline uint32_t
imxrt_lpi2c_getreg(struct imxrt_lpi2c_priv_s *priv, uint16_t offset)
imxrt_lpi2c_getreg(struct imxrt_lpi2c_priv_s *priv, uint16_t offset)
{
return getreg32(priv->config->base + offset);
}
@ -533,7 +533,7 @@ static inline int imxrt_lpi2c_sem_wait(struct imxrt_lpi2c_priv_s *priv)
#ifdef CONFIG_I2C_RESET
static int
imxrt_lpi2c_sem_wait_noncancelable(struct imxrt_lpi2c_priv_s *priv)
imxrt_lpi2c_sem_wait_noncancelable(struct imxrt_lpi2c_priv_s *priv)
{
return nxsem_wait_uninterruptible(&priv->sem_excl);
}
@ -579,7 +579,7 @@ static useconds_t imxrt_lpi2c_tousecs(int msgc, struct i2c_msg_s *msgs)
#ifndef CONFIG_I2C_POLLED
static inline int
imxrt_lpi2c_sem_waitdone(struct imxrt_lpi2c_priv_s *priv)
imxrt_lpi2c_sem_waitdone(struct imxrt_lpi2c_priv_s *priv)
{
irqstate_t flags;
uint32_t regval;
@ -669,7 +669,7 @@ static inline int
}
#else
static inline int
imxrt_lpi2c_sem_waitdone(struct imxrt_lpi2c_priv_s *priv)
imxrt_lpi2c_sem_waitdone(struct imxrt_lpi2c_priv_s *priv)
{
clock_t timeout;
clock_t start;
@ -729,7 +729,7 @@ static inline int
****************************************************************************/
static inline void
imxrt_lpi2c_sem_waitstop(struct imxrt_lpi2c_priv_s *priv)
imxrt_lpi2c_sem_waitstop(struct imxrt_lpi2c_priv_s *priv)
{
clock_t start;
clock_t elapsed;
@ -853,7 +853,7 @@ static inline void imxrt_lpi2c_sem_init(struct imxrt_lpi2c_priv_s *priv)
****************************************************************************/
static inline void
imxrt_lpi2c_sem_destroy(struct imxrt_lpi2c_priv_s *priv)
imxrt_lpi2c_sem_destroy(struct imxrt_lpi2c_priv_s *priv)
{
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
@ -1187,7 +1187,7 @@ static inline void imxrt_lpi2c_sendstart(struct imxrt_lpi2c_priv_s *priv,
}
imxrt_lpi2c_putreg(priv, IMXRT_LPI2C_MTDR_OFFSET,
(LPI2C_MTDR_CMD_START | LPI2C_MTDR_DATA(addr)));
(LPI2C_MTDR_CMD_START | LPI2C_MTDR_DATA(addr)));
}
/****************************************************************************
@ -1212,7 +1212,7 @@ static inline void imxrt_lpi2c_sendstop(struct imxrt_lpi2c_priv_s *priv)
****************************************************************************/
static inline uint32_t
imxrt_lpi2c_getstatus(struct imxrt_lpi2c_priv_s *priv)
imxrt_lpi2c_getstatus(struct imxrt_lpi2c_priv_s *priv)
{
return imxrt_lpi2c_getreg(priv, IMXRT_LPI2C_MSR_OFFSET);
}
@ -1562,9 +1562,9 @@ static int imxrt_lpi2c_init(struct imxrt_lpi2c_priv_s *priv)
/* Set scl, sda glitch filters and busy idle */
imxrt_lpi2c_putreg(priv, IMXRT_LPI2C_MCFGR2_OFFSET,
LPI2C_MCFG2_BUSIDLE(priv->config->busy_idle) |
LPI2C_MCFG2_FILTSCL_CYCLES(priv->config->filtscl) |
LPI2C_MCFG2_FILTSDA_CYCLES(priv->config->filtsda));
LPI2C_MCFG2_BUSIDLE(priv->config->busy_idle) |
LPI2C_MCFG2_FILTSCL_CYCLES(priv->config->filtscl) |
LPI2C_MCFG2_FILTSDA_CYCLES(priv->config->filtsda));
/* Set pin low cycles to 0 (disable) */

6
arch/arm/src/kinetis/kinetis_i2c.c
View file

@ -134,12 +134,12 @@ static void kinetis_i2c_putreg(struct kinetis_i2cdev_s *priv,
static inline void kinetis_i2c_sem_init(struct kinetis_i2cdev_s *priv);
static inline void
kinetis_i2c_sem_destroy(struct kinetis_i2cdev_s *priv);
kinetis_i2c_sem_destroy(struct kinetis_i2cdev_s *priv);
static inline int kinetis_i2c_sem_wait(struct kinetis_i2cdev_s *priv);
#ifdef CONFIG_I2C_RESET
static int
kinetis_i2c_sem_wait_noncancelable(struct kinetis_i2cdev_s *priv);
kinetis_i2c_sem_wait_noncancelable(struct kinetis_i2cdev_s *priv);
#endif
static inline void kinetis_i2c_sem_post(struct kinetis_i2cdev_s *priv);
@ -361,7 +361,7 @@ static inline int kinetis_i2c_sem_wait(struct kinetis_i2cdev_s *priv)
****************************************************************************/
static int
kinetis_i2c_sem_wait_noncancelable(struct kinetis_i2cdev_s *priv)
kinetis_i2c_sem_wait_noncancelable(struct kinetis_i2cdev_s *priv)
{
return nxsem_wait_uninterruptible(&priv->mutex);
}

46
arch/arm/src/lc823450/lc823450_i2c.c
View file

@ -138,30 +138,30 @@ struct lc823450_i2c_priv_s
****************************************************************************/
static inline int
lc823450_i2c_sem_wait(struct lc823450_i2c_priv_s *priv);
lc823450_i2c_sem_wait(struct lc823450_i2c_priv_s *priv);
static inline void
lc823450_i2c_sem_post(struct lc823450_i2c_priv_s *priv);
lc823450_i2c_sem_post(struct lc823450_i2c_priv_s *priv);
static inline int
lc823450_i2c_sem_waitdone(struct lc823450_i2c_priv_s *priv);
lc823450_i2c_sem_waitdone(struct lc823450_i2c_priv_s *priv);
#ifndef CONFIG_I2C_POLLED
static inline void
lc823450_i2c_enableirq(struct lc823450_i2c_priv_s *priv);
lc823450_i2c_enableirq(struct lc823450_i2c_priv_s *priv);
static inline void
lc823450_i2c_disableirq(struct lc823450_i2c_priv_s *priv);
lc823450_i2c_disableirq(struct lc823450_i2c_priv_s *priv);
#endif
static inline bool
lc823450_i2c_checkirq(struct lc823450_i2c_priv_s *priv);
lc823450_i2c_checkirq(struct lc823450_i2c_priv_s *priv);
static inline bool
lc823450_i2c_checkbusy(struct lc823450_i2c_priv_s *priv);
lc823450_i2c_checkbusy(struct lc823450_i2c_priv_s *priv);
static inline void
lc823450_i2c_prepxfer(struct lc823450_i2c_priv_s *priv);
lc823450_i2c_prepxfer(struct lc823450_i2c_priv_s *priv);
static inline void
lc823450_i2c_sendstart(struct lc823450_i2c_priv_s *priv);
lc823450_i2c_sendstart(struct lc823450_i2c_priv_s *priv);
static inline void
lc823450_i2c_sendstop(struct lc823450_i2c_priv_s *priv);
lc823450_i2c_sendstop(struct lc823450_i2c_priv_s *priv);
static inline uint32_t
lc823450_i2c_readdata(struct lc823450_i2c_priv_s *priv);
lc823450_i2c_readdata(struct lc823450_i2c_priv_s *priv);
static void lc823450_i2c_starttransfer(struct lc823450_i2c_priv_s *priv);
static int lc823450_i2c_poll(struct lc823450_i2c_priv_s *priv);
@ -171,7 +171,7 @@ static int lc823450_i2c_isr(int irq, void *context, void *arg);
static int lc823450_i2c_init(struct lc823450_i2c_priv_s *priv, int port);
static int
lc823450_i2c_deinit(struct lc823450_i2c_priv_s *priv, int port);
lc823450_i2c_deinit(struct lc823450_i2c_priv_s *priv, int port);
static int lc823450_i2c_transfer(struct i2c_master_s *dev,
struct i2c_msg_s *msgs, int count);
@ -273,7 +273,7 @@ static inline int lc823450_i2c_sem_wait(struct lc823450_i2c_priv_s *priv)
****************************************************************************/
static inline void
lc823450_i2c_sem_post(struct lc823450_i2c_priv_s *priv)
lc823450_i2c_sem_post(struct lc823450_i2c_priv_s *priv)
{
nxsem_post(&priv->sem_excl);
}
@ -288,7 +288,7 @@ static inline void
#ifndef CONFIG_I2C_POLLED
static inline int
lc823450_i2c_sem_waitdone(struct lc823450_i2c_priv_s *priv)
lc823450_i2c_sem_waitdone(struct lc823450_i2c_priv_s *priv)
{
int ret;
@ -319,7 +319,7 @@ static inline int
}
#else
static inline int
lc823450_i2c_sem_waitdone(struct lc823450_i2c_priv_s *priv)
lc823450_i2c_sem_waitdone(struct lc823450_i2c_priv_s *priv)
{
uint32_t timeout;
clock_t start;
@ -390,7 +390,7 @@ static void lc823450_i2c_prepxfer(struct lc823450_i2c_priv_s *priv)
****************************************************************************/
static inline bool
lc823450_i2c_checkbusy(struct lc823450_i2c_priv_s *priv)
lc823450_i2c_checkbusy(struct lc823450_i2c_priv_s *priv)
{
return (getreg32(priv->config->base + I2CSTR) & I2C_STR_BBSY) != 0;
}
@ -404,7 +404,7 @@ static inline bool
****************************************************************************/
static inline bool
lc823450_i2c_checkirq(struct lc823450_i2c_priv_s *priv)
lc823450_i2c_checkirq(struct lc823450_i2c_priv_s *priv)
{
return (getreg32(priv->config->base + I2CSTR) & I2C_STR_IREQ) != 0;
}
@ -418,7 +418,7 @@ static inline bool
****************************************************************************/
static inline bool
lc823450_i2c_checkack(struct lc823450_i2c_priv_s *priv)
lc823450_i2c_checkack(struct lc823450_i2c_priv_s *priv)
{
return (getreg32(priv->config->base + I2CSTR) & I2C_STR_ACKD) != 0;
}
@ -432,7 +432,7 @@ static inline bool
****************************************************************************/
static inline void
lc823450_i2c_sendstart(struct lc823450_i2c_priv_s *priv)
lc823450_i2c_sendstart(struct lc823450_i2c_priv_s *priv)
{
modifyreg32(priv->config->base + I2CCTL, I2C_CTL_TRX, I2C_CTL_TRX);
modifyreg32(priv->config->base + I2CCTL, I2C_CTL_ST, I2C_CTL_ST);
@ -447,7 +447,7 @@ static inline void
****************************************************************************/
static inline void
lc823450_i2c_sendstop(struct lc823450_i2c_priv_s *priv)
lc823450_i2c_sendstop(struct lc823450_i2c_priv_s *priv)
{
modifyreg32(priv->config->base + I2CSTR, I2C_STR_IREQ, 0);
modifyreg32(priv->config->base + I2CCTL, I2C_CTL_TRX, I2C_CTL_TRX);
@ -497,7 +497,7 @@ static int lc823450_i2c_reset(struct i2c_master_s *dev)
#ifndef CONFIG_I2C_POLLED
static inline void
lc823450_i2c_enableirq(struct lc823450_i2c_priv_s *priv)
lc823450_i2c_enableirq(struct lc823450_i2c_priv_s *priv)
{
modifyreg32(priv->config->base + I2CCTL, I2C_CTL_IREQEN, I2C_CTL_IREQEN);
}
@ -513,7 +513,7 @@ static inline void
#ifndef CONFIG_I2C_POLLED
static inline void
lc823450_i2c_disableirq(struct lc823450_i2c_priv_s *priv)
lc823450_i2c_disableirq(struct lc823450_i2c_priv_s *priv)
{
modifyreg32(priv->config->base + I2CCTL, I2C_CTL_IREQEN, 0);
}
@ -528,7 +528,7 @@ static inline void
****************************************************************************/
static inline uint32_t
lc823450_i2c_readdata(struct lc823450_i2c_priv_s *priv)
lc823450_i2c_readdata(struct lc823450_i2c_priv_s *priv)
{
return getreg32(priv->config->base + I2CRXD);
}

2
arch/arm/src/rp2040/rp2040_usbdev.c
View file

@ -327,7 +327,7 @@ static void rp2040_handle_zlp(struct rp2040_usbdev_s *priv);
static void rp2040_cancelrequests(struct rp2040_ep_s *privep);
static struct rp2040_ep_s *
rp2040_epfindbyaddr(struct rp2040_usbdev_s *priv, uint16_t eplog);
rp2040_epfindbyaddr(struct rp2040_usbdev_s *priv, uint16_t eplog);
static void rp2040_dispatchrequest(struct rp2040_usbdev_s *priv);
static void rp2040_ep0setup(struct rp2040_usbdev_s *priv);

90
arch/arm/src/s32k1xx/s32k1xx_lpi2c.c
View file

@ -209,33 +209,33 @@ struct s32k1xx_lpi2c_priv_s
****************************************************************************/
static inline uint32_t
s32k1xx_lpi2c_getreg(struct s32k1xx_lpi2c_priv_s *priv,
uint16_t offset);
s32k1xx_lpi2c_getreg(struct s32k1xx_lpi2c_priv_s *priv,
uint16_t offset);
static inline void
s32k1xx_lpi2c_putreg(struct s32k1xx_lpi2c_priv_s *priv,
uint16_t offset, uint32_t value);
s32k1xx_lpi2c_putreg(struct s32k1xx_lpi2c_priv_s *priv,
uint16_t offset, uint32_t value);
static inline void
s32k1xx_lpi2c_modifyreg(struct s32k1xx_lpi2c_priv_s *priv,
uint16_t offset, uint32_t clearbits,
uint32_t setbits);
s32k1xx_lpi2c_modifyreg(struct s32k1xx_lpi2c_priv_s *priv,
uint16_t offset, uint32_t clearbits,
uint32_t setbits);
static inline int
s32k1xx_lpi2c_sem_wait(struct s32k1xx_lpi2c_priv_s *priv);
s32k1xx_lpi2c_sem_wait(struct s32k1xx_lpi2c_priv_s *priv);
#ifdef CONFIG_S32K1XX_I2C_DYNTIMEO
static useconds_t
s32k1xx_lpi2c_tousecs(int msgc, struct i2c_msg_s *msgs);
s32k1xx_lpi2c_tousecs(int msgc, struct i2c_msg_s *msgs);
#endif /* CONFIG_S32K1XX_I2C_DYNTIMEO */
static inline int
s32k1xx_lpi2c_sem_waitdone(struct s32k1xx_lpi2c_priv_s *priv);
s32k1xx_lpi2c_sem_waitdone(struct s32k1xx_lpi2c_priv_s *priv);
static inline void
s32k1xx_lpi2c_sem_waitstop(struct s32k1xx_lpi2c_priv_s *priv);
s32k1xx_lpi2c_sem_waitstop(struct s32k1xx_lpi2c_priv_s *priv);
static inline void
s32k1xx_lpi2c_sem_post(struct s32k1xx_lpi2c_priv_s *priv);
s32k1xx_lpi2c_sem_post(struct s32k1xx_lpi2c_priv_s *priv);
static inline void
s32k1xx_lpi2c_sem_init(struct s32k1xx_lpi2c_priv_s *priv);
s32k1xx_lpi2c_sem_init(struct s32k1xx_lpi2c_priv_s *priv);
static inline void
s32k1xx_lpi2c_sem_destroy(struct s32k1xx_lpi2c_priv_s *priv);
s32k1xx_lpi2c_sem_destroy(struct s32k1xx_lpi2c_priv_s *priv);
#ifdef CONFIG_I2C_TRACE
static void s32k1xx_lpi2c_tracereset(struct s32k1xx_lpi2c_priv_s *priv);
@ -251,12 +251,12 @@ static uint32_t s32k1xx_lpi2c_pckfreq(uintptr_t base);
static void s32k1xx_lpi2c_setclock(struct s32k1xx_lpi2c_priv_s *priv,
uint32_t frequency);
static inline void
s32k1xx_lpi2c_sendstart(struct s32k1xx_lpi2c_priv_s *priv,
uint8_t address);
s32k1xx_lpi2c_sendstart(struct s32k1xx_lpi2c_priv_s *priv,
uint8_t address);
static inline void
s32k1xx_lpi2c_sendstop(struct s32k1xx_lpi2c_priv_s *priv);
s32k1xx_lpi2c_sendstop(struct s32k1xx_lpi2c_priv_s *priv);
static inline uint32_t
s32k1xx_lpi2c_getstatus(struct s32k1xx_lpi2c_priv_s *priv);
s32k1xx_lpi2c_getstatus(struct s32k1xx_lpi2c_priv_s *priv);
static int s32k1xx_lpi2c_isr_process(struct s32k1xx_lpi2c_priv_s *priv);
@ -377,8 +377,8 @@ static struct s32k1xx_lpi2c_priv_s s32k1xx_lpi2c1_priv =
****************************************************************************/
static inline uint32_t
s32k1xx_lpi2c_getreg(struct s32k1xx_lpi2c_priv_s *priv,
uint16_t offset)
s32k1xx_lpi2c_getreg(struct s32k1xx_lpi2c_priv_s *priv,
uint16_t offset)
{
return getreg32(priv->config->base + offset);
}
@ -392,8 +392,8 @@ static inline uint32_t
****************************************************************************/
static inline void
s32k1xx_lpi2c_putreg(struct s32k1xx_lpi2c_priv_s *priv,
uint16_t offset, uint32_t value)
s32k1xx_lpi2c_putreg(struct s32k1xx_lpi2c_priv_s *priv,
uint16_t offset, uint32_t value)
{
putreg32(value, priv->config->base + offset);
}
@ -407,9 +407,9 @@ static inline void
****************************************************************************/
static inline void
s32k1xx_lpi2c_modifyreg(struct s32k1xx_lpi2c_priv_s *priv,
uint16_t offset, uint32_t clearbits,
uint32_t setbits)
s32k1xx_lpi2c_modifyreg(struct s32k1xx_lpi2c_priv_s *priv,
uint16_t offset, uint32_t clearbits,
uint32_t setbits)
{
modifyreg32(priv->config->base + offset, clearbits, setbits);
}
@ -424,7 +424,7 @@ static inline void
****************************************************************************/
static inline int
s32k1xx_lpi2c_sem_wait(struct s32k1xx_lpi2c_priv_s *priv)
s32k1xx_lpi2c_sem_wait(struct s32k1xx_lpi2c_priv_s *priv)
{
return nxsem_wait(&priv->sem_excl);
}
@ -469,7 +469,7 @@ static useconds_t s32k1xx_lpi2c_tousecs(int msgc, struct i2c_msg_s *msgs)
#ifndef CONFIG_I2C_POLLED
static inline int
s32k1xx_lpi2c_sem_waitdone(struct s32k1xx_lpi2c_priv_s *priv)
s32k1xx_lpi2c_sem_waitdone(struct s32k1xx_lpi2c_priv_s *priv)
{
irqstate_t flags;
uint32_t regval;
@ -561,7 +561,7 @@ static inline int
}
#else
static inline int
s32k1xx_lpi2c_sem_waitdone(struct s32k1xx_lpi2c_priv_s *priv)
s32k1xx_lpi2c_sem_waitdone(struct s32k1xx_lpi2c_priv_s *priv)
{
clock_t timeout;
clock_t start;
@ -621,7 +621,7 @@ static inline int
****************************************************************************/
static inline void
s32k1xx_lpi2c_sem_waitstop(struct s32k1xx_lpi2c_priv_s *priv)
s32k1xx_lpi2c_sem_waitstop(struct s32k1xx_lpi2c_priv_s *priv)
{
clock_t start;
clock_t elapsed;
@ -723,7 +723,7 @@ static inline void s32k1xx_lpi2c_sem_post(struct s32k1xx_lpi2c_priv_s *priv)
****************************************************************************/
static inline void
s32k1xx_lpi2c_sem_init(struct s32k1xx_lpi2c_priv_s *priv)
s32k1xx_lpi2c_sem_init(struct s32k1xx_lpi2c_priv_s *priv)
{
nxsem_init(&priv->sem_excl, 0, 1);
@ -746,7 +746,7 @@ static inline void
****************************************************************************/
static inline void
s32k1xx_lpi2c_sem_destroy(struct s32k1xx_lpi2c_priv_s *priv)
s32k1xx_lpi2c_sem_destroy(struct s32k1xx_lpi2c_priv_s *priv)
{
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
@ -1070,8 +1070,8 @@ static void s32k1xx_lpi2c_setclock(struct s32k1xx_lpi2c_priv_s *priv,
****************************************************************************/
static inline void
s32k1xx_lpi2c_sendstart(struct s32k1xx_lpi2c_priv_s *priv,
uint8_t address)
s32k1xx_lpi2c_sendstart(struct s32k1xx_lpi2c_priv_s *priv,
uint8_t address)
{
uint32_t txcount = 0;
uint32_t status = 0;
@ -1082,7 +1082,7 @@ static inline void
/* Turn off auto_stop option */
s32k1xx_lpi2c_modifyreg(priv, S32K1XX_LPI2C_MCFGR1_OFFSET,
LPI2C_MCFGR1_IGNACK, 0);
LPI2C_MCFGR1_IGNACK, 0);
do
{
@ -1110,7 +1110,7 @@ static inline void
}
s32k1xx_lpi2c_putreg(priv, S32K1XX_LPI2C_MTDR_OFFSET,
(LPI2C_MTDR_CMD_START | LPI2C_MTDR_DATA(addr)));
(LPI2C_MTDR_CMD_START | LPI2C_MTDR_DATA(addr)));
}
/****************************************************************************
@ -1122,7 +1122,7 @@ static inline void
****************************************************************************/
static inline void
s32k1xx_lpi2c_sendstop(struct s32k1xx_lpi2c_priv_s *priv)
s32k1xx_lpi2c_sendstop(struct s32k1xx_lpi2c_priv_s *priv)
{
s32k1xx_lpi2c_putreg(priv, S32K1XX_LPI2C_MTDR_OFFSET, LPI2C_MTDR_CMD_STOP);
}
@ -1136,7 +1136,7 @@ static inline void
****************************************************************************/
static inline uint32_t
s32k1xx_lpi2c_getstatus(struct s32k1xx_lpi2c_priv_s *priv)
s32k1xx_lpi2c_getstatus(struct s32k1xx_lpi2c_priv_s *priv)
{
return s32k1xx_lpi2c_getreg(priv, S32K1XX_LPI2C_MSR_OFFSET);
}
@ -1412,18 +1412,18 @@ static int s32k1xx_lpi2c_init(struct s32k1xx_lpi2c_priv_s *priv)
/* Disable host request */
s32k1xx_lpi2c_modifyreg(priv, S32K1XX_LPI2C_MCFGR0_OFFSET,
LPI2C_MCFG0_HREN | LPI2C_MCFG0_HRSEL,
LPI2C_MCFG0_HRPOL);
LPI2C_MCFG0_HREN | LPI2C_MCFG0_HRSEL,
LPI2C_MCFG0_HRPOL);
/* Pin config and ignore NACK disable */
s32k1xx_lpi2c_modifyreg(priv, S32K1XX_LPI2C_MCFGR1_OFFSET,
LPI2C_MCFGR1_IGNACK | LPI2C_MCFGR1_PINCFG_MASK, 0);
LPI2C_MCFGR1_IGNACK | LPI2C_MCFGR1_PINCFG_MASK, 0);
/* Set tx and rx watermarks */
s32k1xx_lpi2c_putreg(priv, S32K1XX_LPI2C_MFCR_OFFSET,
LPI2C_MFCR_TXWATER(0) | LPI2C_MFCR_RXWATER(0));
LPI2C_MFCR_TXWATER(0) | LPI2C_MFCR_RXWATER(0));
/* Force a frequency update */
@ -1433,14 +1433,14 @@ static int s32k1xx_lpi2c_init(struct s32k1xx_lpi2c_priv_s *priv)
/* Set scl, sda glitch filters and busy idle */
s32k1xx_lpi2c_putreg(priv, S32K1XX_LPI2C_MCFGR2_OFFSET,
LPI2C_MCFG2_BUSIDLE(priv->config->busy_idle) |
LPI2C_MCFG2_FILTSCL_CYCLES(priv->config->filtscl) |
LPI2C_MCFG2_FILTSDA_CYCLES(priv->config->filtsda));
LPI2C_MCFG2_BUSIDLE(priv->config->busy_idle) |
LPI2C_MCFG2_FILTSCL_CYCLES(priv->config->filtscl) |
LPI2C_MCFG2_FILTSDA_CYCLES(priv->config->filtsda));
/* Set pin low cycles to 0 (disable) */
s32k1xx_lpi2c_putreg(priv, S32K1XX_LPI2C_MCFGR3_OFFSET,
LPI2C_MCFG3_PINLOW_CYCLES(0));
LPI2C_MCFG3_PINLOW_CYCLES(0));
/* Attach ISRs */

4
arch/arm/src/stm32/stm32_hrtim.c
View file

@ -1786,7 +1786,7 @@ static void hrtim_cmn_modifyreg(struct stm32_hrtim_s *priv,
****************************************************************************/
static struct stm32_hrtim_tim_s *
hrtim_tim_get(struct stm32_hrtim_s *priv, uint8_t timer)
hrtim_tim_get(struct stm32_hrtim_s *priv, uint8_t timer)
{
struct stm32_hrtim_tim_s *tim;
@ -1865,7 +1865,7 @@ static struct stm32_hrtim_tim_s *
#if defined(CONFIG_STM32_HRTIM_PWM) || defined(CONFIG_STM32_HRTIM_FAULTS)
static struct stm32_hrtim_slave_priv_s *
hrtim_slave_get(struct stm32_hrtim_s *priv, uint8_t timer)
hrtim_slave_get(struct stm32_hrtim_s *priv, uint8_t timer)
{
struct stm32_hrtim_tim_s *tim;
struct stm32_hrtim_slave_priv_s *slave;

2
arch/arm/src/stm32l4/stm32l4_i2c.c
View file

@ -931,7 +931,7 @@ int stm32l4_i2c_sem_waitdone(struct stm32l4_i2c_priv_s *priv)
****************************************************************************/
static inline void
stm32l4_i2c_set_7bit_address(struct stm32l4_i2c_priv_s *priv)
stm32l4_i2c_set_7bit_address(struct stm32l4_i2c_priv_s *priv)
{
stm32l4_i2c_modifyreg32(priv, STM32L4_I2C_CR2_OFFSET, I2C_CR2_SADD7_MASK,
((priv->msgv->addr & 0x7f) << I2C_CR2_SADD7_SHIFT));

4
arch/arm/src/stm32l4/stm32l4_otgfsdev.c
View file

@ -989,7 +989,7 @@ static void stm32l4_putreg(uint32_t val, uint32_t addr)
****************************************************************************/
static struct stm32l4_req_s *
stm32l4_req_remfirst(struct stm32l4_ep_s *privep)
stm32l4_req_remfirst(struct stm32l4_ep_s *privep)
{
struct stm32l4_req_s *ret = privep->head;
@ -1060,7 +1060,7 @@ static void stm32l4_ep0in_setupresponse(struct stm32l4_usbdev_s *priv,
****************************************************************************/
static inline void
stm32l4_ep0in_transmitzlp(struct stm32l4_usbdev_s *priv)
stm32l4_ep0in_transmitzlp(struct stm32l4_usbdev_s *priv)
{
stm32l4_ep0in_setupresponse(priv, NULL, 0);
}

4
arch/arm/src/stm32l4/stm32l4_otgfshost.c
View file

@ -394,9 +394,9 @@ static void stm32l4_gint_disconnected(struct stm32l4_usbhost_s *priv);
static inline void stm32l4_gint_sofisr(struct stm32l4_usbhost_s *priv);
#endif
static inline void
stm32l4_gint_rxflvlisr(struct stm32l4_usbhost_s *priv);
stm32l4_gint_rxflvlisr(struct stm32l4_usbhost_s *priv);
static inline void
stm32l4_gint_nptxfeisr(struct stm32l4_usbhost_s *priv);
stm32l4_gint_nptxfeisr(struct stm32l4_usbhost_s *priv);
static inline void stm32l4_gint_ptxfeisr(struct stm32l4_usbhost_s *priv);
static inline void stm32l4_gint_hcisr(struct stm32l4_usbhost_s *priv);
static inline void stm32l4_gint_hprtisr(struct stm32l4_usbhost_s *priv);

2
arch/arm/src/stm32l4/stm32l4_pwm.c
View file

@ -2665,7 +2665,7 @@ static int pwm_soft_break(struct pwm_lowerhalf_s *dev, bool state)
****************************************************************************/
static uint16_t
pwm_outputs_from_channels(struct stm32l4_pwmtimer_s *priv)
pwm_outputs_from_channels(struct stm32l4_pwmtimer_s *priv)
{
uint16_t outputs = 0;
uint8_t channel = 0;

4
arch/mips/src/pic32mx/pic32mx_ethernet.c
View file

@ -376,7 +376,7 @@ static void pic32mx_freebuffer(struct pic32mx_driver_s *priv,
static inline void pic32mx_txdescinit(struct pic32mx_driver_s *priv);
static inline void pic32mx_rxdescinit(struct pic32mx_driver_s *priv);
static inline struct pic32mx_txdesc_s *
pic32mx_txdesc(struct pic32mx_driver_s *priv);
pic32mx_txdesc(struct pic32mx_driver_s *priv);
static inline void pic32mx_txnext(struct pic32mx_driver_s *priv);
static inline void pic32mx_rxreturn(struct pic32mx_rxdesc_s *rxdesc);
static struct pic32mx_rxdesc_s *
@ -858,7 +858,7 @@ static inline void pic32mx_rxdescinit(struct pic32mx_driver_s *priv)
****************************************************************************/
static inline struct pic32mx_txdesc_s *
pic32mx_txdesc(struct pic32mx_driver_s *priv)
pic32mx_txdesc(struct pic32mx_driver_s *priv)
{
struct pic32mx_txdesc_s *txdesc;

2
arch/mips/src/pic32mz/pic32mz_ethernet.c
View file

@ -930,7 +930,7 @@ static inline void pic32mz_rxdescinit(struct pic32mz_driver_s *priv)
****************************************************************************/
static inline struct pic32mz_txdesc_s *
pic32mz_txdesc(struct pic32mz_driver_s *priv)
pic32mz_txdesc(struct pic32mz_driver_s *priv)
{
struct pic32mz_txdesc_s *txdesc;

54
arch/mips/src/pic32mz/pic32mz_i2c.c
View file

@ -219,8 +219,8 @@ struct pic32mz_i2c_priv_s
****************************************************************************/
static inline uint32_t
pic32mz_i2c_getreg(struct pic32mz_i2c_priv_s *priv,
uint8_t offset);
pic32mz_i2c_getreg(struct pic32mz_i2c_priv_s *priv,
uint8_t offset);
static inline void pic32mz_i2c_putreg(struct pic32mz_i2c_priv_s *priv,
uint8_t offset, uint32_t value);
static inline void pic32mz_i2c_modifyreg(struct pic32mz_i2c_priv_s *priv,
@ -232,44 +232,44 @@ static useconds_t pic32mz_i2c_tousecs(int msgc, struct i2c_msg_s *msgs);
#endif /* CONFIG_PIC32MZ_I2C_DYNTIMEO */
static inline int
pic32mz_i2c_sem_waitdone(struct pic32mz_i2c_priv_s *priv);
pic32mz_i2c_sem_waitdone(struct pic32mz_i2c_priv_s *priv);
static inline void
pic32mz_i2c_sem_waitidle(struct pic32mz_i2c_priv_s *priv);
pic32mz_i2c_sem_waitidle(struct pic32mz_i2c_priv_s *priv);
static inline void pic32mz_i2c_sem_post(struct pic32mz_i2c_priv_s *priv);
static inline void pic32mz_i2c_sem_init(struct pic32mz_i2c_priv_s *priv);
static inline void
pic32mz_i2c_sem_destroy(struct pic32mz_i2c_priv_s *priv);
pic32mz_i2c_sem_destroy(struct pic32mz_i2c_priv_s *priv);
#ifdef CONFIG_I2C_TRACE
static void pic32mz_i2c_tracereset(struct pic32mz_i2c_priv_s *priv);
static void pic32mz_i2c_tracenew(struct pic32mz_i2c_priv_s *priv,
uint32_t status);
static void
pic32mz_i2c_traceevent(struct pic32mz_i2c_priv_s *priv,
enum pic32mz_trace_e event, uint32_t parm);
pic32mz_i2c_traceevent(struct pic32mz_i2c_priv_s *priv,
enum pic32mz_trace_e event, uint32_t parm);
static void pic32mz_i2c_tracedump(struct pic32mz_i2c_priv_s *priv);
#endif /* CONFIG_I2C_TRACE */
static inline int
pic32mz_i2c_setbaudrate(struct pic32mz_i2c_priv_s *priv,
uint32_t frequency);
pic32mz_i2c_setbaudrate(struct pic32mz_i2c_priv_s *priv,
uint32_t frequency);
static inline void
pic32mz_i2c_send_start(struct pic32mz_i2c_priv_s *priv);
pic32mz_i2c_send_start(struct pic32mz_i2c_priv_s *priv);
static inline void
pic32mz_i2c_send_stop(struct pic32mz_i2c_priv_s *priv);
pic32mz_i2c_send_stop(struct pic32mz_i2c_priv_s *priv);
static inline void
pic32mz_i2c_send_repeatedstart(struct pic32mz_i2c_priv_s *priv);
pic32mz_i2c_send_repeatedstart(struct pic32mz_i2c_priv_s *priv);
static inline void pic32mz_i2c_send_ack(struct pic32mz_i2c_priv_s *priv,
bool ack);
static inline void pic32mz_i2c_transmitbyte(struct pic32mz_i2c_priv_s *priv,
uint8_t data);
static inline uint32_t
pic32mz_i2c_receivebyte(struct pic32mz_i2c_priv_s *priv);
pic32mz_i2c_receivebyte(struct pic32mz_i2c_priv_s *priv);
static inline uint32_t
pic32mz_i2c_getstatus(struct pic32mz_i2c_priv_s *priv);
pic32mz_i2c_getstatus(struct pic32mz_i2c_priv_s *priv);
static inline bool
pic32mz_i2c_master_inactive(struct pic32mz_i2c_priv_s *priv);
pic32mz_i2c_master_inactive(struct pic32mz_i2c_priv_s *priv);
static int pic32mz_i2c_isr_process(struct pic32mz_i2c_priv_s * priv);
@ -581,7 +581,7 @@ static void pic32mz_i2c_tracedump(struct pic32mz_i2c_priv_s *priv)
****************************************************************************/
static inline uint32_t
pic32mz_i2c_getreg(struct pic32mz_i2c_priv_s *priv, uint8_t offset)
pic32mz_i2c_getreg(struct pic32mz_i2c_priv_s *priv, uint8_t offset)
{
return getreg32(priv->config->base + offset);
}
@ -658,7 +658,7 @@ static useconds_t pic32mz_i2c_tousecs(int msgc, struct i2c_msg_s *msgs)
#ifndef CONFIG_I2C_POLLED
static inline int
pic32mz_i2c_sem_waitdone(struct pic32mz_i2c_priv_s *priv)
pic32mz_i2c_sem_waitdone(struct pic32mz_i2c_priv_s *priv)
{
irqstate_t flags;
int ret;
@ -710,7 +710,7 @@ static inline int
}
#else
static inline int
pic32mz_i2c_sem_waitdone(struct pic32mz_i2c_priv_s *priv)
pic32mz_i2c_sem_waitdone(struct pic32mz_i2c_priv_s *priv)
{
clock_t timeout;
clock_t start;
@ -770,7 +770,7 @@ static inline int
****************************************************************************/
static inline void
pic32mz_i2c_sem_waitidle(struct pic32mz_i2c_priv_s *priv)
pic32mz_i2c_sem_waitidle(struct pic32mz_i2c_priv_s *priv)
{
uint32_t timeout;
uint32_t start;
@ -853,7 +853,7 @@ static inline void pic32mz_i2c_sem_init(struct pic32mz_i2c_priv_s *priv)
****************************************************************************/
static inline void
pic32mz_i2c_sem_destroy(struct pic32mz_i2c_priv_s *priv)
pic32mz_i2c_sem_destroy(struct pic32mz_i2c_priv_s *priv)
{
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
@ -1276,8 +1276,8 @@ static int pic32mz_i2c_isr(int irq, void *context, void *arg)
****************************************************************************/
static inline int
pic32mz_i2c_setbaudrate(struct pic32mz_i2c_priv_s *priv,
uint32_t frequency)
pic32mz_i2c_setbaudrate(struct pic32mz_i2c_priv_s *priv,
uint32_t frequency)
{
uint32_t baudrate;
@ -1326,7 +1326,7 @@ static inline int
****************************************************************************/
static inline void
pic32mz_i2c_send_start(struct pic32mz_i2c_priv_s *priv)
pic32mz_i2c_send_start(struct pic32mz_i2c_priv_s *priv)
{
pic32mz_i2c_putreg(priv, PIC32MZ_I2C_CONSET_OFFSET, I2C_CON_SEN);
@ -1367,7 +1367,7 @@ static inline void pic32mz_i2c_send_stop(struct pic32mz_i2c_priv_s *priv)
****************************************************************************/
static inline void
pic32mz_i2c_send_repeatedstart(struct pic32mz_i2c_priv_s *priv)
pic32mz_i2c_send_repeatedstart(struct pic32mz_i2c_priv_s *priv)
{
pic32mz_i2c_putreg(priv, PIC32MZ_I2C_CONSET_OFFSET, I2C_CON_RSEN);
@ -1439,7 +1439,7 @@ static inline void pic32mz_i2c_transmitbyte(struct pic32mz_i2c_priv_s *priv,
****************************************************************************/
static inline uint32_t
pic32mz_i2c_receivebyte(struct pic32mz_i2c_priv_s *priv)
pic32mz_i2c_receivebyte(struct pic32mz_i2c_priv_s *priv)
{
uint32_t val;
@ -1465,7 +1465,7 @@ static inline uint32_t
****************************************************************************/
static inline bool
pic32mz_i2c_master_inactive(struct pic32mz_i2c_priv_s *priv)
pic32mz_i2c_master_inactive(struct pic32mz_i2c_priv_s *priv)
{
uint32_t con;
@ -1483,7 +1483,7 @@ static inline bool
****************************************************************************/
static inline uint32_t
pic32mz_i2c_getstatus(struct pic32mz_i2c_priv_s *priv)
pic32mz_i2c_getstatus(struct pic32mz_i2c_priv_s *priv)
{
return pic32mz_i2c_getreg(priv, PIC32MZ_I2C_STAT_OFFSET);
}

4
arch/mips/src/pic32mz/pic32mz_timer.c
View file

@ -133,7 +133,7 @@ static inline void pic32mz_putreg(struct pic32mz_timer_dev_s *dev,
static inline bool pic32mz_timer_mode32(struct pic32mz_timer_dev_s *dev);
static inline uint32_t pic32mz_timer_oddoffset(uint32_t evenoffset);
static inline uint32_t
pic32mz_timer_nextirq(struct pic32mz_timer_dev_s *dev);
pic32mz_timer_nextirq(struct pic32mz_timer_dev_s *dev);
static void pic32mz_timer_stopinidle(struct pic32mz_timer_dev_s *dev,
bool stop);
@ -588,7 +588,7 @@ static inline uint32_t pic32mz_timer_oddoffset(uint32_t evenoffset)
****************************************************************************/
static inline uint32_t
pic32mz_timer_nextirq(struct pic32mz_timer_dev_s *dev)
pic32mz_timer_nextirq(struct pic32mz_timer_dev_s *dev)
{
uint32_t irq;

6
arch/xtensa/src/esp32/esp32_spiflash.c
View file

@ -194,9 +194,9 @@ static inline void spi_reset_regbits(struct esp32_spiflash_s *priv,
/* Misc. helpers */
static inline void IRAM_ATTR
esp32_spiflash_opstart(struct spiflash_cachestate_s *state);
esp32_spiflash_opstart(struct spiflash_cachestate_s *state);
static inline void IRAM_ATTR
esp32_spiflash_opdone(const struct spiflash_cachestate_s *state);
esp32_spiflash_opdone(const struct spiflash_cachestate_s *state);
static bool IRAM_ATTR spiflash_pagecached(uint32_t phypage);
static void IRAM_ATTR spiflash_flushmapped(size_t start, size_t size);
@ -408,7 +408,7 @@ static inline void spi_reset_regbits(struct esp32_spiflash_s *priv,
****************************************************************************/
static inline void IRAM_ATTR
esp32_spiflash_opstart(struct spiflash_cachestate_s *state)
esp32_spiflash_opstart(struct spiflash_cachestate_s *state)
{
state->flags = enter_critical_section();

12
net/route/net_queue_ramroute.c
View file

@ -102,7 +102,7 @@ void ramroute_ipv6_addlast(FAR struct net_route_ipv6_entry_s *entry,
#ifdef CONFIG_ROUTE_IPv4_RAMROUTE
FAR struct net_route_ipv4_entry_s *
ramroute_ipv4_remfirst(struct net_route_ipv4_queue_s *list)
ramroute_ipv4_remfirst(FAR struct net_route_ipv4_queue_s *list)
{
FAR struct net_route_ipv4_entry_s *ret = list->head;
@ -123,7 +123,7 @@ FAR struct net_route_ipv4_entry_s *
#ifdef CONFIG_ROUTE_IPv6_RAMROUTE
FAR struct net_route_ipv6_entry_s *
ramroute_ipv6_remfirst(struct net_route_ipv6_queue_s *list)
ramroute_ipv6_remfirst(FAR struct net_route_ipv6_queue_s *list)
{
FAR struct net_route_ipv6_entry_s *ret = list->head;
@ -161,8 +161,8 @@ FAR struct net_route_ipv6_entry_s *
#ifdef CONFIG_ROUTE_IPv4_RAMROUTE
FAR struct net_route_ipv4_entry_s *
ramroute_ipv4_remafter(FAR struct net_route_ipv4_entry_s *entry,
FAR struct net_route_ipv4_queue_s *list)
ramroute_ipv4_remafter(FAR struct net_route_ipv4_entry_s *entry,
FAR struct net_route_ipv4_queue_s *list)
{
FAR struct net_route_ipv4_entry_s *ret = entry->flink;
@ -187,8 +187,8 @@ FAR struct net_route_ipv4_entry_s *
#ifdef CONFIG_ROUTE_IPv6_RAMROUTE
FAR struct net_route_ipv6_entry_s *
ramroute_ipv6_remafter(FAR struct net_route_ipv6_entry_s *entry,
struct net_route_ipv6_queue_s *list)
ramroute_ipv6_remafter(FAR struct net_route_ipv6_entry_s *entry,
FAR struct net_route_ipv6_queue_s *list)
{
FAR struct net_route_ipv6_entry_s *ret = entry->flink;

12
net/route/ramroute.h
View file

@ -200,20 +200,20 @@ void net_freeroute_ipv6(FAR struct net_route_ipv6_s *route);
void ramroute_ipv4_addlast(FAR struct net_route_ipv4_entry_s *entry,
FAR struct net_route_ipv4_queue_s *list);
FAR struct net_route_ipv4_entry_s *
ramroute_ipv4_remfirst(struct net_route_ipv4_queue_s *list);
ramroute_ipv4_remfirst(FAR struct net_route_ipv4_queue_s *list);
FAR struct net_route_ipv4_entry_s *
ramroute_ipv4_remafter(FAR struct net_route_ipv4_entry_s *entry,
FAR struct net_route_ipv4_queue_s *list);
ramroute_ipv4_remafter(FAR struct net_route_ipv4_entry_s *entry,
FAR struct net_route_ipv4_queue_s *list);
#endif
#ifdef CONFIG_ROUTE_IPv6_RAMROUTE
void ramroute_ipv6_addlast(FAR struct net_route_ipv6_entry_s *entry,
FAR struct net_route_ipv6_queue_s *list);
FAR struct net_route_ipv6_entry_s *
ramroute_ipv6_remfirst(struct net_route_ipv6_queue_s *list);
ramroute_ipv6_remfirst(FAR struct net_route_ipv6_queue_s *list);
FAR struct net_route_ipv6_entry_s *
ramroute_ipv6_remafter(FAR struct net_route_ipv6_entry_s *entry,
struct net_route_ipv6_queue_s *list);
ramroute_ipv6_remafter(FAR struct net_route_ipv6_entry_s *entry,
FAR struct net_route_ipv6_queue_s *list);
#endif
#endif /* CONFIG_ROUTE_IPv4_RAMROUTE || CONFIG_ROUTE_IPv6_RAMROUTE */