Merged in masayuki2009/nuttx.nuttx/sparkfun_redv (pull request #1091)
Sparkfun RED-V Things Plus * board: hifive1-revb: Update README-qemu.txt * arch: fe310: Works with SparkFun RED-V Things Plus Should work with HiFive1 Rev.B but not tested yet. * boards: hifive1-revb: Works with SparkFun RED-V Things Plus Should work with HiFive1 Rev.B but not tested yet. Approved-by: Alan Carvalho de Assis <acassis@gmail.com> Approved-by: Gregory Nutt <gnutt@nuttx.org>
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8 changed files with 103 additions and 31 deletions
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@ -43,9 +43,14 @@
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* Pre-processor Definitions
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****************************************************************************/
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/* Machine Interrupt Enable bit in mstatus register */
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/* In mstatus register */
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#define MSTATUS_MIE (0x1 << 3)
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#define MSTATUS_MIE (0x1 << 3) /* Machine Interrupt Enable */
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/* In mie (machine interrupt enable) register */
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#define MIE_MTIE (0x1 << 7) /* Machine Timer Interrupt Enable */
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#define MIE_MEIE (0x1 << 11) /* Machine External Interrupt Enable */
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/* Map RISC-V exception code to NuttX IRQ */
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@ -51,12 +51,6 @@
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#include "fe310.h"
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/****************************************************************************
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* Public Data
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****************************************************************************/
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volatile uint32_t *g_current_regs;
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -71,6 +65,11 @@ void up_irqinitialize(void)
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(void)up_irq_save();
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/* Disable all global interrupts */
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putreg32(0x0, FE310_PLIC_ENABLE1);
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putreg32(0x0, FE310_PLIC_ENABLE2);
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/* Colorize the interrupt stack for debug purposes */
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#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3
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@ -120,8 +119,15 @@ void up_irqinitialize(void)
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void up_disable_irq(int irq)
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{
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int extirq;
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uint32_t oldstat;
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if (irq > FE310_IRQ_MEXT)
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if (irq == FE310_IRQ_MTIMER)
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{
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/* Read mstatus & clear machine timer interrupt enable in mie */
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asm volatile ("csrrc %0, mie, %1": "=r" (oldstat) : "r"(MIE_MTIE));
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}
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else if (irq > FE310_IRQ_MEXT)
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{
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extirq = irq - FE310_IRQ_MEXT;
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ASSERT(31 >= extirq); /* TODO */
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@ -143,8 +149,15 @@ void up_disable_irq(int irq)
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void up_enable_irq(int irq)
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{
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int extirq;
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uint32_t oldstat;
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if (irq > FE310_IRQ_MEXT)
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if (irq == FE310_IRQ_MTIMER)
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{
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/* Read mstatus & set machine timer interrupt enable in mie */
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asm volatile ("csrrs %0, mie, %1": "=r" (oldstat) : "r"(MIE_MTIE));
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}
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else if (irq > FE310_IRQ_MEXT)
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{
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extirq = irq - FE310_IRQ_MEXT;
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ASSERT(31 >= extirq); /* TODO */
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@ -224,18 +237,13 @@ void up_irq_restore(irqstate_t flags)
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irqstate_t up_irq_enable(void)
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{
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uint32_t oldstat;
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uint32_t newstat;
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uint32_t mie;
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#if 1
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/* Enable MEIE (machine external interrupt enable)
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* and MTIE (machine timer interrupt enable)
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*/
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/* Enable MEIE (machine external interrupt enable) */
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/* TODO: should move to up_enable_irq() */
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mie = 0x1 << 11 | 0x1 << 7;
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asm volatile("csrw mie, %0" : /* no output */ : "r" (mie));
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asm volatile("csrw mie, %0" : /* no output */ : "r"(MIE_MEIE));
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#endif
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/* Read mstatus & set machine interrupt enable (MIE) in mstatus */
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@ -79,6 +79,8 @@
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# endif
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#endif /* HAVE_CONSOLE */
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#define HFCLK 16000000 /* TODO */
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -124,8 +126,14 @@ void fe310_lowsetup(void)
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#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
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/* TODO: Configure the UART Baud Rate */
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/* Configure the UART Baud Rate */
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uint32_t div = HFCLK / 115200 - 1;
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putreg32(div, FE310_CONSOLE_BASE + UART_DIV_OFFSET);
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/* Enable TX */
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putreg32(1, FE310_CONSOLE_BASE + UART_TXCTL_OFFSET);
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#endif /* HAVE_SERIAL_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
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#endif /* HAVE_UART */
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}
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@ -100,17 +100,20 @@ void __fe310_start(void)
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*dest++ = *src++;
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}
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showprogress('A');
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/* TODO: Setup PLL */
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/* Configure the UART so we can get debug output */
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fe310_lowsetup();
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showprogress('B');
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showprogress('A');
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#ifdef USE_EARLYSERIALINIT
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up_earlyserialinit();
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#endif
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showprogress('B');
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/* Do board initialization */
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fe310_boardinitialize();
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@ -40,6 +40,7 @@
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#define FE310_PLIC_PRIORITY (FE310_PLIC_BASE + 0x000000)
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#define FE310_PLIC_PENDING1 (FE310_PLIC_BASE + 0x001000)
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#define FE310_PLIC_ENABLE1 (FE310_PLIC_BASE + 0x002000)
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#define FE310_PLIC_ENABLE2 (FE310_PLIC_BASE + 0x002004)
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#define FE310_PLIC_THRESHOLD (FE310_PLIC_BASE + 0x200000)
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#define FE310_PLIC_CLAIM (FE310_PLIC_BASE + 0x200004)
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43
boards/risc-v/fe310/hifive1-revb/README-qemu.txt
Normal file
43
boards/risc-v/fe310/hifive1-revb/README-qemu.txt
Normal file
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@ -0,0 +1,43 @@
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1. Download and install toolchain
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$ curl https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz
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2. Build and install qemu
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$ git clone https://github.com/qemu/qemu
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$ cd qemu
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$ ./configure --target-list=riscv32-softmmu
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$ make
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$ sudo make install
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3. Modify flash origin address
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index 559c1813b8..a67c37b576 100644
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--- a/boards/risc-v/fe310/hifive1-revb/scripts/ld.script
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+++ b/boards/risc-v/fe310/hifive1-revb/scripts/ld.script
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@@ -35,7 +35,7 @@
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MEMORY
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{
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- flash (rx) : ORIGIN = 0x20010000, LENGTH = 4096K
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+ flash (rx) : ORIGIN = 0x20400000, LENGTH = 4096K
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sram (rwx) : ORIGIN = 0x80000000, LENGTH = 16K
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}
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4. Configure and build NuttX
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$ mkdir ./nuttx; cd ./nuttx
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$ git clone https://bitbucket.org/nuttx/nuttx.git
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$ git clone https://bitbucket.org/nuttx/apps.git
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$ cd nuttx
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$ make distclean
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$ ./tools/configure.sh hifive1-revb:nsh
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$ make V=1
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5. Run the nuttx with qemu
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$ qemu-system-riscv32 -nographic -machine sifive_e -kernel ./nuttx
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6. TODO
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Support RISC-V User mode
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@ -2,13 +2,11 @@
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$ curl https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz
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2. Build and install qemu
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2. Download and install J-Link Software Documentation Pack
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$ git clone https://github.com/qemu/qemu
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$ cd qemu
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$ ./configure --target-list=riscv32-softmmu
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$ make
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$ sudo make install
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https://www.segger.com/downloads/jlink/
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$ sudo apt install JLink_Linux_V656b_x86_64.deb
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3. Configure and build NuttX
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$ ./tools/configure.sh hifive1-revb:nsh
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$ make V=1
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4. Run the nuttx with qemu
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4. Flash the nuttx with J-Link and run
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$ qemu-system-riscv32 -nographic -machine sifive_e -kernel ./nuttx
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$ picocom -b 115200 /dev/ttyACM0
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$ /opt/SEGGER/JLink_V656b/JLinkGDBServer -device FE310
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$ riscv64-unknown-elf-gdb ./nuttx
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(gdb) target extended-remote:2331
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(gdb) load nuttx
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(gdb) c
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5. TODO
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Configure PLL and UART divisor
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Run nuttx on HiFive1-Rev.B board
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Configure PLL
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Support GPIO/SPI/I2C/RTC/WDT/PWM
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Support RISC-V User mode
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MEMORY
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{
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flash (rx) : ORIGIN = 0x20400000, LENGTH = 4096K
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flash (rx) : ORIGIN = 0x20010000, LENGTH = 4096K
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sram (rwx) : ORIGIN = 0x80000000, LENGTH = 16K
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}
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