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arch/sim: Move qspiflash simulation to drivers/spi instead

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since it's common implementation can be used in other arch too

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
Xiang Xiao 2022-01-06 15:10:25 +08:00 committed by Xiang Xiao
parent d296f9c085
commit 3156a96a1b
8 changed files with 315 additions and 271 deletions
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75
arch/sim/Kconfig
View file

@ -381,81 +381,6 @@ config SIM_INT_POLLDELAY
endif # SIM_IOEXPANDER
config SIM_QSPIFLASH
bool "Simulated QSPI FLASH with SMARTFS"
default n
select FS_SMARTFS
select MTD_SMART
---help---
Adds a simulated QSPI FLASH that responds to N25QXXX style
commands on the QSPI bus.
choice
prompt "Simulated QSPI FLASH Size"
default SIM_QSPIFLASH_1M
depends on SIM_QSPIFLASH
config SIM_QSPIFLASH_1M
bool "1 MBit (128K Byte)"
config SIM_QSPIFLASH_8M
bool "8 MBit (1M Byte)"
config SIM_QSPIFLASH_32M
bool "32 MBit (4M Byte)"
config SIM_QSPIFLASH_64M
bool "64 MBit (8M Byte)"
config SIM_QSPIFLASH_128M
bool "128 MBit (16M Byte)"
endchoice
config SIM_QSPIFLASH_MANUFACTURER
hex "Hex ID of the FLASH manufacturer code"
default 0x20
depends on SIM_QSPIFLASH
---help---
Allows the simulated FLASH Manufacturer ID to be set.
config SIM_QSPIFLASH_MEMORY_TYPE
hex "Hex ID of the FLASH Memory Type code"
default 0xba
depends on SIM_QSPIFLASH
---help---
Allows the simulated FLASH Memory Type code to be set.
config SIM_QSPIFLASH_SECTORSIZE
int "FLASH Sector Erase Size"
default 65536
depends on SIM_QSPIFLASH
---help---
Sets the large sector erase size that the part simulates.
This driver simulates QSPI devices that have both a large
sector erase as well as a "sub-sector" (per the datasheet)
erase size (typically 4K bytes).
config SIM_QSPIFLASH_SUBSECTORSIZE
int "FLASH Sub-Sector Erase Size"
default 4096
depends on SIM_QSPIFLASH
---help---
Sets the smaller sub-sector erase size supported by the
FLASH emulation
config SIM_QSPIFLASH_PAGESIZE
int "FLASH Write / Program Page Size"
default 256
depends on SIM_QSPIFLASH
---help---
Sets the size of a page program operation. The page size
represents the maximum number of bytes that can be sent
for a program operation. If more bytes than this are
sent on a single Page Program, then the address will
"wrap" causing the initial data sent to be overwritten.
This is consistent with standard SPI FLASH operation.
config SIM_HCISOCKET
bool "Attach Host Bluetooth"
default false

4
arch/sim/src/Makefile
View file

@ -140,10 +140,6 @@ ifeq ($(CONFIG_SIM_IOEXPANDER),y)
CSRCS += up_ioexpander.c
endif
ifeq ($(CONFIG_SIM_QSPIFLASH),y)
CSRCS += up_qspiflash.c
endif
ifeq ($(CONFIG_FS_FAT),y)
CSRCS += up_blockdevice.c up_deviceimage.c
STDLIBS += -lz

9
arch/sim/src/sim/up_initialize.c
View file

@ -39,6 +39,7 @@
#include <nuttx/syslog/syslog_console.h>
#include <nuttx/serial/pty.h>
#include <nuttx/spi/spi_flash.h>
#include <nuttx/spi/qspi_flash.h>
#include <nuttx/crypto/crypto.h>
#include <nuttx/power/pm.h>
@ -58,7 +59,7 @@
****************************************************************************/
#if defined(CONFIG_FS_SMARTFS) && defined(CONFIG_MTD_SMART) && \
(defined(CONFIG_SPI_FLASH) || defined(CONFIG_SIM_QSPIFLASH))
(defined(CONFIG_SPI_FLASH) || defined(CONFIG_QSPI_FLASH))
static void up_init_smartfs(void)
{
#if defined(CONFIG_MTD_M25P) || defined(CONFIG_MTD_W25) || defined(CONFIG_MTD_SST26)
@ -129,10 +130,10 @@ static void up_init_smartfs(void)
#endif
#endif /* CONFIG_SPI_FLASH */
#if defined(CONFIG_MTD_N25QXXX) && defined(CONFIG_SIM_QSPIFLASH)
#if defined(CONFIG_MTD_N25QXXX) && defined(CONFIG_QSPI_FLASH)
/* Initialize a simulated SPI FLASH block device n25qxxx MTD driver */
qspi = up_qspiflashinitialize();
qspi = qspi_flash_initialize();
if (qspi != NULL)
{
mtd = n25qxxx_initialize(qspi, 0);
@ -273,7 +274,7 @@ void up_initialize(void)
#endif
#if defined(CONFIG_FS_SMARTFS) && defined(CONFIG_MTD_SMART) && \
(defined(CONFIG_SPI_FLASH) || defined(CONFIG_SIM_QSPIFLASH))
(defined(CONFIG_SPI_FLASH) || defined(CONFIG_QSPI_FLASH))
up_init_smartfs();
#endif

5
arch/sim/src/sim/up_internal.h
View file

@ -92,7 +92,6 @@
struct tcb_s;
struct foc_dev_s;
struct qspi_dev_s;
struct ioexpander_dev_s;
struct i2c_master_s;
@ -330,10 +329,6 @@ int up_rptun_init(const char *shmemname, const char *cpuname, bool master);
void up_rptun_loop(void);
#endif
#ifdef CONFIG_SIM_QSPIFLASH
struct qspi_dev_s *up_qspiflashinitialize(void);
#endif
/* up_hcisocket.c ***********************************************************/
#ifdef CONFIG_SIM_HCISOCKET

71
drivers/spi/Kconfig
View file

@ -319,4 +319,75 @@ config SPI_FLASH_PAGESIZE
endif # SPI_FLASH
config QSPI_FLASH
bool "Simulated QSPI FLASH with SMARTFS"
default n
---help---
Adds a simulated QSPI FLASH that responds to N25QXXX style
commands on the QSPI bus.
if QSPI_FLASH
choice
prompt "Simulated QSPI FLASH Size"
default QSPI_FLASH_1M
config QSPI_FLASH_1M
bool "1 MBit (128K Byte)"
config QSPI_FLASH_8M
bool "8 MBit (1M Byte)"
config QSPI_FLASH_32M
bool "32 MBit (4M Byte)"
config QSPI_FLASH_64M
bool "64 MBit (8M Byte)"
config QSPI_FLASH_128M
bool "128 MBit (16M Byte)"
endchoice
config QSPI_FLASH_MANUFACTURER
hex "Hex ID of the FLASH manufacturer code"
default 0x20
---help---
Allows the simulated FLASH Manufacturer ID to be set.
config QSPI_FLASH_MEMORY_TYPE
hex "Hex ID of the FLASH Memory Type code"
default 0xba
---help---
Allows the simulated FLASH Memory Type code to be set.
config QSPI_FLASH_SECTORSIZE
int "FLASH Sector Erase Size"
default 65536
---help---
Sets the large sector erase size that the part simulates.
This driver simulates QSPI devices that have both a large
sector erase as well as a "sub-sector" (per the datasheet)
erase size (typically 4K bytes).
config QSPI_FLASH_SUBSECTORSIZE
int "FLASH Sub-Sector Erase Size"
default 4096
---help---
Sets the smaller sub-sector erase size supported by the
FLASH emulation
config QSPI_FLASH_PAGESIZE
int "FLASH Write / Program Page Size"
default 256
---help---
Sets the size of a page program operation. The page size
represents the maximum number of bytes that can be sent
for a program operation. If more bytes than this are
sent on a single Page Program, then the address will
"wrap" causing the initial data sent to be overwritten.
This is consistent with standard SPI FLASH operation.
endif # QSPI_FLASH
endif # SPI

4
drivers/spi/Make.defs
View file

@ -43,6 +43,10 @@ ifeq ($(CONFIG_SPI_FLASH),y)
CSRCS += spi_flash.c
endif
ifeq ($(CONFIG_QSPI_FLASH),y)
CSRCS += qspi_flash.c
endif
# Include SPI device driver build support
DEPPATH += --dep-path spi

351
arch/sim/src/sim/up_qspiflash.c → drivers/spi/qspi_flash.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/sim/src/sim/up_qspiflash.c
* drivers/spi/qspi_flash.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@ -23,21 +23,14 @@
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/kmalloc.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
#include <string.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/spi/qspi.h>
#include "up_internal.h"
#include <nuttx/kmalloc.h>
#include <nuttx/spi/qspi_flash.h>
/****************************************************************************
* Pre-processor Definitions
@ -47,129 +40,129 @@
/* Define the FLASH SIZE in bytes */
#ifdef CONFIG_SIM_QSPIFLASH_1M
# define CONFIG_QSPIFLASH_SIZE (128 * 1024)
# define CONFIG_QSPIFLASH_CAPACITY 0x11
#ifdef CONFIG_QSPI_FLASH_1M
# define CONFIG_QSPI_FLASH_SIZE (128 * 1024)
# define CONFIG_QSPI_FLASH_CAPACITY 0x11
#ifndef CONFIG_SIM_QSPIFLASH_SECTORSIZE
# define CONFIG_SIM_QSPIFLASH_SECTORSIZE 2048
#ifndef CONFIG_QSPI_FLASH_SECTORSIZE
# define CONFIG_QSPI_FLASH_SECTORSIZE 2048
#endif
#endif
#ifdef CONFIG_SIM_QSPIFLASH_8M
# define CONFIG_QSPIFLASH_SIZE (1024 * 1024)
# define CONFIG_QSPIFLASH_CAPACITY 0x14
#ifdef CONFIG_QSPI_FLASH_8M
# define CONFIG_QSPI_FLASH_SIZE (1024 * 1024)
# define CONFIG_QSPI_FLASH_CAPACITY 0x14
#endif
#ifdef CONFIG_SIM_QSPIFLASH_32M
# define CONFIG_QSPIFLASH_SIZE (4 * 1024 * 1024)
# define CONFIG_QSPIFLASH_CAPACITY 0x16
#ifdef CONFIG_QSPI_FLASH_32M
# define CONFIG_QSPI_FLASH_SIZE (4 * 1024 * 1024)
# define CONFIG_QSPI_FLASH_CAPACITY 0x16
#endif
#ifdef CONFIG_SIM_QSPIFLASH_64M
# define CONFIG_QSPIFLASH_SIZE (8 * 1024 * 1024)
# define CONFIG_QSPIFLASH_CAPACITY 0x17
#ifdef CONFIG_QSPI_FLASH_64M
# define CONFIG_QSPI_FLASH_SIZE (8 * 1024 * 1024)
# define CONFIG_QSPI_FLASH_CAPACITY 0x17
#endif
#ifdef CONFIG_SIM_QSPIFLASH_128M
# define CONFIG_QSPIFLASH_SIZE (16 * 1024 * 1024)
# define CONFIG_QSPIFLASH_CAPACITY 0x18
#ifdef CONFIG_QSPI_FLASH_128M
# define CONFIG_QSPI_FLASH_SIZE (16 * 1024 * 1024)
# define CONFIG_QSPI_FLASH_CAPACITY 0x18
#endif
#ifndef CONFIG_SIM_QSPIFLASH_MANUFACTURER
# define CONFIG_SIM_QSPIFLASH_MANUFACTURER 0x20
#ifndef CONFIG_QSPI_FLASH_MANUFACTURER
# define CONFIG_QSPI_FLASH_MANUFACTURER 0x20
#endif
#ifndef CONFIG_SIM_QSPIFLASH_MEMORY_TYPE
# define CONFIG_SIM_QSPIFLASH_MEMORY_TYPE 0xba
#ifndef CONFIG_QSPI_FLASH_MEMORY_TYPE
# define CONFIG_QSPI_FLASH_MEMORY_TYPE 0xba
#endif
#ifndef CONFIG_SIM_QSPIFLASH_SECTORSIZE
# define CONFIG_SIM_QSPIFLASH_SECTORSIZE 65536
#ifndef CONFIG_QSPI_FLASH_SECTORSIZE
# define CONFIG_QSPI_FLASH_SECTORSIZE 65536
#endif
#ifndef CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE
# define CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE 4096
#ifndef CONFIG_QSPI_FLASH_SUBSECTORSIZE
# define CONFIG_QSPI_FLASH_SUBSECTORSIZE 4096
#endif
#ifndef CONFIG_SIM_QSPIFLASH_SECTORSIZE_MASK
# define CONFIG_SIM_QSPIFLASH_SECTORSIZE_MASK (~(CONFIG_SIM_QSPIFLASH_SECTORSIZE-1))
#ifndef CONFIG_QSPI_FLASH_SECTORSIZE_MASK
# define CONFIG_QSPI_FLASH_SECTORSIZE_MASK (~(CONFIG_QSPI_FLASH_SECTORSIZE-1))
#endif
#ifndef CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE_MASK
# define CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE_MASK (~(CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE-1))
#ifndef CONFIG_QSPI_FLASH_SUBSECTORSIZE_MASK
# define CONFIG_QSPI_FLASH_SUBSECTORSIZE_MASK (~(CONFIG_QSPI_FLASH_SUBSECTORSIZE-1))
#endif
#ifndef CONFIG_SIM_QSPIFLASH_PAGESIZE
# define CONFIG_SIM_QSPIFLASH_PAGESIZE 256
#ifndef CONFIG_QSPI_FLASH_PAGESIZE
# define CONFIG_QSPI_FLASH_PAGESIZE 256
#endif
#ifndef CONFIG_SIM_QSPIFLASH_PAGESIZE_MASK
# define CONFIG_SIM_QSPIFLASH_PAGESIZE_MASK (CONFIG_SIM_QSPIFLASH_PAGESIZE-1)
#ifndef CONFIG_QSPI_FLASH_PAGESIZE_MASK
# define CONFIG_QSPI_FLASH_PAGESIZE_MASK (CONFIG_QSPI_FLASH_PAGESIZE-1)
#endif
/* Define FLASH States */
#define QSPIFLASH_STATE_IDLE 0
#define QSPIFLASH_STATE_RDID1 1
#define QSPIFLASH_STATE_RDID2 2
#define QSPIFLASH_STATE_RDID3 3
#define QSPIFLASH_STATE_WREN 4
#define QSPIFLASH_STATE_RDSR 5
#define QSPIFLASH_STATE_SE1 6
#define QSPIFLASH_STATE_SE2 7
#define QSPIFLASH_STATE_SE3 8
#define QSPIFLASH_STATE_PP1 9
#define QSPIFLASH_STATE_PP2 10
#define QSPIFLASH_STATE_PP3 11
#define QSPIFLASH_STATE_PP4 12
#define QSPIFLASH_STATE_READ1 13
#define QSPIFLASH_STATE_READ2 14
#define QSPIFLASH_STATE_READ3 15
#define QSPIFLASH_STATE_READ4 16
#define QSPIFLASH_STATE_FREAD_WAIT 17
#define QSPI_FLASH_STATE_IDLE 0
#define QSPI_FLASH_STATE_RDID1 1
#define QSPI_FLASH_STATE_RDID2 2
#define QSPI_FLASH_STATE_RDID3 3
#define QSPI_FLASH_STATE_WREN 4
#define QSPI_FLASH_STATE_RDSR 5
#define QSPI_FLASH_STATE_SE1 6
#define QSPI_FLASH_STATE_SE2 7
#define QSPI_FLASH_STATE_SE3 8
#define QSPI_FLASH_STATE_PP1 9
#define QSPI_FLASH_STATE_PP2 10
#define QSPI_FLASH_STATE_PP3 11
#define QSPI_FLASH_STATE_PP4 12
#define QSPI_FLASH_STATE_READ1 13
#define QSPI_FLASH_STATE_READ2 14
#define QSPI_FLASH_STATE_READ3 15
#define QSPI_FLASH_STATE_READ4 16
#define QSPI_FLASH_STATE_FREAD_WAIT 17
/* Instructions */
/* Command Value N Description Addr Dummy Data */
#define QSPIFLASH_WREN 0x06 /* 1 Write Enable 0 0 0 */
#define QSPIFLASH_WRDI 0x04 /* 1 Write Disable 0 0 0 */
#define QSPIFLASH_RDID 0x9f /* 1 Read Identification 0 0 1-3 */
#define QSPIFLASH_RDSR 0x05 /* 1 Read Status Register 0 0 >=1 */
#define QSPIFLASH_WRSR 0x01 /* 1 Write Status Register 0 0 1 */
#define QSPIFLASH_READ 0x03 /* 1 Read Data Bytes 3 0 >=1 */
#define QSPIFLASH_FAST_READ 0x0b /* 1 Higher speed read 3 1 >=1 */
#define QSPIFLASH_PP 0x02 /* 1 Page Program 3 0 1-256 */
#define QSPIFLASH_SE 0xd8 /* 1 Sector Erase 3 0 0 */
#define QSPIFLASH_BE 0xc7 /* 1 Bulk Erase 0 0 0 */
#define QSPIFLASH_DP 0xb9 /* 2 Deep power down 0 0 0 */
#define QSPIFLASH_RES 0xab /* 2 Read Electronic
#define QSPI_FLASH_WREN 0x06 /* 1 Write Enable 0 0 0 */
#define QSPI_FLASH_WRDI 0x04 /* 1 Write Disable 0 0 0 */
#define QSPI_FLASH_RDID 0x9f /* 1 Read Identification 0 0 1-3 */
#define QSPI_FLASH_RDSR 0x05 /* 1 Read Status Register 0 0 >=1 */
#define QSPI_FLASH_WRSR 0x01 /* 1 Write Status Register 0 0 1 */
#define QSPI_FLASH_READ 0x03 /* 1 Read Data Bytes 3 0 >=1 */
#define QSPI_FLASH_FAST_READ 0x0b /* 1 Higher speed read 3 1 >=1 */
#define QSPI_FLASH_PP 0x02 /* 1 Page Program 3 0 1-256 */
#define QSPI_FLASH_SE 0xd8 /* 1 Sector Erase 3 0 0 */
#define QSPI_FLASH_BE 0xc7 /* 1 Bulk Erase 0 0 0 */
#define QSPI_FLASH_DP 0xb9 /* 2 Deep power down 0 0 0 */
#define QSPI_FLASH_RES 0xab /* 2 Read Electronic
* Signature 0 3 >=1 */
#define QSPIFLASH_SSE 0x20 /* 3 Sub-Sector Erase 0 0 0 */
#define QSPI_FLASH_SSE 0x20 /* 3 Sub-Sector Erase 0 0 0 */
#define QSPIFLASH_ID 0x9f /* JEDEC ID */
#define QSPIFLASH_READ_QUAD 0xeb
#define QSPI_FLASH_ID 0x9f /* JEDEC ID */
#define QSPI_FLASH_READ_QUAD 0xeb
#define QSPIFLASH_DUMMY 0xa5
#define QSPI_FLASH_DUMMY 0xa5
#define QSPIFLASH_WREN_SET 0x02
#define QSPI_FLASH_WREN_SET 0x02
/****************************************************************************
* Private Types
****************************************************************************/
struct sim_qspiflashdev_s
struct qspi_flashdev_s
{
struct qspi_dev_s spidev; /* Externally visible part of the SPI interface */
uint32_t selected; /* SPIn base address */
int wren;
int state;
uint16_t read_data;
uint8_t last_cmd;
unsigned long address;
unsigned char data[CONFIG_QSPIFLASH_SIZE];
uint32_t selected; /* SPIn base address */
int wren;
int state;
uint16_t read_data;
uint8_t last_cmd;
unsigned long address;
unsigned char data[CONFIG_QSPI_FLASH_SIZE];
};
/****************************************************************************
@ -178,23 +171,24 @@ struct sim_qspiflashdev_s
/* QSPI methods */
static int qspiflash_lock(FAR struct qspi_dev_s *dev, bool lock);
static uint32_t qspiflash_setfrequency(FAR struct qspi_dev_s *dev,
uint32_t frequency);
static void qspiflash_setmode(FAR struct qspi_dev_s *dev,
enum qspi_mode_e mode);
static void qspiflash_setbits(FAR struct qspi_dev_s *dev, int nbits);
static int qspiflash_command(FAR struct qspi_dev_s *dev,
FAR struct qspi_cmdinfo_s *cmd);
static int qspiflash_memory(FAR struct qspi_dev_s *dev,
FAR struct qspi_meminfo_s *mem);
static FAR void *qspiflash_alloc(FAR struct qspi_dev_s *dev,
size_t buflen);
static void qspiflash_free(FAR struct qspi_dev_s *dev,
FAR void *buffer);
static int qspi_flash_lock(FAR struct qspi_dev_s *dev, bool lock);
static uint32_t qspi_flash_setfrequency(FAR struct qspi_dev_s *dev,
uint32_t frequency);
static void qspi_flash_setmode(FAR struct qspi_dev_s *dev,
enum qspi_mode_e mode);
static void qspi_flash_setbits(FAR struct qspi_dev_s *dev, int nbits);
static int qspi_flash_command(FAR struct qspi_dev_s *dev,
FAR struct qspi_cmdinfo_s *cmd);
static int qspi_flash_memory(FAR struct qspi_dev_s *dev,
FAR struct qspi_meminfo_s *mem);
static FAR void *qspi_flash_alloc(FAR struct qspi_dev_s *dev,
size_t buflen);
static void qspi_flash_free(FAR struct qspi_dev_s *dev,
FAR void *buffer);
static void qspiflash_writeword(FAR struct sim_qspiflashdev_s *priv,
uint16_t data, FAR struct qspi_cmdinfo_s *cmdinfo);
static void qspi_flash_writeword(FAR struct qspi_flashdev_s *priv,
uint16_t data,
FAR struct qspi_cmdinfo_s *cmdinfo);
/****************************************************************************
* Private Data
@ -202,17 +196,17 @@ static void qspiflash_writeword(FAR struct sim_qspiflashdev_s *priv,
static const struct qspi_ops_s g_qspiops =
{
.lock = qspiflash_lock,
.setfrequency = qspiflash_setfrequency,
.setmode = qspiflash_setmode,
.setbits = qspiflash_setbits,
.command = qspiflash_command,
.memory = qspiflash_memory,
.alloc = qspiflash_alloc,
.free = qspiflash_free
.lock = qspi_flash_lock,
.setfrequency = qspi_flash_setfrequency,
.setmode = qspi_flash_setmode,
.setbits = qspi_flash_setbits,
.command = qspi_flash_command,
.memory = qspi_flash_memory,
.alloc = qspi_flash_alloc,
.free = qspi_flash_free
};
struct sim_qspiflashdev_s g_qspidev =
struct qspi_flashdev_s g_qspidev =
{
.spidev =
{
@ -225,7 +219,7 @@ struct sim_qspiflashdev_s g_qspidev =
****************************************************************************/
/****************************************************************************
* Name: qspiflash_lock
* Name: qspi_flash_lock
*
* Description:
* On SPI buses where there are multiple devices, it will be necessary to
@ -245,13 +239,13 @@ struct sim_qspiflashdev_s g_qspidev =
*
****************************************************************************/
static int qspiflash_lock(FAR struct qspi_dev_s *dev, bool lock)
static int qspi_flash_lock(FAR struct qspi_dev_s *dev, bool lock)
{
return OK;
}
/****************************************************************************
* Name: qspiflash_memory
* Name: qspi_flash_memory
*
* Description:
* Perform QSPI Memory transaction operations
@ -261,21 +255,21 @@ static int qspiflash_lock(FAR struct qspi_dev_s *dev, bool lock)
*
****************************************************************************/
int qspiflash_memory(FAR struct qspi_dev_s *dev,
FAR struct qspi_meminfo_s *mem)
int qspi_flash_memory(FAR struct qspi_dev_s *dev,
FAR struct qspi_meminfo_s *mem)
{
FAR struct sim_qspiflashdev_s *priv = (FAR struct sim_qspiflashdev_s *)dev;
FAR struct qspi_flashdev_s *priv = (FAR struct qspi_flashdev_s *)dev;
switch (mem->cmd)
{
case QSPIFLASH_READ_QUAD:
case QSPI_FLASH_READ_QUAD:
priv->wren = 0;
memcpy(mem->buffer, &priv->data[mem->addr], mem->buflen);
priv->address += mem->addr + mem->buflen;
priv->state = QSPIFLASH_STATE_IDLE;
priv->state = QSPI_FLASH_STATE_IDLE;
break;
case QSPIFLASH_PP:
case QSPI_FLASH_PP:
if (priv->wren)
{
memcpy(&priv->data[mem->addr], mem->buffer, mem->buflen);
@ -290,7 +284,7 @@ int qspiflash_memory(FAR struct qspi_dev_s *dev,
}
/****************************************************************************
* Name: qspiflash_setfrequency
* Name: qspi_flash_setfrequency
*
* Description:
* Set the SPI frequency.
@ -304,14 +298,14 @@ int qspiflash_memory(FAR struct qspi_dev_s *dev,
*
****************************************************************************/
static uint32_t qspiflash_setfrequency(FAR struct qspi_dev_s *dev,
uint32_t frequency)
static uint32_t qspi_flash_setfrequency(FAR struct qspi_dev_s *dev,
uint32_t frequency)
{
return frequency;
}
/****************************************************************************
* Name: qspiflash_setmode
* Name: qspi_flash_setmode
*
* Description:
* Set the SPI mode. see enum spi_mode_e for mode definitions
@ -325,13 +319,13 @@ static uint32_t qspiflash_setfrequency(FAR struct qspi_dev_s *dev,
*
****************************************************************************/
static void qspiflash_setmode(FAR struct qspi_dev_s *dev,
enum qspi_mode_e mode)
static void qspi_flash_setmode(FAR struct qspi_dev_s *dev,
enum qspi_mode_e mode)
{
}
/****************************************************************************
* Name: qspiflash_setbits
* Name: qspi_flash_setbits
*
* Description:
* Set the number of bits per word.
@ -345,12 +339,12 @@ static void qspiflash_setmode(FAR struct qspi_dev_s *dev,
*
****************************************************************************/
static void qspiflash_setbits(FAR struct qspi_dev_s *dev, int nbits)
static void qspi_flash_setbits(FAR struct qspi_dev_s *dev, int nbits)
{
}
/****************************************************************************
* Name: qspiflash_alloc
* Name: qspi_flash_alloc
*
* Description:
* Allocate a buffer and associate it with the QSPI device
@ -364,13 +358,13 @@ static void qspiflash_setbits(FAR struct qspi_dev_s *dev, int nbits)
*
****************************************************************************/
static FAR void *qspiflash_alloc(FAR struct qspi_dev_s *dev, size_t buflen)
static FAR void *qspi_flash_alloc(FAR struct qspi_dev_s *dev, size_t buflen)
{
return kmm_malloc(buflen);
}
/****************************************************************************
* Name: qspiflash_free
* Name: qspi_flash_free
*
* Description:
* Allocate a buffer and associate it with the QSPI device
@ -384,13 +378,13 @@ static FAR void *qspiflash_alloc(FAR struct qspi_dev_s *dev, size_t buflen)
*
****************************************************************************/
static void qspiflash_free(FAR struct qspi_dev_s *dev, FAR void *buffer)
static void qspi_flash_free(FAR struct qspi_dev_s *dev, FAR void *buffer)
{
kmm_free(buffer);
}
/****************************************************************************
* Name: qspiflash_sectorerase
* Name: qspi_flash_sectorerase
*
* Description:
* Erase one sector
@ -403,25 +397,25 @@ static void qspiflash_free(FAR struct qspi_dev_s *dev, FAR void *buffer)
*
****************************************************************************/
static void qspiflash_sectorerase(FAR struct sim_qspiflashdev_s *priv)
static void qspi_flash_sectorerase(FAR struct qspi_flashdev_s *priv)
{
uint32_t address;
uint32_t len;
uint32_t address;
uint32_t len = 0;
/* Ensure the WREN bit is set before any erase operation */
if (priv->wren)
{
address = priv->address;
if (priv->last_cmd == QSPIFLASH_SE)
if (priv->last_cmd == QSPI_FLASH_SE)
{
address &= CONFIG_SIM_QSPIFLASH_SECTORSIZE_MASK;
len = CONFIG_SIM_QSPIFLASH_SECTORSIZE;
address &= CONFIG_QSPI_FLASH_SECTORSIZE_MASK;
len = CONFIG_QSPI_FLASH_SECTORSIZE;
}
else if (priv->last_cmd == QSPIFLASH_SSE)
else if (priv->last_cmd == QSPI_FLASH_SSE)
{
address &= CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE_MASK;
len = CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE;
address &= CONFIG_QSPI_FLASH_SUBSECTORSIZE_MASK;
len = CONFIG_QSPI_FLASH_SUBSECTORSIZE;
}
/* Now perform the erase */
@ -431,7 +425,7 @@ static void qspiflash_sectorerase(FAR struct sim_qspiflashdev_s *priv)
}
/****************************************************************************
* Name: qspiflash_writeword
* Name: qspi_flash_writeword
*
* Description:
* Write a word (byte in our case) to the FLASH state machine.
@ -445,29 +439,29 @@ static void qspiflash_sectorerase(FAR struct sim_qspiflashdev_s *priv)
*
****************************************************************************/
static void qspiflash_writeword(FAR struct sim_qspiflashdev_s *priv,
uint16_t data,
FAR struct qspi_cmdinfo_s *cmdinfo)
static void qspi_flash_writeword(FAR struct qspi_flashdev_s *priv,
uint16_t data,
FAR struct qspi_cmdinfo_s *cmdinfo)
{
switch (priv->state)
{
case QSPIFLASH_STATE_IDLE:
case QSPI_FLASH_STATE_IDLE:
priv->last_cmd = data;
priv->read_data = 0xff;
switch (data)
{
case QSPIFLASH_WREN:
case QSPI_FLASH_WREN:
priv->wren = 1;
break;
case QSPIFLASH_WRDI:
case QSPI_FLASH_WRDI:
priv->wren = 0;
break;
/* Sector / Subsector erase */
case QSPIFLASH_SE:
case QSPIFLASH_SSE:
case QSPI_FLASH_SE:
case QSPI_FLASH_SSE:
priv->address = cmdinfo->addr;
/* Now perform the sector or sub-sector erase.
@ -475,16 +469,16 @@ static void qspiflash_writeword(FAR struct sim_qspiflashdev_s *priv,
* but this is just a simulation .
*/
qspiflash_sectorerase(priv);
qspi_flash_sectorerase(priv);
break;
/* Bulk Erase */
case QSPIFLASH_BE:
priv->state = QSPIFLASH_STATE_IDLE;
case QSPI_FLASH_BE:
priv->state = QSPI_FLASH_STATE_IDLE;
if (priv->wren)
{
memset(priv->data, 0xff, CONFIG_QSPIFLASH_SIZE);
memset(priv->data, 0xff, CONFIG_QSPI_FLASH_SIZE);
}
break;
@ -494,14 +488,14 @@ static void qspiflash_writeword(FAR struct sim_qspiflashdev_s *priv,
break;
default:
priv->state = QSPIFLASH_STATE_IDLE;
priv->state = QSPI_FLASH_STATE_IDLE;
priv->read_data = 0xff;
break;
}
}
/****************************************************************************
* Name: qspiflash_command
* Name: qspi_flash_command
*
* Description:
* Perform QSPI Command operations
@ -511,11 +505,11 @@ static void qspiflash_writeword(FAR struct sim_qspiflashdev_s *priv,
*
****************************************************************************/
static int qspiflash_command(FAR struct qspi_dev_s *dev,
FAR struct qspi_cmdinfo_s *cmdinfo)
static int qspi_flash_command(FAR struct qspi_dev_s *dev,
FAR struct qspi_cmdinfo_s *cmdinfo)
{
uint8_t *p_buf;
FAR struct sim_qspiflashdev_s *priv = (FAR struct sim_qspiflashdev_s *)dev;
FAR uint8_t *p_buf;
FAR struct qspi_flashdev_s *priv = (FAR struct qspi_flashdev_s *)dev;
DEBUGASSERT(cmdinfo->cmd < 256);
@ -524,7 +518,7 @@ static int qspiflash_command(FAR struct qspi_dev_s *dev,
if (QSPICMD_ISDATA(cmdinfo->flags))
{
DEBUGASSERT(cmdinfo->buffer != NULL && cmdinfo->buflen > 0);
p_buf = (uint8_t *) cmdinfo->buffer;
p_buf = (FAR uint8_t *)cmdinfo->buffer;
/* Read or write operation? */
@ -532,7 +526,7 @@ static int qspiflash_command(FAR struct qspi_dev_s *dev,
{
/* Write data operation */
qspiflash_writeword(priv, cmdinfo->cmd, cmdinfo);
qspi_flash_writeword(priv, cmdinfo->cmd, cmdinfo);
}
else
{
@ -540,17 +534,14 @@ static int qspiflash_command(FAR struct qspi_dev_s *dev,
switch (cmdinfo->cmd)
{
case QSPIFLASH_ID:
p_buf[0] = CONFIG_SIM_QSPIFLASH_MANUFACTURER;
p_buf[1] = CONFIG_SIM_QSPIFLASH_MEMORY_TYPE;
p_buf[2] = CONFIG_QSPIFLASH_CAPACITY;
case QSPI_FLASH_ID:
p_buf[0] = CONFIG_QSPI_FLASH_MANUFACTURER;
p_buf[1] = CONFIG_QSPI_FLASH_MEMORY_TYPE;
p_buf[2] = CONFIG_QSPI_FLASH_CAPACITY;
break;
case QSPIFLASH_RDSR:
if (priv->wren == 1)
p_buf[0] = QSPIFLASH_WREN_SET;
else
p_buf[0] = 0;
case QSPI_FLASH_RDSR:
p_buf[0] = priv->wren == 1 ? QSPI_FLASH_WREN_SET : 0;
break;
}
}
@ -559,7 +550,7 @@ static int qspiflash_command(FAR struct qspi_dev_s *dev,
{
/* Write data operation */
qspiflash_writeword(priv, cmdinfo->cmd, cmdinfo);
qspi_flash_writeword(priv, cmdinfo->cmd, cmdinfo);
}
return 0;
@ -570,34 +561,28 @@ static int qspiflash_command(FAR struct qspi_dev_s *dev,
****************************************************************************/
/****************************************************************************
* Name: up_qspiflashinitialize
* Name: qspi_flash_initialize
*
* Description:
* Initialize the selected SPI port
*
* Input Parameters:
* Port number (for hardware that has multiple SPI interfaces)
*
* Returned Value:
* Valid SPI device structure reference on success; a NULL on failure
*
****************************************************************************/
FAR struct qspi_dev_s *up_qspiflashinitialize()
FAR struct qspi_dev_s *qspi_flash_initialize()
{
FAR struct sim_qspiflashdev_s *priv = NULL;
irqstate_t flags = enter_critical_section();
FAR struct qspi_flashdev_s *priv = NULL;
priv = &g_qspidev;
priv->selected = 0;
priv->wren = 0;
priv->address = 0;
priv->state = QSPIFLASH_STATE_IDLE;
priv->state = QSPI_FLASH_STATE_IDLE;
priv->read_data = 0xff;
priv->last_cmd = 0xff;
memset(&priv->data[0], 0xff, sizeof(priv->data));
leave_critical_section(flags);
return (FAR struct qspi_dev_s *)priv;
}

67
include/nuttx/spi/qspi_flash.h Normal file
View file

@ -0,0 +1,67 @@
/****************************************************************************
* include/nuttx/spi/qspi_flash.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __INCLUDE_NUTTX_SPI_QSPI_FLASH_H
#define __INCLUDE_NUTTX_SPI_QSPI_FLASH_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/spi/qspi.h>
#ifdef CONFIG_QSPI_FLASH
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: qspi_flash_initialize
*
* Description:
* Create an instance of the QSPI flash emulated driver.
*
* Returned Value:
* On success a non-NULL, initialized QSPI driver instance is returned.
*
****************************************************************************/
#ifdef CONFIG_QSPI_FLASH
FAR struct qspi_dev_s *qspi_flash_initialize(void);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* CONFIG_QSPI_FLASH */
#endif /* __INCLUDE_NUTTX_SPI_QSPI_FLASH_H */