boards/arm/lpc17xx_40xx/lx_cpu: Add support for the PIKRON LX_CPU board.

This commit is contained in:
Pavel Pisa 2019-08-30 07:42:13 -06:00 committed by Gregory Nutt
parent f1b2155efc
commit 350ba5105c
33 changed files with 6526 additions and 0 deletions

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#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_LX_CPU
choice
prompt "LX_CPU ode and boot memory selection"
default LX_CPU_BOOT_APP
depends on ARCH_BOARD_LX_CPU
---help---
Select where NuttX code/text is stored and how it is started.
Select "Code in internal FLASH - no loader used" (LX_CPU_BOOT_FLASH_BOOT)
if the code should be placed directly in start of the internal
FLASH memory and start directly after MCU reset. If there is
bool loader then NuttX can be placed into internal FLASH after
the loader - "Code in internal FLASH - loader used" (LX_CPU_BOOT_FLASH_APP)
or it can be loaded into extarnal SDRAM and start from there.
config LX_CPU_BOOT_FLASH_APP
bool "Code in internal FLASH - loader used"
config LX_CPU_BOOT_FLASH_BOOT
bool "Code in internal FLASH - no loader used"
config LX_CPU_BOOT_SDRAM
bool "Code in external SDRAM"
endchoice # LX_CPU ode and boot memory selection
endif

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README.txt
==========
This README file discusses the port of NuttX to the PiKRON LX_CPU board:
See http://pikron.com/pages/products/cpu_boards/lx_cpu.html. This board features the
NXP LPC4088 MCU
CONTENTS
========
o LEDs
o Serial Console
o ETHERNET
o Using OpenOCD with the Olimex ARM-USB-OCD
o Loading Code with the ISP Board
o Configuration
LEDs
====
The LX_CPU base board has two user LEDs
LED1 : Connected to P1[29] RED
LED2 : Connected to P0[16] GREEN
If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
any way using the defitions provided in the board.h header file.
If CONFIG_ARCH_LEDs is defined, then NuttX will control the 2 LEDs on the
WaveShare Open1788K. The following definitions describe how NuttX controls
the LEDs:
LED1 LED2
LED_STARTED OFF OFF
LED_HEAPALLOCATE ON OFF
LED_IRQSENABLED OFF ON
LED_STACKCREATED ON ON
LED_INIRQ
LED_SIGNAL
LED_ASSERTION
LED_PANIC
LED_IDLE
Serial Console
==============
By Default, UART0 is used as the serial console in all configurations. This
may be connected to your computer via an external RS-232 driver or via the
WaveShare USB ISP/VCOM module.
As an option, UART1 can also be used for the serial console. You might want,
to do this, for example, if you use UART0 for the ISP function and you want
to use a different UART for console output. UART1 can be configured as the
serial console by changing the configuration as follows:
System Type:
CONFIG_LPC17_UART0=n : Disable UART0 if it is no longer used
CONFIG_LPC17_UART1=y : Enable UART1
Drivers:
CONFIG_UART1_SERIAL_CONSOLE=y : Setup up the UART1 configuration
CONFIG_UART1_RXBUFSIZE=256
CONFIG_UART1_TXBUFSIZE=256
CONFIG_UART1_BAUD=115200
CONFIG_UART1_BITS=8
CONFIG_UART1_PARITY=0
CONFIG_UART1_2STOP=0
In this configuration using UART1, it is necessary to disable LED support
on the board. That is because UART1 RXD is set for pin p0.16, but so is
LED2. If you do not disable LED support then no incoming serial data will
be recevied.
Common Board Options
CONFIG_ARCH_LEDS=n : Disable LED support
You should also remove the LED2 jumper so that the RXD input does not
attempt to drive LED2 as well (However, this does not seem to interfere with
data receipt).
NOTE: If you intend to use LEDs with UART1, then you might want to
redesign some ofthe LED logic in the src/ subdirectory so that it does not
attempt to use LED2.
ETHERNET
========
On chip ethernet MAC with external 10/100M PHY DP83848I.
The LX_CPU board is populated with integrated connector
module (ICM) socket suitable for direct connection to
the standard ETHERNET infrastructure.
Config
CONFIG_LPC17_ETHERNET=y
CONFIG_LPC17_PHY_AUTONEG=y
CONFIG_ETH0_PHY_DP83848C=y
Using OpenOCD with the Olimex ARM-USB-OCD
=========================================
Building OpenOCD under Cygwin:
Refer to configs/olimex-lpc1766stk/README.txt
Installing OpenOCD in Ubuntu Linux:
sudo apt-get install openocd
Helper Scripts.
I have been using the Olimex ARM-USB-OCD debugger. OpenOCD
requires a configuration file. I keep the one I used last here:
boards/arm/lpc17xx_40xx/lx_cpu/tools/lx_cpu.cfg
However, the "correct" configuration script to use with OpenOCD may
change as the features of OpenOCD evolve. So you should at least
compare that lx_cpu.cfg file with configuration files in
/usr/share/openocd/scripts. As of this writing, the configuration
files of interest were:
/usr/local/share/openocd/scripts/interface/openocd-usb.cfg
This is the configuration file for the Olimex ARM-USB-OCD
debugger. Select a different file if you are using some
other debugger supported by OpenOCD.
/usr/local/share/openocd/scripts/board/?
I don't see a board configuration file for the WaveShare
LX_CPU board.
/usr/local/share/openocd/scripts/target/lpc1788.cfg
This is the configuration file for the LPC1788 target.
It just sets up a few parameters then sources lpc17xx.cfg
/usr/local/share/openocd/scripts/target/lpc17xx.cfg
This is the generic LPC configuration for the LPC17xx
family. It is included by lpc1788.cfg.
NOTE: These files could also be located under /usr/share in some
installations. They could be most anywhwere if you are using a
windows version of OpenOCD.
boards/arm/lpc17xx_40xx/lx_cpu/tools/lx_cpu.cfg
This is simply openocd-usb.cfg, lpc1788.cfg, and lpc17xx.cfg
concatenated into one file for convenience. Don't use it
unless you have to.
There is also a script on the tools/ directory that I use to start
the OpenOCD daemon on my system called oocd.sh. That script will
probably require some modifications to work in another environment:
- Possibly the value of OPENOCD_PATH and TARGET_PATH
- It assumes that the correct script to use is the one at
boards/arm/lpc17xx_40xx/lx_cpu/tools/lx_cpu.cfg
Starting OpenOCD
Then you should be able to start the OpenOCD daemon as follows. This
assumes that you have already CD'ed to the NuttX build directory:
. ./setenv.sh
oocd.sh $PWD
The setenv.sh script is a convenience script that you may choose to
use or not. It simply sets up the PATH variable so that you can
automatically find oocd.sh. You could also do:
boards/arm/lpc17xx_40xx/lx_cpu/tools/oocd.sh $PWD
Connecting GDB
Once the OpenOCD daemon has been started, you can connect to it via
GDB using the following GDB command:
arm-nuttx-elf-gdb
(gdb) target remote localhost:3333
NOTE: The name of your GDB program may differ. For example, with the
CodeSourcery toolchain, the ARM GDB would be called arm-none-eabi-gdb.
OpenOCD will support several special 'monitor' sub-commands. You can
use the 'monitor' (or simply 'mon') command to invoke these sub-
commands. These GDB commands will send comments to the OpenOCD monitor.
Here are a couple that you will need to use:
(gdb) monitor reset
(gdb) monitor halt
NOTES:
1. The MCU must be halted using 'monitor halt' prior to loading code.
2. 'monitor reset' will restart the processor after loading code.
3. The 'monitor' command can be abbreviated as just 'mon'.
After starting GDB, you can load the NuttX ELF file like this:
(gdb) mon halt
(gdb) load nuttx
NOTES:
1. NuttX should have been built so that it has debugging symbols
(by setting CONFIG_DEBUG_SYMBOLS=y in the .config file).
2. The MCU must be halted prior to loading code.
3. I find that there are often undetected write failures when using
the Olimex ARM-USB-OCD debugber and that if you start the program
with a bad FLASH failure, it will lock up OpenOCD. I usually
oad nuttx twice, restarting OpenOCD in between in order to assure
good FLASH contents:
(gdb) mon halt
(gdb) load nuttx
(gdb) mon reset
Exit GDB, kill the OpenOCD server, recycle power on the board,
restart the OpenOCD server and GDB, then:
(gdb) mon halt
(gdb) load nuttx
(gdb) mon reset
Other debuggers may not have these issues and such drastic steps may
not be necessary.
Loading Code with the ISP Board
===============================
Use can also load code onto the board using the WaveShare and the UART0
ISP/VCOM board. I use the FlashMagic program for Windows available here:
http://www.flashmagictool.com/ . It is so easy to use that no further
explanation should be necessary: Just select the LPC1788, the ISP COM
port, and the NuttX .hex file and program it.
CONFIGURATION
=============
nsh
---
Configures the NuttShell (nsh) located at examples/nsh. The
Configuration enables only the serial NSH interface.
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configuration using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository./README.txt.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. Uses the older, OABI, buildroot toolchain. But that is easily
reconfigured:
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot toolchain
CONFIG_ARMV7M_OABI_TOOLCHAIN=y : Older, OABI toolchain
3. This NSH has support for built-in applications enabled, however,
no built-in configurations are built in the defulat configuration.
4. This configuration has DMA-based SD card support enabled by
default. That support can be disabled as follow:
CONFIG_LPC17_GPDMA=n : No DMA
CONFIG_ARCH_DMA=n
CONFIG_LPC17_SDCARD=n : No SD card driver
CONFIG_SDIO_DMA=n : No SD card DMA
CONFIG_MMCSD=n : No MMC/SD driver support
CONFIG_FS_FAT=n : No FAT file system support
5. This configuration has been used for verifying SDRAM by modifying
the configuration in the following ways:
CONFIG_LPC17_EMC=y : Enable the EMC
CONFIG_LPC17_EXTDRAM=y : Configure external DRAM
CONFIG_LPC17_EXTDRAMSIZE=67108864 : DRAM size 2x256/8 = 64MB
CONFIG_SYSTEM_RAMTEST=y : Enable the RAM test built-in
In this configuration, the SDRAM is not added to heap and so is
not excessible to the applications. So the RAM test can be
freely executed against the SRAM memory beginning at address
0xa000:0000 (CS0).
6. This configuration has been used for verifying the touchscreen on
on the 4.3" LCD module.
a) As of this writing, this touchscreen is still not functional.
Rommel Marcelo has tracked this problem down to noise on the
PENIRQ interrupt. There are so many false interrupts that
the NuttX interrupt-driven touchscreen driver cannot be used.
Other compatible LCDs, however, may not have this issue.
b) You can enable the touchscreen by modifying the configuration
in the following ways:
Drivers:
CONFIG_INPUT=y : Enable support for input devices
CONFIG_INPUT_ADS7843E=y : Enable support for the XPT2048
CONFIG_ADS7843E_SPIDEV=1 : Use SSP1 for communication
CONFIG_SPI=y : Enable SPI support
CONFIG_SPI_EXCHANGE=n : exchange() method is not supported
System Type:
CONFIG_GPIO_IRQ=y : GPIO interrupt support
CONFIG_LPC17_SSP1=y : Enable support for SSP1
RTOS Features:
CONFIG_DISABLE_SIGNALS=n : Signals are required
Library Support:
CONFIG_SCHED_WORKQUEUE=y : Work queue support required
Applicaton Configuration:
CONFIG_EXAMPLES_TOUCHSCREEN=y : Enable the touchscreen built-int test
Defaults should be okay for related touchscreen settings. Touchscreen
debug output can be enabled with:
Build Setup:
CONFIG_DEBUG=y : Enable debug features
CONFIG_DEBUG_VERBOSE=y : Enable verbose debug output
CONFIG_DEBUG_INPUT=y : Enable debug output from input devices
c) You will also have to disable SD card support to use this test. The
SD card detect (CD) signal is on P0[13]. This signal is shared. It
is also used for MOSI1 and USB_UP_LED. The CD pin may be disconnected.
There is a jumper on board that enables the CD pin. OR, you can simply
remove the SD module so that it does not drive the CD pin.
Drivers:
CONFIG_MMCSD=n : No MMC/SD driver support
System Type:
CONFIG_LPC17_GPDMA=n : No DMA
CONFIG_LPC17_SDCARD=n : No SD card driver
CONFIG_SDIO_DMA=n : No SD card DMA
CONFIG_ARCH_DMA=n
File Systems:
CONFIG_FS_FAT=n : No FAT file system support
For touchscreen debug output:
Build Setup:
CONFIG_DEBUG=y
CONFIG_DEBUG_VERBOSE=y
CONFIG_DEBUG_INPUT=y
7. The button test (apps/examples/buttons) can be built-in by adding
the following options. See apps/examples/README.txt for further
information about the button test.
System Type:
CONFIG_GPIO_IRQ=y
Board Selection:
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_IRQBUTTONS=y
Application Configuration:
CONFIG_EXAMPLES_BUTTONS=y
CONFIG_EXAMPLES_BUTTONS_MIN=0
CONFIG_EXAMPLES_BUTTONS_MAX=7
CONFIG_EXAMPLES_IRQBUTTONS_MIN=1
CONFIG_EXAMPLES_IRQBUTTONS_MAX=7
CONFIG_EXAMPLES_BUTTONS_NAME0="USER1"
CONFIG_EXAMPLES_BUTTONS_NAME1="USER2"
CONFIG_EXAMPLES_BUTTONS_NAME2="USER3"
CONFIG_EXAMPLES_BUTTONS_NAME3="JOYSTICK_A"
CONFIG_EXAMPLES_BUTTONS_NAME4="JOYSTICK_B"
CONFIG_EXAMPLES_BUTTONS_NAME5="JOYSTICK_C"
CONFIG_EXAMPLES_BUTTONS_NAME6="JOYSTICK_D"
CONFIG_EXAMPLES_BUTTONS_NAME7="JOYSTICK_CTR"

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/************************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/include/board.h
* include/arch/board/board.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __BOARDS_ARM_LX_CPU_INCLUDE_BOARD_H
#define __BOARDS_ARM_LX_CPU_INCLUDE_BOARD_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_40_GPIOIRQ)
# include <nuttx/irq.h>
#endif
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Clocking *************************************************************************/
/* NOTE: The following definitions require lpc17_40_syscon.h. It is not included here
* because the including C file may not have that file in its include path.
*/
#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency */
#define BOARD_OSCCLK_FREQUENCY BOARD_XTAL_FREQUENCY /* Main oscillator frequency */
#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency */
#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */
#define BOARD_WDTOSC_FREQUENCY (500000) /* WDT oscillator frequency */
/* This is the clock setup we configure for:
*
* SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source
* PLL0CLK = (12 * SYSCLK) / 1 = 144MHz -> PLL0 multipler=12, pre-divider=1
* CCLCK = 72MHz -> CCLK divider = 2
*/
#define LPC17_40_CCLK 72000000 /* 72Mhz */
#define BOARD_PCLKDIV 2 /* Peripheral clock = LPC17_40_CCLK/2 */
#define BOARD_PCLK_FREQUENCY (LPC17_40_CCLK * BOARD_CCLKSEL_DIVIDER / BOARD_PCLKDIV)
/* Select the main oscillator as the frequency source. SYSCLK is then the frequency
* of the main oscillator.
*
* If BOARD_XTAL_FREQUENCY > 15000000, then the SCS OSCRS bit (bit 4) should also
* be set in the BOARD_SCS_VALUE.
*/
#undef CONFIG_LPC17_40_MAINOSC
#define CONFIG_LPC17_40_MAINOSC 1
#define BOARD_SCS_VALUE SYSCON_SCS_OSCEN
/* Select the main oscillator and CCLK divider. The output of the divider is CCLK.
* The input to the divider (PLLCLK) will be determined by the PLL output.
*/
#define BOARD_CCLKSEL_DIVIDER 2
#define BOARD_CCLKSEL_VALUE (BOARD_CCLKSEL_DIVIDER | SYSCON_CCLKSEL_CCLKSEL)
/* PLL0. PLL0 is used to generate the CPU clock (PLLCLK).
*
* Source clock: Main oscillator
* PLL0 Multiplier value (M): 12
* PLL0 Pre-divider value (P): 1
*
* PLL0CLK = (M * SYSCLK) = 144MHz
*/
#undef CONFIG_LPC17_40_PLL0
#define CONFIG_LPC17_40_PLL0 1
#define BOARD_CLKSRCSEL_VALUE SYSCON_CLKSRCSEL_MAIN
#define BOARD_PLL0CFG_MSEL 12
#define BOARD_PLL0CFG_PSEL 1
#define BOARD_PLL0CFG_VALUE \
(((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLLCFG_MSEL_SHIFT) | \
((BOARD_PLL0CFG_PSEL-1) << SYSCON_PLLCFG_PSEL_SHIFT))
/* PLL1 : PLL1 is used to generate clock for the USB */
#undef CONFIG_LPC17_40_PLL1
#define BOARD_PLL1CFG_MSEL 4
#define BOARD_PLL1CFG_PSEL 2
#define BOARD_PLL1CFG_VALUE \
(((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLLCFG_MSEL_SHIFT) | \
((BOARD_PLL1CFG_PSEL-1) << SYSCON_PLLCFG_PSEL_SHIFT))
#ifdef CONFIG_LPC17_40_EMC
/* EMC clock selection.
*
* The EMC clock should not be driven above 80MHz. As a result the EMC
* uses the CPU clock divided by two.
*/
# define BOARD_EMCCLKSEL_DIVIDER 1
# define BOARD_EMCCLKSEL_VALUE SYSCON_EMCCLKSEL_CCLK_DIV1
# define LPC17_40_EMCCLK (LPC17_40_CCLK / BOARD_EMCCLKSEL_DIVIDER)
# define BOARD_EMC_FPGA_SETUP
# define BOARD_XC_PROGRAM_PIN (GPIO_PORT0 | GPIO_PIN8 | GPIO_OUTPUT | GPIO_VALUE_ONE)
# define BOARD_XC_DONE_PIN (GPIO_PORT0 | GPIO_PIN9 | GPIO_INPUT | GPIO_PULLUP)
# define BOARD_XC_INIT_PIN (GPIO_PORT0 | GPIO_PIN18 | GPIO_OUTPUT | GPIO_PULLUP | GPIO_OPEN_DRAIN)
# define BOARD_XC_SUSPEND_PIN (GPIO_PORT0 | GPIO_PIN20 | GPIO_OUTPUT | GPIO_VALUE_ONE)
# define BOARD_XC_RDWR_PIN (GPIO_PORT4 | GPIO_PIN16 | GPIO_OUTPUT | GPIO_VALUE_ZERO)
#endif
#if defined(CONFIG_LPC17_40_USBHOST) || (CONFIG_LPC17_40_USBDEV)
/* USB divider. The output of the PLL is used as the USB clock
*
* USBCLK = PLL1CLK = (SYSCLK * 4) = 48MHz
*/
# define BOARD_USBCLKSEL_DIVIDER 1
# define BOARD_USBCLKSEL_VALUE (SYSCON_USBCLKSEL_USBDIV_DIV1 | \
SYSCON_USBCLKSEL_USBSEL_PLL0)
#endif
#define GPIO_USB_DP GPIO_USB1DP
#define GPIO_USB_DM GPIO_USB1DM
#define GPIO_USB_CONNECT GPIO_USB1_CONNECT
#define GPIO_USB_OVRCR GPIO_USB2_OVRCR
#define GPIO_USB_PPWR GPIO_USB_PPWR2
#define GPIO_USB_PWRD (GPIO_FLOAT | GPIO_PORT2 | GPIO_PIN10)
/*
#define GPIO_USB_PPWR
#define GPIO_USB_PWRD
#define GPIO_USB_OVRCR
*/
/* FLASH Configuration */
#undef CONFIG_LPC17_40_FLASH
#define CONFIG_LPC17_40_FLASH 1
/* Flash access use 4 CPU clocks - Safe for 72 MHz */
#define BOARD_FLASHCFG_VALUE SYSCON_FLASHCFG_TIM_3
/* Ethernet configuration */
#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV20
#define GPIO_ENET_CRS (GPIO_ENET_CRSDV)
#define GPIO_ENET_MDC GPIO_ENET_MDC_1
#define GPIO_ENET_MDIO GPIO_ENET_MDIO_1
/* CAN bus configuration */
#define GPIO_CAN2_RD GPIO_CAN2_RD_1
#define GPIO_CAN2_TD GPIO_CAN2_TD_1
#ifdef CONFIG_LPC17_40_SDCARD
/* SDIO dividers. Note that slower clocking is required when DMA is disabled
* in order to avoid RX overrun/TX underrun errors due to delayed responses
* to service FIFOs in interrupt driven mode.
* SDCARD_CLOCK=PCLK/(2*(SDCARD_CLKDIV+1))
*/
# define SDCARD_CLKDIV_INIT 74 /* 400Khz */
# define SDCARD_INIT_CLKDIV (SDCARD_CLKDIV_INIT)
# define SDCARD_NORMAL_CLKDIV 1 /* DMA ON: SDCARD_CLOCK=15MHz */
#define SDCARD_SLOW_CLKDIV 14 /* DMA OFF: SDCARD_CLOCK=2MHz */
# ifdef CONFIG_SDIO_DMA
# define SDCARD_MMCXFR_CLKDIV (SDCARD_NORMAL_CLKDIV)
# else
# define SDCARD_MMCXFR_CLKDIV (SDCARD_SLOW_CLKDIV)
# endif
# ifdef CONFIG_SDIO_DMA
# define SDCARD_SDXFR_CLKDIV (SDCARD_NORMAL_CLKDIV)
# else
# define SDCARD_SDXFR_CLKDIV (SDCARD_SLOW_CLKDIV)
# endif
#endif
/* Set EMC delay values:
*
* CMDDLY: Programmable delay value for EMC outputs in command delayed
* mode. The delay amount is roughly CMDDLY * 250 picoseconds.
* FBCLKDLY: Programmable delay value for the feedback clock that controls
* input data sampling. The delay amount is roughly (FBCLKDLY+1) * 250
* picoseconds.
* CLKOUT0DLY: Programmable delay value for the CLKOUT0 output. This would
* typically be used in clock delayed mode. The delay amount is roughly
* (CLKOUT0DLY+1) * 250 picoseconds.
* CLKOUT1DLY: Programmable delay value for the CLKOUT1 output. This would
* typically be used in clock delayed mode. The delay amount is roughly
* (CLKOUT1DLY+1) * 250 picoseconds.
*
* Optimal for NOR: {1,1,1,1}
* Needed for NAND and SDRAM: {17,1,2,1}
*/
#ifdef CONFIG_LPC17_40_EMC
#if defined(CONFIG_LPC17_40_EXTNAND) || defined(CONFIG_LPC17_40_EXTDRAM)
# define BOARD_CMDDLY 16
# define BOARD_FBCLKDLY 16
# define BOARD_CLKOUT0DLY 1
# define BOARD_CLKOUT1DLY 1
#else
# define BOARD_CMDDLY 1
# define BOARD_FBCLKDLY 1
# define BOARD_CLKOUT0DLY 1
# define BOARD_CLKOUT1DLY 1
#endif
#endif
#define BOARD_NADDR 16
#define BOARD_NDATA 32
//#define BOARD_EMC_CONFIG_BY_LOADER 1
/* LED definitions ******************************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following definitions are used to access individual LEDs.
*
* LED1 -- Connected to P1[29] RED
* LED2 -- Connected to P0[16] GREEN
*
* These LEDs are connecte to ground so a high output value will illuminate them.
*/
/* LED index values for use with board_userled() */
#define BOARD_LED1 0
#define BOARD_LED2 1
#define BOARD_NLEDS 2
/* LED bits for use with board_userled_all() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
#define BOARD_LED2_BIT (1 << BOARD_LED2)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the four LEDs
* on the WaveShare Open1788K. The following definitions describe how NuttX
* controls the LEDs:
*/
/* LED1 LED2 LED3 LED4 */
#define LED_STARTED 0 /* OFF OFF OFF OFF */
#define LED_HEAPALLOCATE 1 /* ON OFF OFF OFF */
#define LED_IRQSENABLED 2 /* OFF ON OFF OFF */
#define LED_STACKCREATED 3 /* ON ON OFF OFF */
#define LED_INIRQ 4 /* LED3 glows, on while in interrupt */
#define LED_SIGNAL 4 /* LED3 glows, on while in signal handler */
#define LED_ASSERTION 4 /* LED3 glows, on while in assertion */
#define LED_PANIC 4 /* LED3 Flashes at 2Hz */
#define LED_IDLE 5 /* LED4 glows: ON while active *
* OFF while sleeping */
/* Button definitions ***************************************************************/
/* The LX_CPU supports several buttons. All must be pulled up by the LX_CPU.
* When closed, the pins will be pulled to ground. So the buttons will read "1"
* when open and "0" when closed. All except USER1 are capable of generating
* interrupts.
*
* USER1 -- Connected to P4[26]
* USER2 -- Connected to P2[22]
* USER3 -- Connected to P0[10]
*
* And a Joystick
*
* JOY_A -- Connected to P2[25]
* JOY_B -- Connected to P2[26]
* JOY_C -- Connected to P2[23]
* JOY_D -- Connected to P2[19]
* JOY_CTR -- Connected to P0[14] (shared with SSP1 SSEL)
*
* For the interrupting buttons, interrupts are generated on both edges (press and
* release).
*/
#define BOARD_BUTTON_USER1 0
#define BOARD_BUTTON_USER2 1
#define BOARD_BUTTON_USER3 2
#define BOARD_JOYSTICK_A 3
#define BOARD_JOYSTICK_B 4
#define BOARD_JOYSTICK_C 5
#define BOARD_JOYSTICK_D 6
#define BOARD_JOYSTICK_CTR 7
#define NUM_BUTTONS 8
#define BOARD_BUTTON_USER1_BIT (1 << BOARD_BUTTON_USER1)
#define BOARD_BUTTON_USER2_BIT (1 << BOARD_BUTTON_USER2)
#define BOARD_BUTTON_USER3_BIT (1 << BOARD_BUTTON_USER3)
#define BOARD_JOYSTICK_A_BIT (1 << BOARD_JOYSTICK_A)
#define BOARD_JOYSTICK_B_BIT (1 << BOARD_JOYSTICK_B)
#define BOARD_JOYSTICK_C_BIT (1 << BOARD_JOYSTICK_C)
#define BOARD_JOYSTICK_D_BIT (1 << BOARD_JOYSTICK_D)
#define BOARD_JOYSTICK_CTR_BIT (1 << BOARD_JOYSTICK_CTR)
/* Alternate pin selections *********************************************************/
/* UART0:
*
* TX --- Connected to P0[2]
* RX --- Connected to P0[3]
*/
#define GPIO_UART0_TXD GPIO_UART0_TXD_2
#define GPIO_UART0_RXD GPIO_UART0_RXD_2
/* UART1:
*
* All pin options are controlled by older briges on the bottom of the board. There
* are the default settings on my board as it came out of the box:
*
* RTS --- Connected to P0[22]
* DSR --- Connected to P0[19]
* CTS --- Connected to P0[17]
* TXD --- Connected to P0[15]
* RXD --- Connected to P0[16] (Shared with LED2)
*/
#define GPIO_UART1_RTS GPIO_UART1_RTS_2
#define GPIO_UART1_DSR GPIO_UART1_DSR_1
#define GPIO_UART1_CTS GPIO_UART1_CTS_1
#define GPIO_UART1_TXD GPIO_UART1_TXD_1
#define GPIO_UART1_RXD GPIO_UART1_RXD_1
/* MCI-SDIO:
*
* D0 --- Connected to P1[6]
* D1 --- Connected to P2[11]
* D2 --- Connected to P2[12]
* D3 --- Connected to P2[13]
* CLK --- Connected to P1[2]
* CMD --- Connected to P1[3]
*/
#define GPIO_SD_DAT0 GPIO_SD_DAT0_2
#define GPIO_SD_DAT1 GPIO_SD_DAT1_2
#define GPIO_SD_DAT2 GPIO_SD_DAT2_2
#define GPIO_SD_DAT3 GPIO_SD_DAT3_2
#define GPIO_SD_CLK GPIO_SD_CLK_2
#define GPIO_SD_CMD GPIO_SD_CMD_2
/* LCD R:
*
* VD0 --- Connected to P0[4]
* VD1 --- Connected to P0[5]
* VD2 --- Connected to P4[28]
* VD3 --- Connected to P4[29]
* VD4 --- Connected to P2[6]
* VD5 --- Connected to P2[7]
* VD6 --- Connected to P2[8]
* VD7 --- Connected to P2[9]
*/
#define GPIO_LCD_VD0 GPIO_LCD_VD0_1
#define GPIO_LCD_VD1 GPIO_LCD_VD1_1
#define GPIO_LCD_VD2 GPIO_LCD_VD2_2
#define GPIO_LCD_VD3 GPIO_LCD_VD3_3
#define GPIO_LCD_VD4 GPIO_LCD_VD4_1
#define GPIO_LCD_VD5 GPIO_LCD_VD5_1
#define GPIO_LCD_VD6 GPIO_LCD_VD6_2
#define GPIO_LCD_VD7 GPIO_LCD_VD7_2
/* LCD G:
*
* VD8 --- Connected to P0[6]
* VD9 --- Connected to P0[7]
* VD10 --- Connected to P1[20]
* VD11 --- Connected to P1[21]
* VD12 --- Connected to P1[22]
* VD13 --- Connected to P1[23]
* VD14 --- Connected to P1[24]
* VD15 --- Connected to P1[25]
*/
#define GPIO_LCD_VD8 GPIO_LCD_VD8_1
#define GPIO_LCD_VD9 GPIO_LCD_VD9_1
#define GPIO_LCD_VD10 GPIO_LCD_VD10_1
#define GPIO_LCD_VD11 GPIO_LCD_VD11_1
#define GPIO_LCD_VD12 GPIO_LCD_VD12_1
#define GPIO_LCD_VD13 GPIO_LCD_VD13_1
#define GPIO_LCD_VD14 GPIO_LCD_VD14_1
#define GPIO_LCD_VD15 GPIO_LCD_VD15_1
/* LCD B:
*
* VD16 --- Connected to P0[8]
* VD17 --- Connected to P0[9]
* VD18 --- Connected to P2[12]
* VD19 --- Connected to P2[13]
* VD20 --- Connected to P1[26]
* VD21 --- Connected to P1[27]
* VD22 --- Connected to P1[28]
* VD23 --- Connected to P1[29]
*
* DCLK --- Connected to P2[2]
* LP --- Connected to P2[5]
* FP --- Connected to P2[3]
* ENAB_M --- Connected to P2[4]
* PWR --- Connected to P2[0]
*/
#define GPIO_SSP0_SCK GPIO_SSP0_SCK_3
#define GPIO_SSP0_MISO GPIO_SSP0_MISO_2
#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_4
/* XPT2046 Touchscreen:
*
/* -------------- -------------------- ------------ --------------------------------
* XTPT2046 Module Module LX_CPU LED
* Signal Connector Connector
* -------------- -------------------- ------------ ---------------------------------
* Pin 11 PENIRQ\ PENIRQ (pulled high) PORT3 Pin 1 P2.15 PENIRQ
* Pin 12 DOUT MISO PORT3 Pin 4 P1.18 MISO1 (Also USB HOST UP LED)
* Pin 13 BUSY BUSY (pulled high) PORT3 Pin 9 P2.14 BUSY
* Pin 14 DIN MOSI PORT3 Pin 3 P0.13 MOSI1 (Also USB Device up LED and SD CD pin)
* Pin 15 CS\ SSEL (pulled high) PORT3 Pin 6 P1.8 GPIO (Also RMII_CRS_DV)
* Pin 16 DCLK SCK PORT3 Pin 5 P1.19 SCK1
* -------------- -------------------- ------------ ---------------------------------
*/
#define GPIO_SSP1_MISO GPIO_SSP1_MISO_3
#define GPIO_SSP1_MOSI GPIO_SSP1_MOSI_2
#define GPIO_SSP1_SCK GPIO_SSP1_SCK_2
#endif /* __BOARDS_ARM_LX_CPU_INCLUDE_BOARD_H */

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############################################################################
# boards/arm/lpc17xx_40xx/lx_cpu/nsh/Make.defs
#
# Copyright (C) 2013, 2017 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-m$(DELIM)Toolchain.defs
# Setup for the kind of memory that we are executing from
ifeq ($(CONFIG_LX_CPU_BOOT_FLASH_APP),y)
LDSCRIPT = link-flash-app.ld
endif
ifeq ($(CONFIG_LX_CPU_BOOT_FLASH_BOOT),y)
LDSCRIPT = link-flash-boot.ld
endif
ifeq ($(CONFIG_LX_CPU_BOOT_SDRAM),y)
LDSCRIPT = link-sdram.ld
endif
ifeq ($(WINTOOL),y)
# Windows-native toolchains
DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh
DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh
MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)boards$(DELIM)$(CONFIG_ARCH)$(DELIM)$(CONFIG_ARCH_CHIP)$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
else
# Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx
ARCHSCRIPT = -T$(TOPDIR)$(DELIM)boards$(DELIM)$(CONFIG_ARCH)$(DELIM)$(CONFIG_ARCH_CHIP)$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
STRIP = $(CROSSDEV)strip --strip-unneeded
AR = $(CROSSDEV)ar rcs
NM = $(CROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti -fcheck-new
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
# NXFLAT module definitions
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
# ELF module definitions
CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs
LDELFFLAGS = -r -e main
ifeq ($(WINTOOL),y)
LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)$(DELIM)boards$(DELIM)$(CONFIG_ARCH)$(DELIM)$(CONFIG_ARCH_CHIP)$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)gnu-elf.ld}"
else
LDELFFLAGS += -T $(TOPDIR)$(DELIM)boards$(DELIM)$(CONFIG_ARCH)$(DELIM)$(CONFIG_ARCH_CHIP)$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)gnu-elf.ld
endif
# Loadable module definitions
CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
LDMODULEFLAGS = -r -e module_initialize
ifeq ($(WINTOOL),y)
LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libs/libc/modlib/gnu-elf.ld}"
else
LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld
endif
# File extensions
ASMEXT = .S
OBJEXT = .o
LIBEXT = .a
EXEEXT =
# Linker flags
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
# Host tools
HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
HOSTLDFLAGS =

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@ -0,0 +1,139 @@
/****************************************************************************
* configs/stm32f4discovery/scripts/gnu-elf.ld
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
SECTIONS
{
.text 0x00000000 :
{
_stext = . ;
*(.text)
*(.text.*)
*(.gnu.warning)
*(.stub)
*(.glue_7)
*(.glue_7t)
*(.jcr)
/* C++ support: The .init and .fini sections contain specific logic
* to manage static constructors and destructors.
*/
*(.gnu.linkonce.t.*)
*(.init) /* Old ABI */
*(.fini) /* Old ABI */
_etext = . ;
}
.ARM.extab :
{
*(.ARM.extab*)
}
.ARM.exidx :
{
*(.ARM.exidx*)
}
.rodata :
{
_srodata = . ;
*(.rodata)
*(.rodata1)
*(.rodata.*)
*(.gnu.linkonce.r*)
_erodata = . ;
}
.data :
{
_sdata = . ;
*(.data)
*(.data1)
*(.data.*)
*(.gnu.linkonce.d*)
_edata = . ;
}
/* C++ support. For each global and static local C++ object,
* GCC creates a small subroutine to construct the object. Pointers
* to these routines (not the routines themselves) are stored as
* simple, linear arrays in the .ctors section of the object file.
* Similarly, pointers to global/static destructor routines are
* stored in .dtors.
*/
.ctors :
{
_sctors = . ;
*(.ctors) /* Old ABI: Unallocated */
*(.init_array) /* New ABI: Allocated */
_edtors = . ;
}
.dtors :
{
_sdtors = . ;
*(.dtors) /* Old ABI: Unallocated */
*(.fini_array) /* New ABI: Allocated */
_edtors = . ;
}
.bss :
{
_sbss = . ;
*(.bss)
*(.bss.*)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.b*)
*(COMMON)
_ebss = . ;
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

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@ -0,0 +1,113 @@
/****************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/scripts/kernel-space.ld
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > kflash
. = ALIGN(4);
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > kflash
.ARM.extab : {
*(.ARM.extab*)
} > kflash
. = ALIGN(4);
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > kflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
. = ALIGN(4);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > ksram AT > kflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > ksram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

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@ -0,0 +1,134 @@
/****************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-flash-app.ld
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Rommel Marcelo
* Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The LPC1788 has 512Kb of FLASH beginning at address 0x0000:0000 and
* 96Kb of total SRAM: 64Kb of SRAM in the CPU block beginning at address
* 0x10000000 and 32Kb of Peripheral SRAM in two banks, 8Kb at addresses
* 0x20000000 bank0 first and 8kb at 0x20002000 at bank0 second. And 16Kb
* at 0x20004000 on bank1.
*
* Here we assume that .data and .bss will all fit into the 64Kb CPU SRAM
* address range.
*/
MEMORY
{
FLASHBOOT (rx) : ORIGIN = 0x00000000, LENGTH = 0x00007000
KEYVAL (rx) : ORIGIN = 0x00007000, LENGTH = 0x00002000
FLASH (rx) : ORIGIN = 0x00009000, LENGTH = 0x00077000
SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
AHBRAM8_B0A(rwx): ORIGIN = 0x20000000, LENGTH = 8K
AHBRAM8_B0B(rwx): ORIGIN = 0x20002000, LENGTH = 8K
AHBRAM16(rwx): ORIGIN = 0x20004000, LENGTH = 16K
/* External SDRAM - 32MB for LX_CPU */
SDRAM (rwx) : ORIGIN = 0xA0000000, LENGTH = 32M
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > FLASH
. = ALIGN(4);
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > FLASH
.ARM.extab : {
*(.ARM.extab*)
} > FLASH
. = ALIGN(4);
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > FLASH
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
. = ALIGN(4);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > SRAM AT > FLASH
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > SRAM
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

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@ -0,0 +1,132 @@
/****************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-flash-boot.ld
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Rommel Marcelo
* Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The LPC1788 has 512Kb of FLASH beginning at address 0x0000:0000 and
* 96Kb of total SRAM: 64Kb of SRAM in the CPU block beginning at address
* 0x10000000 and 32Kb of Peripheral SRAM in two banks, 8Kb at addresses
* 0x20000000 bank0 first and 8kb at 0x20002000 at bank0 second. And 16Kb
* at 0x20004000 on bank1.
*
* Here we assume that .data and .bss will all fit into the 64Kb CPU SRAM
* address range.
*/
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K
SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
AHBRAM8_B0A(rwx): ORIGIN = 0x20000000, LENGTH = 8K
AHBRAM8_B0B(rwx): ORIGIN = 0x20002000, LENGTH = 8K
AHBRAM16(rwx): ORIGIN = 0x20004000, LENGTH = 16K
/* External SDRAM - 32MB for LX_CPU */
SDRAM (rwx) : ORIGIN = 0xA0000000, LENGTH = 32M
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > FLASH
. = ALIGN(4);
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > FLASH
.ARM.extab : {
*(.ARM.extab*)
} > FLASH
. = ALIGN(4);
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > FLASH
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
. = ALIGN(4);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > SRAM AT > FLASH
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > SRAM
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

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@ -0,0 +1,132 @@
/****************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-sdram.ld
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Rommel Marcelo
* Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The LPC1788 has 512Kb of FLASH beginning at address 0x0000:0000 and
* 96Kb of total SRAM: 64Kb of SRAM in the CPU block beginning at address
* 0x10000000 and 32Kb of Peripheral SRAM in two banks, 8Kb at addresses
* 0x20000000 bank0 first and 8kb at 0x20002000 at bank0 second. And 16Kb
* at 0x20004000 on bank1.
*
* Here we assume that .data and .bss will all fit into the 64Kb CPU SRAM
* address range.
*/
MEMORY
{
FLASHBOOT (rx) : ORIGIN = 0x00000000, LENGTH = 0x00007000
KEYVAL (rx) : ORIGIN = 0x00007000, LENGTH = 0x00002000
FLASH (rx) : ORIGIN = 0x00009000, LENGTH = 0x00077000
SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
AHBRAM8_B0A(rwx): ORIGIN = 0x20000000, LENGTH = 8K
AHBRAM8_B0B(rwx): ORIGIN = 0x20002000, LENGTH = 8K
AHBRAM16(rwx): ORIGIN = 0x20004000, LENGTH = 16K
/* External SDRAM - 32MB for LX_CPU */
SDRAM (rwx) : ORIGIN = 0xA0000000, LENGTH = 32M
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > SDRAM
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > SDRAM
.ARM.extab : {
*(.ARM.extab*)
} > SDRAM
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > SDRAM
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > SRAM AT > SDRAM
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > SRAM
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

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@ -0,0 +1,98 @@
/****************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/scripts/memory.ld
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The LPC1788 has 512Kb of FLASH beginning at address 0x0000:0000 and
* 96KB of total SRAM: 64KB of SRAM in the CPU block beginning at address
* 0x10000000 and 32Kb of Peripheral SRAM in two banks, 8KB at addresses
* 0x20000000 bank0 first and 8KB at 0x20002000 at bank0 second. And 16KB
* at 0x20004000 on bank1.
*
* For MPU support, the kernel-mode NuttX section is assumed to be 64KB of
* FLASH and 4KB of SRAM. That, of course, can be optimized as needed (See
* also boards/arm/lpc17xx_40xx/lx_cpu/scripts/kernel-space.ld).
*
* Alignment of the user space FLASH partition is a critical factor: The
* user space FLASH partition will be spanned with a single region of size
* 2**n bytes. The alignment of the user-space region must be the same. As
* a consequence, as the user-space increases in size, the alignmment
* requirement also increases.
*
* This alignment requirement means that the largest user space FLASH region
* you can have will be 256KB at it would have to be positioned at
* 0x00400000. If you change this address, don't forget to change the
* CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
* the check in kernel/userspace.c.
*
* For the same reasons, the maximum size of the SRAM mapping is limited to
* 4KB. Both of these alignment limitations could be reduced by using
* multiple regions to map the FLASH/SDRAM range or perhaps with some
* clever use of subregions.
*
* A detailed memory map for the 64KB CPU SRAM region is as follows:
*
* 0x10000 0000: Kernel .data region. Typical size: 0.1KB
* ------- ---- Kernel .bss region. Typical size: 1.8KB
* 0x10000 0800: Kernel IDLE thread stack (approximate). Size is
* determined by CONFIG_IDLETHREAD_STACKSIZE and
* adjustments for alignment. Typical is 1KB.
* ------- ---- Padded to 4KB
* 0x10000 1000: User .data region. Size is variable.
* ------- ---- User .bss region Size is variable.
* ------- ---- Beginning of kernel heap. Size determined by
* CONFIG_MM_KERNEL_HEAPSIZE.
* 0x10000 8000: Beginning of user heap. Can vary with other settings.
* 0x10001 0000: End+1 of CPU RAM
*/
MEMORY
{
/* 256Kb FLASH */
kflash (rx) : ORIGIN = 0x00000000, LENGTH = 64K
uflash (rx) : ORIGIN = 0x00010000, LENGTH = 64K
xflash (rx) : ORIGIN = 0x00010000, LENGTH = 384K
/* 64Kb of SRAM in the CPU block */
ksram (rwx) : ORIGIN = 0x10000000, LENGTH = 4K
usram (rwx) : ORIGIN = 0x10001000, LENGTH = 4K
xsram (rwx) : ORIGIN = 0x10001000, LENGTH = 56K
/* Other peripheral memory (free, nothing is linked here) */
ahbram8_b0a(rwx) : ORIGIN = 0x20000000, LENGTH = 8K
ahbram8_b0b(rwx) : ORIGIN = 0x20002000, LENGTH = 8K
ahbram16(rwx) : ORIGIN = 0x20004000, LENGTH = 16K
}

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@ -0,0 +1,114 @@
/****************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/scripts/user-space.ld
*
* Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
SECTIONS
{
.userspace : {
*(.userspace)
} > uflash
.text : {
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > uflash
. = ALIGN(4);
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > uflash
.ARM.extab : {
*(.ARM.extab*)
} > uflash
. = ALIGN(4);
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > uflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
. = ALIGN(4);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > usram AT > uflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > usram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

View file

@ -0,0 +1,2 @@
/.depend
/Make.dep

View file

@ -0,0 +1,71 @@
############################################################################
# boards/arm/lpc17xx_40xx/lx_cpu/src/Makefile
#
# Copyright (C) 2013, 2017 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
-include $(TOPDIR)/Make.defs
ASRCS =
CSRCS = lpc17_40_boardinitialize.c lpc17_40_bringup.c lpc17_40_ssp.c
ifeq ($(CONFIG_LPC17_40_EMC),y)
ifeq ($(CONFIG_LPC17_40_EXTDRAM),y)
CSRCS += lpc17_40_sdraminitialize.c
endif
CSRCS += lpc17_40_fpgainitialize.c
endif
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += lpc17_40_appinit.c
endif
ifeq ($(CONFIG_USBDEV_COMPOSITE),y)
CSRCS += lpc17_40_composite.c
endif
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += lpc17_40_autoleds.c
else
CSRCS += lpc17_40_userleds.c
endif
ifeq ($(CONFIG_BOARDCTL_RESET),y)
CSRCS += lpc17_40_reset.c
endif
ifeq ($(CONFIG_CAN),y)
CSRCS += lpc17_40_can.c
endif
include $(TOPDIR)/boards/Board.mk

View file

@ -0,0 +1,94 @@
/****************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_appinit.c
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/board.h>
#include "lx_cpu.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef OK
# define OK 0
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initalization logic and the
* matching application logic. The value cold be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
#ifdef CONFIG_BOARD_LATE_INITIALIZE
/* Board initialization already performed by board_initialize() */
return OK;
#else
/* Perform board-specific initialization */
return lx_cpu_bringup();
#endif
}

View file

@ -0,0 +1,239 @@
/****************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_autoleds.c
*
* Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "lpc17_40_gpio.h"
#include "lx_cpu.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following definitions are used to access individual LEDs.
*
* LED1 -- Connected to P1[29]
* LED2 -- Connected to P0[16]
*
* These LEDs are connected to ground so a high output value will illuminate them.
*
* If CONFIG_ARCH_LEDs is defined, then NuttX will control the four LEDs
* on the WaveShare Open1788K. The following definitions describe how NuttX
* controls the LEDs:
*
* LED1 LED2 LED3 LED4
* LED_STARTED 0 OFF OFF OFF OFF
* LED_HEAPALLOCATE 1 ON OFF OFF OFF
* LED_IRQSENABLED 2 OFF ON OFF OFF
* LED_STACKCREATED 3 ON ON OFF OFF
* LED_INIRQ 4 LED3 glows, on while in interrupt
* LED_SIGNAL 4 LED3 glows, on while in signal handler
* LED_ASSERTION 4 LED3 glows, on while in assertion
* LED_PANIC 4 LED3 Flashes at 2Hz
* LED_IDLE 5 LED glows, ON while sleeping
*/
/* The following definitions map the encoded LED setting to GPIO settings */
#define LX_CPU_LED1 (1 << 0)
#define LX_CPU_LED2 (1 << 1)
#define ON_SETBITS_SHIFT (0)
#define ON_CLRBITS_SHIFT (4)
#define OFF_SETBITS_SHIFT (8)
#define OFF_CLRBITS_SHIFT (12)
#define ON_BITS(v) ((v) & 0xff)
#define OFF_BITS(v) (((v) >> 8) & 0x0ff)
#define SETBITS(b) ((b) & 0x0f)
#define CLRBITS(b) (((b) >> 4) & 0x0f)
#define ON_SETBITS(v) (SETBITS(ON_BITS(v))
#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v))
#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v))
#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v))
#define LED_STARTED_ON_SETBITS ((0) << ON_SETBITS_SHIFT)
#define LED_STARTED_ON_CLRBITS ((LX_CPU_LED1|LX_CPU_LED2) << ON_CLRBITS_SHIFT)
#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT)
#define LED_STARTED_OFF_CLRBITS ((LX_CPU_LED1|LX_CPU_LED2) << OFF_CLRBITS_SHIFT)
#define LED_HEAPALLOCATE_ON_SETBITS ((LX_CPU_LED1) << ON_SETBITS_SHIFT)
#define LED_HEAPALLOCATE_ON_CLRBITS ((LX_CPU_LED2) << ON_CLRBITS_SHIFT)
#define LED_HEAPALLOCATE_OFF_SETBITS (0 << OFF_SETBITS_SHIFT)
#define LED_HEAPALLOCATE_OFF_CLRBITS ((LX_CPU_LED1|LX_CPU_LED2) << OFF_CLRBITS_SHIFT)
#define LED_IRQSENABLED_ON_SETBITS ((LX_CPU_LED2) << ON_SETBITS_SHIFT)
#define LED_IRQSENABLED_ON_CLRBITS ((LX_CPU_LED1) << ON_CLRBITS_SHIFT)
#define LED_IRQSENABLED_OFF_SETBITS ((LX_CPU_LED1) << OFF_SETBITS_SHIFT)
#define LED_IRQSENABLED_OFF_CLRBITS ((LX_CPU_LED2) << OFF_CLRBITS_SHIFT)
#define LED_STACKCREATED_ON_SETBITS ((LX_CPU_LED1|LX_CPU_LED2) << ON_SETBITS_SHIFT)
#define LED_STACKCREATED_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_STACKCREATED_OFF_SETBITS ((LX_CPU_LED2) << OFF_SETBITS_SHIFT)
#define LED_STACKCREATED_OFF_CLRBITS ((LX_CPU_LED1) << OFF_CLRBITS_SHIFT)
#define LED_EVENT_ON_SETBITS ((0) << ON_SETBITS_SHIFT)
#define LED_EVENT_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_EVENT_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
#define LED_EVENT_OFF_CLRBITS ((0) << OFF_CLRBITS_SHIFT)
#define LED_IDLE_ON_SETBITS ((0) << ON_SETBITS_SHIFT)
#define LED_IDLE_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_IDLE_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
#define LED_IDLE_OFF_CLRBITS ((0) << OFF_CLRBITS_SHIFT)
/* Dump GPIO registers */
#ifdef CONFIG_DEBUG_LEDS_INFO
# define led_dumpgpio(m) lpc17_40_dumpgpio(???, m)
#else
# define led_dumpgpio(m)
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
static const uint16_t g_ledbits[8] =
{
(LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS |
LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS),
(LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS |
LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS),
(LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS |
LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS),
(LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS |
LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS),
(LED_EVENT_ON_SETBITS | LED_EVENT_ON_CLRBITS |
LED_EVENT_OFF_SETBITS | LED_EVENT_OFF_CLRBITS),
(LED_IDLE_ON_SETBITS | LED_IDLE_ON_CLRBITS |
LED_IDLE_OFF_SETBITS | LED_IDLE_OFF_CLRBITS)
};
/****************************************************************************
* Private Functions
****************************************************************************/
static inline void led_clrbits(unsigned int clrbits)
{
if ((clrbits & LX_CPU_LED1) != 0)
{
lpc17_40_gpiowrite(GPIO_LED1, false);
}
if ((clrbits & LX_CPU_LED2) != 0)
{
lpc17_40_gpiowrite(GPIO_LED2, false);
}
}
static inline void led_setbits(unsigned int setbits)
{
if ((setbits & LX_CPU_LED1) != 0)
{
lpc17_40_gpiowrite(GPIO_LED1, true);
}
if ((setbits & LX_CPU_LED2) != 0)
{
lpc17_40_gpiowrite(GPIO_LED2, true);
}
}
static void led_setonoff(unsigned int bits)
{
led_clrbits(CLRBITS(bits));
led_setbits(SETBITS(bits));
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
void board_autoled_initialize(void)
{
/* Configure LED1-4 GPIOs for output */
lpc17_40_configgpio(GPIO_LED1);
lpc17_40_configgpio(GPIO_LED2);
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
led_setonoff(ON_BITS(g_ledbits[led]));
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
led_setonoff(OFF_BITS(g_ledbits[led]));
}

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/************************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_boardinitialize.c
*
* Copyright (C) 2013, 2015, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
#include "lpc17_40_emc.h"
#include "lx_cpu.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: lpc17_40_boardinitialize
*
* Description:
* All LPC17xx architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
void lpc17_40_boardinitialize(void)
{
/* Initialize the EMC, and SDRAM */
#ifndef BOARD_EMC_CONFIG_BY_LOADER
#ifdef CONFIG_LPC17_40_EMC
lpc17_40_emcinitialize();
lx_cpu_fpga_initialize();
#ifdef CONFIG_LPC17_40_EXTDRAM
lx_cpu_sdram_initialize();
#endif
#endif
#endif /*BOARD_EMC_CONFIG_BY_LOADER*/
#if defined(CONFIG_LPC17_40_SSP0) || defined(CONFIG_LPC17_40_SSP1) || \
defined(CONFIG_LPC17_40_SSP2)
/* Configure SSP chip selects if 1) at least one SSP is enabled, and 2)
* the weak function lx_cpu_sspdev_initialize() has been brought into
* the link.
*/
if (lx_cpu_sspdev_initialize)
{
lx_cpu_sspdev_initialize();
}
#endif
#ifdef CONFIG_ARCH_LEDS
/* Configure on-board LEDs if LED support has been selected. */
board_autoled_initialize();
#endif
}
/****************************************************************************
* Name: board_initialize
*
* Description:
* If CONFIG_BOARD_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_initialize(). board_initialize() will be
* called immediately after up_initialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_INITIALIZE
void board_initialize(void)
{
/* Perform board-specific initialization */
(void)lx_cpu_bringup();
}
#endif

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/****************************************************************************
* config/lx_cpu/src/lpc17_40_bringup.c
*
* Copyright (C) 2013, 2016-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <unistd.h>
#include <syslog.h>
#include <errno.h>
#include <assert.h>
#include <sys/mount.h>
#include <nuttx/arch.h>
#include <nuttx/kthread.h>
#include <nuttx/board.h>
#include <nuttx/sdio.h>
#include <nuttx/mmcsd.h>
#include <nuttx/video/fb.h>
#include <nuttx/usb/usbhost.h>
#include "lpc17_40_gpio.h"
#include "lpc17_40_sdcard.h"
#include "lpc17_40_usbhost.h"
#include "lx_cpu.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#define NSH_HAVE_MMCSD 1
#define NSH_HAVE_USBHOST 1
#define NSH_HAVE_USBHDEV 1
#undef NSH_HAVE_MMCSD_CD
#undef NSH_HAVE_MMCSD_CDINT
/* MMC/SD support */
#if !defined(CONFIG_LPC17_40_SDCARD) || !defined(CONFIG_MMCSD) && !defined(CONFIG_MMCD_SDIO)
# undef NSH_HAVE_MMCSD
#endif
/* Can't support MMC/SD features if mountpoints are disabled */
#if defined(CONFIG_DISABLE_MOUNTPOINT)
# undef NSH_HAVE_MMCSD
#endif
/* MMC/SD support requires that an SPI support is enabled and an SPI port is selected */
#ifdef NSH_HAVE_MMCSD
# if !defined(CONFIG_NSH_MMCSDSLOTNO)
# warning "Assuming slot MMC/SD slot 0"
# define CONFIG_NSH_MMCSDSLOTNO 0
# endif
#endif
#ifdef NSH_HAVE_MMCSD
# if !defined(CONFIG_NSH_MMCSDMINOR)
# warning "Assuming /dev/mmcsd0"
# define CONFIG_NSH_MMCSDMINOR 0
# endif
#endif
/* The SD card detect (CD) signal is on P0[13]. This signal is shared. It is also
* used for MOSI1 and USB_UP_LED. The CD pin may be disconnected. There is a jumper
* on board that enables the CD pin.
*/
#ifdef NSH_HAVE_MMCSD
# ifdef CONFIG_MMCSD_HAVE_CARDDETECT
# define NSH_HAVE_MMCSD_CD 1
# ifdef CONFIG_LPC17_40_GPIOIRQ
# define NSH_HAVE_MMCSD_CDINT 1
# endif
# endif
#endif
#if defined(NSH_HAVE_MMCSD_CD) && \
(defined(CONFIG_LPC17_40_SSP1) || defined(CONFIG_LPC17_40_USBDEV))
# warning "Use of SD Card Detect pin conflicts with SSP1 and/or USB device"
#endif
/* USB Host */
#ifndef CONFIG_USBHOST
# undef NSH_HAVE_USBHOST
#endif
#ifndef CONFIG_LPC17_40_USBHOST
# undef NSH_HAVE_USBHOST
#endif
#ifdef NSH_HAVE_USBHOST
# ifndef CONFIG_USBHOST_DEFPRIO
# define CONFIG_USBHOST_DEFPRIO 50
# endif
# ifndef CONFIG_USBHOST_STACKSIZE
# ifdef CONFIG_USBHOST_HUB
# define CONFIG_USBHOST_STACKSIZE 1536
# else
# define CONFIG_USBHOST_STACKSIZE 1024
# endif
# endif
#endif
/* USB Device */
#ifndef CONFIG_USBDEV
# undef NSH_HAVE_USBDEV
#endif
#ifndef CONFIG_LPC17_40_USBDEV
# undef NSH_HAVE_USBDEV
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef NSH_HAVE_USBHOST
static struct usbhost_connection_s *g_usbconn;
#endif
#ifdef NSH_HAVE_MMCSD
static FAR struct sdio_dev_s *g_sdiodev;
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: nsh_waiter
*
* Description:
* Wait for USB devices to be connected.
*
****************************************************************************/
#ifdef NSH_HAVE_USBHOST
static int nsh_waiter(int argc, char *argv[])
{
struct usbhost_hubport_s *hport;
syslog(LOG_INFO, "nsh_waiter: Running\n");
for (;;)
{
/* Wait for the device to change state */
DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
syslog(LOG_INFO, "nsh_waiter: %s\n",
hport->connected ? "connected" : "disconnected");
/* Did we just become connected? */
if (hport->connected)
{
/* Yes.. enumerate the newly connected device */
(void)CONN_ENUMERATE(g_usbconn, hport);
}
}
/* Keep the compiler from complaining */
return 0;
}
#endif
/****************************************************************************
* Name: nsh_cdinterrupt
*
* Description:
* Card detect interrupt handler.
*
****************************************************************************/
#ifdef NSH_HAVE_MMCSD_CDINT
static int nsh_cdinterrupt(int irq, FAR void *context, FAR void *arg)
{
static bool inserted = 0xff; /* Impossible value */
bool present;
present = !lpc17_40_gpioread(GPIO_SD_CD);
if (present != inserted)
{
sdio_mediachange(g_sdiodev, present);
inserted = present;
}
return OK;
}
#endif
/****************************************************************************
* Name: nsh_sdinitialize
*
* Description:
* Initialize SPI-based microSD.
*
****************************************************************************/
#ifdef NSH_HAVE_MMCSD
static int nsh_sdinitialize(void)
{
int ret;
#ifdef NSH_HAVE_MMCSD_CD
/* Configure the SD card detect GPIO */
lpc17_40_configgpio(GPIO_SD_CD);
#ifdef NSH_HAVE_MMCSD_CDINT
/* Attach an interrupt handler to get notifications when a card is
* inserted or deleted.
*/
(void)irq_attach(LPC17_40_IRQ_P0p13, nsh_cdinterrupt, NULL);
up_enable_irq(LPC17_40_IRQ_P0p13);
#endif
#endif
/* First, get an instance of the SDIO interface */
g_sdiodev = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO);
if (!g_sdiodev)
{
syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n",
CONFIG_NSH_MMCSDSLOTNO);
return -ENODEV;
}
/* Now bind the SDIO interface to the MMC/SD driver */
ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, g_sdiodev);
if (ret != OK)
{
syslog(LOG_ERR,
"ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n",
ret);
return ret;
}
/* Check if there is a card in the slot and inform the SDCARD driver. If
* we do not support the card detect, then let's assume that there is
* one.
*/
#ifdef NSH_HAVE_MMCSD_CD
sdio_mediachange(g_sdiodev, !lpc17_40_gpioread(GPIO_SD_CD));
#else
sdio_mediachange(g_sdiodev, true);
#endif
return OK;
}
#else
# define nsh_sdinitialize() (OK)
#endif
/****************************************************************************
* Name: nsh_usbhostinitialize
*
* Description:
* Initialize SPI-based microSD.
*
****************************************************************************/
#ifdef NSH_HAVE_USBHOST
static int nsh_usbhostinitialize(void)
{
int pid;
int ret;
/* First, register all of the class drivers needed to support the drivers
* that we care about:
*/
syslog(LOG_INFO, "Register class drivers\n");
#ifdef CONFIG_USBHOST_MSC
/* Register the USB host Mass Storage Class */
ret = usbhost_msc_initialize();
if (ret != OK)
{
syslog(LOG_ERR, "ERROR: Failed to register the mass storage class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_CDCACM
/* Register the CDC/ACM serial class */
ret = usbhost_cdcacm_initialize();
if (ret != OK)
{
syslog(LOG_ERR, "ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
}
#endif
/* Then get an instance of the USB host interface */
syslog(LOG_INFO, "Initialize USB host\n");
g_usbconn = lpc17_40_usbhost_initialize(0);
if (g_usbconn)
{
/* Start a thread to handle device connection. */
syslog(LOG_INFO, "Start nsh_waiter\n");
pid = kthread_create("usbhost", CONFIG_USBHOST_DEFPRIO,
CONFIG_USBHOST_STACKSIZE,
(main_t)nsh_waiter, (FAR char * const *)NULL);
return pid < 0 ? -ENOEXEC : OK;
}
return -ENODEV;
}
#else
# define nsh_usbhostinitialize() (OK)
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: lx_cpu_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y :
* Called from the NSH library via boardctl()
*
****************************************************************************/
int lx_cpu_bringup(void)
{
int ret;
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system at the default location, /proc */
ret = mount(NULL, "/proc", "procfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount procfs: %d\n", ret);
}
#endif
/* Initialize SPI-based microSD */
ret = nsh_sdinitialize();
if (ret == OK)
{
/* Initialize USB host */
ret = nsh_usbhostinitialize();
}
#ifdef CONFIG_VIDEO_FB
/* Initialize and register the framebuffer driver */
ret = fb_register(0, 0);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: fb_register() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_CAN
/* Initialize CAN and register the CAN driver. */
ret = lx_cpu_can_setup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: lx_xpu_can_setup failed: %d\n", ret);
}
#endif
return ret;
}

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/************************************************************************************
* boards/zkit-arm-1769/src/lpc17_40_can.c
*
* Copyright (C) 2013 Zilogic Systems. All rights reserved.
* Author: Raashid Muhammed <code@zilogic.com>
*
* Based on boards/olimex-lpc1766stk/src/lpc17_40_can.c
*
* Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/can/can.h>
#include <arch/board/board.h>
#include "chip.h"
#include "up_arch.h"
#include "lpc17_40_can.h"
#include "lx_cpu.h"
#ifdef CONFIG_CAN
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Configuration ********************************************************************/
#define CAN_PORT1 1
#define CAN_PORT2 2
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: zkit_can_setup
*
* Description:
* Initialize CAN and register the CAN device
*
************************************************************************************/
int lx_cpu_can_setup(void)
{
#if defined(CONFIG_LPC17_40_CAN1) || defined(CONFIG_LPC17_40_CAN2)
struct can_dev_s *can;
int ret;
#ifdef CONFIG_LPC17_40_CAN1
/* Call lpc17_40_caninitialize() to get an instance of the CAN1 interface */
can = lpc17_40_caninitialize(CAN_PORT1);
if (can == NULL)
{
canerr("ERROR: Failed to get CAN1 interface\n");
return -ENODEV;
}
/* Register the CAN1 driver at "/dev/can0" */
ret = can_register("/dev/can0", can);
if (ret < 0)
{
canerr("ERROR: CAN1 register failed: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_LPC17_40_CAN2
/* Call lpc17_40_caninitialize() to get an instance of the CAN2 interface */
can = lpc17_40_caninitialize(CAN_PORT2);
if (can == NULL)
{
canerr("ERROR: Failed to get CAN2 interface\n");
return -ENODEV;
}
/* Register the CAN2 driver at "/dev/can1" */
#ifndef CONFIG_LPC17_40_CAN1
ret = can_register("/dev/can0", can);
#else
ret = can_register("/dev/can1", can);
#endif
if (ret < 0)
{
canerr("ERROR: CAN2 register failed: %d\n", ret);
return ret;
}
#endif
return OK;
#else
return -ENODEV;
#endif
}
#endif /* CONFIG_CAN */

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/*****************************************************************************
* boards/pnev5180b/src/lpc17_40_composite.c
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Michael Jung <mijung@gmx.net>
*
* Configure and register CDC-ACM and CDC-ECM
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
/*****************************************************************************
* Included Files
*****************************************************************************/
#include <nuttx/config.h>
#include <syslog.h>
#include <stddef.h>
#include <nuttx/usb/cdcacm.h>
#include <nuttx/usb/cdcecm.h>
#include <nuttx/usb/composite.h>
#if defined(CONFIG_BOARDCTL_USBDEVCTRL) && defined(CONFIG_USBDEV_COMPOSITE)
/*****************************************************************************
* Public Functions
*****************************************************************************/
/*****************************************************************************
* Name: board_composite_initialize
*
* Description:
* Perform architecture specific initialization of a composite USB device.
*
*****************************************************************************/
int board_composite_initialize(int port)
{
syslog(LOG_INFO, "board_composite_initialize(port: %d)\n", port);
return OK;
}
/*****************************************************************************
* Name: board_composite_connect
*
* Description:
* Connect the USB composite device on the specified USB device port using
* the specified configuration. The interpretation of the configid is
* board specific.
*
* Input Parameters:
* port - The USB device port.
* configid - The USB composite configuration
*
* Returned Value:
* A non-NULL handle value is returned on success. NULL is returned on
* any failure.
*
*****************************************************************************/
FAR void *board_composite_connect(int port, int configid)
{
struct composite_devdesc_s dev[2];
int ifnobase = 0;
int strbase = COMPOSITE_NSTRIDS;
syslog(LOG_INFO, "board_composite_connect(port: %d, configid: %d)\n",
port, configid);
/* Configure the CDC/ACM device */
/* Ask the cdcacm driver to fill in the constants we didn't
* know here.
*/
cdcacm_get_composite_devdesc(&dev[0]);
/* Overwrite and correct some values... */
/* The callback functions for the CDC/ACM class */
dev[0].classobject = cdcacm_classobject;
dev[0].uninitialize = cdcacm_uninitialize;
/* Interfaces */
dev[0].devinfo.ifnobase = ifnobase; /* Offset to Interface-IDs */
dev[0].minor = 0; /* The minor interface number */
/* Strings */
dev[0].devinfo.strbase = strbase; /* Offset to String Numbers */
/* Endpoints */
dev[0].devinfo.epno[CDCACM_EP_INTIN_IDX] = 1;
dev[0].devinfo.epno[CDCACM_EP_BULKIN_IDX] = 5;
dev[0].devinfo.epno[CDCACM_EP_BULKOUT_IDX] = 2;
/* Count up the base numbers */
ifnobase += dev[0].devinfo.ninterfaces;
strbase += dev[0].devinfo.nstrings;
/* Configure the CDC/ECM device */
cdcecm_get_composite_devdesc(&dev[1]);
dev[1].devinfo.ifnobase = ifnobase; /* Offset to Interface-IDs */
dev[1].devinfo.strbase = strbase; /* Offset to String Numbers */
dev[1].minor = 0; /* The minor interface number */
dev[1].devinfo.epno[CDCECM_EP_INTIN_IDX] = 4;
dev[1].devinfo.epno[CDCECM_EP_BULKIN_IDX] = 11;
dev[1].devinfo.epno[CDCECM_EP_BULKOUT_IDX] = 8;
return composite_initialize(2, dev);
}
#endif /* CONFIG_BOARDCTL_USBDEVCTRL && CONFIG_USBDEV_COMPOSITE */

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/************************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_sdraminitialize.c
* arch/arm/src/board/lpc17_40_sdraminitialize.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include "nuttx/signal.h"
#include "up_arch.h"
#include "lpc17_40_gpio.h"
#include "up_internal.h"
#include "hardware/lpc17_40_syscon.h"
#include "lpc17_40_emc.h"
#include "lx_cpu.h"
void lx_cpu_fpga_initialize(void)
{
uint32_t regval;
/* Initialze EMC for FPGA */
lpc17_40_configgpio(BOARD_XC_PROGRAM_PIN);
lpc17_40_configgpio(BOARD_XC_DONE_PIN);
lpc17_40_configgpio(BOARD_XC_INIT_PIN);
lpc17_40_configgpio(BOARD_XC_SUSPEND_PIN);
lpc17_40_configgpio(BOARD_XC_RDWR_PIN);
/* Settings:
* 32 bus width
* CS polarity: LOW (ATTENTION: Must match FPGA setup)
* Byte line state: Reads are only 32 bits
* Extended wait: off
* Buffer: disabled
* Write protection: disabled
*/
putreg32(0x00000002, LPC17_40_EMC_STATICCONFIG0);
/* Delays - not measured at this point
* We're running on 72 MHz, FPGA bus is running on 50 MHz async.
* Read: 32 cycles
* Write: 33 cycles
* Turnaround: 2 cycles (cca. 28 ns)
*/
putreg32(0x1F, LPC17_40_EMC_STATICWAITRD0);
putreg32(0x1F, LPC17_40_EMC_STATICWAITWR0);
putreg32(0x01, LPC17_40_EMC_STATICWAITTURN0);
/* Shift addresses by 2 (32-bit bus) */
regval = getreg32(LPC17_40_SYSCON_SCS);
regval &= ~SYSCON_SCS_EMCSC;
putreg32(regval, LPC17_40_SYSCON_SCS);
}

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/****************************************************************************
* config/lx_cpu/src/lpc17_40_nsh.c
* arch/arm/src/board/lpc17_40_nsh.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <unistd.h>
#include <syslog.h>
#include <errno.h>
#include <assert.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/sdio.h>
#include <nuttx/mmcsd.h>
#include <nuttx/usb/usbhost.h>
#include "lpc17_40_gpio.h"
#include "lpc17_40_sdcard.h"
#include "lpc17_40_usbhost.h"
#include "lx_cpu.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#define NSH_HAVE_MMCSD 1
#define NSH_HAVE_USBHOST 1
#define NSH_HAVE_USBHDEV 1
#undef NSH_HAVE_MMCSD_CD
#undef NSH_HAVE_MMCSD_CDINT
/* MMC/SD support */
#if !defined(CONFIG_LPC17_40_SDCARD) || !defined(CONFIG_MMCSD) && !defined(CONFIG_MMCD_SDIO)
# undef NSH_HAVE_MMCSD
#endif
/* Can't support MMC/SD features if mountpoints are disabled */
#if defined(CONFIG_DISABLE_MOUNTPOINT)
# undef NSH_HAVE_MMCSD
#endif
/* MMC/SD support requires that an SPI support is enabled and an SPI port is selected */
#ifdef NSH_HAVE_MMCSD
# if !defined(CONFIG_NSH_MMCSDSLOTNO)
# warning "Assuming slot MMC/SD slot 0"
# define CONFIG_NSH_MMCSDSLOTNO 0
# endif
#endif
#ifdef NSH_HAVE_MMCSD
# if !defined(CONFIG_NSH_MMCSDMINOR)
# warning "Assuming /dev/mmcsd0"
# define CONFIG_NSH_MMCSDMINOR 0
# endif
#endif
/* The SD card detect (CD) signal is on P0[13]. This signal is shared. It is also
* used for MOSI1 and USB_UP_LED. The CD pin may be disconnected. There is a jumper
* on board that enables the CD pin.
*/
#ifdef NSH_HAVE_MMCSD
# ifdef CONFIG_MMCSD_HAVECARDDETECT
# define NSH_HAVE_MMCSD_CD 1
# ifdef CONFIG_GPIO_IRQ
# define NSH_HAVE_MMCSD_CDINT 1
# endif
# endif
#endif
#if defined(NSH_HAVE_MMCSD_CD) && \
(defined(CONFIG_LPC17_40_SSP1) || defined(CONFIG_LPC17_40_USBDEV))
# warning "Use of SD Card Detect pin conflicts with SSP1 and/or USB device"
#endif
/* USB Host */
#ifndef CONFIG_USBHOST
# undef NSH_HAVE_USBHOST
#endif
#ifndef CONFIG_LPC17_40_USBHOST
# undef NSH_HAVE_USBHOST
#endif
#ifdef NSH_HAVE_USBHOST
# ifndef CONFIG_USBHOST_DEFPRIO
# define CONFIG_USBHOST_DEFPRIO 50
# endif
# ifndef CONFIG_USBHOST_STACKSIZE
# ifdef CONFIG_USBHOST_HUB
# define CONFIG_USBHOST_STACKSIZE 1536
# else
# define CONFIG_USBHOST_STACKSIZE 1024
# endif
# endif
#endif
/* USB Device */
#ifndef CONFIG_USBDEV
# undef NSH_HAVE_USBDEV
#endif
#ifndef CONFIG_LPC17_40_USBDEV
# undef NSH_HAVE_USBDEV
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef NSH_HAVE_USBHOST
static struct usbhost_connection_s *g_usbconn;
#endif
#ifdef NSH_HAVE_MMCSD
static FAR struct sdio_dev_s *g_sdiodev;
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: nsh_waiter
*
* Description:
* Wait for USB devices to be connected.
*
****************************************************************************/
#ifdef NSH_HAVE_USBHOST
static int nsh_waiter(int argc, char *argv[])
{
struct usbhost_hubport_s *hport;
syslog(LOG_INFO, "nsh_waiter: Running\n");
for (;;)
{
/* Wait for the device to change state */
DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
syslog(LOG_INFO, "nsh_waiter: %s\n", hport->connected ? "connected" : "disconnected");
/* Did we just become connected? */
if (hport->connected)
{
/* Yes.. enumerate the newly connected device */
(void)CONN_ENUMERATE(g_usbconn, hport);
}
}
/* Keep the compiler from complaining */
return 0;
}
#endif
/****************************************************************************
* Name: nsh_cdinterrupt
*
* Description:
* Card detect interrupt handler.
*
****************************************************************************/
#ifdef NSH_HAVE_MMCSD_CDINT
static int nsh_cdinterrupt(int irq, FAR void *context)
{
static bool inserted = 0xff; /* Impossible value */
bool present;
present = !lpc17_40_gpioread(GPIO_SD_CD);
if (present != inserted)
{
sdio_mediachange(g_sdiodev, present);
inserted = present;
}
return OK;
}
#endif
/****************************************************************************
* Name: nsh_sdinitialize
*
* Description:
* Initialize SPI-based microSD.
*
****************************************************************************/
#ifdef NSH_HAVE_MMCSD
static int nsh_sdinitialize(void)
{
int ret;
#ifdef NSH_HAVE_MMCSD_CD
/* Configure the SD card detect GPIO */
lpc17_40_configgpio(GPIO_SD_CD);
/* Attach an interrupt handler to get notifications when a card is
* inserted or deleted.
*/
#if NSH_HAVE_MMCSD_CDINT
(void)irq_attach(LPC17_40_IRQ_P0p13, nsh_cdinterrupt);
up_enable_irq(LPC17_40_IRQ_P0p13);
#endif
#endif
/* First, get an instance of the SDIO interface */
g_sdiodev = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO);
if (!g_sdiodev)
{
syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n",
CONFIG_NSH_MMCSDSLOTNO);
return -ENODEV;
}
/* Now bind the SDIO interface to the MMC/SD driver */
ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, g_sdiodev);
if (ret != OK)
{
syslog(LOG_ERR,
"ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n",
ret);
return ret;
}
/* Check if there is a card in the slot and inform the SDCARD driver. If
* we do not support the card detect, then let's assume that there is
* one.
*/
#ifdef NSH_HAVE_MMCSD_CD
sdio_mediachange(g_sdiodev, !lpc17_40_gpioread(GPIO_SD_CD));
#else
sdio_mediachange(g_sdiodev, true);
#endif
return OK;
}
#else
# define nsh_sdinitialize() (OK)
#endif
/****************************************************************************
* Name: nsh_usbhostinitialize
*
* Description:
* Initialize SPI-based microSD.
*
****************************************************************************/
#ifdef NSH_HAVE_USBHOST
static int nsh_usbhostinitialize(void)
{
int pid;
int ret;
/* First, register all of the class drivers needed to support the drivers
* that we care about:
*/
syslog(LOG_INFO, "Register class drivers\n");
#ifdef CONFIG_USBHOST_MSC
/* Register the USB host Mass Storage Class */
ret = usbhost_msc_initialize();
if (ret != OK)
{
syslog(LOG_ERR, "ERROR: Failed to register the mass storage class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_CDCACM
/* Register the CDC/ACM serial class */
ret = usbhost_cdcacm_initialize();
if (ret != OK)
{
syslog(LOG_ERR, "ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
}
#endif
/* Then get an instance of the USB host interface */
syslog(LOG_INFO, "Initialize USB host\n");
g_usbconn = lpc17_40_usbhost_initialize(0);
if (g_usbconn)
{
/* Start a thread to handle device connection. */
syslog(LOG_INFO, "Start nsh_waiter\n");
pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO,
CONFIG_USBHOST_STACKSIZE,
(main_t)nsh_waiter, (FAR char * const *)NULL);
return pid < 0 ? -ENOEXEC : OK;
}
return -ENODEV;
}
#else
# define nsh_usbhostinitialize() (OK)
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform architecture specific initialization for NSH.
*
* CONFIG_NSH_ARCHINIT=y :
* Called from the NSH library
*
* CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, &&
* CONFIG_NSH_ARCHINIT=n:
* Called from board_initialize().
*
****************************************************************************/
int board_app_initialize(void)
{
int ret;
/* Initialize SPI-based microSD */
ret = nsh_sdinitialize();
if (ret == OK)
{
/* Initialize USB host */
ret = nsh_usbhostinitialize();
}
return ret;
}

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@ -0,0 +1,78 @@
/****************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_reset.c
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Author: Philippe Coval <p.coval@samsung.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#ifdef CONFIG_BOARDCTL_RESET
/****************************************************************************
* Public functions
****************************************************************************/
/****************************************************************************
* Name: board_reset
*
* Description:
* Reset board. Support for this function is required by board-level
* logic if CONFIG_BOARDCTL_RESET is selected.
*
* Input Parameters:
* status - Status information provided with the reset event. This
* meaning of this status information is board-specific. If not
* used by a board, the value zero may be provided in calls to
* board_reset().
*
* Returned Value:
* If this function returns, then it was not possible to power-off the
* board due to some constraints. The return value int this case is a
* board-specific reason for the failure to shutdown.
*
****************************************************************************/
int board_reset(int status)
{
up_systemreset();
return 0;
}
#endif /* CONFIG_BOARDCTL_RESET */

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@ -0,0 +1,552 @@
/************************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_sdraminitialize.c
* arch/arm/src/board/lpc17_40_sdraminitialize.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include "nuttx/signal.h"
#include "up_arch.h"
#include "up_internal.h"
#include "hardware/lpc17_40_syscon.h"
#include "lpc17_40_emc.h"
#include "lx_cpu.h"
#if defined(CONFIG_LPC17_40_EMC) && defined(CONFIG_LPC17_40_EXTDRAM)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* The core clock is LPC17_40_EMCCLK which may be either LPC17_40_CCLK* (undivided), or
* LPC17_40_CCLK / 2 as determined by settings in the board.h header file.
*
* For example:
* LPC17_40_CCLCK = 120,000,000
* EMCCLKSEL -> LPC17_40_CCLK divided by 2
* LPC17_40_EMCCLK = 60,000,000
* LPC17_40_EMCCLK_MHZ = 60 (Rounded to an integer)
* EMC_NSPERCLK = 16.667 (Represented with 4 bits of fraction, 267)
*
* EMC_NS2CLK(63) = ((63 << 4) + 266) / 267 = 4 (actual 3.78)
* EMC_NS2CLK(20) = ((20 << 4) + 266) / 267 = 2 (actual 1.20)
*/
#define LPC17_40_EMCCLK_MHZ ((LPC17_40_EMCCLK + 500000) / 1000000)
#define EMC_NSPERCLK_B4 (((1000 << 4) + (LPC17_40_EMCCLK_MHZ >> 1)) / LPC17_40_EMCCLK_MHZ)
#define EMC_NS2CLK(ns) (((ns << 4) + (EMC_NSPERCLK_B4 - 1)) / EMC_NSPERCLK_B4)
#define MDKCFG_RASVAL 2
#define MDKCFG_CASVAL 2
/* Set up for 32-bit SDRAM at CS0 */
#ifdef CONFIG_LPC17_40_EXTDRAMSIZE
# define SDRAM_SIZE CONFIG_LPC17_40_EXTDRAMSIZE
#endif
#ifdef CONFIG_LPC17_40_SDRAM_16BIT
# ifndef SDRAM_SIZE
# define SDRAM_SIZE 0x02000000 /* 256Mbit */
# endif
#else /* if defined(CONFIG_LPC17_40_SDRAM_32BIT) */
# undef CONFIG_LPC17_40_SDRAM_32BIT
# define CONFIG_LPC17_40_SDRAM_32BIT 1
# ifndef SDRAM_SIZE
# define SDRAM_SIZE 0x04000000 /* 512Mbit */
# endif
#endif
#define SDRAM_BASE 0xa0000000 /* CS0 */
/****************************************************************************
* Private Data
****************************************************************************/
static volatile uint32_t lx_cpu_ringosccount[2] = {0,0};
/****************************************************************************
* Private Functions
****************************************************************************/
/*****************************************************************************
* Name:
* lx_cpu_running_from_sdram
*
* Descriptions:
* Check whether currently execution from SDRAM.
*
* Returned value:
* 1 running from SDRAM, otherwise 0
*
****************************************************************************/
static int lx_cpu_running_from_sdram(void)
{
uint32_t extdram_bank_size = LPC17_40_EXTDRAM_CS3 - LPC17_40_EXTDRAM_CS2;
uint32_t extdram_end = LPC17_40_EXTDRAM_CS3 + extdram_bank_size;
if (((uint32_t)lx_cpu_running_from_sdram >= LPC17_40_EXTDRAM_CS0) &&
((uint32_t)lx_cpu_running_from_sdram < extdram_end))
return 1;
else
return 0;
}
/* SDRAM code based on NXP application notes and emc_sdram.c example */
/*****************************************************************************
* Name:
* lx_cpu_sdram_test
*
* Descriptions:
* sdram test
*
* Returned value:
* 1 if test passed, otherwise 0
*
****************************************************************************/
static uint32_t lx_cpu_sdram_test( void )
{
volatile uint32_t *wr_ptr;
volatile uint16_t *short_wr_ptr;
uint32_t data;
uint32_t i, j;
wr_ptr = (uint32_t *)LPC17_40_EXTDRAM_CS0;
short_wr_ptr = (uint16_t *)wr_ptr;
/* 16 bit write */
for (i = 0; i < 64; i++)
{
for (j = 0; j < 0x100; j++)
{
*short_wr_ptr++ = (i + j);
*short_wr_ptr++ = (i + j) + 1;
}
}
/* Verifying */
wr_ptr = (uint32_t *)LPC17_40_EXTDRAM_CS0;
for (i = 0; i < 64; i++)
{
for (j = 0; j < 0x100; j++)
{
data = *wr_ptr;
if (data != (((((i + j) + 1) & 0xFFFF) << 16) | ((i + j) & 0xFFFF)))
{
return 0x0;
}
wr_ptr++;
}
}
return 0x1;
}
/****************************************************************************
* Name: find_cmddly
*
* Descriptions:
* find CMDDLY
*
* Returned value:
* 1 if test passed, otherwise 0
*
****************************************************************************/
static uint32_t lx_cpu_sdram_find_cmddly(void)
{
uint32_t cmddly, cmddlystart, cmddlyend, regval;
uint32_t ppass = 0x0, pass = 0x0;
cmddly = 0x0;
cmddlystart = cmddlyend = 0xFF;
while (cmddly < 32)
{
regval = getreg32(LPC17_40_SYSCON_EMCDLYCTL);
regval &= ~SYSCON_EMCDLYCTL_CMDDLY_MASK;
regval |= cmddly << SYSCON_EMCDLYCTL_CMDDLY_SHIFT;
putreg32(regval, LPC17_40_SYSCON_EMCDLYCTL);
if (lx_cpu_sdram_test() == 0x1)
{
/* Test passed */
if (cmddlystart == 0xFF)
{
cmddlystart = cmddly;
}
ppass = 0x1;
}
else
{
/* Test failed */
if (ppass == 1)
{
cmddlyend = cmddly;
pass = 0x1;
ppass = 0x0;
}
}
/* Try next value */
cmddly++;
}
/* If the test passed, the we can use the average of the min and max
* values to get an optimal DQSIN delay
*/
if (pass == 0x1)
{
cmddly = (cmddlystart + cmddlyend) / 2;
}
else if (ppass == 0x1)
{
cmddly = (cmddlystart + 0x1F) / 2;
}
else
{
/* A working value couldn't be found, just pick something
* safe so the system doesn't become unstable
*/
cmddly = 0x10;
}
regval = getreg32(LPC17_40_SYSCON_EMCDLYCTL);
regval &= ~SYSCON_EMCDLYCTL_CMDDLY_MASK;
regval |= cmddly << SYSCON_EMCDLYCTL_CMDDLY_SHIFT;
putreg32(regval, LPC17_40_SYSCON_EMCDLYCTL);
return (pass | ppass);
}
/****************************************************************************
* Name: lx_cpu_sdram_find_fbclkdly
*
* Descriptions:
* find FBCLKDLY
*
* Returned value:
* 1 if test passed, otherwise 0
*
****************************************************************************/
static uint32_t lx_cpu_sdram_find_fbclkdly(void)
{
uint32_t fbclkdly, fbclkdlystart, fbclkdlyend, regval;
uint32_t ppass = 0x0, pass = 0x0;
fbclkdly = 0x0;
fbclkdlystart = fbclkdlyend = 0xFF;
while (fbclkdly < 32)
{
regval = getreg32(LPC17_40_SYSCON_EMCDLYCTL);
regval &= ~SYSCON_EMCDLYCTL_FBCLKDLY_MASK;
regval |= fbclkdly << SYSCON_EMCDLYCTL_FBCLKDLY_SHIFT;
putreg32(regval, LPC17_40_SYSCON_EMCDLYCTL);
if (lx_cpu_sdram_test() == 0x1)
{
/* Test passed */
if (fbclkdlystart == 0xFF)
{
fbclkdlystart = fbclkdly;
}
ppass = 0x1;
}
else
{
/* Test failed */
if (ppass == 1)
{
fbclkdlyend = fbclkdly;
pass = 0x1;
ppass = 0x0;
}
}
/* Try next value */
fbclkdly++;
}
/* If the test passed, the we can use the average of the
* min and max values to get an optimal DQSIN delay
*/
if (pass == 0x1)
{
fbclkdly = (fbclkdlystart + fbclkdlyend) / 2;
}
else if (ppass == 0x1)
{
fbclkdly = (fbclkdlystart + 0x1F) / 2;
}
else
{
/* A working value couldn't be found, just pick something
* safe so the system doesn't become unstable
*/
fbclkdly = 0x10;
}
regval = getreg32(LPC17_40_SYSCON_EMCDLYCTL);
regval &= ~SYSCON_EMCDLYCTL_FBCLKDLY_MASK;
regval |= fbclkdly << SYSCON_EMCDLYCTL_FBCLKDLY_SHIFT;
putreg32(regval, LPC17_40_SYSCON_EMCDLYCTL);
return (pass | ppass);
}
/****************************************************************************
* Name: lx_cpu_sdram_calibration
*
* Descriptions:
* Calibration
*
* Returned value:
* current ring osc count
*
****************************************************************************/
static uint32_t lx_cpu_sdram_calibration( void )
{
uint32_t regval, i;
uint32_t cnt = 0;
for (i = 0; i < 10; i++)
{
regval = getreg32(LPC17_40_SYSCON_EMCCAL);
regval |= SYSCON_EMCCAL_START_MASK;
putreg32(regval, LPC17_40_SYSCON_EMCCAL);
regval = getreg32(LPC17_40_SYSCON_EMCCAL);
while ((regval & SYSCON_EMCCAL_DONE_SHIFT) == 0)
{
regval = getreg32(LPC17_40_SYSCON_EMCCAL);
}
cnt += (regval & 0xFF);
}
return (cnt / 10);
}
/****************************************************************************
* Name: lx_cpu_sdram_adjust_timing
*
* Descriptions:
* Adjust timing
*
* Returned value:
* None
*
****************************************************************************/
static void lx_cpu_sdram_adjust_timing( void )
{
uint32_t regval, cmddly, fbclkdly;
/* Current value */
lx_cpu_ringosccount[1] = lx_cpu_sdram_calibration();
regval = getreg32(LPC17_40_SYSCON_EMCDLYCTL);
cmddly = regval & SYSCON_EMCDLYCTL_CMDDLY_MASK;
cmddly >>= SYSCON_EMCDLYCTL_CMDDLY_SHIFT;
cmddly = cmddly * lx_cpu_ringosccount[0] / lx_cpu_ringosccount[1];
cmddly <<= SYSCON_EMCDLYCTL_CMDDLY_SHIFT;
cmddly &= SYSCON_EMCDLYCTL_CMDDLY_MASK;
fbclkdly = regval & SYSCON_EMCDLYCTL_FBCLKDLY_MASK;
fbclkdly >>= SYSCON_EMCDLYCTL_FBCLKDLY_SHIFT;
fbclkdly = fbclkdly * lx_cpu_ringosccount[0] / lx_cpu_ringosccount[1];
fbclkdly <<= SYSCON_EMCDLYCTL_FBCLKDLY_SHIFT;
fbclkdly &= SYSCON_EMCDLYCTL_FBCLKDLY_MASK;
regval &= ~SYSCON_EMCDLYCTL_CMDDLY_MASK | SYSCON_EMCDLYCTL_FBCLKDLY_MASK;
regval |= cmddly | fbclkdly;
putreg32(regval, LPC17_40_SYSCON_EMCDLYCTL);
}
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Name: lpc17_40_setup_sdram
*
* Descriptions:
* Setup SDRAM
*
* Returned value:
* Return negative value if SDRAM Fails
*
****************************************************************************/
void lx_cpu_sdram_initialize(void)
{
uint32_t regval;
uint32_t dynctl;
uint32_t modeval;
volatile uint32_t delay;
if (lx_cpu_running_from_sdram())
return;
/*
* Memory MT48LC4M32B2P
* 4 Meg x 32 (1 Meg x 32 x 4 banks)
* Configuration 1 Meg x 32 x 4 banks
* Refresh count 4K
* Row addressing 4K 12-bit A[11:0]
* Bank addressing 4 2-bit BA[1:0]
* Column addressing 256 8-bit A[7:0]
*/
/* Reconfigure delays:
*
* CMDDLY: Programmable delay value for EMC outputs in command delayed
* mode. The delay amount is roughly CMDDLY * 250 picoseconds.
* FBCLKDLY: Programmable delay value for the feedback clock that controls
* input data sampling. The delay amount is roughly (FBCLKDLY+1) * 250
* picoseconds.
* CLKOUT0DLY: Programmable delay value for the CLKOUT0 output. This would
* typically be used in clock delayed mode. The delay amount is roughly
* (CLKOUT0DLY+1) * 250 picoseconds.
* CLKOUT1DLY: Programmable delay value for the CLKOUT1 output. This would
* typically be used in clock delayed mode. The delay amount is roughly
* (CLKOUT1DLY+1) * 250 picoseconds.
*/
regval = SYSCON_EMCDLYCTL_CMDDLY(32) |
SYSCON_EMCDLYCTL_FBCLKDLY(32) |
SYSCON_EMCDLYCTL_CLKOUT0DLY(1) |
SYSCON_EMCDLYCTL_CLKOUT1DLY(1);
putreg32(regval, LPC17_40_SYSCON_EMCDLYCTL);
putreg32(0, LPC17_40_EMC_CONFIG);
/* Timing for 72 MHz Bus */
regval = MDKCFG_CASVAL << EMC_DYNAMICRASCAS_CAS_SHIFT;
regval |= MDKCFG_RASVAL << EMC_DYNAMICRASCAS_RAS_SHIFT;
putreg32(regval, LPC17_40_EMC_DYNAMICRASCAS0); /* 2 RAS, 2 CAS latency */
putreg32(1, LPC17_40_EMC_DYNAMICREADCONFIG); /* Command delayed strategy, using EMCCLKDELAY */
/* EMC_NS2CLK(20) TRP = 20 nS */
putreg32(1, LPC17_40_EMC_DYNAMICRP); /* ( n + 1 ) -> 2 clock cycles */
putreg32(3, LPC17_40_EMC_DYNAMICRAS); /* ( n + 1 ) -> 4 clock cycles */
putreg32(5, LPC17_40_EMC_DYNAMICSREX); /* ( n + 1 ) -> 6 clock cycles */
putreg32(2, LPC17_40_EMC_DYNAMICAPR); /* ( n + 1 ) -> 3 clock cycles */
/* EMC_NS2CLK(20) + 2 TRP + TDPL = 20ns + 2clk */
putreg32(3, LPC17_40_EMC_DYNAMICDAL); /* ( n ) -> 3 clock cycles */
putreg32(1, LPC17_40_EMC_DYNAMICWR); /* ( n + 1 ) -> 2 clock cycles */
/* EMC_NS2CLK(63) */
putreg32(4, LPC17_40_EMC_DYNAMICRC); /* ( n + 1 ) -> 5 clock cycles */
/* EMC_NS2CLK(63) */
putreg32(4, LPC17_40_EMC_DYNAMICRFC); /* ( n + 1 ) -> 5 clock cycles */
putreg32(5, LPC17_40_EMC_DYNAMICXSR); /* ( n + 1 ) -> 6 clock cycles */
/* EMC_NS2CLK(63) */
putreg32(1, LPC17_40_EMC_DYNAMICRRD); /* ( n + 1 ) -> 2 clock cycles */
putreg32(1, LPC17_40_EMC_STATICEXTENDEDWAIT); /* ( n + 1 ) -> 2 clock cycles */
dynctl = EMC_DYNAMICCONTROL_CE | EMC_DYNAMICCONTROL_CS;
up_mdelay(100);
regval = dynctl | EMC_DYNAMICCONTROL_I_NOP;
putreg32(regval, LPC17_40_EMC_DYNAMICCONTROL); /* Issue NOP command */
up_mdelay(200); /* wait 200ms */
regval = dynctl | EMC_DYNAMICCONTROL_I_PALL;
putreg32(regval, LPC17_40_EMC_DYNAMICCONTROL); /* Issue PAL command */
putreg32(2, LPC17_40_EMC_DYNAMICREFRESH); /* ( n * 16 ) -> 32 clock cycles */
for(delay = 0; delay < 0x80; delay++); /* wait 128 AHB clock cycles */
/* Timing for 72MHz Bus */
/* ( n * 16 ) -> 1120 clock cycles -> 15.556uS at 72MHz <= 15.625uS ( 64ms / 4096 row ) */
regval = 64000000 / (1 << 12);
regval -= 16;
regval >>= 4;
regval = regval * LPC17_40_EMCCLK_MHZ / 1000;
putreg32(regval, LPC17_40_EMC_DYNAMICREFRESH);
regval = dynctl | EMC_DYNAMICCONTROL_I_MODE;
putreg32(regval, LPC17_40_EMC_DYNAMICCONTROL); /* Issue MODE command */
/* Timing for 48/60/72MHZ Bus */
modeval = LPC17_40_EXTDRAM_CS0;
modeval |= 0x22 << (2 + 2 + 9); /* 4 burst, 2 CAS latency */
regval = *(volatile uint32_t *)modeval;
putreg32(EMC_DYNAMICCONTROL_I_NORMAL, LPC17_40_EMC_DYNAMICCONTROL); /* Issue NORMAL command */
/* [re]enable buffers */
/* 256MB, 8Mx32, 4 banks, row=12, column=9 */
regval = EMC_DYNAMICCONFIG_MD_SDRAM;
regval |= 9 << EMC_DYNAMICCONFIG_AM0_SHIFT;
regval |= 1 * EMC_DYNAMICCONFIG_AM1;
regval |= EMC_DYNAMICCONFIG_B;
putreg32(regval, LPC17_40_EMC_DYNAMICCONFIG0);
/* Nominal value */
lx_cpu_ringosccount[0] = lx_cpu_sdram_calibration();
if (lx_cpu_sdram_find_cmddly() == 0x0)
{
return; /* fatal error */
}
if (lx_cpu_sdram_find_fbclkdly() == 0x0)
{
return; /* fatal error */
}
lx_cpu_sdram_adjust_timing();
return;
}
#endif /* CONFIG_LPC17_40_EMC && CONFIG_LPC17_40_EXTDRAM */

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@ -0,0 +1,179 @@
/****************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_ssp.c
* arch/arm/src/board/lpc17_40_ssp.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "chip.h"
#include "lpc17_40_gpio.h"
#include "lpc17_40_ssp.h"
#include "lx_cpu.h"
#if defined(CONFIG_LPC17_40_SSP0) || defined(CONFIG_LPC17_40_SSP1) || \
defined(CONFIG_LPC17_40_SSP2)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Dump GPIO registers */
#ifdef CONFIG_DEBUG_GPIO_INFO
# define ssp_dumpgpio(p,m) lpc17_40_dumpgpio(p,m)
#else
# define ssp_dumpgpio(p,m)
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: lx_cpu_sspdev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the LPC1766-STK.
*
****************************************************************************/
void weak_function lx_cpu_sspdev_initialize(void)
{
/* Configure the SSP0 chip select GPIOs. */
#ifdef CONFIG_LPC17_40_SSP0
#endif
/* Configure SSP1 chip select GPIOs. This includes the touchscreen on the
* the LCD module.
*/
#ifdef CONFIG_LPC17_40_SSP1
ssp_dumpgpio(GPIO_TC_CS, "BEFORE SSP1 Initialization");
lpc17_40_configgpio(GPIO_TC_CS);
ssp_dumpgpio(GPIO_TC_CS, "AFTER SSP1 Initialization");
#endif
/* Configure the SSP2 chip select GPIOs. */
#ifdef CONFIG_LPC17_40_SSP2
#endif
}
/************************************************************************************
* Name: lpc17_40_ssp0/1/2select and lpc17_40_ssp0/1/2status
*
* Description:
* The external functions, lpc17_40_ssp0/1/2select and lpc17_40_ssp0/1/2status
* must be provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi/spi.h). All other methods (including lpc17_40_sspbus_initialize())
* are provided by common LPC17xx logic. To use this common SPI logic on your
* board:
*
* 1. Provide logic in lpc17_40_boardinitialize() to configure SPI/SSP chip select
* pins.
* 2. Provide lpc17_40_ssp0/1/2select() and lpc17_40_ssp0/1/2status() functions
* in your board-specific logic. These functions will perform chip selection
* and status operations using GPIOs in the way your board is configured.
* 3. Add a calls to lpc17_40_sspbus_initialize() in your low level application
* initialization logic
* 4. The handle returned by lpc17_40_sspbus_initialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
************************************************************************************/
#ifdef CONFIG_LPC17_40_SSP0
void lpc17_40_ssp0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t lpc17_40_ssp0status(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning nothing\n");
return 0;
}
#endif
#ifdef CONFIG_LPC17_40_SSP1
void lpc17_40_ssp1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
if (devid == SPIDEV_TOUCHSCREEN(0))
{
/* Assert/de-assert the CS pin to the touchscreen */
ssp_dumpgpio(GPIO_TC_CS, "lpc17_40_ssp1select() Entry");
lpc17_40_gpiowrite(GPIO_TC_CS, !selected);
ssp_dumpgpio(GPIO_TC_CS, "lpc17_40_ssp1select() Exit");
}
}
uint8_t lpc17_40_ssp1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning nothing\n");
return 0;
}
#endif
#ifdef CONFIG_LPC17_40_SSP2
void lpc17_40_ssp2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t lpc17_40_ssp2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning nothing\n");
return 0;
}
#endif
#endif /* CONFIG_LPC17_40_SSP0 || CONFIG_LPC17_40_SSP1 || CONFIG_LPC17_40_SSP2 */

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/****************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_userleds.c
* arch/arm/src/board/lpc17_40_userleds.c
*
* Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/power/pm.h>
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "lpc17_40_gpio.h"
#include "lx_cpu.h"
#ifndef CONFIG_ARCH_LEDS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Dump GPIO registers */
#ifdef CONFIG_DEBUG_LEDS_INFO
# define led_dumpgpio(m) lpc17_40_dumpgpio(???, m)
#else
# define led_dumpgpio(m)
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/* This array maps an LED number to GPIO pin configuration */
static uint32_t g_ledcfg[BOARD_NLEDS] =
{
GPIO_LED1, GPIO_LED2
};
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_userled_initialize
****************************************************************************/
void board_userled_initialize(void)
{
/* Configure LED1-2 GPIOs for output */
lpc17_40_configgpio(GPIO_LED1);
lpc17_40_configgpio(GPIO_LED2);
}
/****************************************************************************
* Name: board_userled
****************************************************************************/
void board_userled(int led, bool ledon)
{
if ((unsigned)led < BOARD_NLEDS)
{
lpc17_40_gpiowrite(g_ledcfg[led], ledon);
}
}
/****************************************************************************
* Name: board_userled_all
****************************************************************************/
void board_userled_all(uint8_t ledset)
{
lpc17_40_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0);
lpc17_40_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0);
}
#endif /* !CONFIG_ARCH_LEDS */

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@ -0,0 +1,178 @@
/************************************************************************************
* boards/arm/lpc17xx_40xx/lx_cpu/src/lx_cpu.h
* arch/arm/src/board/lx_cpu.n
*
* Copyright (C) 2013, 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef _CONFIGS_LX_CPU_SRC_LX_CPU_H
#define _CONFIGS_LX_CPU_SRC_LX_CPU_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* LX_CPU GPIO Pin Definitions ****************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following definitions are used to access individual LEDs.
*
* LED1 -- Connected to P1[29] RED
* LED2 -- Connected to P0[16] GREEN
*
* These LEDs are connecte to ground so a high output value will illuminate them.
*/
#define GPIO_LED1 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN29)
#define GPIO_LED2 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN16)
/* SD Card **************************************************************************/
/* The SD card detect (CD) signal is on P0[13]. This signal is shared. It is also
* used for MOSI1 and USB_UP_LED. The CD pin may be disconnected. There is a jumper
* on board that enables the CD pin.
*
* The CD pin is interrupting:
*/
#define GPIO_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN13)
/* LCD ******************************************************************************/
/* Backlight enable, P2[1]. Initial state is OFF (zero) */
#define GPIO_LCD_BL (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN1)
/* XPT2046 Touchscreen **************************************************************/
/* -------------- -------------------- ------------ --------------------------------
* XTPT2046 Module Module LX_CPU LED
* Signal Connector Connector
* -------------- -------------------- ------------ ---------------------------------
* Pin 11 PENIRQ\ PENIRQ (pulled high) PORT3 Pin 1 P2.15 PENIRQ
* Pin 12 DOUT MISO PORT3 Pin 4 P1.18 MISO1 (Also USB HOST UP LED)
* Pin 13 BUSY BUSY (pulled high) PORT3 Pin 9 P2.14 BUSY
* Pin 14 DIN MOSI PORT3 Pin 3 P0.13 MOSI1 (Also USB Device up LED and SD CD pin)
* Pin 15 CS\ SSEL (pulled high) PORT3 Pin 6 P1.8 GPIO (Also RMII_CRS_DV)
* Pin 16 DCLK SCK PORT3 Pin 5 P1.19 SCK1
* -------------- -------------------- ------------ ---------------------------------
*
* Pins should not need to be configured as pull-ups because, according to the LCD
* schematic, the are pulled-up on board the LCD module.
*/
#define GPIO_TC_PENIRQ (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT2 | GPIO_PIN15)
#define GPIO_TC_BUSY (GPIO_INPUT | GPIO_FLOAT | GPIO_PORT2 | GPIO_PIN14)
#define GPIO_TC_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN8)
#define LPC17_40_IRQ_PENIRQ LPC17_40_IRQ_P2p15
/************************************************************************************
* Public data
************************************************************************************/
#ifndef __ASSEMBLY__
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: lx_cpu_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_INITIALIZE=y :
* Called from board_initialize().
*
* CONFIG_BOARD_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y :
* Called from the NSH library via boardctl()
*
************************************************************************************/
int lx_cpu_bringup(void);
/************************************************************************************
* Name: lx_cpu_sspdev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the WaveShare LX_CPU board.
*
************************************************************************************/
void weak_function lx_cpu_sspdev_initialize(void);
/************************************************************************************
* Name: lx_cpu_sdram_initialize
*
* Description:
* Initialize SDRAM
*
************************************************************************************/
#ifdef CONFIG_LPC17_40_EMC
#ifdef CONFIG_LPC17_40_EXTDRAM
void lx_cpu_sdram_initialize(void);
#endif
/************************************************************************************
* Name: lx_cpu_fpga_initialize
*
* Description:
* Initialize FPGA chipselect
*
************************************************************************************/
void lx_cpu_fpga_initialize(void);
#endif /* CONFIG_LPC17_40_EMC */
/************************************************************************************
* Name: lx_cpu_can_setup
*
* Description:
* Initialize CAN and register the CAN device
*
************************************************************************************/
#ifdef CONFIG_CAN
int lx_cpu_can_setup(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* _CONFIGS_LX_CPU_SRC_LX_CPU_H */

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#set endian big
target remote localhost:3333
#load

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interface ftdi
#ftdi_device_desc "Dual RS232"

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#!/bin/sh
SCRIP_DIR="$(dirname "$(readlink -f "$0")")"
nc -w 3 -z localhost 4444
if [ $? -ne 0 ]
then
echo "Starting OpenOCD"
openocd -f "$SCRIP_DIR/lx_cpu-lpc4088.cfg" &
OPENOCD_PID=$!
nc -w 10 -z localhost 4444
if [ $? -ne 0 ]
then
echo "OpenOCD start failed"
fi
fi
sleep 10
ddd --debugger arm-elf-gdb -x "$SCRIP_DIR/gdb-openocd.init" "$1"
kill $OPENOCD_PID

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# This is configuration for PiKRON's LX_CPU1 based on NXP LPC4088 chip.
# http://pikron.com/pages/products/cpu_boards/lx_cpu.html
#daemon configuration
telnet_port 4444
gdb_port 3333
adapter_khz 1000
source [find jt_usb5-jtag.cfg]
source [find target/lpc40xx.cfg]
init
reset init
#wait_halt
resume
sleep 1000
halt
wait_halt
adapter_khz 1000

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#!/bin/sh
#
# See boards/arm/lpc17xx_40xx/lx_cpu/README.txt for information about
# this file.
TOPDIR=$1
USAGE="$0 <TOPDIR> [-d]"
if [ -z "${TOPDIR}" ]; then
echo "Missing argument"
echo $USAGE
exit 1
fi
# Assume that OpenOCD was installed and at /usr/local/bin. Uncomment
# the following to run directly from the build directory
# OPENOCD_PATH="/home/OpenOCD/openocd/src"
# OPENOCD_PATH="/usr/bin"
OPENOCD_PATH="/usr/local/bin"
# TARGET_PATH="/home/OpenOCD/openocd/tcl"
# TARGET_PATH="/usr/share/openocd/scripts"
TARGET_PATH="/usr/local/share/openocd/scripts"
# Assume a Unix development environment. Uncomment to use a Windows
# like environment
OPENOCD_EXE=openocd.exe
# OPENOCD_EXE=openocd
OPENOCD_CFG="${TOPDIR}/boards/arm/lpc17xx_40xx/lx_cpu/tools/lx_cpu-lpc4088.cfg"
OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}"
if [ "X$2" = "X-d" ]; then
OPENOCD_ARGS=$OPENOCD_ARGS" -d3"
set -x
fi
if [ ! -d ${OPENOCD_PATH} ]; then
echo "OpenOCD path does not exist: ${OPENOCD_PATH}"
exit 1
fi
if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then
echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}"
exit 1
fi
if [ ! -f ${OPENOCD_CFG} ]; then
echo "OpenOCD config file does not exist: ${OPENOCD_CFG}"
exit 1
fi
echo "Starting OpenOCD"
cd ${OPENOCD_PATH} || { echo "Failed to CD to ${OPENOCD_PATH}"; exit 1; }
${OPENOCD_EXE} ${OPENOCD_ARGS} &
echo "OpenOCD daemon started"
ps -ef | grep openocd
echo "In GDB: target remote localhost:3333"

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#daemon configuration
telnet_port 4444
gdb_port 3333
adapter_khz 5000
source [find lx_cpu-lpc4088.cfg]
init
reset halt
wait_halt
adapter_khz 5000