Documentation: Remove CONFIG_ARMV7M_USEBASEPRI from code base
since the basepri is always used without any configuraion Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
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4 changed files with 3 additions and 22 deletions
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@ -7,20 +7,9 @@ framework dedicated for complex embedded systems.
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This page contains notes on running some of NuttX boards on Renode.
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This page contains notes on running some of NuttX boards on Renode.
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ARM-v7m
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=======
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Renode doesn't correctly handle ``SVC`` instruction escalation to HardFault
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when ``PRIMASK=1`` which crashs NuttX in the first ``up_exit()`` call.
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We can work around this problem by enabling BASEPRI::
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CONFIG_ARMV7M_USEBASEPRI=y
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stm32f4discovery
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stm32f4discovery
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================
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================
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``CONFIG_ARMV7M_USEBASEPRI=y`` must be set.
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Renode doesn't support CCM memory, so we have to disable it
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Renode doesn't support CCM memory, so we have to disable it
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with ``CONFIG_MM_REGIONS=1``.
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with ``CONFIG_MM_REGIONS=1``.
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@ -55,8 +44,6 @@ Doesn't work. No BASEPRI implementation for ``Cotex-M0`` in NuttX.
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nrf52840-dk
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nrf52840-dk
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===========
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===========
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``CONFIG_ARMV7M_USEBASEPRI=y`` must be set.
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At default Renode uses UART with EasyDMA enabled (UARTE) which is not supported
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At default Renode uses UART with EasyDMA enabled (UARTE) which is not supported
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by Nuttx yet. We can get around this by creating our own machine description
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by Nuttx yet. We can get around this by creating our own machine description
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based on Renode default implementation::
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based on Renode default implementation::
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@ -101,7 +88,7 @@ Known issues:
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stm32f746g-disco
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stm32f746g-disco
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================
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================
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``CONFIG_ARMV7M_USEBASEPRI=y`` and ``CONFIG_ARMV7M_BASEPRI_WAR=y`` must be set.
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``CONFIG_ARMV7M_BASEPRI_WAR=y`` must be set.
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Renode script::
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Renode script::
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@ -131,8 +118,6 @@ Known issues:
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nucleo-h743zi
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nucleo-h743zi
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=============
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=============
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``CONFIG_ARMV7M_USEBASEPRI=y`` must be set.
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Renode doesn't support ``PWR_CSR1_ACTVOSRDY`` bit so we have to disable
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Renode doesn't support ``PWR_CSR1_ACTVOSRDY`` bit so we have to disable
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it with ``CONFIG_STM32H7_PWR_IGNORE_ACTVOSRDY=y``.
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it with ``CONFIG_STM32H7_PWR_IGNORE_ACTVOSRDY=y``.
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@ -216,8 +216,6 @@ Configuration Options
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``CONFIG_ARCH_HIPRI_INTERRUPT``
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``CONFIG_ARCH_HIPRI_INTERRUPT``
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If ``CONFIG_ARMV7M_USEBASEPRI`` is selected, then interrupts will be
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disabled by setting the *BASEPRI* register to
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``NVIC_SYSH_DISABLE_PRIORITY`` so that most interrupts will not have
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``NVIC_SYSH_DISABLE_PRIORITY`` so that most interrupts will not have
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execution priority. *SVCall* must have execution priority in all
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execution priority. *SVCall* must have execution priority in all
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cases.
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cases.
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@ -110,7 +110,6 @@ If you are going to use a debugger, you should make sure that the following
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settings are selection in your configuration file::
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settings are selection in your configuration file::
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CONFIG_DEBUG_SYMBOLS=y : Enable debug symbols in the build
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CONFIG_DEBUG_SYMBOLS=y : Enable debug symbols in the build
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CONFIG_ARMV7M_USEBASEPRI=y : Use the BASEPRI register to disable interrupts
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STM32 ST-LINK Utility
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STM32 ST-LINK Utility
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---------------------
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---------------------
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@ -226,7 +226,6 @@ If you are going to use a debugger, you should make sure that the following
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settings are selection in your configuration file::
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settings are selection in your configuration file::
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CONFIG_DEBUG_SYMBOLS=y : Enable debug symbols in the build
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CONFIG_DEBUG_SYMBOLS=y : Enable debug symbols in the build
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CONFIG_ARMV7M_USEBASEPRI=y : Use the BASEPRI register to disable interrupts
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STM32 ST-LINK Utility
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STM32 ST-LINK Utility
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---------------------
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---------------------
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